On Wed, Dec 20, 2017 at 12:26:30PM -0800, Yonghong Song wrote:
>
>
> On 12/20/17 12:19 PM, Roman Gushchin wrote:
> > Bpftool determines it's own version based on the kernel
> > version, which is picked from the linux/version.h header.
> >
> > It's strange to use the version of the installed kern
On Tue, Dec 19, 2017 at 03:15:39PM +0530, Kishon Vijay Abraham I wrote:
> DRA72 uses USB3 PHY for the 2nd lane of PCIE. Add dt bindings property
> to indicate if the USB3 PHY should be used for 2nd lane of PCIe.
>
> Signed-off-by: Kishon Vijay Abraham I
> ---
> Documentation/devicetree/bindings/
On Wed, Dec 20, 2017 at 12:29:21PM -0800, Jakub Kicinski wrote:
> On Wed, 20 Dec 2017 20:19:43 +, Roman Gushchin wrote:
> > Bpftool determines it's own version based on the kernel
> > version, which is picked from the linux/version.h header.
> >
> > It's strange to use the version of the insta
While testing other changes, I discovered that gcc-7.2.1 produces badly
optimized code for aes_encrypt/aes_decrypt. This is especially true when
CONFIG_UBSAN_SANITIZE_ALL is enabled, where it leads to extremely
large stack usage that in turn might cause kernel stack overflows:
crypto/aes_generic.c
Add code implementing managed version of serdev_device_open() for
serdev device drivers that "open" the device during driver's lifecycle
only once (e.g. opened in .probe() and closed in .remove()).
Cc: linux-kernel@vger.kernel.org
Cc: linux-ser...@vger.kernel.org
Cc: Rob Herring
Cc: cphe...@gmail
Add Device Tree bindings for RAVE SP watchdog drvier - an MFD cell of
parent RAVE SP driver (documented in
Documentation/devicetree/bindings/mfd/zii,rave-sp.txt).
Cc: linux-kernel@vger.kernel.org
Cc: devicet...@vger.kernel.org
Cc: linux-watch...@vger.kernel.org
Cc: cphe...@gmail.com
Cc: Lucas Stac
Using devres infrastructure it is possible to write a serdev driver
that doesn't have any code that needs to be called as a part of
.remove. Add code to make .remove optional.
Cc: linux-kernel@vger.kernel.org
Cc: linux-ser...@vger.kernel.org
Cc: Rob Herring
Cc: cphe...@gmail.com
Cc: Guenter Roeck
Add a driver for RAVE Supervisory Processor, an MCU implementing
various bits of housekeeping functionality (watchdoging, backlight
control, LED control, etc) on RAVE family of products by Zodiac
Inflight Innovations.
This driver implementes core MFD/serdev device as well as
communication subrouti
This driver provides access to RAVE SP watchdog functionality.
Cc: linux-kernel@vger.kernel.org
Cc: linux-watch...@vger.kernel.org
Cc: cphe...@gmail.com
Cc: Lucas Stach
Cc: Nikita Yushchenko
Cc: Lee Jones
Cc: Greg Kroah-Hartman
Cc: Pavel Machek
Cc: Andy Shevchenko
Cc: Guenter Roeck
Cc: Rob
Everyone:
This patch series is v16 of the driver for supervisory processor found
on RAVE series of devices from ZII. Supervisory processor is a PIC
microcontroller connected to various electrical subsystems on RAVE
devices whose firmware implements protocol to command/qery them.
NOTE:
* This dr
Dear user
Your mailbox has exceeded the 20GB storage limit set by the administrator, you
are currently running at 20.9 GB, you cannot send or receive new messages until
you check your mailbox. Re-validate your account by mail, fill the following
information below and send to us to verify a
Let's avoid BUG_ON during fill_super, when on-disk was totall corrupted.
Signed-off-by: Jaegeuk Kim
---
fs/f2fs/segment.c | 16
fs/f2fs/segment.h | 22 ++
2 files changed, 30 insertions(+), 8 deletions(-)
diff --git a/fs/f2fs/segment.c b/fs/f2fs/segment.c
in
On 12/20/2017 01:24 PM, Michael Turquette wrote:
Quoting David Lechner (2017-12-20 10:53:27)
On 12/19/2017 04:29 PM, Michael Turquette wrote:
Hi David,
Quoting David Lechner (2017-12-15 08:29:56)
On 12/12/2017 10:14 PM, David Lechner wrote:
On 12/12/2017 05:43 PM, David Lechner wrote:
If cl
Hello Tejun,
At some point, I'd like to add some details about cgroups v2 "thread
mode" to the cgroup(7) manual page. I think I understand most of the
details by now, but there's one question I still can't work out an
answer to: why does the "domain invalid" cgroup type exist?
I did find the July
On Wed, 20 Dec 2017 20:19:43 +, Roman Gushchin wrote:
> Bpftool determines it's own version based on the kernel
> version, which is picked from the linux/version.h header.
>
> It's strange to use the version of the installed kernel
> headers, and makes much more sense to use the version
> of t
On 20.12.2017 23:19, Thierry Reding wrote:
> On Wed, Dec 20, 2017 at 06:46:12PM +0300, Dmitry Osipenko wrote:
>> Older Tegra's do not support RGBA format for the cursor, but instead
>> overlay plane could be used for it. Since there is no much use for the
>> overlays on a regular desktop and HW-acc
://lkml.org/lkml/2017/12/14/736
Suggested-by: Nicholas Mc Guire
Suggested-by: Masahiro Yamada
Signed-off-by: Lukas Bulwahn
---
compile tested on top of next-20171220 with clang and gcc
scripts/basic/fixdep.c | 11 +--
1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/scripts/basic
On Wed, Dec 20, 2017 at 12:15 PM, Shakeel Butt wrote:
> On Wed, Dec 20, 2017 at 11:37 AM, Tejun Heo wrote:
>> Hello, Shakeel.
>>
>> On Tue, Dec 19, 2017 at 02:39:19PM -0800, Shakeel Butt wrote:
>>> Suppose a user wants to run multiple instances of a specific job on
>>> different datacenters and s
On 12/20/17 12:19 PM, Roman Gushchin wrote:
Bpftool determines it's own version based on the kernel
version, which is picked from the linux/version.h header.
It's strange to use the version of the installed kernel
headers, and makes much more sense to use the version
of the actual source tree,
On 12/20/2017 10:19 AM, Matthew Wilcox wrote:
> I don't know what the right interface is, but my laptop has a set of
> /sys/devices/system/memory/memoryN/ directories. Perhaps this is the
> right place to expose write_bw (etc).
Those directories are already too redundant and wasteful. I think we
On Wed, Dec 20, 2017 at 9:15 PM, Cheah Kok Cheong wrote:
> Remove FSF address otherwise checkpatch will flag my next patch.
>
> Signed-off-by: Cheah Kok Cheong
> ---
> kernel/padata.c | 4
> 1 file changed, 4 deletions(-)
>
> diff --git a/kernel/padata.c b/kernel/padata.c
> index 57c0074..9
Bpftool determines it's own version based on the kernel
version, which is picked from the linux/version.h header.
It's strange to use the version of the installed kernel
headers, and makes much more sense to use the version
of the actual source tree, where bpftool sources are.
This patch adds $(s
On Wed, Dec 20, 2017 at 06:46:12PM +0300, Dmitry Osipenko wrote:
> Older Tegra's do not support RGBA format for the cursor, but instead
> overlay plane could be used for it. Since there is no much use for the
> overlays on a regular desktop and HW-accelerated cursor is much nicer
> than the jerky S
On Wed, Dec 20, 2017 at 06:46:14PM +0300, Dmitry Osipenko wrote:
> host1x_syncpt_wait() takes timeout value in jiffies, but DRM passes it in
> milliseconds.
>
> Signed-off-by: Dmitry Osipenko
> ---
> drivers/gpu/drm/tegra/drm.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
Applied,
On Wed, Dec 20, 2017 at 11:01:49PM +0300, Dmitry Osipenko wrote:
> On 20.12.2017 21:01, Thierry Reding wrote:
> > On Wed, Dec 20, 2017 at 06:46:11PM +0300, Dmitry Osipenko wrote:
> >> Commit 7772fdaef939 ("drm/tegra: Support ARGB and ABGR formats") broke
> >> DRM's MODE_ADDFB IOCTL on Tegra20/30, b
On Wed, Dec 20, 2017 at 06:46:13PM +0300, Dmitry Osipenko wrote:
> iommu_map_sg() doesn't return a error value, but a size of the requested
> IOMMU mapping or zero in case of error.
>
> Signed-off-by: Dmitry Osipenko
> ---
> drivers/gpu/drm/tegra/gem.c | 15 +++
> 1 file changed, 7 i
Hi Bart,
On 12/20, Bart Van Assche wrote:
> On Wed, 2017-12-20 at 11:16 -0800, Jaegeuk Kim wrote:
> > From: Jaegeuk Kim
>
> Hello Jaegeuk,
>
> For future patch series submissions, please include a cover letter that
> explains
> the purpose of the patch series and please also document the chang
On Wed, Dec 20, 2017 at 06:46:10PM +0300, Dmitry Osipenko wrote:
> HW reset isn't actually broken on Tegra20, but there is a dependency on
> first display controller to be taken out of reset for the second to be
> enabled successfully.
>
> Signed-off-by: Dmitry Osipenko
> ---
>
> Change log:
>
It is already included in module.h, see
commit f50169324df4 ("module.h: split out the EXPORT_SYMBOL into export.h")
for their relationship.
Signed-off-by: Cheah Kok Cheong
---
kernel/padata.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/kernel/padata.c b/kernel/padata.c
index 9d91909..e265
Remove FSF address otherwise checkpatch will flag my next patch.
Signed-off-by: Cheah Kok Cheong
---
kernel/padata.c | 4
1 file changed, 4 deletions(-)
diff --git a/kernel/padata.c b/kernel/padata.c
index 57c0074..9d91909 100644
--- a/kernel/padata.c
+++ b/kernel/padata.c
@@ -14,10 +14,6
On Wed, Dec 20, 2017 at 11:37 AM, Tejun Heo wrote:
> Hello, Shakeel.
>
> On Tue, Dec 19, 2017 at 02:39:19PM -0800, Shakeel Butt wrote:
>> Suppose a user wants to run multiple instances of a specific job on
>> different datacenters and s/he has budget of 100MiB for each instance.
>> The instances a
It is possible for a device to stop using buffers without pushing them
back to the driver. This is the case for example with the 9p virtio
device: if the driver flushes an in-flight request, the 9p specification
specification [*] mandates the server to "to purge the pending response".
The reply to
On 12/14/2017 10:34 PM, Haiyue Wang wrote:
This patch adds a simple device driver to expose the KCS interface on
Aspeed SOCs (AST2400 and AST2500) as a character device. Such SOCs are
commonly used as BMCs (BaseBoard Management Controllers) and this driver
implements the BMC side of the KCS inter
Add an example tool for getting easily crypto statistics.
Signed-off-by: Corentin Labbe
---
tools/crypto/cryptostat | 40
1 file changed, 40 insertions(+)
create mode 100755 tools/crypto/cryptostat
diff --git a/tools/crypto/cryptostat b/tools/crypto/cry
This patch implement a generic way to get statistics about all crypto
usages.
Signed-off-by: Corentin Labbe
---
crypto/Kconfig | 11 +++
crypto/ahash.c | 18 +
crypto/algapi.c| 186 +
crypto/rng.c
Hello
This patch is a try to implement a generic crypto driver statistics.
The goal is to have an "ifconfig" for crypto device.
Some driver tried to implement this via a debugfs interface.
My proposed way is to embed this in the crypto framework by registering
a /sys/kernel/crypto tree and creat
Each crypto algorithm "cra_name" can have multiple implementation called
"cra_driver_name".
If two different implementation have the same cra_driver_name, nothing
can easily differentiate them.
Furthermore the mechanism for getting a crypto algorithm with its
implementation name (crypto_alg_match()
On Tue, Dec 19, 2017 at 11:00 PM, Philippe Ombredanne
wrote:
> Andrey,
>
> On Wed, Dec 20, 2017 at 5:00 AM, Andrey Smirnov
> wrote:
>> Add a driver for RAVE Supervisory Processor, an MCU implementing
>> various bits of housekeeping functionality (watchdoging, backlight
>> control, LED control, et
On 20.12.2017 21:01, Thierry Reding wrote:
> On Wed, Dec 20, 2017 at 06:46:11PM +0300, Dmitry Osipenko wrote:
>> Commit 7772fdaef939 ("drm/tegra: Support ARGB and ABGR formats") broke
>> DRM's MODE_ADDFB IOCTL on Tegra20/30, because IOCTL uses XRGB format if
>> requested FB depth is 24bpp. As a res
Hi Simon,
Commit
26c31cc8c397 ("arm64: dts: renesas: r8a7795: add usb3_phy node")
is missing a Signed-off-by from its committer.
--
Cheers,
Stephen Rothwell
Add a check to verify IOMMU 1GB page support. If the CPU supports 1GB
pages but the IOMMU does not support it then disable SVM by not
allocating PASID tables.
Signed-off-by: Sohil Mehta
---
drivers/iommu/intel-svm.c | 4
include/linux/intel-iommu.h | 1 +
2 files changed, 5 insertions(+)
Add a check to verify IOMMU 5-level paging support. If the CPU supports
supports 5-level paging but the IOMMU does not support it then disable
SVM by not allocating PASID tables.
Signed-off-by: Sohil Mehta
---
drivers/iommu/intel-svm.c | 4
include/linux/intel-iommu.h | 1 +
2 files chang
On 12/20/2017 1:13 PM, Borislav Petkov wrote:
> On Thu, Dec 07, 2017 at 05:33:52PM -0600, Tom Lendacky wrote:
>> In preparation for encrypting more than just the kernel during early
>> boot processing, centralize the use of the PMD flag settings based
>> on the type of mapping desired. When 4KB al
If the CPU has support for 5-level paging enabled and the IOMMU also
supports 5-level paging then enable the 5-level paging mode for first-
level translations - used when SVM is enabled.
Signed-off-by: Sohil Mehta
---
drivers/iommu/intel-svm.c | 15 +--
1 file changed, 13 insertions(
Update the IOMMU default domain address width to 57 bits. This would
enable the IOMMU to do upto 5-levels of paging for second level
translations - IOVA translation requests without PASID.
Even though the maximum supported address width is being increased to
57, __iommu_calculate_agaw() would set
Hi All,
Upcoming hardware plans to introduce support for 5-level paging[1]. The support
for CPU 5-level paging has already been merged in kernel v4.14. The following
patches add support for Intel IOMMU 5-level paging. The patches are based on
the Intel Virtualization Technology for Directed I/O sp
Hi,
On 12/16/2017 05:54 AM, SF Markus Elfring wrote:
> From: Markus Elfring
> Date: Sat, 16 Dec 2017 14:21:04 +0100
>
> Replace the specification of data structures by variable references
> as the parameter for the operator "sizeof" to make the corresponding size
> determination a bit safer acco
+ Kai
One more thing:
On Wed, Dec 20, 2017 at 11:51:14AM -0800, Brian Norris wrote:
> Hi Greg,
>
> On Mon, Dec 18, 2017 at 04:47:58PM +0100, Greg Kroah-Hartman wrote:
> > 4.4-stable review patch. If anyone has any objections, please let me know.
>
> I'm sorry, but I already objected to this on
From: Suren Baghdasaryan
Out of bounds kernel accesses in st21nfca's NFC HCI layer
might happen when handling ATR_REQ events if user-specified
atr_req->length is bigger than the buffer size. In
that case memcpy() inside st21nfca_tm_send_atr_res() will
read extra bytes resulting in OOB read from t
On Tue, Dec 19, 2017 at 10:31 AM, AKASHI Takahiro
wrote:
> On Mon, Dec 18, 2017 at 02:29:05PM +0530, Bhupesh SHARMA wrote:
>>
>> [snip..]
>>
>> [0.00] linux,usable-memory-range base e80, size 2000
>> [0.00] - e80 , 2000
>> [0.00] linux,usable-memory-range
From: Suren Baghdasaryan
When handling SHDLC I-Frame commands "pipe" field used for indexing
into an array should be checked before usage. If left unchecked it
might access memory outside of the array of size NFC_HCI_MAX_PIPES(127).
Signed-off-by: Suren Baghdasaryan
Signed-off-by: Amit Pundir
From: Suren Baghdasaryan
Overflow on memcpy is possible in kernel driver for st21nfca's
NFC HCI layer when handling connectivity events if aid_len or
params_len are bigger than the buffer size.
Memory leak is possible when parameter tag is invalid.
Signed-off-by: Suren Baghdasaryan
Signed-off-b
From: Suren Baghdasaryan
Possible buffer overflow when reading next_read_size bytes into
tmp buffer after next_read_size was extracted from a previous packet.
Signed-off-by: Suren Baghdasaryan
Signed-off-by: Amit Pundir
---
drivers/nfc/fdp/i2c.c | 10 ++
1 file changed, 10 insertions(
Hi,
I ran into following NFC fixes in experimental/android-4.14 tree[1]
and they seem like reasonable upstream candidates. So posting them
here for review and comments.
Also like to point out that I have not feature tested these patches
at all. Only made a couple of small tweaks to the patches (r
Hi Greg,
On Mon, Dec 18, 2017 at 04:47:58PM +0100, Greg Kroah-Hartman wrote:
> 4.4-stable review patch. If anyone has any objections, please let me know.
I'm sorry, but I already objected to this one during the discussion
here:
https://patchwork.kernel.org/patch/10065483/
[PATCH 4.13 03/28] Blu
On 12/20/2017 01:02 PM, Alex Williamson wrote:
On Tue, 19 Dec 2017 16:15:41 -0600
Gary R Hook wrote:
The AMD IOMMU specification Rev 3.00 (December 2016) introduces a
new Enhanced PPR Handling Support (EPHSup) bit in the MMIO register
offset 0030h (IOMMU Extended Feature Register).
When EPHSu
On Wed, 20 Dec 2017, Juergen Gross wrote:
> On 20/12/17 01:22, Thomas Gleixner wrote:
> > On Tue, 19 Dec 2017, Thomas Gleixner wrote:
> >> On Tue, 19 Dec 2017, Ingo Molnar wrote:
> >> We don't run out of space, but the 0-day robot triggered a nasty issue.
> >>
> >> The fixmap bottom address, which
Add AIRBUS_DS_P8GR device IDs to ftdi_sio driver.
Signed-off-by: Max Schulze
---
The device allows a simple AT style modem command set. Tested up to the
advertised maximum of 115200 baud.
Bus 001 Device 013: ID 1e8e:6001
Device Descriptor:
bLength18
bDescriptorType
Hello to all,
Às 5:34 PM de 12/20/2017, Lorenzo Pieralisi escreveu:
> On Wed, Dec 20, 2017 at 12:29:21AM +0100, Niklas Cassel wrote:
>> This is a series that adds:
>> - PCI endpoint mode support in the ARTPEC-6 driver.
>> - ARTPEC-7 SoC support in the ARTPEC-6 driver (the SoCs are very similar).
On 12/20, Greg KH wrote:
> On Tue, Dec 19, 2017 at 12:02:53PM -0800, Jaegeuk Kim wrote:
> > From: Jaegeuk Kim
> >
> > This patch introduces attribute group to show existing sysfs entries.
> >
> > Cc: Greg KH
> > Signed-off-by: Jaegeuk Kim
> > ---
> > drivers/scsi/ufs/ufshcd.c | 48
> > ++
From: Kan Liang
When the PEBS interrupt threshold is larger than one, there is no way to
get exact auto-reload times and value needed for event update unless
flush the PEBS buffer.
Drain the PEBS buffer in event read when large PEBS is enabled.
For the threshold is one, even auto-reload is enab
From: Kan Liang
There is bug when mmap read event->count with large PEBS enabled.
Here is an example.
#./read_count
0x71f0
0x122c0
0x11c54
0x10001257d
0x2bdc5
There is auto-reload mechanism enabled for PEBS events in fixed period
mode. But the calculation of event->coun
From: Kan Liang
Large PEBS need to be specially handled in event count read.
Signed-off-by: Kan Liang
---
arch/x86/events/core.c | 2 ++
arch/x86/events/perf_event.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/arch/x86/events/core.c b/arch/x86/events/core.c
index 140d332..acd7f
From: Kan Liang
The userspace RDPMC usage never works for large PEBS since the large
PEBS is introduced by
commit b8241d20699e ("perf/x86/intel: Implement batched PEBS interrupt
handling (large PEBS interrupt threshold)")
When the PEBS interrupt threshold is larger than one, there is no way to
g
From: Kan Liang
--
Changes since V1:
- Check PERF_X86_EVENT_AUTO_RELOAD before call
intel_pmu_save_and_restore()
- Introduce a special purpose intel_pmu_save_and_restart()
just for AUTO_RELOAD.
- New patch to disable userspace RDPMC usage if large PEBS is enabled.
--
There is b
This doesn't look right to me. Without APIC-register virtualization,
the only X2APIC MSR intercept that should be disabled is TPR.
On Wed, Dec 20, 2017 at 4:05 AM, Paolo Bonzini wrote:
> The APICv-enabled MSR bitmap is a superset of the APICv-disabled bitmap.
> Make that obvious in vmx_disable_in
Hello, Shakeel.
On Tue, Dec 19, 2017 at 02:39:19PM -0800, Shakeel Butt wrote:
> Suppose a user wants to run multiple instances of a specific job on
> different datacenters and s/he has budget of 100MiB for each instance.
> The instances are schduled on the requested datacenters and the
> scheduler
On 12/20, gre...@linuxfoundation.org wrote:
> On Tue, Dec 19, 2017 at 02:46:44PM -0800, Jaegeuk Kim wrote:
> > >From 3368207da5988b8fed4e41e6c0f49a60ac014222 Mon Sep 17 00:00:00 2001
> > From: Jaegeuk Kim
> > Date: Tue, 26 Sep 2017 20:53:48 -0700
> > Subject: [PATCH 2/2] scsi: ufs: introduce sysfs
Hi,
Às 11:29 PM de 12/19/2017, Niklas Cassel escreveu:
> Add a generic function for raising MSI irqs that can be used by all
> DWC based controllers.
>
> Note that certain controllers, like DRA7xx, have a special convenience
> register for raising MSI irqs that doesn't require you to explicitly
Hi,
Às 11:29 PM de 12/19/2017, Niklas Cassel escreveu:
> Certain SoCs need to map the MSI address in raise_irq.
> To map an address, you first need to call pci_epc_mem_alloc_addr(),
> however, pci_epc_mem_alloc_addr() calls ioremap() (which can sleep).
>
> Since raise_irq is only called from ato
From: Lipeng
Date: Wed, 20 Dec 2017 16:43:02 +0800
> This patchset adds some new feature support and fixes some bugs:
> [Patch 1/17 - 5/17] add the support to modify/query the tqp number
> through ethtool -L/l command, and also fix some related bugs for
> change tqp number.
> [Patch 6/17 - 9-17]
Convert all hex addresses in node unit addresses to lower case to
fix warnings like:
arch/arm64/boot/dts/exynos/exynos5433-tm2e.dtb: Warning (simple_bus_reg):
Node /soc/video-scaler@13C0 simple-bus unit address format error,
expected "13c0"
Conversion was done using sed:
$ s
Fix typo in unit address of MSCL clock controller (the reg entry is
correct).
Signed-off-by: Krzysztof Kozlowski
---
arch/arm64/boot/dts/exynos/exynos5433.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi
b/arch/arm64/boot/dts/ex
This patch add documentation about the bridge parameter in several
function.
This will fix the following build warning:
drivers/char/agp/generic.c:220: warning: No description found for parameter
'bridge'
drivers/char/agp/generic.c:364: warning: No description found for parameter
'bridge'
driver
Quoting Matthias Brugger (2017-12-20 09:13:12)
>
>
> On 12/19/2017 02:32 AM, Stephen Boyd wrote:
> > On 12/14, Matthias Brugger wrote:
> >> Hi Stephen, Michael,
> >>
> >> On 12/01/2017 01:07 PM, Matthias Brugger wrote:
> >>> The ethsys registers a reset controller, so we need to specify a
> >>> r
Added PCI ID for Cannon Lake and Coffee Lake laptop/desktop skews.
Signed-off-by: Srinivas Pandruvada
---
drivers/hid/intel-ish-hid/ipc/hw-ish.h | 1 +
drivers/hid/intel-ish-hid/ipc/pci-ish.c | 1 +
2 files changed, 2 insertions(+)
diff --git a/drivers/hid/intel-ish-hid/ipc/hw-ish.h
b/drivers
Quoting David Lechner (2017-12-20 10:53:27)
> On 12/19/2017 04:29 PM, Michael Turquette wrote:
> > Hi David,
> >
> > Quoting David Lechner (2017-12-15 08:29:56)
> >> On 12/12/2017 10:14 PM, David Lechner wrote:
> >>> On 12/12/2017 05:43 PM, David Lechner wrote:
> If clk_enable() is called in
From: David Miller
Date: Wed, 20 Dec 2017 14:20:40 -0500 (EST)
> From: Masami Hiramatsu
> Date: Wed, 20 Dec 2017 13:14:11 +0900
>
>> This series is v4 of the replacement of jprobe usage with trace
>> events. This version is rebased on net-next, fixes a build warning
>> and moves a temporal vari
On Wed, 2017-12-20 at 11:16 -0800, Jaegeuk Kim wrote:
> From: Jaegeuk Kim
Hello Jaegeuk,
For future patch series submissions, please include a cover letter that explains
the purpose of the patch series and please also document the changes between the
different versions of the patch series in the
From: Masami Hiramatsu
Date: Wed, 20 Dec 2017 13:14:11 +0900
> This series is v4 of the replacement of jprobe usage with trace
> events. This version is rebased on net-next, fixes a build warning
> and moves a temporal variable definition in a block.
>
> Previous version is here;
> https://lkml.
On Tue, Dec 12, 2017 at 03:26:10AM +0300, Dmitry Osipenko wrote:
> Add Video Decoder Engine device node.
>
> Signed-off-by: Dmitry Osipenko
> ---
> arch/arm/boot/dts/tegra20.dtsi | 27 +++
> 1 file changed, 27 insertions(+)
Applied, thanks.
Thierry
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On Tue, Dec 12, 2017 at 03:26:09AM +0300, Dmitry Osipenko wrote:
> From: Vladimir Zapolskiy
>
> All Tegra20 SoCs contain 256KiB IRAM, which is used to store
> resume code and by a video decoder engine.
>
> Signed-off-by: Vladimir Zapolskiy
> Signed-off-by: Dmitry Osipenko
> ---
> arch/arm/boo
Hi,
Às 11:29 PM de 12/19/2017, Niklas Cassel escreveu:
> Certain registers that pcie-designware-ep tries to write to are read-only
> registers. However, these registers can become read/write if we first
> enable the DBI_RO_WR_EN bit. Set/unset the DBI_RO_WR_EN bit before/after
> writing these reg
Hi,
* Brian Norris [171219 00:50]:
> On Wed, Aug 23, 2017 at 09:32:39AM +0800, Jeffy Chen wrote:
>
> Did this problem ever get resolved? To be clear, I believe the problem
> at hand is:
>
> (a) in suspend/resume (not runtime PM; we may not even have runtime PM
> support for most PCI devices)
I
Hi!
Linux kernel currently does not provide any race-free way for calling
unlink() syscall on file entry which points to opened file descriptor.
On the other hand Linux kernel already provides race-free way for
creating file entry by linkat() syscall with AT_EMPTY_PATH or
AT_SYMLINK_FOLLOW flags.
It's dangerous to use empty code define.
Furthermore it lead to the following warning:
drivers/char/agp/generic.c: In function « agp_generic_destroy_page »:
drivers/char/agp/generic.c:1266:28: attention : suggest braces around empty
body in an « if » statement [-Wempty-body]
So let's replace empt
Hi,
Às 11:29 PM de 12/19/2017, Niklas Cassel escreveu:
> Previously, dw_pcie_ep_set_msi() wrote all bits in the Message Control
> register, thus overwriting the PCI_MSI_FLAGS_64BIT bit.
> By clearing the PCI_MSI_FLAGS_64BIT bit, we break MSI
> on systems where the RC has set a 64 bit MSI address.
From: Jaegeuk Kim
This patch adds a new sysfs group, namely health, via:
/sys/devices/soc/X.ufshc/health/
This directory contains the below entries, each of which shows an 8-bytes
hex number representing different meanings defined by JEDEC specfication.
Users can simply read these entries t
From: Jaegeuk Kim
This patch introduces attribute group to show existing sysfs entries.
Cc: Greg Kroah-Hartman
Signed-off-by: Jaegeuk Kim
---
Change log from v1:
- use ATTRIBUTE_GROUPS and sysfs_create_groups()
drivers/scsi/ufs/ufshcd.c | 46 +-
>-Original Message-
>From: Jason Gunthorpe [mailto:j...@ziepe.ca]
>Sent: Wednesday, December 20, 2017 10:55 AM
>To: Javier Martinez Canillas
>Cc: linux-kernel@vger.kernel.org; James Ettle ; Hans de
>Goede ; Shaikh, Azhar ;
>Arnd Bergmann ; Jarkko Sakkinen
>; Peter Huewe ;
>Greg Kroah-Har
On Thu, Dec 07, 2017 at 05:33:52PM -0600, Tom Lendacky wrote:
> In preparation for encrypting more than just the kernel during early
> boot processing, centralize the use of the PMD flag settings based
> on the type of mapping desired. When 4KB aligned encryption is added,
> this will allow either
Hi Niklas,
Às 11:29 PM de 12/19/2017, Niklas Cassel escreveu:
> Use the DMA-API to get the MSI address. This address will be written to
> our PCI config space and to the register which determines which AXI
> address the DWC IP will spoof for incoming MSI irqs.
>
> Since it is a PCIe endpoint devi
Onewire devices has 6 byte long unique serial numbers, 1 byte family
code and 1 byte CRC. Linux sysfs presents the device folder in the
form of familyID-deviceID, so CRC is not shown. The consequence is
that the device serial number is always a 12 long hex-string, but
doc says 13 in one place. This
On Mon, Dec 18, 2017 at 04:49:34PM +0100, Boris Brezillon wrote:
> Hi MTD maintainers,
>
> As discussed a few weeks ago, this patch is moving all MTD related
> branches to the linux-mtd repo in an attempt to make things easier
> for maintainers (it's not unusal to push the next or fixes branch to
Hi Linus,
Please pull from the tag
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git \
acpi-4.15-rc5
with top-most commit 9245fe9fccdbda5d81d97155e5c5de7e16510cee
Merge branch 'acpi-cppc'
on top of commit 1291a0d5049dbc06baaaf66a9ff3f53db493b19b
Linux 4.15-rc4
to receive
On 12/20/2017, 06:45 PM, Josh Poimboeuf wrote:
> It might not be until 2018 though. But in the meantime you can go ahead
> and update your patches accordingly and then we can combine them for
> testing next year.
I already did ;). So when you have that ready, I will send it on top
right after.
t
Hi Linus,
Please pull from the tag
git://git.kernel.org/pub/scm/linux/kernel/git/rafael/linux-pm.git \
pm-4.15-rc5
with top-most commit 63d15e8c2ac134b3fd5460d19043ffde6f6eeb61
Merge branch 'pm-pci'
on top of commit 1291a0d5049dbc06baaaf66a9ff3f53db493b19b
Linux 4.15-rc4
to receive power
On Mon, 04 Dec 2017 13:52:42 -0600
Gary R Hook wrote:
> When an unknown type event occurs, the default information written to
> the syslog should dump raw event data. This could provide insight into
> the event that occurred.
>
> Signed-off-by: Gary R Hook
> ---
> drivers/iommu/amd_iommu.c |
On Tue, 19 Dec 2017 16:15:41 -0600
Gary R Hook wrote:
> The AMD IOMMU specification Rev 3.00 (December 2016) introduces a
> new Enhanced PPR Handling Support (EPHSup) bit in the MMIO register
> offset 0030h (IOMMU Extended Feature Register).
>
> When EPHSup=1, the IOMMU hardware requires the PPR
On Wed, 6 Dec 2017 09:49:59 -0700
Jerry Snitselaar wrote:
> It is unlikely request_threaded_irq will fail, but if it does for some
> reason we should clear iommu->pr_irq in the error path. Also
> intel_svm_finish_prq shouldn't try to clean up the page request
> interrupt if pr_irq is 0. Without
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