From: Jérôme Glisse
This just rename all KSM specific helper to generic page read only
name. No functional change.
Signed-off-by: Jérôme Glisse
Cc: Andrea Arcangeli
---
fs/proc/page.c | 2 +-
include/linux/page-flags.h | 30 +-
mm/ksm.c
From: Jérôme Glisse
Hiding this 2 functions as preparatory step for generalizing ksm
write protection to other users. Moreover those two helpers can
not be use meaningfully outside ksm.c as the struct they deal with
is defined inside ksm.c.
Signed-off-by: Jérôme Glisse
Cc: Andrea Arcangeli
---
From: Jérôme Glisse
Each swap entry is associated to a file and thus an address_space.
That address_space is use for reading/writing to swap storage. This
patch add an helper to get the address_space from swap_entry_t.
Signed-off-by: Jérôme Glisse
Cc: Michal Hocko
Cc: Johannes Weiner
Cc: Andr
Each process have different pids, one for each pid namespace it belongs.
When interaction happens within single pid-ns translation isn't required.
More complicated scenarios needs special handling.
For example:
- reading pid-files or logs written inside container with pid namespace
- attaching wit
El Wed, Apr 04, 2018 at 11:30:07AM +0200 Peter Zijlstra ha dit:
> On Tue, Apr 03, 2018 at 11:06:58AM -0700, Matthias Kaehlcke wrote:
>
> > Yes, Chrome OS R67 (currently dev, soon beta) will ship a kernel built
> > with Clang for multiple x86 Chromebooks.
>
> But there are still _known_ miscompil
Hi, Kees, David et al.
With v4.16 I get the following dump while using smartctl:
===
[ 261.260617] [ cut here ]
[ 261.262135] Bad or missing usercopy whitelist? Kernel memory exposure
attempt detected from SLUB object 'scsi_sense_cache' (offset 94, size 22)!
[ 261.2676
On Wed, Apr 4, 2018 at 10:13 AM, Steven Rostedt wrote:
>
> Something like this will even prevent modules from disabling the printk
> hash...
That still seems broken.
The *natural* thing to do would seem to be to tie the hash to the
printk state, kind of like the percpu buffers that safe_printk()
Sebastian
-Milo
On 03/30/2018 12:24 PM, Sebastian Reichel wrote:
> This adds support to acquire the optional PWM channel,
> that can be used by some of the LMU variants.
>
> Signed-off-by: Sebastian Reichel
> ---
> drivers/mfd/ti-lmu.c | 11 +++
> include/linux/mfd/ti-lmu.h | 3
On Wed, Apr 4, 2018 at 7:08 AM, Cong Wang wrote:
> On Tue, Apr 3, 2018 at 4:42 AM, Kirill Tkhai wrote:
>> On 03.04.2018 14:25, Dmitry Vyukov wrote:
>>> On Tue, Apr 3, 2018 at 11:50 AM, Kirill Tkhai wrote:
sk_diag_dump_icons() dumps only sockets in TCP_LISTEN state.
TCP_LISTEN state may
> Am 04.04.2018 um 21:00 schrieb H. Nikolaus Schaller :
>
> V2:
> * added PCA_PCAL flags if matched through of-table
> * fix address calculation for extended PCAL6524 registers
> * hack to map LEVEL_LOW to EDGE_FALLING to be able to
> test in combination with ts3a227e driver
> * improve descript
The of_device_table is missing the PCA_PCAL flag so the
pcal6524 would be operated in tca6424 compatibility mode which
does not handle the new interrupt mask registers.
Signed-off-by: H. Nikolaus Schaller
---
drivers/gpio/gpio-pca953x.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
So far the interrupt type from the DTS is ignored, i.e.
interrupt-parent = <&pcal6524>
interrupts = <10 IRQ_TYPE_EDGE_RISING>
does not overwrite a
devm_request_threaded_irq(..., IRQ_TYPE_LEVEL_LOW, ...)
in driver code. Therefore, the pca953x driver rejects the
setup of t
So let's describe this property in the bindings.
Signed-off-by: H. Nikolaus Schaller
---
Documentation/devicetree/bindings/gpio/gpio-pca953x.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/gpio/gpio-pca953x.txt
b/Documentation/devicetree/bindings/gpio/g
V2:
* added PCA_PCAL flags if matched through of-table
* fix address calculation for extended PCAL6524 registers
* hack to map LEVEL_LOW to EDGE_FALLING to be able to
test in combination with ts3a227e driver
* improve description of bindings for optional vcc-supply
and interrupt-controller;
20
On 4/3/18 11:19 PM, Kirill Marinushkin wrote:
Hello Mark,
This patch series waits since 20th of February, because it modifies UAPI headers
and should be done in sync with ALSA. I see that previously there was no clear
understanding, how to do this in sync.
Two days ago I discussed with Takashi,
On Wed, Apr 04, 2018 at 11:42:11AM -0700, Tim Chen wrote:
> On 04/04/2018 10:38 AM, Alison Schofield wrote:
> > On Wed, Apr 04, 2018 at 10:24:49AM -0700, Tim Chen wrote:
> >> On 04/03/2018 02:12 PM, Alison Schofield wrote:
> >>
> >>> +
> >>> + /*
> >>> + * topology_sane() considers LLCs that span
It is not completely obvious that these are required as
some .dts files don't specify them.
Signed-off-by: H. Nikolaus Schaller
---
.../devicetree/bindings/gpio/gpio-pca953x.txt | 33 ++
1 file changed, 33 insertions(+)
diff --git a/Documentation/devicetree/bindings/gpi
PCAL chips ("L" seems to stand for "latched") have additional
registers starting at address 0x40 to control the latches,
interrupt mask, pull-up and pull down etc.
The constants are so far defined in a way that they fit for
the pcal9555a when shifted by the number of banks, i.e. multiplied
by 2.
On Wed, 2018-04-04 at 21:53 +0300, Ville Syrjälä wrote:
> On Wed, Apr 04, 2018 at 02:37:41PM -0400, Lyude Paul wrote:
> > On Wed, 2018-04-04 at 18:34 +0300, Ville Syrjälä wrote:
> > > On Mon, Apr 02, 2018 at 05:26:16PM -0400, Lyude Paul wrote:
> > > > While enabling/disabling DPMS before link train
On Wed, 4 Apr 2018, Thomas Gleixner wrote:
> On Tue, 3 Apr 2018, Shivappa Vikas wrote:
> > On Tue, 3 Apr 2018, Thomas Gleixner wrote:
> > > On Thu, 29 Mar 2018, Vikas Shivappa wrote:
> > > The L2 external bandwidth is higher than the L3 external bandwidth.
> > >
> > > Is there any information
On Wed, 2018-04-04 at 21:53 +0300, Ville Syrjälä wrote:
> On Wed, Apr 04, 2018 at 02:37:41PM -0400, Lyude Paul wrote:
> > On Wed, 2018-04-04 at 18:34 +0300, Ville Syrjälä wrote:
> > > On Mon, Apr 02, 2018 at 05:26:16PM -0400, Lyude Paul wrote:
> > > > While enabling/disabling DPMS before link train
On 04/04/18 17:01, Lorenzo Pieralisi wrote:
[+cc Robin]
On Thu, Mar 29, 2018 at 03:01:00AM -0700, Wang Dongsheng wrote:
If SMMU probe failed, master should use swiotlb as dma ops.
SMMU may probe failed with specified environment, so there
are not any iommu resources in iommu_device_list.
The m
An ability to manipulate mm_struct fields was introduced in
sake of CRIU in first place. Later we provide more suitable
and safe operation PR_SET_MM_MAP where all fields to be modifed
are passed in one structure which allows us to make more detailed
verification.
Still old interface remains presen
Implement a skeleton framework for debugfs support in the
AMD IOMMU.
Signed-off-by: Gary R Hook
---
drivers/iommu/Makefile|1 +
drivers/iommu/amd_iommu_debugfs.c | 45 +
drivers/iommu/amd_iommu_init.c|7 --
drivers/iommu/amd_iomm
Provide base enablement for using debugfs to expose internal data of
an IOMMU driver. When called, create the /sys/kernel/debug/iommu
directory. Emit a strong warning at boot time to indicate that this
feature is enabled.
This patch adds a top-level function that will create the (above)
directory
These patches create a top-level function to create a debugfs directory
for the IOMMU, under which drivers may create and populate-specific
directories for their device internals.
Patch 1: general IOMMU enablement
Patch 2: basic AMD enablement to demonstrate linkage with patch 1
Introduce a new K
On Wed, Apr 04, 2018 at 02:37:41PM -0400, Lyude Paul wrote:
> On Wed, 2018-04-04 at 18:34 +0300, Ville Syrjälä wrote:
> > On Mon, Apr 02, 2018 at 05:26:16PM -0400, Lyude Paul wrote:
> > > While enabling/disabling DPMS before link training with MST hubs is
> > > perfectly valid; unfortunately disabl
Den 04.04.2018 19.56, skrev Daniel Vetter:
On Wed, Apr 4, 2018 at 7:41 PM, Noralf Trønnes wrote:
Den 04.04.2018 00.42, skrev Rob Clark:
Add an atomic helper to implement dirtyfb support. This is needed to
support DSI command-mode panels with x11 userspace (ie. when we can't
rely on pageflip
From: Steven Rostedt (VMware)
Function tracing can trace in NMIs and such. If the TSC is determined
to be unstable, the tracing clock will switch to the global clock on
boot up, unless "trace_clock" is specified on the kernel command line.
The global clock disables interrupts to access sched_clo
On Wed, 2018-04-04 at 11:44 -0700, Manasi Navare wrote:
> On Wed, Apr 04, 2018 at 06:34:29PM +0300, Ville Syrjälä wrote:
> > On Mon, Apr 02, 2018 at 05:26:16PM -0400, Lyude Paul wrote:
> > > While enabling/disabling DPMS before link training with MST hubs is
> > > perfectly valid; unfortunately dis
ere
> > lib/string.c:855:15: error: inlining failed in call to
> > always_inline 'memcmp': function not inlinable
> > ...
> > pavel@duo:/data/l/linux-next-n900$ git branch -l
> > * (detached from next-20180403)
> >
> > I'm usin
Quoting Eric W. Biederman (ebied...@xmission.com):
> It looks like a cruft free cousin of proc that is just processes would
> be applicable to your usecase.
Just to check - is that something you're working on?
-serge
On Tue, Apr 03, 2018 at 02:51:23PM -0700, Andy Lutomirski wrote:
> On Tue, Apr 3, 2018 at 12:29 PM, Matthew Garrett wrote:
> > On Tue, Apr 3, 2018 at 9:46 AM Andy Lutomirski wrote:
> >> On Tue, Apr 3, 2018 at 9:29 AM, Matthew Garrett wrote:
> >> > A kernel that allows users arbitrary access to r
On 04/04/2018 10:38 AM, Alison Schofield wrote:
> On Wed, Apr 04, 2018 at 10:24:49AM -0700, Tim Chen wrote:
>> On 04/03/2018 02:12 PM, Alison Schofield wrote:
>>
>>> +
>>> + /*
>>> +* topology_sane() considers LLCs that span NUMA nodes to be
>>> +* insane and will display a warning messag
On Wed, Apr 04, 2018 at 06:34:29PM +0300, Ville Syrjälä wrote:
> On Mon, Apr 02, 2018 at 05:26:16PM -0400, Lyude Paul wrote:
> > While enabling/disabling DPMS before link training with MST hubs is
> > perfectly valid; unfortunately disabling DPMS results in some devices
> > disabling their AUX CH b
On Mon, Apr 2, 2018 at 9:15 PM Stephen Rothwell
wrote:
> Hi all,
> Today's linux-next merge of the pci tree got a conflict in:
> arch/cris/arch-v32/drivers/pci/bios.c
> between commits:
> c690eddc2f3b ("CRIS: Drop support for the CRIS port")
> fd8773f9f544 ("arch: remove frv port"
On Wed, 2018-04-04 at 18:34 +0300, Ville Syrjälä wrote:
> On Mon, Apr 02, 2018 at 05:26:16PM -0400, Lyude Paul wrote:
> > While enabling/disabling DPMS before link training with MST hubs is
> > perfectly valid; unfortunately disabling DPMS results in some devices
> > disabling their AUX CH block as
On 03/30/2018 07:33 AM, Andy Shevchenko wrote:
On Wed, Mar 28, 2018 at 9:18 PM, Laura Abbott wrote:
The new challenge is to remove VLAs from the kernel
(see https://lkml.org/lkml/2018/3/7/621) to eventually
turn on -Wvla.
Using a kmalloc array is the easy way to fix this but kmalloc is still
m
Sebastian
-Milo Kim email is not valid
On 03/30/2018 12:24 PM, Sebastian Reichel wrote:
> This adds backlight support for the following TI LMU
> chips: LM3532, LM3631, LM3632, LM3633, LM3695 and LM3697.
>
> Signed-off-by: Milo Kim
> [add LED subsystem support for keyboard backlight and rework D
Hi Peter,
I just noticed a problem in v4.16 kernels with twl4030 audio and vibra driver
no longer working.
Tracing it back shows that it already did appear in v4.16-rc1 and wasn't fixed
up to v4.16.0.
Kernel v4.15.9 (the latest one where I have a binary) works.
The symptoms are:
[1.557342]
On 3/6/2018 5:39 PM, Jagannathan Raman wrote:
It was noticed that the IRTE configured for guest OS kernel
was over-written while the guest was running. As a result,
vt-d Posted Interrupts configured for the guest are not being
delivered directly, and instead bounces off the host. Every
interrup
t; > lib/string.c:855:15: error: inlining failed in call to
> > always_inline 'memcmp': function not inlinable
> > ...
> > pavel@duo:/data/l/linux-next-n900$ git branch -l
> > * (detached from next-20180403)
> >
> > I'm using
> >
>
Hi Sudeep,
On 04/04/2018 05:47 AM, Sudeep Holla wrote:
On 30/03/18 00:00, Thor Thayer wrote:
Hi,
I'm working on an ARM64 architecture that needs to manipulate some
protected registers that are only accessible in EL3. Linux is running at
EL1 which doesn't have the proper permissions for these
On Wed, 4 Apr 2018, Nadav Amit wrote:
> Dave Hansen wrote:
> > On 04/03/2018 09:45 PM, Nadav Amit wrote:
> >> Dave Hansen wrote:
> >>> void cea_set_pte(void *cea_vaddr, phys_addr_t pa, pgprot_t flags)
> >>> {
> >>> unsigned long va = (unsigned long) cea_vaddr;
> >>> + pte_t pte = pfn_pte(pa >>
From: Steven Rostedt (VMware)
While debugging where things were going wrong with mapping
enabling/disabling interrupts with the lockdep state and actual real
enabling and disabling interrupts, I had to silent the irq
disabling/enabling in debug_check_no_locks_freed() because it was
always showing
As stated in tests/llvm-src-base.c, the name of the bpf function
should be "bpf_func__SyS_epoll_pwait" but this clang test fails
as it tries to lookup "bpf_func__SyS_epoll_wait".
Before applying patch:
55: builtin clang support :
55.1: builtin clang compile C sourc
The clang API calls used by perf have changed in recent
releases and builds succeed with libclang-3.9 only. This
introduces compatibility with libclang-4.0 and above.
Without this patch, we will see the following compilation
errors with libclang-4.0+:
util/c++/clang.cpp: In function ‘clang::Comp
For libclang, some distro packages provide static libraries (.a)
while some provide shared libraries (.so). Currently, perf code
can only be linked with static libraries. This makes perf build
possible for both cases.
Fixes: d58ac0bf8d1e ("perf build: Add clang and llvm compile and linking
suppor
For powerpc64, if a probe is added for a function without specifying
a line number, the corresponding trap instruction is placed at offset
0 (for big endian) or 8 (for little endian) from the start address of
the function. This address is in the function prologue and the trap
instruction preceeds t
inline 'memcmp': function not inlinable
> ...
> pavel@duo:/data/l/linux-next-n900$ git branch -l
> * (detached from next-20180403)
>
> I'm using
>
> eval ` eldk-switch.sh -r 5.4 armv7a`
>
> for cross-compilation.
Hmm I'm not seeing build issues with next-20180404, did this somehow
already get sorted out?
Regards,
Tony
On Wed, Apr 4, 2018 at 7:41 PM, Noralf Trønnes wrote:
>
>
> Den 04.04.2018 00.42, skrev Rob Clark:
>>
>> Add an atomic helper to implement dirtyfb support. This is needed to
>> support DSI command-mode panels with x11 userspace (ie. when we can't
>> rely on pageflips to trigger a flush to the pan
This fixes some fallout from the net-next merge the other day, plus
some non-merge-window-related bug fixes:
1) Fix sparse warnings in bcmgenet,systemport, b53, and mt7530, from
Florian Fainelli.
2) pptp does a bogus dst_release() on a route we have a single refcount
on, and attached to a
> The only option I have seen proposed that might qualify as something
> general purpose and simple is a new filesystem that is just the process
> directories of proc.
While "mount -t pid" and "mount -t sysctl" are decades overdue, I don't
think they cover everything.
IIRC some gcc versions read
On 4/4/2018 11:55 AM, Arnd Bergmann wrote:
> Yes, exactly, plus the same for write and in/out of course.
I was looking at this...
inb() and outb() seem to be calling writeb(). It gets the wmb/barrier
automatically
when we fix writeb().
Did I miss something?
--
Sinan Kaya
Qualcomm Datacenter T
On Wed, Apr 4, 2018 at 6:24 PM, Matthew Wilcox wrote:
> On Wed, Apr 04, 2018 at 05:15:46PM +0200, Daniel Vetter wrote:
>> On Wed, Apr 4, 2018 at 4:39 PM, Matthew Wilcox wrote:
>> > I actually have plans to allow mutex_lock_{interruptible,killable} to
>> > return -EWOULDBLOCK if a flag is set. So
> Instead, it introduces new options in proc to disable some proc entries (TBD).
No, no, no, no.
Blacklists are bad, mmkay.
The reason is that quite dangerous new /proc entries get added
(think /proc/kpageflags) and suddenly they are enabled inside container.
> The granularity does not need to
On 04.04.2018 19:12, Paolo Bonzini wrote:
> On 04/04/2018 13:54, David Hildenbrand wrote:
>>> +{
>>> + enum emulation_result er;
>>> +
>>> + er = emulate_instruction(vcpu, EMULTYPE_TRAP_UD);
>>> + if (er == EMULATE_USER_EXIT)
>>> + return 0;
>>> + if (er != EMULATE_DONE)
>>> +
Den 04.04.2018 00.42, skrev Rob Clark:
Add an atomic helper to implement dirtyfb support. This is needed to
support DSI command-mode panels with x11 userspace (ie. when we can't
rely on pageflips to trigger a flush to the panel).
To signal to the driver that the async atomic update needs to
s
On Wed, Apr 04, 2018 at 10:24:49AM -0700, Tim Chen wrote:
> On 04/03/2018 02:12 PM, Alison Schofield wrote:
>
> > +
> > + /*
> > +* topology_sane() considers LLCs that span NUMA nodes to be
> > +* insane and will display a warning message. Bypass the call
> > +* to topology_sane() fo
On Wednesday, 4 April 2018 19:24:20 CEST Paolo Bonzini wrote:
> On 04/04/2018 19:10, Konrad Rzeszutek Wilk wrote:
> > Should there be a corresponding test-case?
>
> Good point! Stefan, could you write one?
Is there infrastructure for such tests? If yes, can you give me a pointer to
it?
Cheers,
Hi,
one small typo below:
On 04/04/2018 01:17 AM, Stefan Popa wrote:
> diff --git a/drivers/power/supply/Kconfig b/drivers/power/supply/Kconfig
> index 428b426..761cc52 100644
> --- a/drivers/power/supply/Kconfig
> +++ b/drivers/power/supply/Kconfig
> @@ -75,6 +75,17 @@ config BATTERY_88PM860X
>
Hi Stanimir,
We incorporated all your comments except the following:
1. Removing the driver that maintains the SCT (system cache table)
per chipset. As responded earlier the data is expected to change
from chipset to chipset and would clutter the main driver if we
choose using compatible string. W
On 04/04/2018 19:10, Konrad Rzeszutek Wilk wrote:
> On Wed, Apr 04, 2018 at 05:53:04PM +0200, Paolo Bonzini wrote:
>> On 01/04/2018 17:54, Stefan Fritsch wrote:
>>> This is very similar to the aligned versions movaps/movapd.
> ..snip..
>> Applied, thanks.
> Should there be a corresponding test-case
Add gpio nodes for Actions Semi S900 SoC.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm64/boot/dts/actions/s900.dtsi | 51 +++
1 file changed, 51 insertions(+)
diff --git a/arch/arm64/boot/dts/actions/s900.dtsi
b/arch/arm64/boot/dts/actions/s900.dtsi
index 0
Add S900 pinctrl and gpio entries under ARCH_ACTIONS
Signed-off-by: Manivannan Sadhasivam
---
MAINTAINERS | 4
1 file changed, 4 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 640dabc4c311..d63793ee545e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1125,10 +1125,14 @@ F:
Add gpio line names to Actions Semi S900 based Bubblegum-96 board.
Signed-off-by: Manivannan Sadhasivam
Reviewed-by: Linus Walleij
---
arch/arm64/boot/dts/actions/s900-bubblegum-96.dts | 195 ++
1 file changed, 195 insertions(+)
diff --git a/arch/arm64/boot/dts/actions/s900
Add gpio driver for Actions Semi OWL family S900 SoC. Set of registers
controlling the gpio shares the same register range with pinctrl block.
GPIO registers are organized as 6 banks and each bank controls the
maximum of 32 gpios.
Signed-off-by: Manivannan Sadhasivam
Reviewed-by: Andy Shevchenko
Since I'll be working on improving support for ACTIONS platforms, adding
myself as the reviewer.
Signed-off-by: Manivannan Sadhasivam
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 9a7f76eadae9..640dabc4c311 100644
--- a/MAINTAINERS
+++ b/MAIN
On 04/03/2018 02:12 PM, Alison Schofield wrote:
> +
> + /*
> + * topology_sane() considers LLCs that span NUMA nodes to be
> + * insane and will display a warning message. Bypass the call
> + * to topology_sane() for snc_cpu's to avoid that warning.
> + */
> +
> + if (!
Add pinctrl driver for Actions Semi S900 SoC. The driver supports
pinctrl, pinmux and pinconf functionalities through a range of registers
common to both gpio driver and pinctrl driver.
Pinmux functionality is available only for the pin groups while the
pinconf functionality is available for both
Add gpio nodes for Actions Semi S900 SoC.
Signed-off-by: Manivannan Sadhasivam
---
.../devicetree/bindings/gpio/actions,owl-gpio.txt | 87 ++
1 file changed, 87 insertions(+)
create mode 100644 Documentation/devicetree/bindings/gpio/actions,owl-gpio.txt
diff --git a/Docume
Select PINCTRL for Actions Semi SoCs
Signed-off-by: Manivannan Sadhasivam
Reviewed-by: Linus Walleij
---
arch/arm64/Kconfig.platforms | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index fbedbd8f619a..bae1289bdc3f 100644
--- a/arc
Add pinctrl nodes for Actions Semi S900 SoC
Signed-off-by: Manivannan Sadhasivam
Reviewed-by: Linus Walleij
---
arch/arm64/boot/dts/actions/s900.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm64/boot/dts/actions/s900.dtsi
b/arch/arm64/boot/dts/actions/s900.dtsi
index fe
This patchset adds pinctrl and gpio support for Actions Semi S900 SoC.
Pinctrl and gpio subsystems share the common set of register range but
implemented as individual drivers for making it less complex.
Pinmux functions are only accessible for pin groups while pinconf
parameters are available for
On 04/04/2018 10:48 PM, Mark Rutland wrote:
> On Wed, Apr 04, 2018 at 10:43:16PM +0530, Sandipan Das wrote:
>> Hi Mark,
>>
>> On 04/04/2018 10:04 PM, Mark Rutland wrote:
>>>
>>> Zhijian, Sandipan, does this patch work for you?
>>>
>>
>> Yes it does. Thanks for the fix.
>
> Great! Can I take that
On Tue, Apr 03, 2018 at 06:58:48PM +, Luis R. Rodriguez wrote:
> On Tue, Apr 03, 2018 at 08:07:11PM +0200, Lukas Wunner wrote:
> > On Tue, Apr 03, 2018 at 10:33:25AM +0200, Hans de Goede wrote:
> > > I asked Peter Jones for suggestions how to extract this during boot and
> > > he suggested seei
On Wed, Apr 04, 2018 at 10:43:16PM +0530, Sandipan Das wrote:
> Hi Mark,
>
> On 04/04/2018 10:04 PM, Mark Rutland wrote:
> >
> > Zhijian, Sandipan, does this patch work for you?
> >
>
> Yes it does. Thanks for the fix.
Great! Can I take that as a Tested-by?
Thanks,
Mark.
On Wed, 4 Apr 2018 18:23:05 +0200
Peter Zijlstra wrote:
>
> Makes sense, could you convert all of them just to make sure there
> aren't any left?
There's a few others. I'll send another patch.
-- Steve
Hi Mark,
On 04/04/2018 10:04 PM, Mark Rutland wrote:
>
> Zhijian, Sandipan, does this patch work for you?
>
Yes it does. Thanks for the fix.
- Sandipan
On Wed, Apr 4, 2018 at 9:49 AM, Nick Desaulniers
wrote:
>
> It's definitely something curious that I'll need to sit down and investigate
> more. If there are other known instances, it would be good to let me know.
Note that we explicitly use "-fno-delete-null-pointer-checks" because
we do *not*
On Wed, 4 Apr 2018 11:34:55 +0900
Sergey Senozhatsky wrote:
> On (04/03/18 18:03), Steven Rostedt wrote:
> >
> > > he'd want you to change all the trace_printk()s to %px with
> > > justifications, though.
> >
> > What trace_printk()s do you want to change? They are throw away
> > functions.
On 04/04/2018 13:54, David Hildenbrand wrote:
>> +{
>> +enum emulation_result er;
>> +
>> +er = emulate_instruction(vcpu, EMULTYPE_TRAP_UD);
>> +if (er == EMULATE_USER_EXIT)
>> +return 0;
>> +if (er != EMULATE_DONE)
>> +kvm_queue_exception(vcpu, UD_VECTOR);
>
* Arnd Bergmann [180404 10:27]:
> When CONFIG_CACHE_L2X0 is disabled, the am43xx specific suspend
> implemnentation fails to link:
>
> arch/arm/mach-omap2/sleep43xx.o: In function `get_l2cache_base':
> (.text+0x180): undefined reference to `omap4_get_l2cache_base'
>
> This adds an #ifdef protect
On 02/04/2018 03:15, Peng Hao wrote:
> fix a "warning: no previous prototype".
>
> Signed-off-by: Peng Hao
> ---
> arch/x86/kvm/x86.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
> index 18b5ca7..6621319 100644
> --- a/arch/x86
On Wed, Apr 04, 2018 at 05:53:04PM +0200, Paolo Bonzini wrote:
> On 01/04/2018 17:54, Stefan Fritsch wrote:
> > This is very similar to the aligned versions movaps/movapd.
..snip..
> Applied, thanks.
Should there be a corresponding test-case?
>
> Paolo
On 04/04/2018 15:35, Wanpeng Li wrote:
> 2018-04-04 19:59 GMT+08:00 David Hildenbrand :
>>
>>> diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
>>> index 1eb495e..a55ecef 100644
>>> --- a/arch/x86/kvm/x86.c
>>> +++ b/arch/x86/kvm/x86.c
>>> @@ -146,6 +146,9 @@ bool __read_mostly enable_vmware_ba
On Tue, Apr 03, 2018 at 05:59:04PM -0700, Linus Torvalds wrote:
> People hotplug ATA _controllers_? :-O
>
> As opposed to just the disks a'la eSATA?
Heh, yeah, it's surprising. IIUC, it's people trying pcie hotplug (I
don't know whether they try physically) on SAS controllers on fancy
machines
On Wed, Mar 21, 2018 at 07:08:06PM +, Roman Gushchin wrote:
> > On Tue, Mar 20, 2018 at 10:33:53PM +, Roman Gushchin wrote:
> > > This patch aims to address an issue in current memory.low semantics,
> > > which makes it hard to use it in a hierarchy, where some leaf memory
> > > cgroups are
On Wed, Apr 4, 2018 at 1:51 AM, Martin van Es wrote:
>
> On Wednesday, April 4, 2018 10:33:16 AM CEST Jiri Kosina wrote:
> > Can I add your Tested-by: while applying the commit?
>
> That's ok.
Martin is also the reporter of the issue, I did not put down his name
because I wasn't sure if he wanted
Hi Stefan,
I love your patch! Yet something to improve:
[auto build test ERROR on linus/master]
[also build test ERROR on v4.16 next-20180404]
[cannot apply to battery/master]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https
On 04/04/2018 13:51, David Hildenbrand wrote:
> On 04.04.2018 12:44, Arnd Bergmann wrote:
>> The local variable was newly introduced but is only accessed in one
>> place on x86_64, but not on 32-bit:
>>
>> arch/x86/kvm/vmx.c: In function 'vmx_save_host_state':
>> arch/x86/kvm/vmx.c:2175:6: error: u
vmx_save_host_state has multiple ifdefs for CONFIG_X86_64 that have
no other code between them. Simplify by reducing them to a single
conditional.
Signed-off-by: Paolo Bonzini
---
arch/x86/kvm/vmx.c | 10 +++---
1 file changed, 3 insertions(+), 7 deletions(-)
diff --git a/arch/x86/kvm/vmx.
On Wed, Apr 04, 2018 at 04:53:52PM +, Nick Desaulniers wrote:
> (re-sending as plain text)
>
> On Wed, Apr 4, 2018 at 2:38 AM Greg KH wrote:
> > There are known-bugs with building a kernel with clang right now (I
> > pointed one out a few days ago about NULL checks being deleted from the
> >
Hello,
On Wed, Apr 04, 2018 at 04:34:47PM +0200, Michal Hocko wrote:
> > > The lazy updates are neat, but I'm a little concerned at the memory
> > > footprint. On a 64-cpu machine for example, this adds close to 9000
> > > words to struct mem_cgroup. And we really only need the accuracy for
> > >
On Mon, Apr 2, 2018 at 9:32 AM, Andrew Lunn wrote:
>> The 'use case' we have been using this in for a couple years is that
>> users who want to use this watchdog will enable it externally (we have
>> a command in the bootloader) and if enabled the kernel driver (that
>> I'm proposing here which we
From: Arnd Bergmann
Date: Wed, 4 Apr 2018 18:03:41 +0200
> On Wed, Apr 4, 2018 at 5:52 PM, David Miller wrote:
>> From: Arnd Bergmann
>> Date: Wed, 4 Apr 2018 14:12:39 +0200
>>
>>> The __net_initdata section cannot currently be used for structures that
>>> get cleaned up in an exitcall using u
Hi Alex,
On 04/04/18 16:33, Alex G. wrote:
> On 04/04/2018 02:18 AM, James Morse wrote:
>> On 03/04/18 18:08, Alexandru Gagniuc wrote:
>>> BIOSes like to send NMIs for a number of silly reasons often deemed
>>> to be "fatal". For example pin bounce during a PCIE hotplug/unplug
>>> might cause the
(re-sending as plain text)
On Wed, Apr 4, 2018 at 2:38 AM Greg KH wrote:
> There are known-bugs with building a kernel with clang right now (I
> pointed one out a few days ago about NULL checks being deleted from the
> clang output for no good reason, which really is scary for obvious
> reasons).
On Thu, Apr 05, 2018 at 12:58:46AM +0900, Tetsuo Handa wrote:
> Yury Norov wrote:
> > Hi Tetsuo,
> >
> > Thanks for the patch.
> >
> > On Wed, Apr 04, 2018 at 09:21:43PM +0900, Tetsuo Handa wrote:
> > > Yury, are you OK with this patch?
> > >
> > >
> > > >From 7f21827cdfe9780b4949b22bcd19efa721
On Wed, Apr 04, 2018 at 09:38:56AM -0700, Luck, Tony wrote:
> On Wed, Apr 04, 2018 at 09:25:13AM +0200, Peter Zijlstra wrote:
> > Right, I remember being careful with that. Which again brings me to the
> > RANDSTRUCT thing, which will mess that up.
>
> No RANDSTRUCT config options set for my build
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