On Wed, 6 Jun 2018 10:46:36 +0100
Suzuki K Poulose wrote:
> On 06/06/2018 09:24 AM, Greg Kroah-Hartman wrote:
> > On Tue, Jun 05, 2018 at 04:07:01PM -0500, Kim Phillips wrote:
> >> Increment the refcnt for driver modules in current use by calling
> >> module_get in coresight_build_path and module
On Tue, May 22, 2018 at 3:07 AM Kirill Tkhai wrote:
>
> Hi,
>
> this patches solves the problem with slow shrink_slab() occuring
> on the machines having many shrinkers and memory cgroups (i.e.,
> with many containers). The problem is complexity of shrink_slab()
> is O(n^2) and it grows too fast w
[+cc akpm, linux-mm, linux-pci]
On Wed, Jun 6, 2018 at 10:44 AM Will Deacon wrote:
>
> On Thu, May 31, 2018 at 08:14:38PM +0800, Xie XiuQi wrote:
> > A numa system may return node which is not online.
> > For example, a numa node:
> > 1) without memory
> > 2) NR_CPUS is very small, and the cpus o
On Wed, 2018-06-06 at 14:25 -0600, Jason Gunthorpe wrote:
> I saw your note in the original mailing-list thread and just wanted to
> say the way I use clang-format is editor based.
>
> I have a hotkey that triggers clang-format to reformat the current
> statement, or current hi-lighted region. If
> The AD5758 is a single channel DAC with 16-bit precision which uses the SPI
> interface that operates at clock rates up to 50MHz.
>
> The output can be configured as voltage or current and is available on a
> single terminal.
comments below
> Datasheet:
> http://www.analog.com/media/en/tech
On 06/01/2018 12:08 PM, Mark Brown wrote:
On Fri, Jun 01, 2018 at 10:19:58AM -0500, Pierre-Louis Bossart wrote:
I wanted to ack this patch but the Intel validation folks asked for a couple
of days to finish their tests on a variety of Chromebooks (e.g. Lars) and
double-check which models use
On Wed, Jun 06, 2018 at 03:26:28PM +0200, Samuel Thibault wrote:
> Hello,
>
> Justin Skists, le lun. 04 juin 2018 10:52:12 +0100, a ecrit:
> > The synths[] array is a collection of synths acting like a list.
> > There is no need for synths to be an array, so refactor synths[] to use
> > standard k
On Wed, Jun 06, 2018 at 01:18:59PM -0700, Joe Perches wrote:
> On Wed, 2018-06-06 at 14:15 -0600, Jason Gunthorpe wrote:
> > The true option causes this indenting for functions:
> >
> > static struct something_very_very_long *
> > function(void *arg)
> > {
> >
> > While a quick survey suggest
On Wed, 2018-06-06 at 14:15 -0600, Jason Gunthorpe wrote:
> The true option causes this indenting for functions:
>
> static struct something_very_very_long *
> function(void *arg)
> {
>
> While a quick survey suggests that the usual Linux fallback is the GNU
> style:
>
> static struct someth
The true option causes this indenting for functions:
static struct something_very_very_long *
function(void *arg)
{
While a quick survey suggests that the usual Linux fallback is the GNU
style:
static struct something_very_very_long *
function(void *arg)
{
Eg as seen in:
kernel/cpu.c
ker
On Wed, Jun 06, 2018 at 09:39:40PM +0200, Mathieu Malaterre wrote:
> Since function `percpu_counter_add' may result in a signed integer overflow
> the result stored in `fbc->count' could be negative. Make sure that
> function `percpu_counter_read_positive' does not return a negative number
> in thi
Em Wed, Jun 06, 2018 at 03:13:00PM -0400, Steven Rostedt escreveu:
> On Wed, 6 Jun 2018 15:59:14 -0300
> Arnaldo Carvalho de Melo wrote:
>
> > Em Wed, Jun 06, 2018 at 02:37:27PM -0400, Steven Rostedt escreveu:
> > > On Wed, 6 Jun 2018 15:13:02 +0200
> > > Peter Zijlstra wrote:
> > >
> > > > O
When CONFIG_MODULE_SIG_FORCE is enabled, also provide a boot-time-only
parameter, module.sig_unenforce, to disable signature enforcement. This
allows distributions to ship with signature verification enforcement
enabled by default, but for users to elect to disable it without
recompiling, to suppor
In commit 73ce0511c436 ("kernel/watchdog.c: move hardlockup detector to
separate file") two new functions were added ‘watchdog_nmi_enable’ and
‘watchdog_nmi_disable’ the functions were changed from static to weak.
In which case expose the function declarations in header file.
Silence the following
Commit 26f09e9b3a06 ("mm/memblock: add memblock memory allocation apis")
introduced two new function definitions:
‘memblock_virt_alloc_try_nid_nopanic’
and
‘memblock_virt_alloc_try_nid’.
Commit ea1f5f3712af ("mm: define memblock_virt_alloc_try_nid_raw")
introduced the following function definit
Since function `percpu_counter_add' may result in a signed integer overflow
the result stored in `fbc->count' could be negative. Make sure that
function `percpu_counter_read_positive' does not return a negative number
in this case. This will match behavior when CONFIG_SMP=y.
Detected wth CONFIG_UB
Update the Ci20's defconfig to enable the JZ4780's SND driver.
Signed-off-by: Mathieu Malaterre
---
arch/mips/configs/ci20_defconfig | 4
1 file changed, 4 insertions(+)
diff --git a/arch/mips/configs/ci20_defconfig b/arch/mips/configs/ci20_defconfig
index e1c14f6af824..0c08c7675b42 100644
On 06/06/2018 11:20 AM, Steven Rostedt wrote:
>
> Shuah,
>
> Can you take this in your tree?
>
> Acked-by: Steven Rostedt (VMware)
>
> -- Steve
>
>
> On Wed, 6 Jun 2018 20:37:52 +0900
> Masami Hiramatsu wrote:
>
>> On Wed, 6 Jun 2018 15:01:54 +0530
>> "Naveen N. Rao" wrote:
>>
>>> Add po
Since commit 967beb2e8777 ("ASoC: jz4740: Add jz4780 support"), jz4740-i2s
driver supports jz4780 hardware. Use proper compatible string.
Signed-off-by: Mathieu Malaterre
---
arch/mips/boot/dts/ingenic/jz4780.dtsi | 12
1 file changed, 12 insertions(+)
diff --git a/arch/mips/boot/d
Make it possible to select SND_JZ4740_SOC_I2S on MACH_JZ4780
Signed-off-by: Mathieu Malaterre
---
sound/soc/jz4740/Kconfig | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/sound/soc/jz4740/Kconfig b/sound/soc/jz4740/Kconfig
index 1a354a6b6e87..35d82d96e781 100644
--
Update the Ci20's defconfig to enable the JZ4780's SPI/GPIO driver.
Signed-off-by: Mathieu Malaterre
---
arch/mips/configs/ci20_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/mips/configs/ci20_defconfig b/arch/mips/configs/ci20_defconfig
index 0ddef6ad2652..0c08c7675b42 100
The spi-gpio driver supports jz4780.
Signed-off-by: Mathieu Malaterre
---
arch/mips/boot/dts/ingenic/jz4780.dtsi | 19 +++
1 file changed, 19 insertions(+)
diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi
b/arch/mips/boot/dts/ingenic/jz4780.dtsi
index 809f01a62955..308079ee8
Hi Linus,
Please pull from:
git://git.kernel.org/pub/scm/linux/kernel/git/mszeredi/vfs.git
tags/ovl-fixes-4.18
This contains a fix for the vfs_mkdir() issue discovered by Al, as well as
other fixes and cleanups.
It's the first overlayfs pull request for 4.18, the only VFS bit here is a
new i
On 05/28/2018 11:01 AM, Ray Jui wrote:
> This patch series enhances the support for the SP805 watchdog timer.
> First of all, 'timeout-sec' devicetree property is added. In addition,
> support is also added to allow the driver to reset the watchdog if it
> has been detected that watchdot has been s
On Wed, Jun 6, 2018 at 12:07 PM Brian Gerst wrote:
>
> On Wed, Jun 6, 2018 at 1:16 PM, Andy Lutomirski wrote:
> > On Wed, Jun 6, 2018 at 9:23 AM Chang S. Bae
> > wrote:
> >>
> >> The new entry will be equivalent to that of x86-64 which
> >> stores CPU number. The entry is placed in segment 23 i
On Wed, Jun 6, 2018 at 12:05 PM Paul E. McKenney
wrote:
>
> 3. Introduce a new marking/attribute in the .def file that indicates
> whether an access is volatile or implies a compiler barrier.
> This might allow herd to be more selective about control dependencies,
> fo
On Wed, Jun 6, 2018 at 12:00 PM Rik van Riel wrote:
>
> On Wed, 2018-06-06 at 11:17 -0700, Andy Lutomirski wrote:
> > On Sat, Jun 2, 2018 at 6:38 PM Rik van Riel wrote:
> > >
> > > On Sun, 2018-06-03 at 00:51 +, Song Liu wrote:
> > >
> > > > > Just to check: in the workload where you're seein
ATENÇÃO;
Sua caixa de correio excedeu o limite de armazenamento, que é de 5 GB como
definido pelo administrador, que está atualmente em execução no 10.9GB, você
pode não ser capaz de enviar ou receber novas mensagens até que você re-validar
a sua caixa de correio. Para revalidar sua caixa de co
Il 06/06/2018 18:51, Andy Shevchenko ha scritto:
On Wed, Jun 6, 2018 at 12:51 PM, Giulio Benetti
wrote:
Need to use rs485 transceiver so let's use existing em485 485 emulation
layer on top of 8250.
Add rs485_config callback to port.
Besides the fact the series lacks of cover letter, I think
Il 06/06/2018 20:55, Matwey V. Kornilov ha scritto:
2018-06-06 16:11 GMT+03:00 Andy Shevchenko :
On Wed, 2018-06-06 at 14:15 +0200, Giulio Benetti wrote:
Il 06/06/2018 13:56, Andy Shevchenko ha scritto:
On Wed, 2018-06-06 at 11:49 +0200, Giulio Benetti wrote:
em485 gets lost during
Copy em48
On Wed, 6 Jun 2018 15:59:14 -0300
Arnaldo Carvalho de Melo wrote:
> Em Wed, Jun 06, 2018 at 02:37:27PM -0400, Steven Rostedt escreveu:
> > On Wed, 6 Jun 2018 15:13:02 +0200
> > Peter Zijlstra wrote:
> >
> > > On Wed, Jun 06, 2018 at 03:54:09PM +0300, Adrian Hunter wrote:
> > > > The logic i
On 1 June 2018 at 05:08, Suzuki K Poulose wrote:
> We request for "CORESIGHT_BARRIER_PKT_SIZE" length and we should
> be happy when we get that size.
>
> Cc: Mathieu Poirier
> Signed-off-by: Suzuki K Poulose
> ---
>
> Mathieu,
>
> Please could you pull this patch, if you are happy with it ?
> Th
On Wed, Jun 6, 2018 at 1:16 PM, Andy Lutomirski wrote:
> On Wed, Jun 6, 2018 at 9:23 AM Chang S. Bae wrote:
>>
>> The new entry will be equivalent to that of x86-64 which
>> stores CPU number. The entry is placed in segment 23 in GDT
>> by bumping down 23-28 by one, which are all kernel-internal
On Wed, Jun 06, 2018 at 11:40:13AM +0200, Roman Penyaev wrote:
> On Wed, May 30, 2018 at 9:08 PM, Alan Stern wrote:
> > On Wed, 30 May 2018, Paul E. McKenney wrote:
> >
> >> On Wed, May 30, 2018 at 09:59:28AM -0500, Linus Torvalds wrote:
> >> > On Wed, May 30, 2018 at 9:29 AM Alan Stern
> >> > wr
On Wed, 2018-06-06 at 11:17 -0700, Andy Lutomirski wrote:
> On Sat, Jun 2, 2018 at 6:38 PM Rik van Riel wrote:
> >
> > On Sun, 2018-06-03 at 00:51 +, Song Liu wrote:
> >
> > > > Just to check: in the workload where you're seeing this
> > > > problem,
> > > > are
> > > > you using an mm with
On Wed, Jun 06, 2018 at 03:51:16PM +0200, Oleg Nesterov wrote:
> IIUC, this will only affect smpboot_update_cpumask_percpu_thread() which can
> hit
> an already parked thread, but it doesn't need to wait.
>
> And it seems that smpboot_update_cpumask_percpu_thread() in turn needs some
> cleanups.
Em Wed, Jun 06, 2018 at 02:37:27PM -0400, Steven Rostedt escreveu:
> On Wed, 6 Jun 2018 15:13:02 +0200
> Peter Zijlstra wrote:
>
> > On Wed, Jun 06, 2018 at 03:54:09PM +0300, Adrian Hunter wrote:
> > > The logic in update_iter_mod() is overcomplicated and gets worse every
> > > time
> > > anothe
2018-06-06 16:11 GMT+03:00 Andy Shevchenko :
> On Wed, 2018-06-06 at 14:15 +0200, Giulio Benetti wrote:
>> Il 06/06/2018 13:56, Andy Shevchenko ha scritto:
>> > On Wed, 2018-06-06 at 11:49 +0200, Giulio Benetti wrote:
>> > > em485 gets lost during
>> > >
>> > > Copy em485 to final uart port.
>> > >
This patch fix the following build error on M68K:
drivers/tty/serial/8250/8250_dw.o: In function `dw8250_set_termios':
8250_dw.c:(.text+0x50c): undefined reference to `clk_round_rate'
8250_dw.c:(.text+0x594): undefined reference to `clk_set_rate'
So 8250_dw need to depend on COMMON_CLK.
Signed-of
This patch fix the following build failure on m68k:
ERROR: "clk_set_rate" [drivers/mmc/host/dw_mmc.ko] undefined!
Signed-off-by: Corentin Labbe
---
drivers/mmc/host/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
ind
On Wed, Jun 6, 2018 at 10:19 AM Masahiro Yamada
wrote:
>
> Please pull Kconfig updates for v4.18
Thanks, pulled, going through my build testing now.
I just wanted to say how much I like the new Kconfig syntax
extensions, even if this tree didn't contain the nice cleanups to
actually use the new
Hi Linus,
Please pull these overflow changes for v4.18-rc1. As the tag notes, this
adds the new overflow checking helpers and adds them to the 2-factor
argument allocators. And this adds the saturating size helpers and does
a treewide replacement for the struct_size() usage. Additionally this
adds
Commit 5d1904204c99 ("mremap: fix race between mremap() and page cleanning")
fixed races between mremap and other operations for both file-backed and
anonymous mappings. The file-backed was the most critical as it allowed the
possibility that data could be changed on a physical page after page_mkcl
On Wed, 6 Jun 2018 15:13:02 +0200
Peter Zijlstra wrote:
> On Wed, Jun 06, 2018 at 03:54:09PM +0300, Adrian Hunter wrote:
> > The logic in update_iter_mod() is overcomplicated and gets worse every time
> > another get_ksymbol_* function is added.
> >
> > In preparation for adding another get_ksym
Em Fri, Jun 01, 2018 at 05:01:02PM +0800, Jin Yao escreveu:
> +static int get_symoff(struct symbol *sym, struct addr_location *al,
> + bool print_off, char *bf, int size)
> +{
> + unsigned long offset;
> +
> + if (!sym || !sym->name)
> + return scnprintf(bf,
Hi Linus,
Please pull from:
git://git.kernel.org/pub/scm/linux/kernel/git/mszeredi/fuse.git
tags/fuse-update-4.18
The most interesting part of this update is user namespace support, mostly
done by Eric Biederman. This enables safe unprivileged fuse mounts within
a user namespace.
There are
On Wed, Jun 6, 2018 at 10:25 AM Andy Lutomirski wrote:
> On Wed, Jun 6, 2018 at 9:23 AM Chang S. Bae wrote:
>>
>> The CPU (and node) number will be written, as early enough,
>> to the segment limit of per CPU data and TSC_AUX MSR entry.
>> The information has been retrieved by vgetcpu in user spa
On Wed, 6 Jun 2018 16:26:00 +0200
Johan Hovold wrote:
> Looks like the greybus code above is working as intended by checking for
> unterminated string after the strncpy, even if this does now triggers
> the truncation warning.
Ah, yes I now see that. Thanks for pointing it out. But perhaps it
sh
From: Mohamed Ismail Abdul Packir Mohamed
Enable the HW rng driver "iproc-rng200" for all cygnus platforms.
Signed-off-by: Mohamed Ismail Abdul Packir Mohamed
Reviewed-by: Ray Jui
Signed-off-by: Scott Branden
---
arch/arm/boot/dts/bcm-cygnus.dtsi | 5 +
1 file changed, 5 insertions(+)
Mel Gorman wrote:
> On Wed, Jun 06, 2018 at 08:55:15AM -0700, Nadav Amit wrote:
>>> -#define LATENCY_LIMIT (64 * PAGE_SIZE)
>>> +#define LATENCY_LIMIT (PMD_SIZE)
>>>
>>> unsigned long move_page_tables(struct vm_area_struct *vma,
>>> unsigned long old_addr, struct vm_area_st
On Sat, Jun 2, 2018 at 6:38 PM Rik van Riel wrote:
>
> On Sun, 2018-06-03 at 00:51 +, Song Liu wrote:
>
> > > Just to check: in the workload where you're seeing this problem,
> > > are
> > > you using an mm with many threads? I would imagine that, if you
> > > only
> > > have one or two threa
Hi Evan,
On 06/06/2018 05:59 PM, Georgi Djakov wrote:
>>> +
>>> +/**
>>> + * icc_node_create() - create a node
>>> + * @id: node id
>>> + *
>>> + * Return: icc_node pointer on success, or ERR_PTR() on error
>>> + */
>>> +struct icc_node *icc_node_create(int id)
>>> +{
>>> + struct icc_node *
On Tue, May 29, 2018 at 11:55:56AM +0100, Suzuki K Poulose wrote:
> Add support for 64bit event by using chained event counters
> and 64bit cycle counters.
>
> Arm v8 PMUv3 allows chaining a pair of adjacent PMU counters
> (with the lower counter number being always "even"). The low
> counter is p
On Sat, May 26, 2018 at 10:35 PM, Matt Turner wrote:
> It looks like CH355_4S is similarly missing, but I don't have hardware
> to test.
>
> This commit makes me wonder if I'm missing something -- how could
> anything have worked after commit 72a3c0e4e662 without support in
> parport_serial?
I g
On Wed, Jun 6, 2018 at 9:45 AM, Ross Zwisler
wrote:
> Prior to this commit we would only do a "deep flush" (have nvdimm_flush()
> write to each of the flush hints for a region) in response to an
> msync/fsync/sync call if the nvdimm_has_cache() returned true at the time
> we were setting up the re
On June 6, 2018 2:17:42 AM PDT, "Leizhen (ThunderTown)"
wrote:
>I found that glibc has already dealt with this case. So this issue must
>have been met before, should it be maintained by libc/user?
>
> if (GLRO(dl_sysinfo_dso) == NULL)
> {
> kact.sa_flags |= SA_RESTORER;
On Wed, Jun 06, 2018 at 08:55:15AM -0700, Nadav Amit wrote:
> > -#define LATENCY_LIMIT (64 * PAGE_SIZE)
> > +#define LATENCY_LIMIT (PMD_SIZE)
> >
> > unsigned long move_page_tables(struct vm_area_struct *vma,
> > unsigned long old_addr, struct vm_area_struct *new_vma,
>
> Th
On 6/6/18 5:58 AM, Christoph Hellwig wrote:
>> diff --git a/fs/xfs/xfs_ioctl.c b/fs/xfs/xfs_ioctl.c
>> index 82f7c83c1dad..596e176c19a6 100644
>> --- a/fs/xfs/xfs_ioctl.c
>> +++ b/fs/xfs/xfs_ioctl.c
>> @@ -1828,13 +1828,13 @@ xfs_ioc_getlabel(
>> /* Paranoia */
>> BUILD_BUG_ON(sizeof(s
Following logic from commit: 22f6592b23, GPIOHANDLE_REQUEST_OUTPUT
should handle errors same way as GPIOHANDLE_REQUEST_INPUT does, or else
the following error occurs:
gpio-mockup-chardev: gpio line<0> test flag<0x2> value<0>: No
such file or directory
despite the real result of gpio_pin_test(), g
The Berlin PWM driver is currently broken on at least BG2CD. The
symptoms manifest as a very non-linear and erratic mapping from the duty
cycle configured in software to the duty cycle produced by hardware.
The cause of the bug is software's configuration of the prescaler, and
in particular its us
On 06/06/2018 18:08, Pierre Morel wrote:
On 06/06/2018 16:28, Tony Krowiak wrote:
On 06/05/2018 08:19 AM, Pierre Morel wrote:
On 30/05/2018 16:33, Tony Krowiak wrote:
On 05/24/2018 05:08 AM, Pierre Morel wrote:
On 23/05/2018 16:45, Tony Krowiak wrote:
On 05/16/2018 04:03 AM, Pierre Morel wro
On 06/06/2018 10:14 AM, Scott Branden wrote:
>
>
> On 18-06-06 09:47 AM, Florian Fainelli wrote:
>> On 06/06/2018 09:03 AM, Scott Branden wrote:
>>> Hi Clement,
>>>
>>>
>>> On 18-06-06 02:34 AM, Clément Péron wrote:
From: Clément Peron
There is a HWRNG in Broadcom Cygnus SoC, so e
On 18-06-06 10:06 AM, Clément Péron wrote:
Hi Scott, Florian,
On Wed, 6 Jun 2018 at 18:47, Florian Fainelli wrote:
On 06/06/201 8 09:03 AM, Scott Branden wrote:
Hi Clement,
On 18-06-06 02:34 AM, Clément Péron wrote:
From: Clément Peron
There is a HWRNG in Broadcom Cygnus SoC, so enabl
On Wed, Jun 6, 2018 at 9:23 AM Chang S. Bae wrote:
>
> The CPU (and node) number will be written, as early enough,
> to the segment limit of per CPU data and TSC_AUX MSR entry.
> The information has been retrieved by vgetcpu in user space
> and will be also loaded from the paranoid entry, when
> F
Shuah,
Can you take this in your tree?
Acked-by: Steven Rostedt (VMware)
-- Steve
On Wed, 6 Jun 2018 20:37:52 +0900
Masami Hiramatsu wrote:
> On Wed, 6 Jun 2018 15:01:54 +0530
> "Naveen N. Rao" wrote:
>
> > Add powerpc support for the recently added kprobe args tests.
>
> Thank you
Hi Linus,
Please pull Kconfig updates for v4.18
(The follow-up cleanup works are not included in this PR.
I will send them later on because I need to wait for
some prerequisite patches from the PowerPC subsystem.)
You will see a conflict in the top-level Makefile.
It should be resolved as follo
Hi Linus,
The following changes since commit 7fbb6157630f2ba6ee355689061f9596b84373ef:
Merge tag 'armsoc-fixes' of
git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc (2018-05-26
14:05:16 -0700)
are available in the Git repository at:
git://git.linaro.org/landing-teams/working/fujitsu
On Wed, Jun 06, 2018 at 11:38:46AM -0500, Jeremy Linton wrote:
> The numa mask subset check can often lead to system hang or crash during
> CPU hotplug and system suspend operation if NUMA is disabled. This is
> mostly observed on HMP systems where the CPU compute capacities are
> different and end
On Wed, Jun 6, 2018 at 9:23 AM Chang S. Bae wrote:
>
> 64-bit doesn't use the entry for per CPU data, but for CPU
> numbers. The change will clarify the real usage of this
> entry in GDT.
Acked-by: Andy Lutomirski
This is a *huge* improvement.
On Wed, Jun 6, 2018 at 9:23 AM Chang S. Bae wrote:
>
> The new entry will be equivalent to that of x86-64 which
> stores CPU number. The entry is placed in segment 23 in GDT
> by bumping down 23-28 by one, which are all kernel-internal
> segments and so have no impact on user space.
>
> CPU_NUMBER
On 18-06-06 09:47 AM, Florian Fainelli wrote:
On 06/06/2018 09:03 AM, Scott Branden wrote:
Hi Clement,
On 18-06-06 02:34 AM, Clément Péron wrote:
From: Clément Peron
There is a HWRNG in Broadcom Cygnus SoC, so enable it.
Signed-off-by: Clément Peron
Thanks for upstreaming some missing
On Wed, Jun 6, 2018 at 9:23 AM Chang S. Bae wrote:
>
> Using wrmsr_safe() can make code a bit simpler by removing
> some condition check
NAK.
If we really want to stop checking the cpu feature and unconditionally
write the MSR, then there should be a single patch that does it. If
we don't, then
On Wed, Jun 6, 2018 at 8:04 PM, Andy Shevchenko
wrote:
> On Wed, Jun 6, 2018 at 9:07 AM, Matt Turner wrote:
>> On Sat, May 26, 2018 at 12:35 PM, Matt Turner wrote:
>>> This Multi-IO card has one serial 16550-like serial connectors. Here's
>>> the lspci output, after this commit is applied:
>>>
>
Hi Linus,
Please pull Kbuild updates for v4.18
The following changes since commit 75bc37fefc4471e718ba8e651aa74673d4e0a9eb:
Linux 4.17-rc4 (2018-05-06 16:57:38 -1000)
are available in the git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/masahiroy/linux-kbuild.git
tags/kbu
Hi Scott, Florian,
On Wed, 6 Jun 2018 at 18:47, Florian Fainelli wrote:
>
> On 06/06/201 8 09:03 AM, Scott Branden wrote:
> > Hi Clement,
> >
> >
> > On 18-06-06 02:34 AM, Clément Péron wrote:
> >> From: Clément Peron
> >>
> >> There is a HWRNG in Broadcom Cygnus SoC, so enable it.
> >>
> >> Sig
On Wed, 2018-06-06 at 08:32 -0700, Srikar Dronamraju wrote:
> Yes its better to skip cpus if they are already in migration.
> And we are already doing it with the above patch. However as I said
> earlier
>
> - Task T1 sets Cpu 1 as best_cpu,
> - Task T2 finds cpu1 and skips Cpu1
> - Task T1 fin
On Wed, Jun 6, 2018 at 9:07 AM, Matt Turner wrote:
> On Sat, May 26, 2018 at 12:35 PM, Matt Turner wrote:
>> This Multi-IO card has one serial 16550-like serial connectors. Here's
>> the lspci output, after this commit is applied:
>>
>> 01:00.0 Serial controller [0700]: Device [1c00:3470] (rev 10
On Wed, Jun 6, 2018 at 2:18 AM Leizhen (ThunderTown)
wrote:
>
> I found that glibc has already dealt with this case. So this issue must have
> been met before, should it be maintained by libc/user?
>
> if (GLRO(dl_sysinfo_dso) == NULL)
> {
> kact.sa_flags |= SA_RES
On Wednesday 06 Jun 2018 at 18:47:34 (+0200), Juri Lelli wrote:
> Hi Quentin,
>
> On 21/05/18 15:24, Quentin Perret wrote:
>
> [...]
>
> > +#ifdef CONFIG_ENERGY_MODEL
>
> [...]
>
> > +struct em_data_callback {
> > + /**
> > +* active_power() - Provide power at the next capacity state of
On Wed, Jun 6, 2018 at 12:51 PM, Giulio Benetti
wrote:
> Need to use rs485 transceiver so let's use existing em485 485 emulation
> layer on top of 8250.
>
> Add rs485_config callback to port.
Besides the fact the series lacks of cover letter, I think it should
be postponed until we get a clear un
On Tue, May 29, 2018 at 11:55:54AM +0100, Suzuki K Poulose wrote:
> Each PMU has a set of 32bit event counters. But in some
> special cases, the events could be counted using counters
> which are effectively 64bit wide.
>
> e.g, Arm V8 PMUv3 has a 64 bit cycle counter which can count
> only the CP
On 06/06/2018 09:03 AM, Scott Branden wrote:
> Hi Clement,
>
>
> On 18-06-06 02:34 AM, Clément Péron wrote:
>> From: Clément Peron
>>
>> There is a HWRNG in Broadcom Cygnus SoC, so enable it.
>>
>> Signed-off-by: Clément Peron
> Thanks for upstreaming some missing Cygnus components.
>
> But, t
Hi Quentin,
On 21/05/18 15:24, Quentin Perret wrote:
[...]
> +#ifdef CONFIG_ENERGY_MODEL
[...]
> +struct em_data_callback {
> + /**
> + * active_power() - Provide power at the next capacity state of a CPU
> + * @power : Active power at the capacity state (modified)
> +
The numa mask subset check can often lead to system hang or crash during
CPU hotplug and system suspend operation if NUMA is disabled. This is
mostly observed on HMP systems where the CPU compute capacities are
different and ends up in different scheduler domains. Since
cpumask_of_node is returned
On Wed, Jun 6, 2018 at 11:19 AM, Guenter Roeck wrote:
> On 06/05/2018 12:41 PM, Rob Herring wrote:
>>
>> On Mon, May 28, 2018 at 11:01:32AM -0700, Ray Jui wrote:
>>>
>>> Consolidate two SP805 binding documents "arm,sp805.txt" and
>>> "sp805-wdt.txt" into "arm,sp805.txt" that matches the naming of
On Wednesday 06 Jun 2018 at 16:29:50 (+0100), Quentin Perret wrote:
> On Wednesday 06 Jun 2018 at 17:20:00 (+0200), Juri Lelli wrote:
> > > > This brings me to another question. Let's say there are multiple users
> > > > of
> > > > the Energy Model in the system. Shouldn't the units of frequency a
With new helpers, FS/GS base access is centralized.
Eventually, when FSGSBASE instruction enabled, it will
be faster.
The helpers are used on ptrace APIs (PTRACE_ARCH_PRCTL,
PTRACE_SETREG, PTRACE_GETREG, etc). Idea is to keep
the FS/GS-update mechanism organized.
"inactive" GS base refers to base
From: Andy Lutomirski
ptrace can read FS/GS base using the register access API
(PTRACE_PEEKUSER, etc) or PTRACE_ARCH_PRCTL. Make both of these
mechanisms return the actual FS/GS base.
This will improve debuggability by providing the correct information
to ptracer (GDB and etc).
Signed-off-by:
When new FSGSBASE instructions enabled, this read will
become faster.
Based-on-code-from: Andy Lutomirski
Signed-off-by: Chang S. Bae
Reviewed-by: Andi Kleen
Cc: H. Peter Anvin
Cc: Dave Hansen
Cc: Thomas Gleixner
Cc: Ingo Molnar
Reviewed-by: Andy Lutomirski
---
arch/x86/include/asm/elf.h
The new entry will be equivalent to that of x86-64 which
stores CPU number. The entry is placed in segment 23 in GDT
by bumping down 23-28 by one, which are all kernel-internal
segments and so have no impact on user space.
CPU_NUMBER segment will always be at '%ss (USER_DS) + 80'
for the default (
64-bit doesn't use the entry for per CPU data, but for CPU
numbers. The change will clarify the real usage of this
entry in GDT.
Suggested-by: H. Peter Anvin
Signed-off-by: Chang S. Bae
Cc: Andy Lutomirski
Cc: Andi Kleen
Cc: Dave Hansen
Cc: Thomas Gleixner
Cc: Ingo Molnar
---
arch/x86/entr
Given feedbacks from [1], it was asked to make first a few
patches ready as soon as possible. To make FSGSBASE facilitated,
some helper functions and refactoring work are incorporated.
Besides that, it includes Andy's fix for accurate FS/GS base read
and cleanup for the vDSO initialization.
Change
The CPU (and node) number will be written, as early enough,
to the segment limit of per CPU data and TSC_AUX MSR entry.
The information has been retrieved by vgetcpu in user space
and will be also loaded from the paranoid entry, when
FSGSBASE enabled. So, it is moved out from vDSO to the CPU
initia
Instead of open code, load_fsgs() will cleanup __switch_to
and symmetric with FS/GS segment save. When FSGSBASE
enabled, X86_FEATURE_FSGSBASE check will be incorporated.
Signed-off-by: Chang S. Bae
Reviewed-by: Andi Kleen
Cc: Andy Lutomirski
Cc: H. Peter Anvin
Cc: Dave Hansen
Cc: Thomas Gleix
Using wrmsr_safe() can make code a bit simpler by removing
some condition check
Suggested-by: H. Peter Anvin
Signed-off-by: Chang S. Bae
Cc: Andy Lutomirski
Cc: Andi Kleen
Cc: Dave Hansen
Cc: Thomas Gleixner
Cc: Ingo Molnar
---
arch/x86/include/asm/msr.h | 2 +-
1 file changed, 1 insertion
On 06/05/2018 12:41 PM, Rob Herring wrote:
On Mon, May 28, 2018 at 11:01:32AM -0700, Ray Jui wrote:
Consolidate two SP805 binding documents "arm,sp805.txt" and
"sp805-wdt.txt" into "arm,sp805.txt" that matches the naming of the
desired compatible string to be used
Signed-off-by: Ray Jui
---
On 06/06/2018 16:28, Tony Krowiak wrote:
On 06/05/2018 08:19 AM, Pierre Morel wrote:
On 30/05/2018 16:33, Tony Krowiak wrote:
On 05/24/2018 05:08 AM, Pierre Morel wrote:
On 23/05/2018 16:45, Tony Krowiak wrote:
On 05/16/2018 04:03 AM, Pierre Morel wrote:
On 07/05/2018 17:11, Tony Krowiak wro
On Tue, May 1, 2018 at 9:50 PM, Wu Hao wrote:
Hi Hao,
I've acked the remaining patches with some changes requested. In your
v6, please add a patch to add yourself to the MAINTAINERS file or
whoever is planning on maintaining fpga/drivers/*dfl*
> Add a document for FPGA Device Feature List (DFL
Hello,
Justin Skists, le lun. 04 juin 2018 10:52:12 +0100, a ecrit:
> The synths[] array is a collection of synths acting like a list.
> There is no need for synths to be an array, so refactor synths[] to use
> standard kernel list_head API, instead, and modify the usages to suit.
> As a side-effe
On Tue 05 Jun 05:56 PDT 2018, Sricharan R wrote:
> Hi Vinod,
>
> On 6/5/2018 11:49 AM, Vinod wrote:
> > On 05-06-18, 11:12, Sricharan R wrote:
> >
> >> +config QCOM_Q6V5_WCSS
> >> + tristate "Qualcomm Hexagon based WCSS Peripheral Image Loader"
> >> + depends on OF && ARCH_QCOM
> >> + depends
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