On Tuesday, June 12, 2018, 7:27:52 AM CEST Keerthy wrote:
> This is needed in case of PROBE_DEFER if IRQ resource is not yet ready.
>
> Signed-off-by: Keerthy
> ---
> [...]
> --- a/drivers/gpio/gpio-davinci.c
> +++ b/drivers/gpio/gpio-davinci.c
> [...]
> @@ -168,7 +168,7 @@ static int
On Tuesday, June 12, 2018, 7:27:52 AM CEST Keerthy wrote:
> This is needed in case of PROBE_DEFER if IRQ resource is not yet ready.
>
> Signed-off-by: Keerthy
> ---
> [...]
> --- a/drivers/gpio/gpio-davinci.c
> +++ b/drivers/gpio/gpio-davinci.c
> [...]
> @@ -168,7 +168,7 @@ static int
On Tuesday 12 June 2018 11:15 AM, Alexander Stein wrote:
> On Tuesday, June 12, 2018, 7:27:52 AM CEST Keerthy wrote:
>> This is needed in case of PROBE_DEFER if IRQ resource is not yet ready.
>>
>> Signed-off-by: Keerthy
>> ---
>> [...]
>> --- a/drivers/gpio/gpio-davinci.c
>> +++
On Tuesday 12 June 2018 11:15 AM, Alexander Stein wrote:
> On Tuesday, June 12, 2018, 7:27:52 AM CEST Keerthy wrote:
>> This is needed in case of PROBE_DEFER if IRQ resource is not yet ready.
>>
>> Signed-off-by: Keerthy
>> ---
>> [...]
>> --- a/drivers/gpio/gpio-davinci.c
>> +++
Hi,
Here is what I have so far. It begins with a makefile and some
template files that are added to. There's a good bit of Perl also.
I put all of these files in tools/uapi/ and run them from there.
There is one .c file generated for each .h file in builddir/usr/include
(O=builddir).
Out of
Hi,
Here is what I have so far. It begins with a makefile and some
template files that are added to. There's a good bit of Perl also.
I put all of these files in tools/uapi/ and run them from there.
There is one .c file generated for each .h file in builddir/usr/include
(O=builddir).
Out of
Previous implementation uses one global lock to protect the resource.
If the serial driver have multiple entries, this kind of lock will
slow down the performance.
Add the lock at device level. This will lock only when the function
calling only to the same device.
So that it can avoid useless lock
Previous implementation uses platform-dependent functions
ltq_w32()/ltq_r32() to access registers. Those functions are not
available for other SoC which uses the same IP.
Change to OS provided readl()/writel() and readb()/writeb(), so
that different SoCs can use the same driver.
Signed-off-by:
Previous implementation uses one global lock to protect the resource.
If the serial driver have multiple entries, this kind of lock will
slow down the performance.
Add the lock at device level. This will lock only when the function
calling only to the same device.
So that it can avoid useless lock
Previous implementation uses platform-dependent functions
ltq_w32()/ltq_r32() to access registers. Those functions are not
available for other SoC which uses the same IP.
Change to OS provided readl()/writel() and readb()/writeb(), so
that different SoCs can use the same driver.
Signed-off-by:
From: Hua Ma
Add initial support for Intel MIPS interAptiv SoCs made by Intel.
This series will add support for the GRX500 family.
The series allows booting a minimal system using a initramfs.
Signed-off-by: Hua ma
Signed-off-by: Songjun Wu
---
arch/mips/Kbuild.platforms
From: Hua Ma
Add initial support for Intel MIPS interAptiv SoCs made by Intel.
This series will add support for the GRX500 family.
The series allows booting a minimal system using a initramfs.
Signed-off-by: Hua ma
Signed-off-by: Songjun Wu
---
arch/mips/Kbuild.platforms
Update the author list with Intel Corporation.
Sort the header includes in alphabetical orders.
Remove unneeded header includes and macros.
Signed-off-by: Songjun Wu
---
drivers/tty/serial/lantiq.c | 29 +++--
1 file changed, 11 insertions(+), 18 deletions(-)
diff
Hi Randy,
On 12 June 2018 at 13:27, Randy Dunlap wrote:
> On 06/11/2018 10:24 PM, Baolin Wang wrote:
>> From: Freeman Liu
>>
>> This patch add the efuse driver which is embeded in Spreadtrum SC27XX
>> series PMICs. The sc27xx efuse contains 32 blocks and each block's
>> data width is 16 bits.
Update the author list with Intel Corporation.
Sort the header includes in alphabetical orders.
Remove unneeded header includes and macros.
Signed-off-by: Songjun Wu
---
drivers/tty/serial/lantiq.c | 29 +++--
1 file changed, 11 insertions(+), 18 deletions(-)
diff
Hi Randy,
On 12 June 2018 at 13:27, Randy Dunlap wrote:
> On 06/11/2018 10:24 PM, Baolin Wang wrote:
>> From: Freeman Liu
>>
>> This patch add the efuse driver which is embeded in Spreadtrum SC27XX
>> series PMICs. The sc27xx efuse contains 32 blocks and each block's
>> data width is 16 bits.
Previous implementation uses a hard-coded register value to check if
the current serial entity is the console entity.
Now the lantiq serial driver uses the aliases for the index of the
serial port.
The lantiq danube serial dts are updated with aliases to support this.
Signed-off-by: Songjun Wu
Previous implementation uses platform-dependent API to get the clock.
Those functions are not available for other SoC which uses the same IP.
The CCF (Common Clock Framework) have an abstraction based APIs
for clock.
Change to use CCF APIs to get clock and rate.
So that different SoCs can use the
Previous implementation uses a hard-coded register value to check if
the current serial entity is the console entity.
Now the lantiq serial driver uses the aliases for the index of the
serial port.
The lantiq danube serial dts are updated with aliases to support this.
Signed-off-by: Songjun Wu
Previous implementation uses platform-dependent API to get the clock.
Those functions are not available for other SoC which uses the same IP.
The CCF (Common Clock Framework) have an abstraction based APIs
for clock.
Change to use CCF APIs to get clock and rate.
So that different SoCs can use the
From: Yixin Zhu
PLL of GRX500 provide clock to DDR, CPU, and peripherals as show below
+-+
|--->| LCPLL3 0|--PCIe clk-->
XO |+-+
+---|
|+-+
||3|--PAE clk-->
|--->| PLL0B
From: Yixin Zhu
PLL of GRX500 provide clock to DDR, CPU, and peripherals as show below
+-+
|--->| LCPLL3 0|--PCIe clk-->
XO |+-+
+---|
|+-+
||3|--PAE clk-->
|--->| PLL0B
This patch series is for adding the support for Intel MIPS interAptiv SoC
GRX500 family.
It includes CCF support, serial driver optimization and DTS modification.
This patch series is applied on top of v4.17.1. Basic verification is performed
on GRX500 board.
Any comments on this would be
This patch series is for adding the support for Intel MIPS interAptiv SoC
GRX500 family.
It includes CCF support, serial driver optimization and DTS modification.
This patch series is applied on top of v4.17.1. Basic verification is performed
on GRX500 board.
Any comments on this would be
On Mon 11 Jun 21:40 PDT 2018, Rajendra Nayak wrote:
> Add DT bindings to describe the rpmh powerdomains found on Qualcomm
> Technologies, Inc. SoCs. These power domains communicate a performance
> state to RPMh, which then translates it into corresponding voltage on
> a PMIC rail.
>
>
On Mon 11 Jun 21:40 PDT 2018, Rajendra Nayak wrote:
> Add DT bindings to describe the rpmh powerdomains found on Qualcomm
> Technologies, Inc. SoCs. These power domains communicate a performance
> state to RPMh, which then translates it into corresponding voltage on
> a PMIC rail.
>
>
On Tue, Jun 12, 2018 at 7:19 AM, Zhouyang Jia wrote:
> When kmem_cache_create fails, the lack of error-handling code may
> cause unexpected results.
>
> This patch adds error-handling code after calling kmem_cache_create.
>
> Signed-off-by: Zhouyang Jia
> ---
>
On Tue, Jun 12, 2018 at 7:19 AM, Zhouyang Jia wrote:
> When kmem_cache_create fails, the lack of error-handling code may
> cause unexpected results.
>
> This patch adds error-handling code after calling kmem_cache_create.
>
> Signed-off-by: Zhouyang Jia
> ---
>
On 11 June 2018 18:30 wrote Dmitry Torokhov
> Subject: Re: [PATCH] Input: add error handling for da9052_reg_write
>
> Hi Zhouyang,
>
> On Mon, Jun 11, 2018 at 01:23:39PM +0800, Zhouyang Jia wrote:
> > When da9052_reg_write fails, the lack of error-handling code may
> > cause unexpected
On 11 June 2018 18:30 wrote Dmitry Torokhov
> Subject: Re: [PATCH] Input: add error handling for da9052_reg_write
>
> Hi Zhouyang,
>
> On Mon, Jun 11, 2018 at 01:23:39PM +0800, Zhouyang Jia wrote:
> > When da9052_reg_write fails, the lack of error-handling code may
> > cause unexpected
On Tue, Jun 12, 2018 at 7:16 AM, Zhouyang Jia wrote:
> When kmem_cache_create fails, the lack of error-handling code may
> cause unexpected results.
>
> This patch adds error-handling code after calling kmem_cache_create.
>
> Signed-off-by: Zhouyang Jia
> ---
> fs/notify/dnotify/dnotify.c | 3
On Tue, Jun 12, 2018 at 7:16 AM, Zhouyang Jia wrote:
> When kmem_cache_create fails, the lack of error-handling code may
> cause unexpected results.
>
> This patch adds error-handling code after calling kmem_cache_create.
>
> Signed-off-by: Zhouyang Jia
> ---
> fs/notify/dnotify/dnotify.c | 3
Currently the driver assumes that the interrupts are continuous
and does platform_get_irq only once and assumes the rest are continuous,
instead call platform_get_irq for all the interrupts and store them
in an array for later use.
Signed-off-by: Keerthy
---
Tested for GPIO Interrupts on
Currently the driver assumes that the interrupts are continuous
and does platform_get_irq only once and assumes the rest are continuous,
instead call platform_get_irq for all the interrupts and store them
in an array for later use.
Signed-off-by: Keerthy
---
Tested for GPIO Interrupts on
This is needed in case of PROBE_DEFER if IRQ resource is not yet ready.
Signed-off-by: Keerthy
---
Tested for GPIO Interrupts on da850-lcdk and keystone-k2g-evm boards.
No Changes in v2
drivers/gpio/gpio-davinci.c | 29 +++--
1 file changed, 11 insertions(+), 18
On 06/11/2018 10:24 PM, Baolin Wang wrote:
> From: Freeman Liu
>
> This patch add the efuse driver which is embeded in Spreadtrum SC27XX
> series PMICs. The sc27xx efuse contains 32 blocks and each block's
> data width is 16 bits.
>
> Signed-off-by: Freeman Liu
> Signed-off-by: Baolin Wang
>
This is needed in case of PROBE_DEFER if IRQ resource is not yet ready.
Signed-off-by: Keerthy
---
Tested for GPIO Interrupts on da850-lcdk and keystone-k2g-evm boards.
No Changes in v2
drivers/gpio/gpio-davinci.c | 29 +++--
1 file changed, 11 insertions(+), 18
On 06/11/2018 10:24 PM, Baolin Wang wrote:
> From: Freeman Liu
>
> This patch add the efuse driver which is embeded in Spreadtrum SC27XX
> series PMICs. The sc27xx efuse contains 32 blocks and each block's
> data width is 16 bits.
>
> Signed-off-by: Freeman Liu
> Signed-off-by: Baolin Wang
>
On Tue, Jun 12 2018, Zhouyang Jia wrote:
> When try_module_get fails, the lack of error-handling code may
> cause unexpected results.
>
> This patch adds error-handling code after calling try_module_get.
>
> Signed-off-by: Zhouyang Jia
> ---
> drivers/staging/lustre/lnet/klnds/socklnd/socklnd.c
On Tue, Jun 12 2018, Zhouyang Jia wrote:
> When try_module_get fails, the lack of error-handling code may
> cause unexpected results.
>
> This patch adds error-handling code after calling try_module_get.
>
> Signed-off-by: Zhouyang Jia
> ---
> drivers/staging/lustre/lnet/klnds/socklnd/socklnd.c
From: Freeman Liu
This patch add the efuse driver which is embeded in Spreadtrum SC27XX
series PMICs. The sc27xx efuse contains 32 blocks and each block's
data width is 16 bits.
Signed-off-by: Freeman Liu
Signed-off-by: Baolin Wang
---
drivers/nvmem/Kconfig| 11 ++
This patch adds the binding documentation for Spreadtrum SC27XX series
PMICs efuse controller device.
Signed-off-by: Baolin Wang
---
.../devicetree/bindings/nvmem/sc27xx-efuse.txt | 52
1 file changed, 52 insertions(+)
create mode 100644
From: Freeman Liu
This patch add the efuse driver which is embeded in Spreadtrum SC27XX
series PMICs. The sc27xx efuse contains 32 blocks and each block's
data width is 16 bits.
Signed-off-by: Freeman Liu
Signed-off-by: Baolin Wang
---
drivers/nvmem/Kconfig| 11 ++
This patch adds the binding documentation for Spreadtrum SC27XX series
PMICs efuse controller device.
Signed-off-by: Baolin Wang
---
.../devicetree/bindings/nvmem/sc27xx-efuse.txt | 52
1 file changed, 52 insertions(+)
create mode 100644
Hi,
On Mon, Jun 11, 2018 at 10:01 PM, Bjorn Andersson
wrote:
> On Thu 07 Jun 13:46 PDT 2018, Douglas Anderson wrote:
>
>> This adds nodes to SDM845-dtsi for all the I2C ports, all the SPI
>> ports, and UART9. Note that I2C / SPI / UART are a bit strange on
>> sdm845 because each "serial engine"
Hi,
On Mon, Jun 11, 2018 at 10:01 PM, Bjorn Andersson
wrote:
> On Thu 07 Jun 13:46 PDT 2018, Douglas Anderson wrote:
>
>> This adds nodes to SDM845-dtsi for all the I2C ports, all the SPI
>> ports, and UART9. Note that I2C / SPI / UART are a bit strange on
>> sdm845 because each "serial engine"
Hi,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v4.17 next-20180608]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
Hi,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on linus/master]
[also build test WARNING on v4.17 next-20180608]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
No functional changes
Signed-off-by: Benjamin Herrenschmidt
---
drivers/fsi/fsi-scom.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/fsi/fsi-scom.c b/drivers/fsi/fsi-scom.c
index 3cba0eb645e1..8a608db0aa07 100644
--- a/drivers/fsi/fsi-scom.c
+++
No functional changes
Signed-off-by: Benjamin Herrenschmidt
---
drivers/fsi/fsi-scom.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/fsi/fsi-scom.c b/drivers/fsi/fsi-scom.c
index 3cba0eb645e1..8a608db0aa07 100644
--- a/drivers/fsi/fsi-scom.c
+++
Use the proper annotated type __be32 and fixup the
accessor used for get_scom()
Signed-off-by: Benjamin Herrenschmidt
---
drivers/fsi/fsi-scom.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/fsi/fsi-scom.c b/drivers/fsi/fsi-scom.c
index
Use the proper annotated type __be32 and fixup the
accessor used for get_scom()
Signed-off-by: Benjamin Herrenschmidt
---
drivers/fsi/fsi-scom.c | 9 -
1 file changed, 4 insertions(+), 5 deletions(-)
diff --git a/drivers/fsi/fsi-scom.c b/drivers/fsi/fsi-scom.c
index
Add a few more register and bit definitions, also define and use
SCOM_READ_CMD (which is 0 but it makes the code clearer)
Signed-off-by: Benjamin Herrenschmidt
---
drivers/fsi/fsi-scom.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git
This was too hard to split ... this adds a number of features
to the SCOM user interface:
- Support for indirect SCOMs
- read()/write() interface now handle errors and retries
- New ioctl() "raw" interface for use by debuggers
Signed-off-by: Benjamin Herrenschmidt
---
On June 11, 2018 6:23:10 PM PDT, Stephen Rothwell wrote:
>Hi all,
>
>After merging the drivers-x86 tree, today's linux-next build (x86_64
>allmodconfig) failed like this:
>
>drivers/platform/x86/silead_dmi.c:84:21: error: variable
>'chuwi_vi10_data' has initializer but incomplete type
> static
Add a few more register and bit definitions, also define and use
SCOM_READ_CMD (which is 0 but it makes the code clearer)
Signed-off-by: Benjamin Herrenschmidt
---
drivers/fsi/fsi-scom.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git
This was too hard to split ... this adds a number of features
to the SCOM user interface:
- Support for indirect SCOMs
- read()/write() interface now handle errors and retries
- New ioctl() "raw" interface for use by debuggers
Signed-off-by: Benjamin Herrenschmidt
---
On June 11, 2018 6:23:10 PM PDT, Stephen Rothwell wrote:
>Hi all,
>
>After merging the drivers-x86 tree, today's linux-next build (x86_64
>allmodconfig) failed like this:
>
>drivers/platform/x86/silead_dmi.c:84:21: error: variable
>'chuwi_vi10_data' has initializer but incomplete type
> static
Otherwise, multiple clients can open the driver and attempt
to access the PIB at the same time, thus clobbering each other
in the process.
Signed-off-by: Benjamin Herrenschmidt
---
drivers/fsi/fsi-scom.c | 25 ++---
1 file changed, 18 insertions(+), 7 deletions(-)
diff
Otherwise, multiple clients can open the driver and attempt
to access the PIB at the same time, thus clobbering each other
in the process.
Signed-off-by: Benjamin Herrenschmidt
---
drivers/fsi/fsi-scom.c | 25 ++---
1 file changed, 18 insertions(+), 7 deletions(-)
diff
The current FSI scom driver is a bit too simplistic (and buggy). This
fixes a locking bug, cleans a few things up, then overhaul the driver
more thoroughly by providing proper support for the different type
of SCOM accesses (direct and indirect), handling errors properly in
the read/write
The current FSI scom driver is a bit too simplistic (and buggy). This
fixes a locking bug, cleans a few things up, then overhaul the driver
more thoroughly by providing proper support for the different type
of SCOM accesses (direct and indirect), handling errors properly in
the read/write
On Tue, Jun 12, 2018 at 11:23:10AM +1000, Stephen Rothwell wrote:
> Hi all,
>
> After merging the drivers-x86 tree, today's linux-next build (x86_64
> allmodconfig) failed like this:
>
> drivers/platform/x86/silead_dmi.c:84:21: error: variable 'chuwi_vi10_data'
> has initializer but incomplete
On Tue, Jun 12, 2018 at 11:23:10AM +1000, Stephen Rothwell wrote:
> Hi all,
>
> After merging the drivers-x86 tree, today's linux-next build (x86_64
> allmodconfig) failed like this:
>
> drivers/platform/x86/silead_dmi.c:84:21: error: variable 'chuwi_vi10_data'
> has initializer but incomplete
This patch adds missing initialisation for HP 2013 UltraSlim Dock
Line-In/Out PINs and activates keyboard mute/micmute leds
for HP ProBook 640 G4
Signed-off-by: Dennis Wassenberg
---
sound/pci/hda/patch_conexant.c | 1 +
1 file changed, 1 insertion(+)
diff --git
This patch adds missing initialisation for HP 2013 UltraSlim Dock
Line-In/Out PINs and activates keyboard mute/micmute leds
for HP ProBook 640 G4
Signed-off-by: Dennis Wassenberg
---
sound/pci/hda/patch_conexant.c | 1 +
1 file changed, 1 insertion(+)
diff --git
This patch adds missing initialisation for HP 2013 UltraSlim Dock
Line-In/Out PINs and activates keyboard mute/micmute leds
for HP EliteBook 830 G5
Signed-off-by: Dennis Wassenberg
---
sound/pci/hda/patch_conexant.c | 1 +
1 file changed, 1 insertion(+)
diff --git
This patch adds missing initialisation for HP 2013 UltraSlim Dock
Line-In/Out PINs and activates keyboard mute/micmute leds
for HP EliteBook 830 G5
Signed-off-by: Dennis Wassenberg
---
sound/pci/hda/patch_conexant.c | 1 +
1 file changed, 1 insertion(+)
diff --git
On Tue, Jun 12, 2018 at 12:23:52PM +0800, Zhouyang Jia wrote:
> When kmem_cache_create fails, the lack of error-handling code may
> cause unexpected results.
>
> This patch adds error-handling code after calling kmem_cache_create.
> pde_opener_cache =
>
On Tue, Jun 12, 2018 at 12:23:52PM +0800, Zhouyang Jia wrote:
> When kmem_cache_create fails, the lack of error-handling code may
> cause unexpected results.
>
> This patch adds error-handling code after calling kmem_cache_create.
> pde_opener_cache =
>
On Mon, 11 Jun 2018 10:19:18 -0600
Jason Gunthorpe wrote:
> On Mon, Jun 11, 2018 at 09:19:14AM +0300, jackm wrote:
> > On Sun, 10 Jun 2018 22:42:03 -0600
> > Jason Gunthorpe wrote:
> >
> > > Er, the spec has nothing to do with this. In Linux the TID is made
> > > unique because the core code
On Mon, 11 Jun 2018 10:19:18 -0600
Jason Gunthorpe wrote:
> On Mon, Jun 11, 2018 at 09:19:14AM +0300, jackm wrote:
> > On Sun, 10 Jun 2018 22:42:03 -0600
> > Jason Gunthorpe wrote:
> >
> > > Er, the spec has nothing to do with this. In Linux the TID is made
> > > unique because the core code
On Thu 07 Jun 13:46 PDT 2018, Douglas Anderson wrote:
> The debug UART is very useful to have. I2C10 is enabled as an example
> of a I2C port we can talk on for now. Eventually we'll want to put
> peripherals under it.
>
> Signed-off-by: Douglas Anderson
Reviewed-by: Bjorn Andersson
On Thu 07 Jun 13:46 PDT 2018, Douglas Anderson wrote:
> This adds nodes to SDM845-dtsi for all the I2C ports, all the SPI
> ports, and UART9. Note that I2C / SPI / UART are a bit strange on
> sdm845 because each "serial engine" has 4 pins associated with it and
> depending on which firmware has
On Thu 07 Jun 13:46 PDT 2018, Douglas Anderson wrote:
> The debug UART is very useful to have. I2C10 is enabled as an example
> of a I2C port we can talk on for now. Eventually we'll want to put
> peripherals under it.
>
> Signed-off-by: Douglas Anderson
Reviewed-by: Bjorn Andersson
On Thu 07 Jun 13:46 PDT 2018, Douglas Anderson wrote:
> This adds nodes to SDM845-dtsi for all the I2C ports, all the SPI
> ports, and UART9. Note that I2C / SPI / UART are a bit strange on
> sdm845 because each "serial engine" has 4 pins associated with it and
> depending on which firmware has
On Mon, Jun 11, 2018 at 4:52 AM Neil Horman wrote:
>
> On Sun, Jun 10, 2018 at 10:17:13PM -0700, Andy Lutomirski wrote:
> > > On Jun 9, 2018, at 10:39 PM, Andy Lutomirski wrote:
> > >
> > > On Fri, Jun 8, 2018 at 10:32 AM Jarkko Sakkinen
> > > wrote:
> > >>
> > >> The Launch Enclave (LE)
On Mon, Jun 11, 2018 at 4:52 AM Neil Horman wrote:
>
> On Sun, Jun 10, 2018 at 10:17:13PM -0700, Andy Lutomirski wrote:
> > > On Jun 9, 2018, at 10:39 PM, Andy Lutomirski wrote:
> > >
> > > On Fri, Jun 8, 2018 at 10:32 AM Jarkko Sakkinen
> > > wrote:
> > >>
> > >> The Launch Enclave (LE)
On Fri, Jun 08, 2018 at 05:27:12PM +0300, Konstantin Khorenko wrote:
> Currently if we face a lock taken by a process invisible in the current
> pidns we skip the lock completely, but this
>
> 1) makes the output not that nice
> (root@vz7)/: cat /proc/${PID_A2}/fdinfo/3
> pos:4
>
On Fri, Jun 08, 2018 at 05:27:12PM +0300, Konstantin Khorenko wrote:
> Currently if we face a lock taken by a process invisible in the current
> pidns we skip the lock completely, but this
>
> 1) makes the output not that nice
> (root@vz7)/: cat /proc/${PID_A2}/fdinfo/3
> pos:4
>
When try_module_get fails, the lack of error-handling code may
cause unexpected results.
This patch adds error-handling code after calling try_module_get.
Signed-off-by: Zhouyang Jia
---
drivers/staging/lustre/lnet/klnds/socklnd/socklnd.c | 5 -
1 file changed, 4 insertions(+), 1
When try_module_get fails, the lack of error-handling code may
cause unexpected results.
This patch adds error-handling code after calling try_module_get.
Signed-off-by: Zhouyang Jia
---
drivers/staging/lustre/lnet/klnds/socklnd/socklnd.c | 5 -
1 file changed, 4 insertions(+), 1
On 06/11/2018 07:53 PM, kbuild test robot wrote:
> Hi Tadeusz,
>
> Thank you for the patch! Yet something to improve:
>
> [auto build test ERROR on char-misc/char-misc-testing]
> [also build test ERROR on next-20180608]
> [cannot apply to v4.17]
Hi,
Thanks for the report. This patch should go
On 06/11/2018 07:53 PM, kbuild test robot wrote:
> Hi Tadeusz,
>
> Thank you for the patch! Yet something to improve:
>
> [auto build test ERROR on char-misc/char-misc-testing]
> [also build test ERROR on next-20180608]
> [cannot apply to v4.17]
Hi,
Thanks for the report. This patch should go
Add rpmpd device node and its OPP table
Signed-off-by: Rajendra Nayak
Signed-off-by: Viresh Kumar
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 34 +++
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
Add rpmpd device node and its OPP table
Signed-off-by: Rajendra Nayak
Signed-off-by: Viresh Kumar
---
arch/arm64/boot/dts/qcom/msm8996.dtsi | 34 +++
1 file changed, 34 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi
The Power domains for corners just pass the performance state set by the
consumers to the RPM (Remote Power manager) which then takes care
of setting the appropriate voltage on the corresponding rails to
meet the performance needs.
We add all Power domain data needed on msm8996 here. This driver
The Power domains for corners just pass the performance state set by the
consumers to the RPM (Remote Power manager) which then takes care
of setting the appropriate voltage on the corresponding rails to
meet the performance needs.
We add all Power domain data needed on msm8996 here. This driver
As we move from no clients/consumers in kernel voting on corners,
to *some* voting and some not voting, we might end up in a situation
where the clients which remove votes can adversly impact others
who still don't have a way to vote.
To avoid this situation, have a max vote on all corners at
As we move from no clients/consumers in kernel voting on corners,
to *some* voting and some not voting, we might end up in a situation
where the clients which remove votes can adversly impact others
who still don't have a way to vote.
To avoid this situation, have a max vote on all corners at
Add support for the .set_performace_state() and .opp_to_performance_state()
callbacks in the rpmpd driver.
Signed-off-by: Rajendra Nayak
Signed-off-by: Viresh Kumar
---
drivers/soc/qcom/rpmpd.c | 46
1 file changed, 46 insertions(+)
diff --git
The RPMh Power domain driver aggregates the corner votes from various
consumers for the ARC resources and communicates it to RPMh.
We also add data for all power domains on sdm845 SoC as part of the patch.
The driver can be extended to support other SoCs which support RPMh
Signed-off-by:
Add DT bindings to describe the rpmh powerdomains found on Qualcomm
Technologies, Inc. SoCs. These power domains communicate a performance
state to RPMh, which then translates it into corresponding voltage on
a PMIC rail.
Signed-off-by: Rajendra Nayak
---
Add support for the .set_performace_state() and .opp_to_performance_state()
callbacks in the rpmpd driver.
Signed-off-by: Rajendra Nayak
Signed-off-by: Viresh Kumar
---
drivers/soc/qcom/rpmpd.c | 46
1 file changed, 46 insertions(+)
diff --git
The RPMh Power domain driver aggregates the corner votes from various
consumers for the ARC resources and communicates it to RPMh.
We also add data for all power domains on sdm845 SoC as part of the patch.
The driver can be extended to support other SoCs which support RPMh
Signed-off-by:
Add DT bindings to describe the rpmh powerdomains found on Qualcomm
Technologies, Inc. SoCs. These power domains communicate a performance
state to RPMh, which then translates it into corresponding voltage on
a PMIC rail.
Signed-off-by: Rajendra Nayak
---
Changes in v3:
* Bindings split into seperate patches
* Bindings updated to remove duplicate OPP table phandles
* DT headers defining macros for Power domain indexes and OPP levels
* Optimisations to use rpmh_write_async() whereever applicable
* Fixed up handling of ACTIVE_ONLY/WAKE_ONLY/SLEEP
Add DT bindings to describe the rpm power domains found on Qualcomm
Technologies, Inc. SoCs. These power domains communicate a performance
state to RPM, which then translates it into corresponding voltage on a
PMIC rail.
Signed-off-by: Rajendra Nayak
Signed-off-by: Viresh Kumar
---
Changes in v3:
* Bindings split into seperate patches
* Bindings updated to remove duplicate OPP table phandles
* DT headers defining macros for Power domain indexes and OPP levels
* Optimisations to use rpmh_write_async() whereever applicable
* Fixed up handling of ACTIVE_ONLY/WAKE_ONLY/SLEEP
Add DT bindings to describe the rpm power domains found on Qualcomm
Technologies, Inc. SoCs. These power domains communicate a performance
state to RPM, which then translates it into corresponding voltage on a
PMIC rail.
Signed-off-by: Rajendra Nayak
Signed-off-by: Viresh Kumar
---
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