On 05.07.2018 15:10, Ulf Hansson wrote:
> On 4 July 2018 at 17:07, Stefan Agner wrote:
>> If pinctrl nodes for 100/200MHz are missing, the controller should
>> not select any mode which need signal frequencies 100MHz or higher.
>> To prevent such speed modes the driver currently uses the quirk
On 05.07.2018 15:10, Ulf Hansson wrote:
> On 4 July 2018 at 17:07, Stefan Agner wrote:
>> If pinctrl nodes for 100/200MHz are missing, the controller should
>> not select any mode which need signal frequencies 100MHz or higher.
>> To prevent such speed modes the driver currently uses the quirk
The ti-sysc driver provides support for manipulating the idle modes
and interconnect level resets.
Add the generic interconnect target module node for MCAN to support
the same.
CC: Tony Lindgren
Signed-off-by: Faiz Abbas
---
arch/arm/boot/dts/dra76x.dtsi | 18 ++
1 file
The ti-sysc driver provides support for manipulating the idle modes
and interconnect level resets.
Add the generic interconnect target module node for MCAN to support
the same.
CC: Tony Lindgren
Signed-off-by: Faiz Abbas
---
arch/arm/boot/dts/dra76x.dtsi | 18 ++
1 file
Add support for the software reset of a target interconnect
module using its sysconfig and sysstatus registers.
Signed-off-by: Faiz Abbas
---
drivers/bus/ti-sysc.c | 39 +++
1 file changed, 39 insertions(+)
diff --git a/drivers/bus/ti-sysc.c
Add support for the software reset of a target interconnect
module using its sysconfig and sysstatus registers.
Signed-off-by: Faiz Abbas
---
drivers/bus/ti-sysc.c | 39 +++
1 file changed, 39 insertions(+)
diff --git a/drivers/bus/ti-sysc.c
Add clkctrl data for the m_can clocks and register it within the
clkctrl driver
Acked-by: Rob Herring
CC: Tero Kristo
Signed-off-by: Faiz Abbas
---
drivers/clk/ti/clk-7xx.c | 1 +
include/dt-bindings/clock/dra7.h | 1 +
2 files changed, 2 insertions(+)
diff --git
From: Franklin S Cooper Jr
Add support for the MCAN peripheral which supports both classic
CAN messages along with the new CAN-FD message.
Add MCAN node to evm and enable it with a maximum datarate of 5 mbps
Signed-off-by: Faiz Abbas
---
arch/arm/boot/dts/dra76-evm.dts | 6 ++
Add clkctrl data for the m_can clocks and register it within the
clkctrl driver
Acked-by: Rob Herring
CC: Tero Kristo
Signed-off-by: Faiz Abbas
---
drivers/clk/ti/clk-7xx.c | 1 +
include/dt-bindings/clock/dra7.h | 1 +
2 files changed, 2 insertions(+)
diff --git
From: Franklin S Cooper Jr
Add support for the MCAN peripheral which supports both classic
CAN messages along with the new CAN-FD message.
Add MCAN node to evm and enable it with a maximum datarate of 5 mbps
Signed-off-by: Faiz Abbas
---
arch/arm/boot/dts/dra76-evm.dts | 6 ++
The dra76x MCAN generic interconnect module has a its own
format for the bits in the control registers.
Therefore add a new module type, new regbits and new capabilities
specific to the MCAN module.
Acked-by: Rob Herring
CC: Tony Lindgren
Signed-off-by: Faiz Abbas
---
On Wed, 4 Jul 2018, Will Deacon wrote:
> Hi Alan,
>
> On Tue, Jul 03, 2018 at 01:28:17PM -0400, Alan Stern wrote:
> > On Mon, 25 Jun 2018, Andrea Parri wrote:
> >
> > > On Fri, Jun 22, 2018 at 07:30:08PM +0100, Will Deacon wrote:
> > > > > > I think the second example would preclude us using
From: Lokesh Vutla
MCAN is clocked by H14 divider of DPLL_GMAC. Unlike other
DPLL dividers this DPLL_GMAC H14 divider is controlled by
control module. Adding support for these clocks.
Signed-off-by: Lokesh Vutla
Signed-off-by: Faiz Abbas
---
arch/arm/boot/dts/dra76x.dtsi | 33
On Wed, 4 Jul 2018, Will Deacon wrote:
> Hi Alan,
>
> On Tue, Jul 03, 2018 at 01:28:17PM -0400, Alan Stern wrote:
> > On Mon, 25 Jun 2018, Andrea Parri wrote:
> >
> > > On Fri, Jun 22, 2018 at 07:30:08PM +0100, Will Deacon wrote:
> > > > > > I think the second example would preclude us using
From: Lokesh Vutla
MCAN is clocked by H14 divider of DPLL_GMAC. Unlike other
DPLL dividers this DPLL_GMAC H14 divider is controlled by
control module. Adding support for these clocks.
Signed-off-by: Lokesh Vutla
Signed-off-by: Faiz Abbas
---
arch/arm/boot/dts/dra76x.dtsi | 33
The dra76x MCAN generic interconnect module has a its own
format for the bits in the control registers.
Therefore add a new module type, new regbits and new capabilities
specific to the MCAN module.
Acked-by: Rob Herring
CC: Tony Lindgren
Signed-off-by: Faiz Abbas
---
On 12 June 2018 at 15:14, Ludovic Barre wrote:
> From: Ludovic Barre
>
> This patch adds command variant properties to define
> cpsm enable bit and responses.
> Needed to support the STM32 variant (shift of cpsm bit,
> specific definition of commands response).
>
> Signed-off-by: Ludovic Barre
On 12 June 2018 at 15:14, Ludovic Barre wrote:
> From: Ludovic Barre
>
> This patch adds command variant properties to define
> cpsm enable bit and responses.
> Needed to support the STM32 variant (shift of cpsm bit,
> specific definition of commands response).
>
> Signed-off-by: Ludovic Barre
On Wed, 2018-07-04 at 16:25 +0300, Mike Rapoport wrote:
> Any comments on this?
>
> On Wed, Jun 27, 2018 at 03:09:20PM +0300, Mike Rapoport wrote:
> > The c6x is already using memblock and does most of early memory
> > reservations with it, so it was only a matter of removing the bootmem
> >
On Wed, 2018-07-04 at 16:25 +0300, Mike Rapoport wrote:
> Any comments on this?
>
> On Wed, Jun 27, 2018 at 03:09:20PM +0300, Mike Rapoport wrote:
> > The c6x is already using memblock and does most of early memory
> > reservations with it, so it was only a matter of removing the bootmem
> >
On Wed, 4 Jul 2018, Jan Kara wrote:
> > So this seems unsolvable without having the caller specify that it knows the
> > page type, and that it is therefore safe to decrement
> > page->dma_pinned_count.
> > I was hoping I'd found a way, but clearly I haven't. :)
>
> Well, I think the
On Wed, 4 Jul 2018, Jan Kara wrote:
> > So this seems unsolvable without having the caller specify that it knows the
> > page type, and that it is therefore safe to decrement
> > page->dma_pinned_count.
> > I was hoping I'd found a way, but clearly I haven't. :)
>
> Well, I think the
On Thu, Jul 05, 2018 at 02:31:43PM +0100, Quentin Perret wrote:
> Hi Morten,
>
> On Wednesday 04 Jul 2018 at 11:17:49 (+0100), Morten Rasmussen wrote:
> > diff --git a/kernel/sched/topology.c b/kernel/sched/topology.c
> > index 71330e0e41db..29c186961345 100644
> > --- a/kernel/sched/topology.c
>
On Thu, Jul 05, 2018 at 02:31:43PM +0100, Quentin Perret wrote:
> Hi Morten,
>
> On Wednesday 04 Jul 2018 at 11:17:49 (+0100), Morten Rasmussen wrote:
> > diff --git a/kernel/sched/topology.c b/kernel/sched/topology.c
> > index 71330e0e41db..29c186961345 100644
> > --- a/kernel/sched/topology.c
>
Panic over. It seems that my OnApp control server, when it loses contact
with a compute node, sends an snmptrap command to force a reboot of that
node. The trap script on the server uses sysrq-trigger, first "s", then "u",
then "b".
Please accept my apologies if you wasted any time on this.
Panic over. It seems that my OnApp control server, when it loses contact
with a compute node, sends an snmptrap command to force a reboot of that
node. The trap script on the server uses sysrq-trigger, first "s", then "u",
then "b".
Please accept my apologies if you wasted any time on this.
On Wed, Jul 04, 2018 at 01:11:04PM +0100, Will Deacon wrote:
> Hi Alan,
>
> On Tue, Jul 03, 2018 at 01:28:17PM -0400, Alan Stern wrote:
> > On Mon, 25 Jun 2018, Andrea Parri wrote:
> >
> > > On Fri, Jun 22, 2018 at 07:30:08PM +0100, Will Deacon wrote:
> > > > > > I think the second example would
On Wed, Jul 04, 2018 at 01:11:04PM +0100, Will Deacon wrote:
> Hi Alan,
>
> On Tue, Jul 03, 2018 at 01:28:17PM -0400, Alan Stern wrote:
> > On Mon, 25 Jun 2018, Andrea Parri wrote:
> >
> > > On Fri, Jun 22, 2018 at 07:30:08PM +0100, Will Deacon wrote:
> > > > > > I think the second example would
Am 05.07.2018 um 14:12 schrieb Takashi Iwai:
> On Thu, 05 Jul 2018 12:41:03 +0200,
> Rafael J. Wysocki wrote:
>>
>> On Thursday, July 5, 2018 11:50:11 AM CEST Takashi Iwai wrote:
>>> On Thu, 05 Jul 2018 11:34:59 +0200,
>>> Rafael J. Wysocki wrote:
Hi,
On Thu, Jul 5, 2018 at
Am 05.07.2018 um 14:12 schrieb Takashi Iwai:
> On Thu, 05 Jul 2018 12:41:03 +0200,
> Rafael J. Wysocki wrote:
>>
>> On Thursday, July 5, 2018 11:50:11 AM CEST Takashi Iwai wrote:
>>> On Thu, 05 Jul 2018 11:34:59 +0200,
>>> Rafael J. Wysocki wrote:
Hi,
On Thu, Jul 5, 2018 at
On 7/5/18 9:42 PM, Peter Zijlstra wrote:
> On Thu, Jul 05, 2018 at 09:21:15PM +0800, Xunlei Pang wrote:
>> On 7/5/18 6:46 PM, Peter Zijlstra wrote:
>>> On Wed, Jun 27, 2018 at 08:22:42PM +0800, Xunlei Pang wrote:
tick-based whole utime is utime_0, tick-based whole stime
is stime_0,
On 7/5/18 9:42 PM, Peter Zijlstra wrote:
> On Thu, Jul 05, 2018 at 09:21:15PM +0800, Xunlei Pang wrote:
>> On 7/5/18 6:46 PM, Peter Zijlstra wrote:
>>> On Wed, Jun 27, 2018 at 08:22:42PM +0800, Xunlei Pang wrote:
tick-based whole utime is utime_0, tick-based whole stime
is stime_0,
This patch adds support to SLIMbus stream apis for slimbus device.
SLIMbus streaming involves adding support to Data Channel Management and
channel Reconfiguration Messages to slim core plus few stream apis.
>From slim device side the apis are very simple mostly inline with other
stream apis.
This patch adds support to stream support, this involve implementing
user specific implementation of Data channel management and channel
management SLIMbus messages.
Signed-off-by: Srinivas Kandagatla
---
drivers/slimbus/qcom-ngd-ctrl.c | 149 +++-
1 file
This patch adds support to SLIMbus stream apis for slimbus device.
SLIMbus streaming involves adding support to Data Channel Management and
channel Reconfiguration Messages to slim core plus few stream apis.
>From slim device side the apis are very simple mostly inline with other
stream apis.
This patch adds support to stream support, this involve implementing
user specific implementation of Data channel management and channel
management SLIMbus messages.
Signed-off-by: Srinivas Kandagatla
---
drivers/slimbus/qcom-ngd-ctrl.c | 149 +++-
1 file
Thanks to Vinod and Stephen for reviewing v1 patchset
This v2 patchset adds basic stream support for SLIMbus devices and
controllers. Mostly inspired by soundwire stream patches. But slimbus
stream is much simpler compared to soundwire
>From slim_device side, we have below 6 new apis.
Thanks to Vinod and Stephen for reviewing v1 patchset
This v2 patchset adds basic stream support for SLIMbus devices and
controllers. Mostly inspired by soundwire stream patches. But slimbus
stream is much simpler compared to soundwire
>From slim_device side, we have below 6 new apis.
On 05/07/18 13:07, Ulf Hansson wrote:
> On 5 July 2018 at 13:40, Marc Zyngier wrote:
>> On 05/07/18 12:12, Ulf Hansson wrote:
>>> On 4 July 2018 at 22:29, Marc Zyngier wrote:
On Wed, 4 Jul 2018 15:34:36 +0200
Ulf Hansson wrote:
> On 4 July 2018 at 13:34, Marc Zyngier wrote:
On 05/07/18 13:07, Ulf Hansson wrote:
> On 5 July 2018 at 13:40, Marc Zyngier wrote:
>> On 05/07/18 12:12, Ulf Hansson wrote:
>>> On 4 July 2018 at 22:29, Marc Zyngier wrote:
On Wed, 4 Jul 2018 15:34:36 +0200
Ulf Hansson wrote:
> On 4 July 2018 at 13:34, Marc Zyngier wrote:
On Thu, Jul 5, 2018 at 12:10 PM, Tony Lindgren wrote:
> Here is a resend of fixes for a race issues for generic group and
> functions reported by H. Nikolaus Schaller .
>
Reviewed-by: Andy Shevchenko
I think for ACPI case we would use generic helpers, so this change is
quite useful to not
On 12 June 2018 at 15:14, Ludovic Barre wrote:
> From: Ludovic Barre
>
> This patch adds a boolean property to read remaining data.
> Needed to support the STM32 sdmmc variant. MMCIDATACNT
> register should be read only after the data transfer is complete.
> When reading after an error event the
On Thu, Jul 5, 2018 at 12:10 PM, Tony Lindgren wrote:
> Here is a resend of fixes for a race issues for generic group and
> functions reported by H. Nikolaus Schaller .
>
Reviewed-by: Andy Shevchenko
I think for ACPI case we would use generic helpers, so this change is
quite useful to not
On 12 June 2018 at 15:14, Ludovic Barre wrote:
> From: Ludovic Barre
>
> This patch adds a boolean property to read remaining data.
> Needed to support the STM32 sdmmc variant. MMCIDATACNT
> register should be read only after the data transfer is complete.
> When reading after an error event the
On Sun, Apr 15, 2018 at 12:26:44AM +0200, KarimAllah Ahmed wrote:
> Switch 'requests' to be explicitly 64-bit and update BUILD_BUG_ON check to
> use the size of "requests" instead of the hard-coded '32'.
>
> That gives us a bit more room again for arch-specific requests as we
> already ran out of
On Sun, Apr 15, 2018 at 12:26:44AM +0200, KarimAllah Ahmed wrote:
> Switch 'requests' to be explicitly 64-bit and update BUILD_BUG_ON check to
> use the size of "requests" instead of the hard-coded '32'.
>
> That gives us a bit more room again for arch-specific requests as we
> already ran out of
On Thu, Jul 05, 2018 at 03:15:27PM +0200, Rasmus Villemoes wrote:
> The Yocto build system does a 'make clean' when rebuilding due to
> changed dependencies, and that consistently fails for me (causing the
> whole BSP build to fail) with errors such as
>
> | find:
On Thu, Jul 05, 2018 at 03:15:27PM +0200, Rasmus Villemoes wrote:
> The Yocto build system does a 'make clean' when rebuilding due to
> changed dependencies, and that consistently fails for me (causing the
> whole BSP build to fail) with errors such as
>
> | find:
On 12 June 2018 at 15:14, Ludovic Barre wrote:
> From: Ludovic Barre
>
> A specific variant could have different power or clock procedures.
> This patch allows to overwrite the default mmci_set_clkreg and
> mmci_set_pwrreg for a specific variant.
>
> Signed-off-by: Ludovic Barre
> ---
>
On 12 June 2018 at 15:14, Ludovic Barre wrote:
> From: Ludovic Barre
>
> A specific variant could have different power or clock procedures.
> This patch allows to overwrite the default mmci_set_clkreg and
> mmci_set_pwrreg for a specific variant.
>
> Signed-off-by: Ludovic Barre
> ---
>
In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.
Signed-off-by: Gustavo A. R. Silva
---
drivers/parport/ieee1284.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/parport/ieee1284.c
In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.
Signed-off-by: Gustavo A. R. Silva
---
drivers/parport/ieee1284.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/parport/ieee1284.c
On Thu, Jul 05, 2018 at 09:21:15PM +0800, Xunlei Pang wrote:
> On 7/5/18 6:46 PM, Peter Zijlstra wrote:
> > On Wed, Jun 27, 2018 at 08:22:42PM +0800, Xunlei Pang wrote:
> >> tick-based whole utime is utime_0, tick-based whole stime
> >> is stime_0, scheduler time is rtime_0.
> >
> >> For a long
On Thu, Jul 05, 2018 at 09:21:15PM +0800, Xunlei Pang wrote:
> On 7/5/18 6:46 PM, Peter Zijlstra wrote:
> > On Wed, Jun 27, 2018 at 08:22:42PM +0800, Xunlei Pang wrote:
> >> tick-based whole utime is utime_0, tick-based whole stime
> >> is stime_0, scheduler time is rtime_0.
> >
> >> For a long
Palmer Dabbelt 於 2018年7月5日 週四 上午4:58寫道：
>
> On Fri, 29 Jun 2018 09:53:49 PDT (-0700), zong...@gmail.com wrote:
> > Christoph Hellwig 於 2018年6月29日 週五 下午3:12寫道：
> >>
> >> On Mon, Jun 25, 2018 at 04:49:39PM +0800, Zong Li wrote:
> >> > Use generic marco to get the index and type of symbol.
> >>
>
Palmer Dabbelt 於 2018年7月5日 週四 上午4:58寫道：
>
> On Fri, 29 Jun 2018 09:53:49 PDT (-0700), zong...@gmail.com wrote:
> > Christoph Hellwig 於 2018年6月29日 週五 下午3:12寫道：
> >>
> >> On Mon, Jun 25, 2018 at 04:49:39PM +0800, Zong Li wrote:
> >> > Use generic marco to get the index and type of symbol.
> >>
>
On 07/02/2018 01:29 PM, Pavel Tatashin wrote:
> On Mon, Jul 2, 2018 at 4:00 PM Dave Hansen wrote:
>>> + unsigned long size = sizeof(struct page) * PAGES_PER_SECTION;
>>> + unsigned long pnum, map_index = 0;
>>> + void *vmemmap_buf_start;
>>> +
>>> + size = ALIGN(size, PMD_SIZE) *
On 07/02/2018 01:29 PM, Pavel Tatashin wrote:
> On Mon, Jul 2, 2018 at 4:00 PM Dave Hansen wrote:
>>> + unsigned long size = sizeof(struct page) * PAGES_PER_SECTION;
>>> + unsigned long pnum, map_index = 0;
>>> + void *vmemmap_buf_start;
>>> +
>>> + size = ALIGN(size, PMD_SIZE) *
Hi Peter
On Thu, 5 Jul 2018 at 14:36, Peter Zijlstra wrote:
>
>
> OK, this looks good I suppose. Rafael, are you OK with me taking these?
>
> I have the below on top because I once again forgot how it all worked;
> does this work for you Vincent?
Yes looks good to me
Thanks
>
> ---
>
Hi Peter
On Thu, 5 Jul 2018 at 14:36, Peter Zijlstra wrote:
>
>
> OK, this looks good I suppose. Rafael, are you OK with me taking these?
>
> I have the below on top because I once again forgot how it all worked;
> does this work for you Vincent?
Yes looks good to me
Thanks
>
> ---
>
Hi Morten,
On Wednesday 04 Jul 2018 at 11:17:49 (+0100), Morten Rasmussen wrote:
> diff --git a/kernel/sched/topology.c b/kernel/sched/topology.c
> index 71330e0e41db..29c186961345 100644
> --- a/kernel/sched/topology.c
> +++ b/kernel/sched/topology.c
> @@ -1160,6 +1160,26 @@ sd_init(struct
Hi Morten,
On Wednesday 04 Jul 2018 at 11:17:49 (+0100), Morten Rasmussen wrote:
> diff --git a/kernel/sched/topology.c b/kernel/sched/topology.c
> index 71330e0e41db..29c186961345 100644
> --- a/kernel/sched/topology.c
> +++ b/kernel/sched/topology.c
> @@ -1160,6 +1160,26 @@ sd_init(struct
On 07/04/2018 12:31 PM, Boris Fiuczynski wrote:
On 07/03/2018 06:36 PM, Tony Krowiak wrote:
On 07/02/2018 07:10 PM, Halil Pasic wrote:
On 06/29/2018 11:11 PM, Tony Krowiak wrote:
This patch provides documentation describing the AP architecture and
design concepts behind the virtualization
On 07/04/2018 12:31 PM, Boris Fiuczynski wrote:
On 07/03/2018 06:36 PM, Tony Krowiak wrote:
On 07/02/2018 07:10 PM, Halil Pasic wrote:
On 06/29/2018 11:11 PM, Tony Krowiak wrote:
This patch provides documentation describing the AP architecture and
design concepts behind the virtualization
Hi Tony and Linus,
> Am 05.07.2018 um 11:10 schrieb Tony Lindgren :
>
> Here is a resend of fixes for a race issues for generic group and
> functions reported by H. Nikolaus Schaller .
Thanks for adding me.
I have tested these patches on our OMAP3 based device where the problem
was quite
Hi Tony and Linus,
> Am 05.07.2018 um 11:10 schrieb Tony Lindgren :
>
> Here is a resend of fixes for a race issues for generic group and
> functions reported by H. Nikolaus Schaller .
Thanks for adding me.
I have tested these patches on our OMAP3 based device where the problem
was quite
Hi,
On jeu., juil. 05 2018, Gregory CLEMENT wrote:
> Hi Miquel,
>
> On jeu., juil. 05 2018, Miquel Raynal wrote:
>
>> commit 2f872ddcdb1e8e2186162616cea4581b8403849d upstream.
>>
>> ICU size in CP110 is not 0x10 but at least 0x440 bytes long (from the
>> specification).
>>
>> Fixes:
Hi,
On jeu., juil. 05 2018, Gregory CLEMENT wrote:
> Hi Miquel,
>
> On jeu., juil. 05 2018, Miquel Raynal wrote:
>
>> commit 2f872ddcdb1e8e2186162616cea4581b8403849d upstream.
>>
>> ICU size in CP110 is not 0x10 but at least 0x440 bytes long (from the
>> specification).
>>
>> Fixes:
On Thu, 05 Jul, at 11:10:42AM, Valentin Schneider wrote:
> Hi,
>
> On 04/07/18 15:24, Matt Fleming wrote:
> > It's possible that the CPU doing nohz idle balance hasn't had its own
> > load updated for many seconds. This can lead to huge deltas between
> > rq->avg_stamp and rq->clock when
On Thu, 05 Jul, at 11:10:42AM, Valentin Schneider wrote:
> Hi,
>
> On 04/07/18 15:24, Matt Fleming wrote:
> > It's possible that the CPU doing nohz idle balance hasn't had its own
> > load updated for many seconds. This can lead to huge deltas between
> > rq->avg_stamp and rq->clock when
The Lenovo LaVie Z laptop requires i8042 to be reset in order to
consistently detect its Elantech touchpad. The nomux and kbdreset
quirks are not sufficient.
It's possible the other LaVie Z models from NEC require this as well.
Cc: sta...@vger.kernel.org
Signed-off-by: Chen-Yu Tsai
---
The Lenovo LaVie Z laptop requires i8042 to be reset in order to
consistently detect its Elantech touchpad. The nomux and kbdreset
quirks are not sufficient.
It's possible the other LaVie Z models from NEC require this as well.
Cc: sta...@vger.kernel.org
Signed-off-by: Chen-Yu Tsai
---
Hi Miquel,
On jeu., juil. 05 2018, Miquel Raynal wrote:
> commit 2f872ddcdb1e8e2186162616cea4581b8403849d upstream.
>
> ICU size in CP110 is not 0x10 but at least 0x440 bytes long (from the
> specification).
>
> Fixes: 6ef84a827c37 ("arm64: dts: marvell: enable GICP and ICU on Armada
>
Hi Miquel,
On jeu., juil. 05 2018, Miquel Raynal wrote:
> commit 2f872ddcdb1e8e2186162616cea4581b8403849d upstream.
>
> ICU size in CP110 is not 0x10 but at least 0x440 bytes long (from the
> specification).
>
> Fixes: 6ef84a827c37 ("arm64: dts: marvell: enable GICP and ICU on Armada
>
On Thu, 05 Jul, at 11:52:21AM, Dietmar Eggemann wrote:
>
> Moving the code from _nohz_idle_balance to nohz_idle_balance let it disappear:
>
> diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
> index 02be51c9dcc1..070924f07c68 100644
> --- a/kernel/sched/fair.c
> +++ b/kernel/sched/fair.c
>
On Thu, 05 Jul, at 11:52:21AM, Dietmar Eggemann wrote:
>
> Moving the code from _nohz_idle_balance to nohz_idle_balance let it disappear:
>
> diff --git a/kernel/sched/fair.c b/kernel/sched/fair.c
> index 02be51c9dcc1..070924f07c68 100644
> --- a/kernel/sched/fair.c
> +++ b/kernel/sched/fair.c
>
On 7/5/18 6:46 PM, Peter Zijlstra wrote:
> On Wed, Jun 27, 2018 at 08:22:42PM +0800, Xunlei Pang wrote:
>> tick-based whole utime is utime_0, tick-based whole stime
>> is stime_0, scheduler time is rtime_0.
>
>> For a long time, the process runs mainly in userspace with
>> run-sleep patterns,
On 7/5/18 6:46 PM, Peter Zijlstra wrote:
> On Wed, Jun 27, 2018 at 08:22:42PM +0800, Xunlei Pang wrote:
>> tick-based whole utime is utime_0, tick-based whole stime
>> is stime_0, scheduler time is rtime_0.
>
>> For a long time, the process runs mainly in userspace with
>> run-sleep patterns,
From: yuzhoujian
The current oom report doesn't display victim's memcg context during the
global OOM situation. While this information is not strictly needed, it
can be really helpful for containerized environments to locate which
container has lost a process. Now that we have a single line for
From: yuzhoujian
OOM report contains several sections. The first one is the allocation
context that has triggered the OOM. Then we have cpuset context
followed by the stack trace of the OOM path. Followed by the oom
eligible tasks and the information about the chosen oom victim.
One thing that
From: yuzhoujian
The current oom report doesn't display victim's memcg context during the
global OOM situation. While this information is not strictly needed, it
can be really helpful for containerized environments to locate which
container has lost a process. Now that we have a single line for
From: yuzhoujian
OOM report contains several sections. The first one is the allocation
context that has triggered the OOM. Then we have cpuset context
followed by the stack trace of the OOM path. Followed by the oom
eligible tasks and the information about the chosen oom victim.
One thing that
The Yocto build system does a 'make clean' when rebuilding due to
changed dependencies, and that consistently fails for me (causing the
whole BSP build to fail) with errors such as
| find: '[...]/perf/1.0-r9/perf-1.0/plugin_mac80211.so': No such file or
directory
| find:
The Yocto build system does a 'make clean' when rebuilding due to
changed dependencies, and that consistently fails for me (causing the
whole BSP build to fail) with errors such as
| find: '[...]/perf/1.0-r9/perf-1.0/plugin_mac80211.so': No such file or
directory
| find:
In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.
Signed-off-by: Gustavo A. R. Silva
---
drivers/nvme/host/rdma.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/nvme/host/rdma.c b/drivers/nvme/host/rdma.c
index
In preparation to enabling -Wimplicit-fallthrough, mark switch cases
where we are expecting to fall through.
Signed-off-by: Gustavo A. R. Silva
---
drivers/nvme/host/rdma.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/nvme/host/rdma.c b/drivers/nvme/host/rdma.c
index
On 4 July 2018 at 11:45, Jisheng Zhang wrote:
> Add a driver for SDHCI OF Synopsys DesignWare Cores Mobile Storage
> Host Controller.
>
> Signed-off-by: Jisheng Zhang
> ---
> .../bindings/mmc/sdhci-of-dwcmshc.txt | 20 +++
Please split DT docs into separate patches.
Ehh, just make
On 4 July 2018 at 11:45, Jisheng Zhang wrote:
> Add a driver for SDHCI OF Synopsys DesignWare Cores Mobile Storage
> Host Controller.
>
> Signed-off-by: Jisheng Zhang
> ---
> .../bindings/mmc/sdhci-of-dwcmshc.txt | 20 +++
Please split DT docs into separate patches.
Ehh, just make
On 5 July 2018 at 14:18, Stefan Agner wrote:
> For eMMC devices it is valid to only support 1.8V signaling. When
> vqmmc is set to a fixed 1.8V regulator the stack tries to set 3.3V
> initially and prints the following warning:
>mmc1: Switching to 3.3V signalling voltage failed
>
> Clear the
On 5 July 2018 at 14:18, Stefan Agner wrote:
> For eMMC devices it is valid to only support 1.8V signaling. When
> vqmmc is set to a fixed 1.8V regulator the stack tries to set 3.3V
> initially and prints the following warning:
>mmc1: Switching to 3.3V signalling voltage failed
>
> Clear the
On 4 July 2018 at 17:07, Stefan Agner wrote:
> If pinctrl nodes for 100/200MHz are missing, the controller should
> not select any mode which need signal frequencies 100MHz or higher.
> To prevent such speed modes the driver currently uses the quirk flag
> SDHCI_QUIRK2_NO_1_8_V. This works nicely
On 4 July 2018 at 17:07, Stefan Agner wrote:
> If pinctrl nodes for 100/200MHz are missing, the controller should
> not select any mode which need signal frequencies 100MHz or higher.
> To prevent such speed modes the driver currently uses the quirk flag
> SDHCI_QUIRK2_NO_1_8_V. This works nicely
On 4 July 2018 at 00:56, Gustavo A. R. Silva wrote:
> In preparation to enabling -Wimplicit-fallthrough, mark switch cases
> where we are expecting to fall through.
>
> Warning level 2 was used: -Wimplicit-fallthrough=2
>
> Signed-off-by: Gustavo A. R. Silva
Thanks, applied for next!
Kind
On 5 July 2018 at 14:15, Stefan Agner wrote:
> In the uSDHC case (e.g. i.MX 6) clocks only get disabled if frequency
> is set to 0. However, it could be that the stack asks for a frequency
> change while clocks are on. In that case the function clears the
> divider registers (by clearing
On 4 July 2018 at 13:34, Laurentiu Tudor wrote:
> SDHCI controller in ls1043a and ls1046a generate 40-bit wide addresses
> when doing DMA. Make sure that the corresponding dma mask is correctly
> configured.
>
> Context: when enabling smmu on these chips the following problem is
> encountered:
On 4 July 2018 at 00:56, Gustavo A. R. Silva wrote:
> In preparation to enabling -Wimplicit-fallthrough, mark switch cases
> where we are expecting to fall through.
>
> Warning level 2 was used: -Wimplicit-fallthrough=2
>
> Signed-off-by: Gustavo A. R. Silva
Thanks, applied for next!
Kind
On 5 July 2018 at 14:15, Stefan Agner wrote:
> In the uSDHC case (e.g. i.MX 6) clocks only get disabled if frequency
> is set to 0. However, it could be that the stack asks for a frequency
> change while clocks are on. In that case the function clears the
> divider registers (by clearing
On 4 July 2018 at 13:34, Laurentiu Tudor wrote:
> SDHCI controller in ls1043a and ls1046a generate 40-bit wide addresses
> when doing DMA. Make sure that the corresponding dma mask is correctly
> configured.
>
> Context: when enabling smmu on these chips the following problem is
> encountered:
On Fri, Jun 22, 2018 at 04:10:21PM +0100, Martyn Welch wrote:
> On Wed, 2018-06-20 at 19:41 +, Karoly Pados wrote:
> > Here I argue the following multiple ways. First, I say that claiming
> > that a pin which is used as an input is actually an output is not
> > only confusing, but also much
On Fri, Jun 22, 2018 at 04:10:21PM +0100, Martyn Welch wrote:
> On Wed, 2018-06-20 at 19:41 +, Karoly Pados wrote:
> > Here I argue the following multiple ways. First, I say that claiming
> > that a pin which is used as an input is actually an output is not
> > only confusing, but also much
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