[PATCH v7 3/6] arm64: dts: actions: Add Actions Semiconductor S900 I2C controller nodes

Add I2C controller nodes for Actions Semiconductor S900 SoC. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/actions/s900.dtsi | 60 +++ 1 file changed, 60 insertions(+) diff --git a/arch/arm64/boot/dts/actions/s900.dtsi

[PATCH v7 3/6] arm64: dts: actions: Add Actions Semiconductor S900 I2C controller nodes

Add I2C controller nodes for Actions Semiconductor S900 SoC. Signed-off-by: Manivannan Sadhasivam --- arch/arm64/boot/dts/actions/s900.dtsi | 60 +++ 1 file changed, 60 insertions(+) diff --git a/arch/arm64/boot/dts/actions/s900.dtsi

[PATCH v7 1/6] dt-bindings: i2c: Add binding for Actions Semiconductor Owl I2C controller

Add devicetree binding for Actions Semiconductor Owl I2C controller Signed-off-by: Manivannan Sadhasivam Reviewed-by: Rob Herring --- .../devicetree/bindings/i2c/i2c-owl.txt | 27 +++ 1 file changed, 27 insertions(+) create mode 100644

[PATCH v7 1/6] dt-bindings: i2c: Add binding for Actions Semiconductor Owl I2C controller

Add devicetree binding for Actions Semiconductor Owl I2C controller Signed-off-by: Manivannan Sadhasivam Reviewed-by: Rob Herring --- .../devicetree/bindings/i2c/i2c-owl.txt | 27 +++ 1 file changed, 27 insertions(+) create mode 100644

[PATCH] gpio: tegra: drop tegra specific GPIO lockdep classes

Since commit e45d1c80c0ee ("gpio: put GPIO IRQs into their own lock class") and commit a0a8bcf4670c ("gpiolib: irqchip: use different lockdep class for each gpio irqchip") GPIO lib takes care of lockdep classes. In fact, gpiochip_irq_map() overwrites the class anyway, so the lockdep class set by

[PATCH] gpio: tegra: drop tegra specific GPIO lockdep classes

Since commit e45d1c80c0ee ("gpio: put GPIO IRQs into their own lock class") and commit a0a8bcf4670c ("gpiolib: irqchip: use different lockdep class for each gpio irqchip") GPIO lib takes care of lockdep classes. In fact, gpiochip_irq_map() overwrites the class anyway, so the lockdep class set by

[PATCH v2 0/3] Staging: octeon-usb fixes for coding style, SPDX and readability.

Hello, Ok, this have gone too far, i sent these series so many times wrong... I am sorry its my first patch (and series) and i keep mix-up patch generation an sending to my self. Last time not everybody was cc. Here are three patches which trying to resolve TODO's list requirements number 45

[PATCH v2 0/3] Staging: octeon-usb fixes for coding style, SPDX and readability.

Hello, Ok, this have gone too far, i sent these series so many times wrong... I am sorry its my first patch (and series) and i keep mix-up patch generation an sending to my self. Last time not everybody was cc. Here are three patches which trying to resolve TODO's list requirements number 45

[PATCH 1/2] pinctrl: tegra: define GPIO compatible node per SoC

Tegra 2 uses a different GPIO controller which uses "tegra20-gpio" as compatible string. Make the compatible string the GPIO node is using a SoC specific property. This prevents the kernel from registering the GPIO range twice in case the GPIO range is specified in the device tree. Fixes:

[PATCH 1/2] pinctrl: tegra: define GPIO compatible node per SoC

Tegra 2 uses a different GPIO controller which uses "tegra20-gpio" as compatible string. Make the compatible string the GPIO node is using a SoC specific property. This prevents the kernel from registering the GPIO range twice in case the GPIO range is specified in the device tree. Fixes:

[PATCH 2/2] ARM: tegra: readd gpio-ranges properties

The properties have been commented out to prevent a regression a while ago. The first regression should be resolved by commit 44af7927316e ("spi: Map SPI OF client IRQ at probe time"). The second regression is probably addressed by commit 494fd7b7ad10 ("PM / core: fix deferred probe breaking

[PATCH 2/2] ARM: tegra: readd gpio-ranges properties

The properties have been commented out to prevent a regression a while ago. The first regression should be resolved by commit 44af7927316e ("spi: Map SPI OF client IRQ at probe time"). The second regression is probably addressed by commit 494fd7b7ad10 ("PM / core: fix deferred probe breaking

Re: [PATCH 2/3] mm: calculate deferred pages after skipping mirrored memory

On Wed, Jul 25, 2018 at 5:30 PM Andrew Morton wrote: > > On Tue, 24 Jul 2018 21:46:25 -0400 Pavel Tatashin > wrote: > > > > > +static inline bool defer_init(int nid, unsigned long pfn, unsigned > > > > long end_pfn) > > > > { > > > > + static unsigned long prev_end_pfn, nr_initialised; >

Re: [PATCH 2/3] mm: calculate deferred pages after skipping mirrored memory

On Wed, Jul 25, 2018 at 5:30 PM Andrew Morton wrote: > > On Tue, 24 Jul 2018 21:46:25 -0400 Pavel Tatashin > wrote: > > > > > +static inline bool defer_init(int nid, unsigned long pfn, unsigned > > > > long end_pfn) > > > > { > > > > + static unsigned long prev_end_pfn, nr_initialised; >

Re: [PREEMPT_RT]: Using printk-rt-aware.patch in non-rt kernel

On 2018-07-18 20:19:15 [+0530], Pintu Kumar wrote: > Hi All, Hi, > I have a question about PREEMPT_RT patch for 3.10 kernel. > I am trying to port this rt patch: 0224-printk-rt-aware.patch.patch > (see the patch below), in non-rt kernel. > I could able to successfully apply this patch after

Re: [PREEMPT_RT]: Using printk-rt-aware.patch in non-rt kernel

On 2018-07-18 20:19:15 [+0530], Pintu Kumar wrote: > Hi All, Hi, > I have a question about PREEMPT_RT patch for 3.10 kernel. > I am trying to port this rt patch: 0224-printk-rt-aware.patch.patch > (see the patch below), in non-rt kernel. > I could able to successfully apply this patch after

Re: [PATCH v3 4/5] mm/page_alloc: Move initialization of node and zones to an own function

> OK, this looks definitely better. I will have to check that all the > required state is initialized properly. Considering the above > explanation I would simply fold the follow up patch into this one. It is > not so large it would get hard to review and you would make it clear why > the work is

Re: [PATCH v3 4/5] mm/page_alloc: Move initialization of node and zones to an own function

> OK, this looks definitely better. I will have to check that all the > required state is initialized properly. Considering the above > explanation I would simply fold the follow up patch into this one. It is > not so large it would get hard to review and you would make it clear why > the work is

Re: [PATCH] clk: meson-gxbb: set fclk_div2 as CLK_IS_CRITICAL

On Thu, Jul 26, 2018 at 05:24:09PM +0200, Neil Armstrong wrote: > Hi Stable Team, > > On 13/06/2018 14:20, Neil Armstrong wrote: > > On Amlogic Meson GXBB & GXL platforms, the SCPI Cortex-M4 Co-Processor > > seems to be dependent on the FCLK_DIV2 to be operationnal. > > > > The issue occured

Re: [PATCH] clk: meson-gxbb: set fclk_div2 as CLK_IS_CRITICAL

On Thu, Jul 26, 2018 at 05:24:09PM +0200, Neil Armstrong wrote: > Hi Stable Team, > > On 13/06/2018 14:20, Neil Armstrong wrote: > > On Amlogic Meson GXBB & GXL platforms, the SCPI Cortex-M4 Co-Processor > > seems to be dependent on the FCLK_DIV2 to be operationnal. > > > > The issue occured

Re: [PATCH] tracing: do not leak kernel addresses

On Thu, Jul 26, 2018 at 08:14:08AM -0700, Mark Salyzyn wrote: > On 07/25/2018 06:07 PM, Steven Rostedt wrote: > > On Wed, 25 Jul 2018 13:22:36 -0700 > > Mark Salyzyn wrote: > > > > > From: Nick Desaulniers > > > > > > Switch from 0x%lx to 0x%pK to print the kernel addresses. > > > > > >

Re: [PATCH] tracing: do not leak kernel addresses

On Thu, Jul 26, 2018 at 08:14:08AM -0700, Mark Salyzyn wrote: > On 07/25/2018 06:07 PM, Steven Rostedt wrote: > > On Wed, 25 Jul 2018 13:22:36 -0700 > > Mark Salyzyn wrote: > > > > > From: Nick Desaulniers > > > > > > Switch from 0x%lx to 0x%pK to print the kernel addresses. > > > > > >

RE: [PATCH] clk: clk-fixed-factor: Clear OF_POPULATED flag in case of failure

Quoting Rajan Vaja (2018-07-26 06:03:16) > Hi Stephen, > > > -Original Message- > > From: Stephen Boyd [mailto:sb...@kernel.org] > > Sent: 25 July 2018 10:11 PM > > To: Rajan Vaja ; mturque...@baylibre.com > > Cc: linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; Rajan Vaja > > >

RE: [PATCH] clk: clk-fixed-factor: Clear OF_POPULATED flag in case of failure

Quoting Rajan Vaja (2018-07-26 06:03:16) > Hi Stephen, > > > -Original Message- > > From: Stephen Boyd [mailto:sb...@kernel.org] > > Sent: 25 July 2018 10:11 PM > > To: Rajan Vaja ; mturque...@baylibre.com > > Cc: linux-...@vger.kernel.org; linux-kernel@vger.kernel.org; Rajan Vaja > > >

Re: [PATCH] clk: meson-gxbb: set fclk_div2 as CLK_IS_CRITICAL

Hi Stable Team, On 13/06/2018 14:20, Neil Armstrong wrote: > On Amlogic Meson GXBB & GXL platforms, the SCPI Cortex-M4 Co-Processor > seems to be dependent on the FCLK_DIV2 to be operationnal. > > The issue occured since v4.17-rc1 by freezing the kernel boot when > the 'schedutil' cpufreq

Re: [PATCH] clk: meson-gxbb: set fclk_div2 as CLK_IS_CRITICAL

Hi Stable Team, On 13/06/2018 14:20, Neil Armstrong wrote: > On Amlogic Meson GXBB & GXL platforms, the SCPI Cortex-M4 Co-Processor > seems to be dependent on the FCLK_DIV2 to be operationnal. > > The issue occured since v4.17-rc1 by freezing the kernel boot when > the 'schedutil' cpufreq

Re: [Linux-kernel] tegra clock updates and fixes

Quoting Ben Dooks (2018-07-26 06:32:29) > On 2018-07-20 14:45, Ben Dooks wrote: > > Hi, this is a set of clock updates and fixes we did when developing > > the tegra20/tegra30 auto support. The audio change is due to using > > the tegra in clock-slave mode (this hasn't been done before) > > > >

Re: [Linux-kernel] tegra clock updates and fixes

Quoting Ben Dooks (2018-07-26 06:32:29) > On 2018-07-20 14:45, Ben Dooks wrote: > > Hi, this is a set of clock updates and fixes we did when developing > > the tegra20/tegra30 auto support. The audio change is due to using > > the tegra in clock-slave mode (this hasn't been done before) > > > >

Re: [PATCH] tracing: do not leak kernel addresses

On Thu, 26 Jul 2018 08:14:08 -0700 Mark Salyzyn wrote: > Thank you Steve, much appreciated feedback, I have asked the security > developers to keep this in mind and come up with a correct fix. > > The correct fix that meets your guidelines would _not_ be suitable for > stable due to the

Re: [PATCH] tracing: do not leak kernel addresses

On Thu, 26 Jul 2018 08:14:08 -0700 Mark Salyzyn wrote: > Thank you Steve, much appreciated feedback, I have asked the security > developers to keep this in mind and come up with a correct fix. > > The correct fix that meets your guidelines would _not_ be suitable for > stable due to the

Re: [PATCH v3 2/2] clk: meson: add sub MMC clock controller driver

Quoting Yixun Lan (2018-07-12 14:12:44) > diff --git a/drivers/clk/meson/mmc-clkc.c b/drivers/clk/meson/mmc-clkc.c > new file mode 100644 > index ..36c4c7cd69a6 > --- /dev/null > +++ b/drivers/clk/meson/mmc-clkc.c > @@ -0,0 +1,367 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) >

Re: [PATCH v3 2/2] clk: meson: add sub MMC clock controller driver

Quoting Yixun Lan (2018-07-12 14:12:44) > diff --git a/drivers/clk/meson/mmc-clkc.c b/drivers/clk/meson/mmc-clkc.c > new file mode 100644 > index ..36c4c7cd69a6 > --- /dev/null > +++ b/drivers/clk/meson/mmc-clkc.c > @@ -0,0 +1,367 @@ > +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) >

Re: [PATCH v3 3/5] mm/page_alloc: Inline function to handle CONFIG_DEFERRED_STRUCT_PAGE_INIT

On 18-07-26 00:01:42, osalva...@techadventures.net wrote: > From: Oscar Salvador > > Let us move the code between CONFIG_DEFERRED_STRUCT_PAGE_INIT > to an inline function. > Not having an ifdef in the function makes the code more readable. > > Signed-off-by: Oscar Salvador > Acked-by: Michal

Re: [PATCH v3 3/5] mm/page_alloc: Inline function to handle CONFIG_DEFERRED_STRUCT_PAGE_INIT

On 18-07-26 00:01:42, osalva...@techadventures.net wrote: > From: Oscar Salvador > > Let us move the code between CONFIG_DEFERRED_STRUCT_PAGE_INIT > to an inline function. > Not having an ifdef in the function makes the code more readable. > > Signed-off-by: Oscar Salvador > Acked-by: Michal

Re: [PATCH] clk: samsung: Remove unused mout_user_aclk400_mcuisp_p4x12 variable

Quoting Krzysztof Kozlowski (2018-07-18 12:56:20) > Remove unused 'mout_user_aclk400_mcuisp_p4x12' variable to fix GCC warning: > > drivers/clk/samsung/clk-exynos4412-isp.c:40:27: warning: > 'mout_user_aclk400_mcuisp_p4x12' defined but not used > [-Wunused-const-variable=] > >

Re: [PATCH] clk: samsung: Remove unused mout_user_aclk400_mcuisp_p4x12 variable

Quoting Krzysztof Kozlowski (2018-07-18 12:56:20) > Remove unused 'mout_user_aclk400_mcuisp_p4x12' variable to fix GCC warning: > > drivers/clk/samsung/clk-exynos4412-isp.c:40:27: warning: > 'mout_user_aclk400_mcuisp_p4x12' defined but not used > [-Wunused-const-variable=] > >

Re: [PATCH v3 2/5] mm: access zone->node via zone_to_nid() and zone_set_nid()

Hi Oscar, Below is updated patch, with comment about OpenGrok and Acked-by Michal added. Thank you, Pavel >From cca1b083d78d0ff99cce6dfaf12f6380d76390c7 Mon Sep 17 00:00:00 2001 From: Pavel Tatashin Date: Thu, 26 Jul 2018 00:01:41 +0200 Subject: [PATCH] mm: access zone->node via zone_to_nid()

Re: [PATCH v3 2/5] mm: access zone->node via zone_to_nid() and zone_set_nid()

Hi Oscar, Below is updated patch, with comment about OpenGrok and Acked-by Michal added. Thank you, Pavel >From cca1b083d78d0ff99cce6dfaf12f6380d76390c7 Mon Sep 17 00:00:00 2001 From: Pavel Tatashin Date: Thu, 26 Jul 2018 00:01:41 +0200 Subject: [PATCH] mm: access zone->node via zone_to_nid()

Re: [PATCHv3 1/3] mm: Introduce vma_init()

On Wed, Jul 25, 2018 at 07:42:01PM +, Andrew Morton wrote: > On Wed, 25 Jul 2018 15:39:24 +0300 "Kirill A. Shutemov" > wrote: > > > There are few more: > > > > arch/arm64/include/asm/tlb.h: struct vm_area_struct vma = { .vm_mm = > > tlb->mm, }; > > arch/arm64/mm/hugetlbpage.c:struct

Re: [PATCHv3 1/3] mm: Introduce vma_init()

On Wed, Jul 25, 2018 at 07:42:01PM +, Andrew Morton wrote: > On Wed, 25 Jul 2018 15:39:24 +0300 "Kirill A. Shutemov" > wrote: > > > There are few more: > > > > arch/arm64/include/asm/tlb.h: struct vm_area_struct vma = { .vm_mm = > > tlb->mm, }; > > arch/arm64/mm/hugetlbpage.c:struct

Re: [PATCH] tracing: do not leak kernel addresses

On 07/25/2018 06:07 PM, Steven Rostedt wrote: On Wed, 25 Jul 2018 13:22:36 -0700 Mark Salyzyn wrote: From: Nick Desaulniers Switch from 0x%lx to 0x%pK to print the kernel addresses. Fixes: CVE-2017-0630 Wait This breaks perf and trace-cmd! They require this to be able to print various

Re: [PATCH] tracing: do not leak kernel addresses

On 07/25/2018 06:07 PM, Steven Rostedt wrote: On Wed, 25 Jul 2018 13:22:36 -0700 Mark Salyzyn wrote: From: Nick Desaulniers Switch from 0x%lx to 0x%pK to print the kernel addresses. Fixes: CVE-2017-0630 Wait This breaks perf and trace-cmd! They require this to be able to print various

Re: [PATCH 18/20] signal: Add calculate_sigpending()

Oleg Nesterov writes: > On 07/23, Eric W. Biederman wrote: >> >> --- a/kernel/fork.c >> +++ b/kernel/fork.c >> @@ -1988,6 +1988,7 @@ static __latent_entropy struct task_struct >> *copy_process( >>>signal->thread_head); >> } >>

Re: [PATCH 18/20] signal: Add calculate_sigpending()

Oleg Nesterov writes: > On 07/23, Eric W. Biederman wrote: >> >> --- a/kernel/fork.c >> +++ b/kernel/fork.c >> @@ -1988,6 +1988,7 @@ static __latent_entropy struct task_struct >> *copy_process( >>>signal->thread_head); >> } >>

Re: [PATCH 3/3] mmc: tegra: prevent ACMD23 on Tegra 3

On 07/26/2018 10:47 AM, Stefan Agner wrote: On 26.07.2018 15:56, Peter Geis wrote: On 07/12/2018 03:39 AM, Stefan Agner wrote: It seems that SD3.0 advertisement needs to be set for higher eMMC speed modes (namely DDR52) as well. The TRM states that the SD3.0 advertisement bit should be set for

Re: [PATCH 3/3] mmc: tegra: prevent ACMD23 on Tegra 3

On 07/26/2018 10:47 AM, Stefan Agner wrote: On 26.07.2018 15:56, Peter Geis wrote: On 07/12/2018 03:39 AM, Stefan Agner wrote: It seems that SD3.0 advertisement needs to be set for higher eMMC speed modes (namely DDR52) as well. The TRM states that the SD3.0 advertisement bit should be set for

Re: [PATCH 4.4 101/105] spi: Fix scatterlist elements size in spi_map_buf

On Fri, Jul 20, 2018 at 08:23:44PM +0100, Ben Hutchings wrote: > On Sun, 2018-07-01 at 18:02 +0200, Greg Kroah-Hartman wrote: > > 4.4-stable review patch.  If anyone has any objections, please let me know. > > > > -- > > > > From: Maxime Chevallier > > > > commit

Re: [PATCH 4.4 101/105] spi: Fix scatterlist elements size in spi_map_buf

On Fri, Jul 20, 2018 at 08:23:44PM +0100, Ben Hutchings wrote: > On Sun, 2018-07-01 at 18:02 +0200, Greg Kroah-Hartman wrote: > > 4.4-stable review patch.  If anyone has any objections, please let me know. > > > > -- > > > > From: Maxime Chevallier > > > > commit

[PATCH RT v3] arm64: fpsimd: use preemp_disable in addition to local_bh_disable()

In v4.16-RT I noticed a number of warnings from task_fpsimd_load(). The code disables BH and expects that it is not preemptible. On -RT the task remains preemptible but remains the same CPU. This may corrupt the content of the SIMD registers if the task is preempted during saving/restoring those

[PATCH RT v3] arm64: fpsimd: use preemp_disable in addition to local_bh_disable()

In v4.16-RT I noticed a number of warnings from task_fpsimd_load(). The code disables BH and expects that it is not preemptible. On -RT the task remains preemptible but remains the same CPU. This may corrupt the content of the SIMD registers if the task is preempted during saving/restoring those

Applied "ASoC: meson: use IRQ_RETVAL in the fifo irq handler" to the asoc tree

The patch ASoC: meson: use IRQ_RETVAL in the fifo irq handler has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and

Applied "ASoC: meson: use IRQ_RETVAL in the fifo irq handler" to the asoc tree

The patch ASoC: meson: use IRQ_RETVAL in the fifo irq handler has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and

Applied "ASoC: meson: update axg sound card bindings" to the asoc tree

The patch ASoC: meson: update axg sound card bindings has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to

Applied "ASoC: meson: align axg card driver with DT bindings documentation" to the asoc tree

The patch ASoC: meson: align axg card driver with DT bindings documentation has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next

Applied "ASoC: meson: update axg sound card bindings" to the asoc tree

The patch ASoC: meson: update axg sound card bindings has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to

Applied "ASoC: meson: align axg card driver with DT bindings documentation" to the asoc tree

The patch ASoC: meson: align axg card driver with DT bindings documentation has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git All being well this means that it will be integrated into the linux-next tree (usually sometime in the next

Re: [PATCH] arm64: dts: meson: Switch simple-mfd and syscon order

Hi, On 26/07/2018 16:41, Yixun Lan wrote: > HI Neil > > On 07/26/2018 10:13 PM, Neil Armstrong wrote: >> The order between "syscon" and "simple-mfd" is important because in these >> particular cases, the node needs to be first a "simple-mfd" to expose >> it's sub-nodes, and later on a "syscon"

Re: [PATCH] arm64: dts: meson: Switch simple-mfd and syscon order

Hi, On 26/07/2018 16:41, Yixun Lan wrote: > HI Neil > > On 07/26/2018 10:13 PM, Neil Armstrong wrote: >> The order between "syscon" and "simple-mfd" is important because in these >> particular cases, the node needs to be first a "simple-mfd" to expose >> it's sub-nodes, and later on a "syscon"

Re: 4.17.x won't boot due to "x86/boot/compressed/64: Handle 5-level paging boot if kernel is above 4G"

On Thu, Jul 26, 2018 at 08:10:42AM +, Dmitry Malkin wrote: > > > On 07/25/2018 11:21 PM, Kirill A. Shutemov wrote: > > On Wed, Jul 25, 2018 at 05:26:02PM +, Dmitry Malkin wrote: > > > there may be some other reasons which may cause undefined behavior (reboot > > > for example): > > > >

Re: 4.17.x won't boot due to "x86/boot/compressed/64: Handle 5-level paging boot if kernel is above 4G"

On Thu, Jul 26, 2018 at 08:10:42AM +, Dmitry Malkin wrote: > > > On 07/25/2018 11:21 PM, Kirill A. Shutemov wrote: > > On Wed, Jul 25, 2018 at 05:26:02PM +, Dmitry Malkin wrote: > > > there may be some other reasons which may cause undefined behavior (reboot > > > for example): > > > >

Re: [PATCH 3/3] mmc: tegra: prevent ACMD23 on Tegra 3

On 26.07.2018 15:56, Peter Geis wrote: > On 07/12/2018 03:39 AM, Stefan Agner wrote: >> It seems that SD3.0 advertisement needs to be set for higher eMMC >> speed modes (namely DDR52) as well. The TRM states that the SD3.0 >> advertisement bit should be set for all controller instances, even >>

Re: [PATCH 3/3] mmc: tegra: prevent ACMD23 on Tegra 3

On 26.07.2018 15:56, Peter Geis wrote: > On 07/12/2018 03:39 AM, Stefan Agner wrote: >> It seems that SD3.0 advertisement needs to be set for higher eMMC >> speed modes (namely DDR52) as well. The TRM states that the SD3.0 >> advertisement bit should be set for all controller instances, even >>

Re: [PATCH v3 20/20] signal: Don't restart fork when signals come in.

Oleg Nesterov writes: > On 07/24, Eric W. Biederman wrote: >> >> @@ -1979,6 +1983,8 @@ static __latent_entropy struct task_struct >> *copy_process( >> attach_pid(p, PIDTYPE_TGID); >> attach_pid(p, PIDTYPE_PGID); >> attach_pid(p,

Re: [PATCH v3 20/20] signal: Don't restart fork when signals come in.

Oleg Nesterov writes: > On 07/24, Eric W. Biederman wrote: >> >> @@ -1979,6 +1983,8 @@ static __latent_entropy struct task_struct >> *copy_process( >> attach_pid(p, PIDTYPE_TGID); >> attach_pid(p, PIDTYPE_PGID); >> attach_pid(p,

Re: [PATCH] arm64: dts: meson: Switch simple-mfd and syscon order

HI Neil On 07/26/2018 10:13 PM, Neil Armstrong wrote: > The order between "syscon" and "simple-mfd" is important because in these > particular cases, the node needs to be first a "simple-mfd" to expose > it's sub-nodes, and later on a "syscon" to permit other nodes to access > this register space

Re: [PATCH] arm64: dts: meson: Switch simple-mfd and syscon order

HI Neil On 07/26/2018 10:13 PM, Neil Armstrong wrote: > The order between "syscon" and "simple-mfd" is important because in these > particular cases, the node needs to be first a "simple-mfd" to expose > it's sub-nodes, and later on a "syscon" to permit other nodes to access > this register space

[PATCH 9/9] clocksource: new RISC-V SBI timer driver

From: Palmer Dabbelt The RISC-V ISA defines a per-hart real-time clock and timer, which is present on all systems. The clock is accessed via the 'rdtime' pseudo-instruction (which reads a CSR), and the timer is set via an SBI call. Contains various improvements from Atish Patra .

[PATCH 9/9] clocksource: new RISC-V SBI timer driver

From: Palmer Dabbelt The RISC-V ISA defines a per-hart real-time clock and timer, which is present on all systems. The clock is accessed via the 'rdtime' pseudo-instruction (which reads a CSR), and the timer is set via an SBI call. Contains various improvements from Atish Patra .

[PATCH 5/9] RISC-V: implement low-level interrupt handling

Add support for a routine that dispatches exceptions with the interrupt flags set to either the IPI or irqdomain code (and the clock source in the future). Loosely based on the irq-riscv-int.c irqchip driver from the RISC-V tree. Signed-off-by: Christoph Hellwig --- arch/riscv/kernel/entry.S |

[PATCH 6/9] RISC-V: Support per-hart timebase-frequency

From: Palmer Dabbelt This isn't actually how I want to do it, I just needed something right now. Signed-off-by: Palmer Dabbelt --- arch/riscv/kernel/time.c | 17 - 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/arch/riscv/kernel/time.c

[PATCH 7/9] irqchip: add a RISC-V PLIC driver

This patch adds a driver for the Platform Level Interrupt Controller (PLIC) specified as part of the RISC-V supervisor level ISA manual, in the memory layout implemented by SiFive and qemu. The PLIC connects global interrupt sources to the local interrupt controller on each hart. This driver is

[PATCH 6/9] RISC-V: Support per-hart timebase-frequency

From: Palmer Dabbelt This isn't actually how I want to do it, I just needed something right now. Signed-off-by: Palmer Dabbelt --- arch/riscv/kernel/time.c | 17 - 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/arch/riscv/kernel/time.c

[PATCH 7/9] irqchip: add a RISC-V PLIC driver

This patch adds a driver for the Platform Level Interrupt Controller (PLIC) specified as part of the RISC-V supervisor level ISA manual, in the memory layout implemented by SiFive and qemu. The PLIC connects global interrupt sources to the local interrupt controller on each hart. This driver is

[PATCH 5/9] RISC-V: implement low-level interrupt handling

Add support for a routine that dispatches exceptions with the interrupt flags set to either the IPI or irqdomain code (and the clock source in the future). Loosely based on the irq-riscv-int.c irqchip driver from the RISC-V tree. Signed-off-by: Christoph Hellwig --- arch/riscv/kernel/entry.S |

[PATCH 8/9] dt-bindings: interrupt-controller: RISC-V PLIC documentation

From: Palmer Dabbelt This patch adds documentation for the platform-level interrupt controller (PLIC) found in all RISC-V systems. This interrupt controller routes interrupts from all the devices in the system to each hart-local interrupt controller. Note: the DTS bindings for the PLIC aren't

[PATCH 8/9] dt-bindings: interrupt-controller: RISC-V PLIC documentation

From: Palmer Dabbelt This patch adds documentation for the platform-level interrupt controller (PLIC) found in all RISC-V systems. This interrupt controller routes interrupts from all the devices in the system to each hart-local interrupt controller. Note: the DTS bindings for the PLIC aren't

[PATCH 3/9] RISC-V: remove INTERRUPT_CAUSE_* defines from asm/irq.h

These are only of use to the local irq controller driver, so add them in that driver implementation instead, which will be submitted soon. Signed-off-by: Christoph Hellwig --- arch/riscv/include/asm/irq.h | 4 1 file changed, 4 deletions(-) diff --git a/arch/riscv/include/asm/irq.h

[PATCH 4/9] RISC-V: add a definition for the SIE SEIE bit

This mirrors the SIE_SSIE and SETE bits that are used in a similar fashion. Signed-off-by: Christoph Hellwig --- arch/riscv/include/asm/csr.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h index 421fa3585798..28a0d1cb374c 100644

[PATCH 3/9] RISC-V: remove INTERRUPT_CAUSE_* defines from asm/irq.h

These are only of use to the local irq controller driver, so add them in that driver implementation instead, which will be submitted soon. Signed-off-by: Christoph Hellwig --- arch/riscv/include/asm/irq.h | 4 1 file changed, 4 deletions(-) diff --git a/arch/riscv/include/asm/irq.h

[PATCH 4/9] RISC-V: add a definition for the SIE SEIE bit

This mirrors the SIE_SSIE and SETE bits that are used in a similar fashion. Signed-off-by: Christoph Hellwig --- arch/riscv/include/asm/csr.h | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/riscv/include/asm/csr.h b/arch/riscv/include/asm/csr.h index 421fa3585798..28a0d1cb374c 100644

[PATCH 1/9] RISC-V: remove timer leftovers

This code is currently unused and will be added back later in a different place with the real interrupt and clocksource support. Signed-off-by: Christoph Hellwig --- arch/riscv/kernel/time.c | 21 - 1 file changed, 21 deletions(-) diff --git a/arch/riscv/kernel/time.c

[PATCH 2/9] RISC-V: simplify software interrupt / IPI code

Rename handle_ipi to riscv_software_interrupt, drop the unused return value and move the prototype to irq.h together with riscv_timer_interupt. This allows simplifying the upcoming interrupt handling support. Signed-off-by: Christoph Hellwig --- arch/riscv/include/asm/irq.h | 1 +

[PATCH 1/9] RISC-V: remove timer leftovers

This code is currently unused and will be added back later in a different place with the real interrupt and clocksource support. Signed-off-by: Christoph Hellwig --- arch/riscv/kernel/time.c | 21 - 1 file changed, 21 deletions(-) diff --git a/arch/riscv/kernel/time.c

[PATCH 2/9] RISC-V: simplify software interrupt / IPI code

Rename handle_ipi to riscv_software_interrupt, drop the unused return value and move the prototype to irq.h together with riscv_timer_interupt. This allows simplifying the upcoming interrupt handling support. Signed-off-by: Christoph Hellwig --- arch/riscv/include/asm/irq.h | 1 +

RFC: simplified RISC-V interrupt and clocksource handling

This series tries adds support for interrupt handling and timers for the RISC-V architecture. The basic per-hart interrupt handling implemented by the scause and sie CSRs is extremely simple and implemented directly in arch/riscv/kernel/irq.c. In addition there is a irqchip driver for the PLIC

RFC: simplified RISC-V interrupt and clocksource handling

This series tries adds support for interrupt handling and timers for the RISC-V architecture. The basic per-hart interrupt handling implemented by the scause and sie CSRs is extremely simple and implemented directly in arch/riscv/kernel/irq.c. In addition there is a irqchip driver for the PLIC

Re: kernel BUG at mm/shmem.c:LINE!

On Wed, Jul 25, 2018 at 11:53:15PM -0700, Hugh Dickins wrote: > Now I've learnt that an oops on 0xffbe points to EEXIST, > not to EREMOTE, it's easy: patch below fixes those four xfstests > (and no doubt a similar oops I've seen occasionally under swapping > load): so gives clean

Re: kernel BUG at mm/shmem.c:LINE!

On Wed, Jul 25, 2018 at 11:53:15PM -0700, Hugh Dickins wrote: > Now I've learnt that an oops on 0xffbe points to EEXIST, > not to EREMOTE, it's easy: patch below fixes those four xfstests > (and no doubt a similar oops I've seen occasionally under swapping > load): so gives clean

Re: [PATCHv5 05/19] mm/page_alloc: Handle allocation for encrypted memory

On Thu 19-07-18 11:27:24, Kirill A. Shutemov wrote: > On Wed, Jul 18, 2018 at 04:03:53PM -0700, Dave Hansen wrote: > > I asked about this before and it still isn't covered in the description: > > You were specifically asked (maybe in person at LSF/MM?) not to modify > > allocator to pass the keyid

Re: [PATCHv5 05/19] mm/page_alloc: Handle allocation for encrypted memory

On Thu 19-07-18 11:27:24, Kirill A. Shutemov wrote: > On Wed, Jul 18, 2018 at 04:03:53PM -0700, Dave Hansen wrote: > > I asked about this before and it still isn't covered in the description: > > You were specifically asked (maybe in person at LSF/MM?) not to modify > > allocator to pass the keyid

Re: [RFC PATCH 0/1] x86/ftrace: fix live patching vs. tracing race

On Thu, 26 Jul 2018 12:40:28 +0200 Nicolai Stange wrote: > Hi, > > if a user starts to trace a live patched function, its mcount call will get > redirected from a trampoline to ftrace_regs_caller. > > In preparation for that, ftrace on x86 first installs an int3 insn at that > call site. > >

Re: [RFC PATCH 0/1] x86/ftrace: fix live patching vs. tracing race

On Thu, 26 Jul 2018 12:40:28 +0200 Nicolai Stange wrote: > Hi, > > if a user starts to trace a live patched function, its mcount call will get > redirected from a trampoline to ftrace_regs_caller. > > In preparation for that, ftrace on x86 first installs an int3 insn at that > call site. > >

Re: [PATCH v10 7/7] Bluetooth: hci_qca: Add support for Qualcomm Bluetooth chip wcn3990

Hi Matthias, On 2018-07-26 00:01, Matthias Kaehlcke wrote: On Tue, Jul 24, 2018 at 09:25:16PM +0530, Balakrishna Godavarthi wrote: Hi Matthias, On 2018-07-24 01:24, Matthias Kaehlcke wrote: > On Fri, Jul 20, 2018 at 07:02:43PM +0530, Balakrishna Godavarthi wrote: > > + * sometimes we

Re: [PATCH v10 7/7] Bluetooth: hci_qca: Add support for Qualcomm Bluetooth chip wcn3990

Hi Matthias, On 2018-07-26 00:01, Matthias Kaehlcke wrote: On Tue, Jul 24, 2018 at 09:25:16PM +0530, Balakrishna Godavarthi wrote: Hi Matthias, On 2018-07-24 01:24, Matthias Kaehlcke wrote: > On Fri, Jul 20, 2018 at 07:02:43PM +0530, Balakrishna Godavarthi wrote: > > + * sometimes we

[GIT PULL] Staging driver fixes for 4.18-rc7

The following changes since commit 9d3cce1e8b8561fed5f383d22a4d6949db4eadbe: Linux 4.18-rc5 (2018-07-15 12:49:31 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git tags/staging-4.18-rc7 for you to fetch changes up to

[GIT PULL] Staging driver fixes for 4.18-rc7

The following changes since commit 9d3cce1e8b8561fed5f383d22a4d6949db4eadbe: Linux 4.18-rc5 (2018-07-15 12:49:31 -0700) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/staging.git tags/staging-4.18-rc7 for you to fetch changes up to

[GIT PULL] Driver core fix for 4.18-rc7

The following changes since commit 7daf201d7fe8334e2d2364d4e8ed3394ec9af819: Linux 4.18-rc2 (2018-06-24 20:54:29 +0800) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core.git tags/driver-core-4.18-rc7 for you to fetch changes up to

[GIT PULL] Driver core fix for 4.18-rc7

The following changes since commit 7daf201d7fe8334e2d2364d4e8ed3394ec9af819: Linux 4.18-rc2 (2018-06-24 20:54:29 +0800) are available in the Git repository at: git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/driver-core.git tags/driver-core-4.18-rc7 for you to fetch changes up to

Re: cpu_no_speculation omissions?

On Thu, Jul 26, 2018 at 03:29:53PM +0200, Jiri Kosina wrote: > On Mon, 16 Jul 2018, Alan Cox wrote: > > The pre Silvermont atom cores are in order. When I did the original > > list I didn't bother with all the 32bit cores as we didn't have any > > 32bit mitigations then. > > Now that 32bit PTI is

Re: cpu_no_speculation omissions?

On Thu, Jul 26, 2018 at 03:29:53PM +0200, Jiri Kosina wrote: > On Mon, 16 Jul 2018, Alan Cox wrote: > > The pre Silvermont atom cores are in order. When I did the original > > list I didn't bother with all the 32bit cores as we didn't have any > > 32bit mitigations then. > > Now that 32bit PTI is

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