On Tue 31-07-18 18:14:48, Roman Gushchin wrote:
> On Tue, Jul 31, 2018 at 11:07:00AM +0200, Michal Hocko wrote:
> > On Mon 30-07-18 11:01:00, Roman Gushchin wrote:
> > > For some workloads an intervention from the OOM killer
> > > can be painful. Killing a random task can bring
> > > the workload
On Tue 31-07-18 18:14:48, Roman Gushchin wrote:
> On Tue, Jul 31, 2018 at 11:07:00AM +0200, Michal Hocko wrote:
> > On Mon 30-07-18 11:01:00, Roman Gushchin wrote:
> > > For some workloads an intervention from the OOM killer
> > > can be painful. Killing a random task can bring
> > > the workload
Hi YueHaibing,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on pinctrl/devel]
[also build test ERROR on v4.18-rc7 next-20180731]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci
Hi YueHaibing,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on pinctrl/devel]
[also build test ERROR on v4.18-rc7 next-20180731]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https://github.com/0day-ci
On Tue 31-07-18 07:58:00, Shakeel Butt wrote:
> On Tue, Jul 31, 2018 at 1:45 AM Michal Hocko wrote:
> >
> > On Mon 30-07-18 11:00:58, Roman Gushchin wrote:
> > > Introduce the mem_cgroup_put() helper, which helps to eliminate guarding
> > > memcg css release with "#ifdef CONFIG_MEMCG" in multiple
On Tue 31-07-18 07:58:00, Shakeel Butt wrote:
> On Tue, Jul 31, 2018 at 1:45 AM Michal Hocko wrote:
> >
> > On Mon 30-07-18 11:00:58, Roman Gushchin wrote:
> > > Introduce the mem_cgroup_put() helper, which helps to eliminate guarding
> > > memcg css release with "#ifdef CONFIG_MEMCG" in multiple
On Tue, Jul 31, 2018 at 7:13 PM, Jason Gunthorpe wrote:
> On Tue, Jul 31, 2018 at 05:00:38PM -0700, Kees Cook wrote:
>> + /* Overflow: high bit falls off. */
>> + /* 10010110 */
>> + err |= TEST_ONE_SHIFT(150, 1, u8, 0, true);
>> + /* 1000100010010110 */
>> + err |=
On Tue, Jul 31, 2018 at 7:13 PM, Jason Gunthorpe wrote:
> On Tue, Jul 31, 2018 at 05:00:38PM -0700, Kees Cook wrote:
>> + /* Overflow: high bit falls off. */
>> + /* 10010110 */
>> + err |= TEST_ONE_SHIFT(150, 1, u8, 0, true);
>> + /* 1000100010010110 */
>> + err |=
Hi Alan Tull,
Thanks for the quick response.
Please find my Comments inline...
> -Original Message-
> From: Alan Tull [mailto:at...@kernel.org]
> Sent: Tuesday, July 31, 2018 8:52 PM
> To: Nava kishore Manne
> Cc: robh...@kernel.org; mark.rutl...@arm.com; Michal Simek
> ; Soren
Hi Alan Tull,
Thanks for the quick response.
Please find my Comments inline...
> -Original Message-
> From: Alan Tull [mailto:at...@kernel.org]
> Sent: Tuesday, July 31, 2018 8:52 PM
> To: Nava kishore Manne
> Cc: robh...@kernel.org; mark.rutl...@arm.com; Michal Simek
> ; Soren
From: Vitaly Kuznetsov Sent: Tuesday, July 31, 2018 4:20
AM
>
> Reviewed-by: Vitaly Kuznetsov
Thanks for the review
>
> Alternatively, we can get rid of synic_initialized flag altogether:
> hv_synic_init() never fails in the first place but we can always
> implement something like:
>
> int
From: Vitaly Kuznetsov Sent: Tuesday, July 31, 2018 4:20
AM
>
> Reviewed-by: Vitaly Kuznetsov
Thanks for the review
>
> Alternatively, we can get rid of synic_initialized flag altogether:
> hv_synic_init() never fails in the first place but we can always
> implement something like:
>
> int
Hi Mathieu,
All but the last 9 commits in the coresight tree have been merged into
the char-misc tree as different commits (they were sent to Greg as a
patch series rather than a merge request). Can you please rebase your
tree into commit ccff2dfaceac ("coresight: tpiu: Fix disabling timeouts")
Hi Mathieu,
All but the last 9 commits in the coresight tree have been merged into
the char-misc tree as different commits (they were sent to Greg as a
patch series rather than a merge request). Can you please rebase your
tree into commit ccff2dfaceac ("coresight: tpiu: Fix disabling timeouts")
Byungchul Park writes:
> I think rcu list also works well. But I decided to use llist because
> llist is simpler and has one less pointer.
>
> Just to be sure, let me explain my use case more:
>
>1. Introduced a global list where single linked list is sufficient.
>2. All operations I
Byungchul Park writes:
> I think rcu list also works well. But I decided to use llist because
> llist is simpler and has one less pointer.
>
> Just to be sure, let me explain my use case more:
>
>1. Introduced a global list where single linked list is sufficient.
>2. All operations I
On Tue, 31 Jul 2018 16:09:06 -0700
Nick Desaulniers wrote:
> + More maintainers and lists for visibility
>
> On Tue, Jul 31, 2018 at 3:32 PM Nick Desaulniers
> wrote:
> >
> > I'm currently looking into cleaning up the code duplication between
> > current_text_addr() and _THIS_IP_, virtually
On Tue, 31 Jul 2018 16:09:06 -0700
Nick Desaulniers wrote:
> + More maintainers and lists for visibility
>
> On Tue, Jul 31, 2018 at 3:32 PM Nick Desaulniers
> wrote:
> >
> > I'm currently looking into cleaning up the code duplication between
> > current_text_addr() and _THIS_IP_, virtually
Signed-off-by: Mike Shettel
---
.../devicetree/bindings/i3c/qcom,geni-i3c.txt | 44 ++
1 file changed, 44 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i3c/qcom,geni-i3c.txt
diff --git a/Documentation/devicetree/bindings/i3c/qcom,geni-i3c.txt
This patch series is a proposal for the I3C master driver for the
Qualcomm GENI IP. This patch is to be applied on top of the I3C
subsystem patchset v6 submitted by Boris Brezillon.
Features supported:
Regular CCC commands
I3C private transfers
I2C transfers
Features not yet supported:
Signed-off-by: Mike Shettel
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 622327b..775829c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10943,6 +10943,14 @@ L: net...@vger.kernel.org
S: Supported
F:
Signed-off-by: Mike Shettel
---
This patch is to be applied on top of the I3C subsystem patchset v6.
drivers/i3c/master/Kconfig| 13 +
drivers/i3c/master/Makefile |1 +
drivers/i3c/master/i3c-master-qcom-geni.c | 1243 +
3 files
Signed-off-by: Mike Shettel
---
.../devicetree/bindings/i3c/qcom,geni-i3c.txt | 44 ++
1 file changed, 44 insertions(+)
create mode 100644 Documentation/devicetree/bindings/i3c/qcom,geni-i3c.txt
diff --git a/Documentation/devicetree/bindings/i3c/qcom,geni-i3c.txt
This patch series is a proposal for the I3C master driver for the
Qualcomm GENI IP. This patch is to be applied on top of the I3C
subsystem patchset v6 submitted by Boris Brezillon.
Features supported:
Regular CCC commands
I3C private transfers
I2C transfers
Features not yet supported:
Signed-off-by: Mike Shettel
---
MAINTAINERS | 8
1 file changed, 8 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 622327b..775829c 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10943,6 +10943,14 @@ L: net...@vger.kernel.org
S: Supported
F:
Signed-off-by: Mike Shettel
---
This patch is to be applied on top of the I3C subsystem patchset v6.
drivers/i3c/master/Kconfig| 13 +
drivers/i3c/master/Makefile |1 +
drivers/i3c/master/i3c-master-qcom-geni.c | 1243 +
3 files
On Tue, 31 Jul 2018 19:28:49 +0100,
Mike Galbraith wrote:
Hi Mike,
>
> [1 ]
> On Mon, 2018-07-30 at 18:24 +0200, Mike Galbraith wrote:
> > On Sun, 2018-07-29 at 13:47 +0200, Mike Galbraith wrote:
> > > FYI, per kvm unit tests, 4.16-rt definitely has more kvm issues.
>
> But it's not RT, or
On Tue, 31 Jul 2018 19:28:49 +0100,
Mike Galbraith wrote:
Hi Mike,
>
> [1 ]
> On Mon, 2018-07-30 at 18:24 +0200, Mike Galbraith wrote:
> > On Sun, 2018-07-29 at 13:47 +0200, Mike Galbraith wrote:
> > > FYI, per kvm unit tests, 4.16-rt definitely has more kvm issues.
>
> But it's not RT, or
On Tue, Jul 31, 2018 at 09:46:16AM -0400, Steven Rostedt wrote:
> On Tue, 31 Jul 2018 18:38:09 +0900
> Byungchul Park wrote:
>
> > On Tue, Jul 31, 2018 at 10:52:57AM +0200, Peter Zijlstra wrote:
> > > On Tue, Jul 31, 2018 at 09:58:36AM +0900, Byungchul Park wrote:
> > > > In restrictive cases
On Tue, Jul 31, 2018 at 07:30:52AM -0700, Paul E. McKenney wrote:
> On Tue, Jul 31, 2018 at 06:29:50PM +0900, Byungchul Park wrote:
> > On Mon, Jul 30, 2018 at 09:30:42PM -0700, Paul E. McKenney wrote:
> > > On Tue, Jul 31, 2018 at 09:58:36AM +0900, Byungchul Park wrote:
> > > > Hello folks,
> > >
On Tue, Jul 31, 2018 at 09:46:16AM -0400, Steven Rostedt wrote:
> On Tue, 31 Jul 2018 18:38:09 +0900
> Byungchul Park wrote:
>
> > On Tue, Jul 31, 2018 at 10:52:57AM +0200, Peter Zijlstra wrote:
> > > On Tue, Jul 31, 2018 at 09:58:36AM +0900, Byungchul Park wrote:
> > > > In restrictive cases
On Tue, Jul 31, 2018 at 07:30:52AM -0700, Paul E. McKenney wrote:
> On Tue, Jul 31, 2018 at 06:29:50PM +0900, Byungchul Park wrote:
> > On Mon, Jul 30, 2018 at 09:30:42PM -0700, Paul E. McKenney wrote:
> > > On Tue, Jul 31, 2018 at 09:58:36AM +0900, Byungchul Park wrote:
> > > > Hello folks,
> > >
On Wed, 1 Aug 2018 13:10:49 +0800 YueHaibing wrote:
> fixes following Smatch static check warning:
>
> drivers/pinctrl/berlin/berlin.c:237 berlin_pinctrl_build_state()
> warn: passing devm_ allocated variable to kfree. 'pctrl->functions'
>
> As we will be calling krealloc() on pointer
On Wed, 1 Aug 2018 13:10:49 +0800 YueHaibing wrote:
> fixes following Smatch static check warning:
>
> drivers/pinctrl/berlin/berlin.c:237 berlin_pinctrl_build_state()
> warn: passing devm_ allocated variable to kfree. 'pctrl->functions'
>
> As we will be calling krealloc() on pointer
fixes following Smatch static check warning:
drivers/pinctrl/berlin/berlin.c:237 berlin_pinctrl_build_state()
warn: passing devm_ allocated variable to kfree. 'pctrl->functions'
As we will be calling krealloc() on pointer 'pctrl->functions', which means
kfree() will be called in there,
fixes following Smatch static check warning:
drivers/pinctrl/berlin/berlin.c:237 berlin_pinctrl_build_state()
warn: passing devm_ allocated variable to kfree. 'pctrl->functions'
As we will be calling krealloc() on pointer 'pctrl->functions', which means
kfree() will be called in there,
Sorry, I send a wrong patch, pls ignore this.
On 2018/8/1 13:02, YueHaibing wrote:
> fixes following Smatch static check warning:
>
> drivers/pinctrl/berlin/berlin.c:237 berlin_pinctrl_build_state()
> warn: passing devm_ allocated variable to kfree. 'pctrl->functions'
>
> As we will be
Sorry, I send a wrong patch, pls ignore this.
On 2018/8/1 13:02, YueHaibing wrote:
> fixes following Smatch static check warning:
>
> drivers/pinctrl/berlin/berlin.c:237 berlin_pinctrl_build_state()
> warn: passing devm_ allocated variable to kfree. 'pctrl->functions'
>
> As we will be
fixes following Smatch static check warning:
drivers/pinctrl/berlin/berlin.c:237 berlin_pinctrl_build_state()
warn: passing devm_ allocated variable to kfree. 'pctrl->functions'
As we will be calling krealloc() on pointer 'pctrl->functions', which means
kfree() will be called in there,
fixes following Smatch static check warning:
drivers/pinctrl/berlin/berlin.c:237 berlin_pinctrl_build_state()
warn: passing devm_ allocated variable to kfree. 'pctrl->functions'
As we will be calling krealloc() on pointer 'pctrl->functions', which means
kfree() will be called in there,
On Tue, Jul 31, 2018 at 7:07 PM, Ming Lei wrote:
> On Sun, Jul 29, 2018 at 5:09 PM, Jeff Chua wrote:
>> I'm testing the USB3-to-PCI-E NVME SSD. It's works using uas module,
>> recognized it as /dev/sda.
>>
>> Since it's an USB device, the nvme-cli tools won't work, nor does
>> hdparm, as it's a
On Tue, Jul 31, 2018 at 7:07 PM, Ming Lei wrote:
> On Sun, Jul 29, 2018 at 5:09 PM, Jeff Chua wrote:
>> I'm testing the USB3-to-PCI-E NVME SSD. It's works using uas module,
>> recognized it as /dev/sda.
>>
>> Since it's an USB device, the nvme-cli tools won't work, nor does
>> hdparm, as it's a
Hi Arnaldo,
On Tue, Jul 31, 2018 at 10:59 PM, Arnaldo Carvalho de Melo
wrote:
> Em Tue, Jul 31, 2018 at 08:40:51PM +0530, Ganapatrao Kulkarni escreveu:
>> Hi Arnaldo,
>>
>> On Tue, Jul 31, 2018 at 7:58 PM, Arnaldo Carvalho de Melo
>> wrote:
>> > Em Tue, Jul 31, 2018 at 03:32:51PM +0530,
Hi Arnaldo,
On Tue, Jul 31, 2018 at 10:59 PM, Arnaldo Carvalho de Melo
wrote:
> Em Tue, Jul 31, 2018 at 08:40:51PM +0530, Ganapatrao Kulkarni escreveu:
>> Hi Arnaldo,
>>
>> On Tue, Jul 31, 2018 at 7:58 PM, Arnaldo Carvalho de Melo
>> wrote:
>> > Em Tue, Jul 31, 2018 at 03:32:51PM +0530,
Hi Wolfram,
On Tue, Jul 31, 2018 at 10:09:32PM +0200, Wolfram Sang wrote:
> Hi Manivannan,
>
> On Thu, Jul 26, 2018 at 09:16:02PM +0530, Manivannan Sadhasivam wrote:
> > Add Actions Semiconductor Owl family S900 I2C driver.
> >
> > Signed-off-by: Manivannan Sadhasivam
> > Acked-by: Peter Rosin
Hi Wolfram,
On Tue, Jul 31, 2018 at 10:09:32PM +0200, Wolfram Sang wrote:
> Hi Manivannan,
>
> On Thu, Jul 26, 2018 at 09:16:02PM +0530, Manivannan Sadhasivam wrote:
> > Add Actions Semiconductor Owl family S900 I2C driver.
> >
> > Signed-off-by: Manivannan Sadhasivam
> > Acked-by: Peter Rosin
On Wed, 01 Aug 2018 05:46:48 +0200,
kbuild test robot wrote:
>
> Hi Rohit,
>
> Thank you for the patch! Perhaps something to improve:
>
> [auto build test WARNING on asoc/for-next]
> [also build test WARNING on next-20180731]
> [cannot apply to v4.18-rc7]
>
On Wed, 01 Aug 2018 05:46:48 +0200,
kbuild test robot wrote:
>
> Hi Rohit,
>
> Thank you for the patch! Perhaps something to improve:
>
> [auto build test WARNING on asoc/for-next]
> [also build test WARNING on next-20180731]
> [cannot apply to v4.18-rc7]
>
On Tue, Jul 31, 2018 at 7:15 PM, Jason Gunthorpe wrote:
> On Tue, Jul 31, 2018 at 05:00:37PM -0700, Kees Cook wrote:
>> From: Jason Gunthorpe
>>
>> Add shift_overflow() helper to assist driver authors in ensuring that
>> shift operations don't cause overflows or other odd conditions.
>>
>>
On Tue, Jul 31, 2018 at 7:15 PM, Jason Gunthorpe wrote:
> On Tue, Jul 31, 2018 at 05:00:37PM -0700, Kees Cook wrote:
>> From: Jason Gunthorpe
>>
>> Add shift_overflow() helper to assist driver authors in ensuring that
>> shift operations don't cause overflows or other odd conditions.
>>
>>
We found the PCIe driver doesn't really work with
the mpll3 clock which is actually reserved for debug,
So drop it from the mux list.
Fixes: 33b89db68236 ("clk: meson-axg: add clocks required by pcie driver")
Tested-by: Jianxin Qin
Signed-off-by: Yixun Lan
---
hi Jerome:
I'm sorry we found
We found the PCIe driver doesn't really work with
the mpll3 clock which is actually reserved for debug,
So drop it from the mux list.
Fixes: 33b89db68236 ("clk: meson-axg: add clocks required by pcie driver")
Tested-by: Jianxin Qin
Signed-off-by: Yixun Lan
---
hi Jerome:
I'm sorry we found
On 2018/8/1 10:36, Jisheng Zhang wrote:
> Hi,
>
> On Tue, 31 Jul 2018 22:25:01 +0800 YueHaibing wrote:
>
>> fixes following Smatch static check warning:
>>
>> drivers/pinctrl/berlin/berlin.c:237 berlin_pinctrl_build_state()
>> warn: passing devm_ allocated variable to kfree. 'pctrl->functions'
On 2018/8/1 10:36, Jisheng Zhang wrote:
> Hi,
>
> On Tue, 31 Jul 2018 22:25:01 +0800 YueHaibing wrote:
>
>> fixes following Smatch static check warning:
>>
>> drivers/pinctrl/berlin/berlin.c:237 berlin_pinctrl_build_state()
>> warn: passing devm_ allocated variable to kfree. 'pctrl->functions'
On 7/31/2018 8:10 PM, Mark Brown wrote:
> On Tue, Jul 31, 2018 at 03:56:52PM +0200, Takashi Iwai wrote:
>> Mark Brown wrote:
>
>>> Yes. I'm saying that if the CPU DAI thinks it can figure out the base
>>> delay something is confused.
>
>> Then basically Akshu's patch does the correct thing,
On 7/31/2018 8:10 PM, Mark Brown wrote:
> On Tue, Jul 31, 2018 at 03:56:52PM +0200, Takashi Iwai wrote:
>> Mark Brown wrote:
>
>>> Yes. I'm saying that if the CPU DAI thinks it can figure out the base
>>> delay something is confused.
>
>> Then basically Akshu's patch does the correct thing,
Hi Rohit,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on asoc/for-next]
[also build test WARNING on next-20180731]
[cannot apply to v4.18-rc7]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https
Hi Rohit,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on asoc/for-next]
[also build test WARNING on next-20180731]
[cannot apply to v4.18-rc7]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
https
Add Reset Management Unit (RMU) support for Actions Semi S700 SoC
of the Owl family series. RMU belongs to the Owl SoCs system-controller
which also includes CMU (Clock Management Unit).
Signed-off-by: Manivannan Sadhasivam
---
drivers/reset/reset-owl.c | 33 +
1
Add Reset Management Unit (RMU) support for Actions Semi S700 SoC
of the Owl family series. RMU belongs to the Owl SoCs system-controller
which also includes CMU (Clock Management Unit).
Signed-off-by: Manivannan Sadhasivam
---
drivers/reset/reset-owl.c | 33 +
1
Add entry for Actions Semi Reset Management Unit driver and its
bindings under ARCH_ACTIONS. Currently only S700 and S900 SoCs
of the Owl family are supported.
Signed-off-by: Manivannan Sadhasivam
---
MAINTAINERS | 4
1 file changed, 4 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
Add entry for Actions Semi Reset Management Unit driver and its
bindings under ARCH_ACTIONS. Currently only S700 and S900 SoCs
of the Owl family are supported.
Signed-off-by: Manivannan Sadhasivam
---
MAINTAINERS | 4
1 file changed, 4 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
Add Reset Management Unit (RMU) support for Actions Semi S900 SoC
of the Owl family series. RMU belongs to the Owl SoCs system-controller
which also includes CMU (Clock Management Unit).
Signed-off-by: Manivannan Sadhasivam
---
drivers/reset/Kconfig | 6 ++
drivers/reset/Makefile| 1
Add Reset Management Unit (RMU) support for Actions Semi S900 SoC
of the Owl family series. RMU belongs to the Owl SoCs system-controller
which also includes CMU (Clock Management Unit).
Signed-off-by: Manivannan Sadhasivam
---
drivers/reset/Kconfig | 6 ++
drivers/reset/Makefile| 1
Add Reset Controller Unit (RMU) node under the system-controller node
for Actions Semi S900 SoC. Also add the bindings constant header to
be used by clients.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm64/boot/dts/actions/s900.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git
Add RMU (Reset Management Unit) support for the Actions Semi S700
SoC which is a part of the Actions Semi Owl family series.
Signed-off-by: Manivannan Sadhasivam
---
.../bindings/reset/actions,owl-reset.txt | 8 +++--
include/dt-bindings/reset/actions,s700-rmu.h | 34 +++
Add Reset Controller Unit (RMU) node under the system-controller node
for Actions Semi S700 SoC. Also add the bindings constant header to
be used by clients.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm64/boot/dts/actions/s700.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git
Add Reset Controller Unit (RMU) node under the system-controller node
for Actions Semi S700 SoC. Also add the bindings constant header to
be used by clients.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm64/boot/dts/actions/s700.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git
Add Reset Controller Unit (RMU) node under the system-controller node
for Actions Semi S900 SoC. Also add the bindings constant header to
be used by clients.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm64/boot/dts/actions/s900.dtsi | 6 ++
1 file changed, 6 insertions(+)
diff --git
Add RMU (Reset Management Unit) support for the Actions Semi S700
SoC which is a part of the Actions Semi Owl family series.
Signed-off-by: Manivannan Sadhasivam
---
.../bindings/reset/actions,owl-reset.txt | 8 +++--
include/dt-bindings/reset/actions,s700-rmu.h | 34 +++
Add RMU (Reset Management Unit) support for the Actions Semi S900
SoC which is a part of the Actions Semi Owl family series.
Signed-off-by: Manivannan Sadhasivam
---
.../bindings/reset/actions,owl-reset.txt | 33 ++
include/dt-bindings/reset/actions,s900-rmu.h | 65
Add RMU (Reset Management Unit) support for the Actions Semi S900
SoC which is a part of the Actions Semi Owl family series.
Signed-off-by: Manivannan Sadhasivam
---
.../bindings/reset/actions,owl-reset.txt | 33 ++
include/dt-bindings/reset/actions,s900-rmu.h | 65
Since the clock and reset management units are sharing the same memory
map, convert the Owl common clock driver to support System Controller so
that the reset driver can reuse the same memory region.
Signed-off-by: Manivannan Sadhasivam
---
drivers/clk/actions/owl-common.c | 20
Since the clock and reset management units are sharing the same memory
map, convert the Owl common clock driver to support System Controller so
that the reset driver can reuse the same memory region.
Signed-off-by: Manivannan Sadhasivam
---
drivers/clk/actions/owl-common.c | 20
Since the clock and reset management units are sharing the same memory
map, document the clock bindings to support System Controller.
Signed-off-by: Manivannan Sadhasivam
---
.../bindings/clock/actions,owl-cmu.txt| 21 +--
1 file changed, 15 insertions(+), 6 deletions(-)
Since clock and reset management units are sharing the same memory map,
Owl SoCs clock-controller nodes needs to be converted to syscon so that
the corresponding reset drivers can also reuse the same memory region.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm64/boot/dts/actions/s700.dtsi |
Since the clock and reset management units are sharing the same memory
map, document the clock bindings to support System Controller.
Signed-off-by: Manivannan Sadhasivam
---
.../bindings/clock/actions,owl-cmu.txt| 21 +--
1 file changed, 15 insertions(+), 6 deletions(-)
Since clock and reset management units are sharing the same memory map,
Owl SoCs clock-controller nodes needs to be converted to syscon so that
the corresponding reset drivers can also reuse the same memory region.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm64/boot/dts/actions/s700.dtsi |
This patchset adds Reset Controller (RMU) support for Actions Semi
Owl SoCs, S900 and S700. For the Owl SoCs, RMU's registers has been
integrated into the CMU memory map in hardware. Hence, in this patchset
the CMU driver has been converted to syscon so that the same memory map
can be resued by
This patchset adds Reset Controller (RMU) support for Actions Semi
Owl SoCs, S900 and S700. For the Owl SoCs, RMU's registers has been
integrated into the CMU memory map in hardware. Hence, in this patchset
the CMU driver has been converted to syscon so that the same memory map
can be resued by
Hi Philipp,
On Mon, Jul 30, 2018 at 12:21:52PM +0200, Philipp Zabel wrote:
> Hi Manivannan,
>
> Thank you for the patch, a few small comments below:
>
> On Sat, 2018-07-28 at 00:15 +0530, Manivannan Sadhasivam wrote:
> > Add Reset Management Unit (RMU) support for Actions Semi Owl SoCs.
> >
>
Hi Philipp,
On Mon, Jul 30, 2018 at 12:21:52PM +0200, Philipp Zabel wrote:
> Hi Manivannan,
>
> Thank you for the patch, a few small comments below:
>
> On Sat, 2018-07-28 at 00:15 +0530, Manivannan Sadhasivam wrote:
> > Add Reset Management Unit (RMU) support for Actions Semi Owl SoCs.
> >
>
Hallo, ich bin Herr Tayeb Souami, New Jersey, Vereinigte Staaten von Amerika,
Sie haben eine Wohltätigkeitsspende in Höhe von € 2.000.000,00, ich habe die
America Lotterie in Amerika im Wert von $ 315 Millionen gewonnen, und ich gebe
einen Teil davon an fünf glückliche Menschen und wohltätige
Hallo, ich bin Herr Tayeb Souami, New Jersey, Vereinigte Staaten von Amerika,
Sie haben eine Wohltätigkeitsspende in Höhe von € 2.000.000,00, ich habe die
America Lotterie in Amerika im Wert von $ 315 Millionen gewonnen, und ich gebe
einen Teil davon an fünf glückliche Menschen und wohltätige
In JFFS2, the process of creating a new file is split into two parts.
First, create the inode, name it "Part A", then create the dirent,
named it "Part B", both need reserve space. In Part A, a inode with
I_NEW state has been written in the block, we name it "block_a".
The inode I_NEW state will
In JFFS2, the process of creating a new file is split into two parts.
First, create the inode, name it "Part A", then create the dirent,
named it "Part B", both need reserve space. In Part A, a inode with
I_NEW state has been written in the block, we name it "block_a".
The inode I_NEW state will
For NAND flash chips with more than 1Gbit (e.g. MT29F2G) more than 16 bits
are necessary to address the correct page. The driver sets the address for
more than 16 bits, but it uses 16-bit arguments and variables (these are
page_id, block_id, row) to do address operations. Obviously, these
On 8/1/18 4:55 AM, Cong Wang wrote:
> On Tue, Jul 31, 2018 at 10:13 AM wrote:
>>
>> Xunlei Pang writes:
>>
>>> On 7/31/18 1:55 AM, Cong Wang wrote:
On Sun, Jul 29, 2018 at 10:29 PM Xunlei Pang
wrote:
>
> Hi Cong,
>
> On 7/28/18 8:24 AM, Cong Wang wrote:
>> Each
For NAND flash chips with more than 1Gbit (e.g. MT29F2G) more than 16 bits
are necessary to address the correct page. The driver sets the address for
more than 16 bits, but it uses 16-bit arguments and variables (these are
page_id, block_id, row) to do address operations. Obviously, these
On 8/1/18 4:55 AM, Cong Wang wrote:
> On Tue, Jul 31, 2018 at 10:13 AM wrote:
>>
>> Xunlei Pang writes:
>>
>>> On 7/31/18 1:55 AM, Cong Wang wrote:
On Sun, Jul 29, 2018 at 10:29 PM Xunlei Pang
wrote:
>
> Hi Cong,
>
> On 7/28/18 8:24 AM, Cong Wang wrote:
>> Each
On Tue, Jul 24, 2018 at 12:07:05PM +0100, Julien Thierry wrote:
> Add support for percpu_devid interrupts treated as NMIs.
>
> Percpu_devid NMIs need to be setup/torn down on each CPU they target.
>
> The same restrictions as for global NMIs still apply for percpu_devid NMIs.
>
> Signed-off-by:
On Tue, Jul 24, 2018 at 12:07:05PM +0100, Julien Thierry wrote:
> Add support for percpu_devid interrupts treated as NMIs.
>
> Percpu_devid NMIs need to be setup/torn down on each CPU they target.
>
> The same restrictions as for global NMIs still apply for percpu_devid NMIs.
>
> Signed-off-by:
On Tue, Jul 24, 2018 at 12:07:04PM +0100, Julien Thierry wrote:
Hi Julien,
Many thanks for your patchset and I apologize for the late reply. I tried
to use your patches on my own use case and I have the following
comments...
> Add functionality to allocate interrupt lines that will deliver IRQs
On Tue, Jul 24, 2018 at 12:07:04PM +0100, Julien Thierry wrote:
Hi Julien,
Many thanks for your patchset and I apologize for the late reply. I tried
to use your patches on my own use case and I have the following
comments...
> Add functionality to allocate interrupt lines that will deliver IRQs
I need your help which will be of mutual benefit, please reply for further
details. Thank You
De informatie verzonden in dit e-mailbericht is voor zover mogelijk in
overeenstemming met de waarden van OSG Sevenwolden, vertrouwelijk en is
uitsluitend bestemd voor de geadresseerde(n).
I need your help which will be of mutual benefit, please reply for further
details. Thank You
De informatie verzonden in dit e-mailbericht is voor zover mogelijk in
overeenstemming met de waarden van OSG Sevenwolden, vertrouwelijk en is
uitsluitend bestemd voor de geadresseerde(n).
On 2018/7/31 22:34, Thomas Gleixner wrote:
>
>
> On Tue, 31 Jul 2018, Thomas Gleixner wrote:
>
>> On Tue, 31 Jul 2018, Xu YiPing wrote:
>>> On 2018/7/30 19:03, Thomas Gleixner wrote:
__internal_add_timer(base, timer)
{
idx = calc_wheel_index(1, 1)
{
On 2018/7/31 22:34, Thomas Gleixner wrote:
>
>
> On Tue, 31 Jul 2018, Thomas Gleixner wrote:
>
>> On Tue, 31 Jul 2018, Xu YiPing wrote:
>>> On 2018/7/30 19:03, Thomas Gleixner wrote:
__internal_add_timer(base, timer)
{
idx = calc_wheel_index(1, 1)
{
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