2018-08-28 19:55 GMT+09:00 Arnd Bergmann :
> On Mon, Aug 27, 2018 at 10:44 PM Daniel Santos
> wrote:
>>
>> On 08/27/2018 03:09 PM, Nick Desaulniers wrote:
>> >> Now we're back to the question of "what do you mean by 'constant'"? If
>> >> you mean a C constant expression (as defined in the C
2018-08-28 19:55 GMT+09:00 Arnd Bergmann :
> On Mon, Aug 27, 2018 at 10:44 PM Daniel Santos
> wrote:
>>
>> On 08/27/2018 03:09 PM, Nick Desaulniers wrote:
>> >> Now we're back to the question of "what do you mean by 'constant'"? If
>> >> you mean a C constant expression (as defined in the C
On Mon, Aug 27, 2018 at 02:44:57PM +1000, Nicholas Piggin wrote:
> powerpc may be able to use the unmap granule thing to improve
> its page size dependent flushes, but it might prefer to go
> a different way and track start-end for different page sizes.
I don't really see how tracking multiple
On Mon, Aug 27, 2018 at 02:44:57PM +1000, Nicholas Piggin wrote:
> powerpc may be able to use the unmap granule thing to improve
> its page size dependent flushes, but it might prefer to go
> a different way and track start-end for different page sizes.
I don't really see how tracking multiple
diff --git a/Makefile b/Makefile
index 523b0d4354fb..208a813be615 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
VERSION = 4
PATCHLEVEL = 4
-SUBLEVEL = 152
+SUBLEVEL = 153
EXTRAVERSION =
NAME = Blurry Fish Butt
diff --git a/arch/x86/include/asm/mmu_context.h
diff --git a/Makefile b/Makefile
index 523b0d4354fb..208a813be615 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
VERSION = 4
PATCHLEVEL = 4
-SUBLEVEL = 152
+SUBLEVEL = 153
EXTRAVERSION =
NAME = Blurry Fish Butt
diff --git a/arch/x86/include/asm/mmu_context.h
diff --git a/Makefile b/Makefile
index 6f85cc732008..2ba32f17a470 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
VERSION = 3
PATCHLEVEL = 18
-SUBLEVEL = 119
+SUBLEVEL = 120
EXTRAVERSION =
NAME = Diseased Newt
diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi
diff --git a/Makefile b/Makefile
index 6f85cc732008..2ba32f17a470 100644
--- a/Makefile
+++ b/Makefile
@@ -1,6 +1,6 @@
VERSION = 3
PATCHLEVEL = 18
-SUBLEVEL = 119
+SUBLEVEL = 120
EXTRAVERSION =
NAME = Diseased Newt
diff --git a/arch/arm/boot/dts/am3517.dtsi b/arch/arm/boot/dts/am3517.dtsi
I'm announcing the release of the 4.4.153 kernel.
All users of the 4.4 kernel series must upgrade.
The updated 4.4.y git tree can be found at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git
linux-4.4.y
and can be browsed at the normal kernel.org git web browser:
I'm announcing the release of the 4.4.153 kernel.
All users of the 4.4 kernel series must upgrade.
The updated 4.4.y git tree can be found at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git
linux-4.4.y
and can be browsed at the normal kernel.org git web browser:
I'm announcing the release of the 3.18.120 kernel.
All users of the 3.18 kernel series must upgrade.
The updated 3.18.y git tree can be found at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git
linux-3.18.y
and can be browsed at the normal kernel.org git web
I'm announcing the release of the 3.18.120 kernel.
All users of the 3.18 kernel series must upgrade.
The updated 3.18.y git tree can be found at:
git://git.kernel.org/pub/scm/linux/kernel/git/stable/linux-stable.git
linux-3.18.y
and can be browsed at the normal kernel.org git web
Create an entry for the TSENS drivers and mark them as maintained
Signed-off-by: Amit Kucheria
Reviewed-by: Matthias Kaehlcke
Acked-by: Rajendra Nayak
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index a5b256b25905..b8c96e0699c9 100644
Create an entry for the TSENS drivers and mark them as maintained
Signed-off-by: Amit Kucheria
Reviewed-by: Matthias Kaehlcke
Acked-by: Rajendra Nayak
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index a5b256b25905..b8c96e0699c9 100644
The SROT registers are initialised by the secure firmware at boot. We
don't have write access to the registers. Check if the block is enabled
before continuing.
Signed-off-by: Amit Kucheria
Reviewed-by: Matthias Kaehlcke
---
drivers/thermal/qcom/tsens-common.c | 17 +
1 file
The SROT registers are initialised by the secure firmware at boot. We
don't have write access to the registers. Check if the block is enabled
before continuing.
Signed-off-by: Amit Kucheria
Reviewed-by: Matthias Kaehlcke
---
drivers/thermal/qcom/tsens-common.c | 17 +
1 file
The TSENS drivers use a GPL-2.0 license. Replace with equivalent SPDX
tags and delete the full license text.
Signed-off-by: Amit Kucheria
Reviewed-by: Matthias Kaehlcke
---
drivers/thermal/qcom/tsens-8916.c | 11 +--
drivers/thermal/qcom/tsens-8960.c | 11 +--
The hw_id field in 'struct tsens_sensor' can do the job of tracking
unique ids for each sensor connected to each tsens device instance. It
also allows hw_ids to be overridden (e.g. 8916) in cases where some
sensors in a sequence are disabled on a particular platform.
Use the hw_id field instead
c(1) + x(1) was actually meant to be c(1) * x(1).
Signed-off-by: Amit Kucheria
Reviewed-by: Matthias Kaehlcke
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/thermal/thermal.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Instead of showing up as thermal-sensor@, the nodes will show up as
tsens0_tm, tsen1_tm, tsens1_srot, etc. in /proc/iomem making it easier to
read.
IOW,
0c222000-0c2221fe : thermal-sensor@c263000
0c223000-0c2231fe : thermal-sensor@c265000
0c263000-0c2631fe : thermal-sensor@c263000
The TSENS drivers use a GPL-2.0 license. Replace with equivalent SPDX
tags and delete the full license text.
Signed-off-by: Amit Kucheria
Reviewed-by: Matthias Kaehlcke
---
drivers/thermal/qcom/tsens-8916.c | 11 +--
drivers/thermal/qcom/tsens-8960.c | 11 +--
The hw_id field in 'struct tsens_sensor' can do the job of tracking
unique ids for each sensor connected to each tsens device instance. It
also allows hw_ids to be overridden (e.g. 8916) in cases where some
sensors in a sequence are disabled on a particular platform.
Use the hw_id field instead
c(1) + x(1) was actually meant to be c(1) * x(1).
Signed-off-by: Amit Kucheria
Reviewed-by: Matthias Kaehlcke
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/thermal/thermal.txt | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Instead of showing up as thermal-sensor@, the nodes will show up as
tsens0_tm, tsen1_tm, tsens1_srot, etc. in /proc/iomem making it easier to
read.
IOW,
0c222000-0c2221fe : thermal-sensor@c263000
0c223000-0c2231fe : thermal-sensor@c265000
0c263000-0c2631fe : thermal-sensor@c263000
On platforms whose device trees specify two address spaces for TSENS, the
second one points to the SROT registers. Initialise the SROT map on those
platforms.
Signed-off-by: Amit Kucheria
Reviewed-by: Matthias Kaehlcke
---
drivers/thermal/qcom/tsens-common.c | 14 --
On platforms whose device trees specify two address spaces for TSENS, the
second one points to the SROT registers. Initialise the SROT map on those
platforms.
Signed-off-by: Amit Kucheria
Reviewed-by: Matthias Kaehlcke
---
drivers/thermal/qcom/tsens-common.c | 14 --
The TSENS driver currently only uses a limited set of registers from the TM
address space. So it was ok to map just that set of registers and call it
"map".
We'd now like to map a second set: SROT registers to introduce new
functionality. Rename the "map" field to a more appropriate "tm_map".
hw_id is dynamically allocated but not used anywhere. Get rid of dead
code.
Signed-off-by: Amit Kucheria
Reviewed-by: Matthias Kaehlcke
---
drivers/thermal/qcom/tsens.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c
index
The TSENS driver currently only uses a limited set of registers from the TM
address space. So it was ok to map just that set of registers and call it
"map".
We'd now like to map a second set: SROT registers to introduce new
functionality. Rename the "map" field to a more appropriate "tm_map".
hw_id is dynamically allocated but not used anywhere. Get rid of dead
code.
Signed-off-by: Amit Kucheria
Reviewed-by: Matthias Kaehlcke
---
drivers/thermal/qcom/tsens.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/drivers/thermal/qcom/tsens.c b/drivers/thermal/qcom/tsens.c
index
This new property allows the number of sensors to be configured from DT
instead of being hardcoded in platform data. Use it.
Signed-off-by: Amit Kucheria
Reviewed-by: Matthias Kaehlcke
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 1 +
arch/arm64/boot/dts/qcom/msm8916.dtsi | 1 +
2 files
This new property allows the number of sensors to be configured from DT
instead of being hardcoded in platform data. Use it.
Signed-off-by: Amit Kucheria
Reviewed-by: Matthias Kaehlcke
---
arch/arm/boot/dts/qcom-msm8974.dtsi | 1 +
arch/arm64/boot/dts/qcom/msm8916.dtsi | 1 +
2 files
We've earlier added support to split the register address space into TM
and SROT regions.
Split up the regmap address space into two for the remaining platforms
that have a similar register layout and make corresponding changes to
the get_temp_common() function used by these platforms.
Since
We've earlier added support to split the register address space into TM
and SROT regions.
Split up the regmap address space into two for the remaining platforms
that have a similar register layout and make corresponding changes to
the get_temp_common() function used by these platforms.
Since
This is another series of tsens cleanups before we add interrupt support. This
applies on top of 4.19-rc1.
In this series, we have the following:
- splitup 8916 and 8974 register address spaces for SROT and TM
- cleanups: move to spdx, dead code removal, removal of id field
- Add support to map
This is another series of tsens cleanups before we add interrupt support. This
applies on top of 4.19-rc1.
In this series, we have the following:
- splitup 8916 and 8974 register address spaces for SROT and TM
- cleanups: move to spdx, dead code removal, removal of id field
- Add support to map
Hi Stephen,
On Tue, Aug 21, 2018 at 10:31 AM Stephen Rothwell wrote:
> On Tue, 21 Aug 2018 10:08:54 +0200 Geert Uytterhoeven
> wrote:
> > To obey sorting rules, the CIRRUS LOGIC entry should be before the CLANG
> > entry.
> > Upon closer look, it should be inserted before the CISCO entries,
Hi Stephen,
On Tue, Aug 21, 2018 at 10:31 AM Stephen Rothwell wrote:
> On Tue, 21 Aug 2018 10:08:54 +0200 Geert Uytterhoeven
> wrote:
> > To obey sorting rules, the CIRRUS LOGIC entry should be before the CLANG
> > entry.
> > Upon closer look, it should be inserted before the CISCO entries,
To preserve alphabetical sort order.
Fixes: 97c2b5cba2044f1c ("mfd: madera: Add register definitions for Cirrus
Logic Madera codecs")
Signed-off-by: Geert Uytterhoeven
---
MAINTAINERS | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git
To preserve alphabetical sort order.
Fixes: 97c2b5cba2044f1c ("mfd: madera: Add register definitions for Cirrus
Logic Madera codecs")
Signed-off-by: Geert Uytterhoeven
---
MAINTAINERS | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git
It seems gpiolib only allows user to request either the line handle descriptor
or the line event descriptor, but not both at the same time.
gpiohandle_request hr;
gpioevent_request er;
...
ioctl(fd, GPIO_GET_LINEHANDLE_IOCTL, ); // so far so good
ioctl(fd, GPIO_GET_LINEEVENT_IOCTL, ); //
It seems gpiolib only allows user to request either the line handle descriptor
or the line event descriptor, but not both at the same time.
gpiohandle_request hr;
gpioevent_request er;
...
ioctl(fd, GPIO_GET_LINEHANDLE_IOCTL, ); // so far so good
ioctl(fd, GPIO_GET_LINEEVENT_IOCTL, ); //
On Tue, 28 Aug 2018 21:21:48 +0800
Liang Yang wrote:
> Hi Boris,
>
> On 8/24/2018 8:48 PM, Boris Brezillon wrote:
> > On Wed, 22 Aug 2018 22:08:42 +0800
> > Liang Yang wrote:
> >
> >>> You have to wait tWB, that's for sure.
> >>>
> >> we have a maximum 32 commands fifo. when command
On Tue, 28 Aug 2018 21:21:48 +0800
Liang Yang wrote:
> Hi Boris,
>
> On 8/24/2018 8:48 PM, Boris Brezillon wrote:
> > On Wed, 22 Aug 2018 22:08:42 +0800
> > Liang Yang wrote:
> >
> >>> You have to wait tWB, that's for sure.
> >>>
> >> we have a maximum 32 commands fifo. when command
On Tue, 28 Aug 2018 21:21:16 +0800
Liu Xiang wrote:
> If the size of spi-nor flash is larger than 16MB, the read_opcode
> is set to SPINOR_OP_READ_1_1_4_4B, and fsl_qspi_get_seqid() will
> return -EINVAL when cmd is SPINOR_OP_READ_1_1_4_4B. This can
> cause read operation fail.
>
> ---
> v2:
>
On Tue, 28 Aug 2018 21:21:16 +0800
Liu Xiang wrote:
> If the size of spi-nor flash is larger than 16MB, the read_opcode
> is set to SPINOR_OP_READ_1_1_4_4B, and fsl_qspi_get_seqid() will
> return -EINVAL when cmd is SPINOR_OP_READ_1_1_4_4B. This can
> cause read operation fail.
>
> ---
> v2:
>
If the size of spi-nor flash is larger than 16MB, the read_opcode
is set to SPINOR_OP_READ_1_1_4_4B, and fsl_qspi_get_seqid() will
return -EINVAL when cmd is SPINOR_OP_READ_1_1_4_4B. This can
cause read operation fail.
---
v2:
add Fixes tag and CC stable suggested by Boris.
---
Fixes:
Hi Boris,
On 8/24/2018 8:48 PM, Boris Brezillon wrote:
On Wed, 22 Aug 2018 22:08:42 +0800
Liang Yang wrote:
You have to wait tWB, that's for sure.
we have a maximum 32 commands fifo. when command is written into
NFC_REG_CMD, it doesn't mean that command is executing right now, maybe
it
Hi Boris,
On 8/24/2018 8:48 PM, Boris Brezillon wrote:
On Wed, 22 Aug 2018 22:08:42 +0800
Liang Yang wrote:
You have to wait tWB, that's for sure.
we have a maximum 32 commands fifo. when command is written into
NFC_REG_CMD, it doesn't mean that command is executing right now, maybe
it
If the size of spi-nor flash is larger than 16MB, the read_opcode
is set to SPINOR_OP_READ_1_1_4_4B, and fsl_qspi_get_seqid() will
return -EINVAL when cmd is SPINOR_OP_READ_1_1_4_4B. This can
cause read operation fail.
---
v2:
add Fixes tag and CC stable suggested by Boris.
---
Fixes:
On Tue, Aug 28, 2018 at 6:27 PM Arnd Bergmann wrote:
>
> On Tue, Aug 28, 2018 at 2:42 PM Sunil Kovvuri wrote:
> >
> > On Tue, Aug 28, 2018 at 5:39 PM Arnd Bergmann wrote:
> > >
> > > On Tue, Aug 28, 2018 at 12:58 PM wrote:
> > > >
> > > > From: Geetha sowjanya
> > > >
> > > > HW interprets
On Tue, Aug 28, 2018 at 6:27 PM Arnd Bergmann wrote:
>
> On Tue, Aug 28, 2018 at 2:42 PM Sunil Kovvuri wrote:
> >
> > On Tue, Aug 28, 2018 at 5:39 PM Arnd Bergmann wrote:
> > >
> > > On Tue, Aug 28, 2018 at 12:58 PM wrote:
> > > >
> > > > From: Geetha sowjanya
> > > >
> > > > HW interprets
On 8/27/2018 9:45 PM, Steven Rostedt wrote:
On Sat, 25 Aug 2018 12:54:07 +0530
Sai Prakash Ranjan wrote:
Ftrace does not trace __raw{read,write}{b,l,w,q}() functions. I am not
sure why and how it is filtered out because I do not see any notrace
flag in those functions, maybe that whole
On 8/27/2018 9:45 PM, Steven Rostedt wrote:
On Sat, 25 Aug 2018 12:54:07 +0530
Sai Prakash Ranjan wrote:
Ftrace does not trace __raw{read,write}{b,l,w,q}() functions. I am not
sure why and how it is filtered out because I do not see any notrace
flag in those functions, maybe that whole
On Mon, 2018-08-27 at 13:47 -0400, Jeff Layton wrote:
> POSIX mandates that open fds and their associated file locks should be
> preserved across an execve. This works, unless the process is
> multithreaded at the time that execve is called.
>
> In that case, we'll end up unsharing the
On Mon, 2018-08-27 at 13:47 -0400, Jeff Layton wrote:
> POSIX mandates that open fds and their associated file locks should be
> preserved across an execve. This works, unless the process is
> multithreaded at the time that execve is called.
>
> In that case, we'll end up unsharing the
On Mon, Aug 27, 2018 at 09:53:41AM +0200, Peter Zijlstra wrote:
> On Fri, Aug 24, 2018 at 04:52:44PM +0100, Will Deacon wrote:
> > +static inline unsigned long tlb_get_unmap_granule(struct mmu_gather *tlb)
> > +{
> > + if (tlb->cleared_ptes)
> > + return PAGE_SIZE;
> > + if
On Mon, Aug 27, 2018 at 09:53:41AM +0200, Peter Zijlstra wrote:
> On Fri, Aug 24, 2018 at 04:52:44PM +0100, Will Deacon wrote:
> > +static inline unsigned long tlb_get_unmap_granule(struct mmu_gather *tlb)
> > +{
> > + if (tlb->cleared_ptes)
> > + return PAGE_SIZE;
> > + if
> > > If this is a regular PCI ethernet driver, why do you put it into
> > > driver/soc
> > > rather than drivers/net/ethernet/ ?
> >
> > No, this is not a ethernet driver, as mentioned in the cover letter
> > this driver and AF driver doesn't
> > handle any IO. There will be a separate ethernet
The Cirrus Logic Madera codecs (Cirrus Logic CS47L35/85/90/91 and WM1840)
are highly complex devices containing up to 7 programmable DSPs and many
other internal sources of interrupts plus a number of GPIOs that can be
used as interrupt inputs. The large number (>150) of internal interrupt
sources
> > > If this is a regular PCI ethernet driver, why do you put it into
> > > driver/soc
> > > rather than drivers/net/ethernet/ ?
> >
> > No, this is not a ethernet driver, as mentioned in the cover letter
> > this driver and AF driver doesn't
> > handle any IO. There will be a separate ethernet
The Cirrus Logic Madera codecs (Cirrus Logic CS47L35/85/90/91 and WM1840)
are highly complex devices containing up to 7 programmable DSPs and many
other internal sources of interrupts plus a number of GPIOs that can be
used as interrupt inputs. The large number (>150) of internal interrupt
sources
Put the pointer to struct regmap_irq_chip_data into the parent
mfd structure so that the child irqchip driver does not need
a trivial private structure to store only this pointer. As
the irqchip child driver already has a pointer to the parent
struct madera it can use that to store the pointer.
Put the pointer to struct regmap_irq_chip_data into the parent
mfd structure so that the child irqchip driver does not need
a trivial private structure to store only this pointer. As
the irqchip child driver already has a pointer to the parent
struct madera it can use that to store the pointer.
On 27/08/18 17:26, Richard Fitzgerald wrote:
The Cirrus Logic Madera codecs (Cirrus Logic CS47L35/85/90/91 and WM1840)
are highly complex devices containing up to 7 programmable DSPs and many
other internal sources of interrupts plus a number of GPIOs that can be
used as interrupt inputs. The
On 27/08/18 17:26, Richard Fitzgerald wrote:
The Cirrus Logic Madera codecs (Cirrus Logic CS47L35/85/90/91 and WM1840)
are highly complex devices containing up to 7 programmable DSPs and many
other internal sources of interrupts plus a number of GPIOs that can be
used as interrupt inputs. The
On Tue, Aug 28, 2018 at 12:36:22PM +, Ahmed S. Darwish wrote:
> On Tue, Aug 28, 2018 at 02:15:01AM +0300, Alexey Dobriyan wrote:
> > ---
> > fs/proc/base.c | 8
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
>
> Missing description and S-o-b. Further comments below..
>
> >
On Tue, Aug 28, 2018 at 12:36:22PM +, Ahmed S. Darwish wrote:
> On Tue, Aug 28, 2018 at 02:15:01AM +0300, Alexey Dobriyan wrote:
> > ---
> > fs/proc/base.c | 8
> > 1 file changed, 4 insertions(+), 4 deletions(-)
> >
>
> Missing description and S-o-b. Further comments below..
>
> >
> -Original Message-
> From: Vinod
> Sent: Tuesday, August 21, 2018 9:20 PM
> To: Radhey Shyam Pandey
> Cc: dan.j.willi...@intel.com; Michal Simek ; Appana
> Durga Kedareswara Rao ; l...@metafoo.de;
> dmaeng...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
>
> -Original Message-
> From: Vinod
> Sent: Tuesday, August 21, 2018 9:20 PM
> To: Radhey Shyam Pandey
> Cc: dan.j.willi...@intel.com; Michal Simek ; Appana
> Durga Kedareswara Rao ; l...@metafoo.de;
> dmaeng...@vger.kernel.org; linux-arm-ker...@lists.infradead.org; linux-
>
On Fri, Aug 24, 2018 at 07:56:09PM +0200, Peter Zijlstra wrote:
> On Fri, Aug 24, 2018 at 04:52:37PM +0100, Will Deacon wrote:
> > __flush_tlb_[kernel_]pgtable() rely on set_pXd() having a DSB after
> > writing the new table entry and therefore avoid the barrier prior to the
> > TLBI instruction.
On Fri, Aug 24, 2018 at 07:56:09PM +0200, Peter Zijlstra wrote:
> On Fri, Aug 24, 2018 at 04:52:37PM +0100, Will Deacon wrote:
> > __flush_tlb_[kernel_]pgtable() rely on set_pXd() having a DSB after
> > writing the new table entry and therefore avoid the barrier prior to the
> > TLBI instruction.
From: Colin Ian King
Variable ret is being assigned but is never used hence it is
redundant and can be removed.
Cleans up clang warning:
warning: variable ‘ret’ set but not used [-Wunused-but-set-variable]
Signed-off-by: Colin Ian King
---
fs/afs/server.c | 3 +--
1 file changed, 1
Populate PWM mode in of_xlate function to avoid pwm_apply_state() failure.
Signed-off-by: Claudiu Beznea
---
drivers/pwm/pwm-cros-ec.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pwm/pwm-cros-ec.c b/drivers/pwm/pwm-cros-ec.c
index 9c13694eaa24..78d28d60a468 100644
---
From: Colin Ian King
Variable ret is being assigned but is never used hence it is
redundant and can be removed.
Cleans up clang warning:
warning: variable ‘ret’ set but not used [-Wunused-but-set-variable]
Signed-off-by: Colin Ian King
---
fs/afs/server.c | 3 +--
1 file changed, 1
Populate PWM mode in of_xlate function to avoid pwm_apply_state() failure.
Signed-off-by: Claudiu Beznea
---
drivers/pwm/pwm-cros-ec.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pwm/pwm-cros-ec.c b/drivers/pwm/pwm-cros-ec.c
index 9c13694eaa24..78d28d60a468 100644
---
On Tue, 2018-08-28 at 11:07 +0100, Lorenzo Pieralisi wrote:
> On Mon, Aug 27, 2018 at 02:28:37PM +0300, Leonard Crestez wrote:
> > On imx7d the pcie-phy power domain is turned off in suspend and this can
> > make the system hang after resume when attempting any read from PCI.
> >
> > Fix this by
On Tue, 2018-08-28 at 11:07 +0100, Lorenzo Pieralisi wrote:
> On Mon, Aug 27, 2018 at 02:28:37PM +0300, Leonard Crestez wrote:
> > On imx7d the pcie-phy power domain is turned off in suspend and this can
> > make the system hang after resume when attempting any read from PCI.
> >
> > Fix this by
Hello dear.
It is wonderful to contact you, I want us to have correspondence. I
wish you will have the desire so that we can get acquainted to each
other. Life itself is a mystery, you never know where it might lead
you.
I'm Aisha.gaddafi, the only biological douther of Qi,muamar gaddafi of
Hello dear.
It is wonderful to contact you, I want us to have correspondence. I
wish you will have the desire so that we can get acquainted to each
other. Life itself is a mystery, you never know where it might lead
you.
I'm Aisha.gaddafi, the only biological douther of Qi,muamar gaddafi of
On Tue, Aug 28, 2018 at 2:42 PM Sunil Kovvuri wrote:
>
> On Tue, Aug 28, 2018 at 5:39 PM Arnd Bergmann wrote:
> >
> > On Tue, Aug 28, 2018 at 12:58 PM wrote:
> > >
> > > From: Geetha sowjanya
> > >
> > > HW interprets RVU_AF_MSIXTR_BASE address as an IOVA, hence
> > > create a IOMMU mapping
On Tue, Aug 28, 2018 at 2:42 PM Sunil Kovvuri wrote:
>
> On Tue, Aug 28, 2018 at 5:39 PM Arnd Bergmann wrote:
> >
> > On Tue, Aug 28, 2018 at 12:58 PM wrote:
> > >
> > > From: Geetha sowjanya
> > >
> > > HW interprets RVU_AF_MSIXTR_BASE address as an IOVA, hence
> > > create a IOMMU mapping
On Thu, Aug 23, 2018 at 08:20:36PM +0530, Kedareswararao Appana wrote:
> On arm64 platform I have booted Linux only with > 32-bit
> Address i.e from 0x8 (reg = <0x8 0x 0x0 0x8000>)
So you have 2GB of RAM starting at 0x8__.
> In my driver, I am using
With kernel 4.19.0-rc1 virtio_console hangs very often.
I can always trigger the bug by pasting some characters in the
terminal window, the console will stop receiving keypresses, but I can
still see output from the console.
Stangely, logging in the VM via SSH and sending lot of data to hvc0,
like
On Thu, Aug 23, 2018 at 08:20:36PM +0530, Kedareswararao Appana wrote:
> On arm64 platform I have booted Linux only with > 32-bit
> Address i.e from 0x8 (reg = <0x8 0x 0x0 0x8000>)
So you have 2GB of RAM starting at 0x8__.
> In my driver, I am using
With kernel 4.19.0-rc1 virtio_console hangs very often.
I can always trigger the bug by pasting some characters in the
terminal window, the console will stop receiving keypresses, but I can
still see output from the console.
Stangely, logging in the VM via SSH and sending lot of data to hvc0,
like
On Tue, Aug 28, 2018 at 1:33 PM Andrey Ryabinin wrote:
> On 08/28/2018 01:38 PM, Jann Horn wrote:
> >> Why this has to be done in the rewind_stack_do_exit()?
> >> Are there any problems with calling the kasan_unpoison_task_stack(current)
> >> from oops_end(), before the rewind_stack_do_exit()?
>
On Tue, Aug 28, 2018 at 1:33 PM Andrey Ryabinin wrote:
> On 08/28/2018 01:38 PM, Jann Horn wrote:
> >> Why this has to be done in the rewind_stack_do_exit()?
> >> Are there any problems with calling the kasan_unpoison_task_stack(current)
> >> from oops_end(), before the rewind_stack_do_exit()?
>
Hi Linus,
On Fri, Aug 24, 2018 at 09:15:17AM -0700, Linus Torvalds wrote:
> On Fri, Aug 24, 2018 at 8:52 AM Will Deacon wrote:
> >
> > Now that our walk-cache invalidation routines imply a DSB before the
> > invalidation, we no longer need one when we are clearing an entry during
> > unmap.
>
>
On Tue, Aug 28, 2018 at 2:30 PM Sunil Kovvuri wrote:
>
> On Tue, Aug 28, 2018 at 5:40 PM Arnd Bergmann wrote:
> >
> > On Tue, Aug 28, 2018 at 12:58 PM wrote:
> > >
> > > From: Sunil Goutham
> > >
> > > This patch adds basic template for Marvell OcteonTX2's
> > > CGX ethernet interface driver.
Hi Linus,
On Fri, Aug 24, 2018 at 09:15:17AM -0700, Linus Torvalds wrote:
> On Fri, Aug 24, 2018 at 8:52 AM Will Deacon wrote:
> >
> > Now that our walk-cache invalidation routines imply a DSB before the
> > invalidation, we no longer need one when we are clearing an entry during
> > unmap.
>
>
On Tue, Aug 28, 2018 at 2:30 PM Sunil Kovvuri wrote:
>
> On Tue, Aug 28, 2018 at 5:40 PM Arnd Bergmann wrote:
> >
> > On Tue, Aug 28, 2018 at 12:58 PM wrote:
> > >
> > > From: Sunil Goutham
> > >
> > > This patch adds basic template for Marvell OcteonTX2's
> > > CGX ethernet interface driver.
On Tue, Aug 28, 2018 at 5:33 PM Arnd Bergmann wrote:
>
> On Tue, Aug 28, 2018 at 12:57 PM wrote:
> >
> > From: Aleksey Makarov
> >
> > This patch adds mailbox support infrastructure APIs.
> > Each RVU device has a dedicated 64KB mailbox region
> > shared with it's peer for communication. RVU AF
On Tue, Aug 28, 2018 at 5:33 PM Arnd Bergmann wrote:
>
> On Tue, Aug 28, 2018 at 12:57 PM wrote:
> >
> > From: Aleksey Makarov
> >
> > This patch adds mailbox support infrastructure APIs.
> > Each RVU device has a dedicated 64KB mailbox region
> > shared with it's peer for communication. RVU AF
On Tue, Aug 28, 2018 at 08:02:37AM +0200, Juergen Gross wrote:
> On 28/08/18 07:13, Greg Kroah-Hartman wrote:
> > On Mon, Aug 27, 2018 at 02:40:09PM -0700, Nick Desaulniers wrote:
> >> Fixes commit 208cbb325589 ("x86/irqflags: Provide a declaration for
> >> native_save_fl")
> >>
> >> This should
On Tue, Aug 28, 2018 at 08:02:37AM +0200, Juergen Gross wrote:
> On 28/08/18 07:13, Greg Kroah-Hartman wrote:
> > On Mon, Aug 27, 2018 at 02:40:09PM -0700, Nick Desaulniers wrote:
> >> Fixes commit 208cbb325589 ("x86/irqflags: Provide a declaration for
> >> native_save_fl")
> >>
> >> This should
On Tue, Aug 28, 2018 at 5:39 PM Arnd Bergmann wrote:
>
> On Tue, Aug 28, 2018 at 12:58 PM wrote:
> >
> > From: Geetha sowjanya
> >
> > HW interprets RVU_AF_MSIXTR_BASE address as an IOVA, hence
> > create a IOMMU mapping for the physcial address configured by
> > firmware and reconfig
On Tue, Aug 28, 2018 at 5:39 PM Arnd Bergmann wrote:
>
> On Tue, Aug 28, 2018 at 12:58 PM wrote:
> >
> > From: Geetha sowjanya
> >
> > HW interprets RVU_AF_MSIXTR_BASE address as an IOVA, hence
> > create a IOMMU mapping for the physcial address configured by
> > firmware and reconfig
Hello,
I have a 3ware 9650SE RAID-Controller with 20 LUNs. Using an unpachted
kernel (no matter which version, e.g., 4.12.14) , only 17 LUNs are shown.
The problem is that the driver was once written for a 3ware 9550SE
RAID-Controlle that supports only 16 LUNs.
There are some changes in driver
Hello,
I have a 3ware 9650SE RAID-Controller with 20 LUNs. Using an unpachted
kernel (no matter which version, e.g., 4.12.14) , only 17 LUNs are shown.
The problem is that the driver was once written for a 3ware 9550SE
RAID-Controlle that supports only 16 LUNs.
There are some changes in driver
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