Hi Andy,
I am resurrecting this thread now that ACPICA seemed to finally have
fixed the bug that prevent the driver to work.
The patch I submitted was reverted shortly after, which lead me to
ignore this review until ACPICA was fixed. It took a lot of effort
from Hans to have a fix accepted, so no
kbuild test robot writes:
> Hi Robert,
>
> I love your patch! Yet something to improve:
This is because you are missing at least this patch submitted earlier :
- [PATCH] ARM: dts: pxa: add pincontrol helpers
You're also missing the previous patches in the pxa/dt tree, which are already
on the t
On Fri, 31 Aug 2018, Andrea Parri wrote:
> On Thu, Aug 30, 2018 at 05:31:32PM -0400, Alan Stern wrote:
> > On Thu, 30 Aug 2018, Andrea Parri wrote:
> >
> > > > All the architectures supported by the Linux kernel (including RISC-V)
> > > > do provide this ordering for locks, albeit for varying rea
From: Andreas Dannenberg
The TAS5722 supports modifying volume in 0.25dB steps (as opposed to
0.5dB steps on the TAS5720). Introduce a custom mixer control that
allows taking advantage of this finer output volume granularity.
Also add custom getters/setters for access as the TAS5722 digital volu
From: Andreas Dannenberg
Unlike the TAS5720, the TAS5722 can be configured to utilize 16-bit wide
slots in TDM mode. This can help easing audio clocking/frequency
requirements.
Signed-off-by: Andreas Dannenberg
Signed-off-by: Andrew F. Davis
---
Changes from v1:
- Use switch over if
sound/
2018-08-30 18:18 GMT+09:00 Lukas Bulwahn :
> The self assignment was probably introduced by an automated code
> refactoring in
> commit 694c49a7c01c ("kconfig: drop localization support").
>
> The issue was identified by a self-assign warning when running
> make menuconfig with clang.
>
> Signed-of
On Fri, 31 Aug 2018 at 16:41, Peter Zijlstra wrote:
>
> On Fri, Aug 31, 2018 at 03:58:28PM +0200, Vincent Guittot wrote:
> > update_blocked_averages() is called to periodiccally decay the stalled load
> > of idle CPUs and to sync all loads before running load balance.
> >
> > When cfs rq is idle,
On Fri, 31 Aug 2018 14:42:00 +0100
Robert Walker wrote:
> Generally, I agree with you about breaking backward compatibility, but
> in this case I don't think there is an actual problem. As I understand
I consider it a serious problem.
> it, you're worried that perf will break for people who
On Fri, Aug 31, 2018 at 03:58:28PM +0200, Vincent Guittot wrote:
> update_blocked_averages() is called to periodiccally decay the stalled load
> of idle CPUs and to sync all loads before running load balance.
>
> When cfs rq is idle, it trigs a load balance during pick_next_task_fair()
> in order
Hi Wolfram,
2018-08-31 18:53 GMT+09:00 Wolfram Sang :
>
>> The problem is, my driver is forcibly setting
>> STOP condition unless the next message is read.
>
> This likely is a problem.
Oh, my drivers were wrong from the beginning.
I've sent patches.
> In Linux I2C terminology, a transfer is
On Fri, Aug 31, 2018 at 03:26:24PM +0200, Jann Horn wrote:
>
> By the way, here are all 60 probe_kernel_read() callers:
...
> 41 of these (or something like that, I counted by hand) have some sort
> of cast in the call expression.
> probe_kernel_read() is kinda special in that expected types fo
This driver currently emits a STOP if the next message is not
I2C_MD_RD. It should not do it because it disturbs the I2C_RDWR
ioctl, where read/write transactions are combined without STOP
between.
Issue STOP only when the message is the last one _or_ flagged with
I2C_M_STOP.
Fixes: 6a62974b667f
This driver currently emits a STOP if the next message is not
I2C_MD_RD. It should not do it because it disturbs the I2C_RDWR
ioctl, where read/write transactions are combined without STOP
between.
Issue STOP only when the message is the last one _or_ flagged with
I2C_M_STOP.
Fixes: dd6fd4a32793
On Thu, Aug 30, 2018 at 7:55 PM Sunil Kovvuri wrote:
> On Thu, Aug 30, 2018 at 7:37 PM Arnd Bergmann wrote:
> > On Tue, Aug 28, 2018 at 3:10 PM Sunil Kovvuri
> > wrote:
> > Ok, I think I understand the PF/VF distinction now. One (to me)
> > surprising aspect here is that you not just have one p
On Fri, Aug 31, 2018 at 12:35 AM Igor Stoppa wrote:
>
> In some cases, checks that are expected to not fail, do not take advantage
> of specifying that the condition being tested is unlikely().
>
> Ex:
>
> #define assert(condition)
> ...
> if (!(condition))
> error_action()
Behaves the same as (devm_)clk_get except where there is no clock
producer. In this case, instead of returning -ENOENT, the function
returns NULL. This makes error checking simpler and allows
clk_prepare_enable, etc to be called on the returned reference
without additional checks.
Signed-off-by: P
Quite a few drivers get an optional clock, e.g. a clock required
to access peripheral's registers that is always enabled on some
devices.
This function behaves the same as of_clk_get_by_name() except that
it will return NULL instead of -ENOENT.
Signed-off-by: Phil Edworthy
---
v5:
- Simplified
Quite a few drivers get an optional clock, e.g. a bus clock required to
access peripheral's registers that is always enabled on some devices.
Phil Edworthy (2):
clk: Add of_clk_get_by_name_optional() function
clk: Add functions to get optional clocks
drivers/clk/clk-devres.c | 18 ++
On Fri, 2018-08-31 at 01:34 +0300, Igor Stoppa wrote:
> Typically the assert is expected to not fail.
>
> Signed-off-by: Igor Stoppa
> Cc: Chien Tung
> Cc: Roland Dreier
> Cc: Faisal Latif
> Cc: Doug Ledford
> Cc: Jason Gunthorpe
Acked-by: Doug Ledford
> ---
> drivers/infiniband/hw/nes/n
From: Colin Ian King
Currently extent and index i are both being incremented causing
an array out of bounds read on extent[i]. Fix this by removing
the extraneous increment of extent.
Detected by CoverityScan, CID#711541 ("Out of bounds read")
Fixes: d1081202f1d0 ("HFS rewrite")
Signed-off-by:
On 8/31/18 8:24 AM, Oscar Salvador wrote:
> On Thu, Aug 30, 2018 at 01:55:29AM +, Pasha Tatashin wrote:
>> I would re-write the above function like this:
>> static void check_for_memory(pg_data_t *pgdat, int nid)
>> {
>> enum zone_type zone_type;
>>
>> for (zone_type = 0; zone
Modern SoCs have multiple processors and various dedicated cores (video, gpu,
graphics, modem). These cores are talking to each other and can generate a
lot of data flowing through the on-chip interconnects. These interconnect
buses could form different topologies such as crossbar, point to point b
This patch introduces a new API to get requirements and configure the
interconnect buses across the entire chipset to fit with the current
demand.
The API is using a consumer/provider-based model, where the providers are
the interconnect buses and the consumers could be various drivers.
The consum
On some Qualcomm SoCs, there is a remote processor, which controls some of
the Network-On-Chip interconnect resources. Other CPUs express their needs
by communicating with this processor. Add a driver to handle communication
with this remote processor.
Signed-off-by: Georgi Djakov
Reviewed-by: Ev
Add driver for the Qualcomm interconnect buses found in msm8916 based
platforms.
Signed-off-by: Georgi Djakov
Reviewed-by: Evan Green
---
drivers/interconnect/Kconfig| 5 +
drivers/interconnect/Makefile | 1 +
drivers/interconnect/qcom/Kconfig | 9 +
drivers/interconnect/q
Add myself as a maintainer of the interconnect API.
Signed-off-by: Georgi Djakov
---
MAINTAINERS | 10 ++
1 file changed, 10 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index a5b256b25905..bdbab6a90c93 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -7578,6 +7578,16 @@ L: l
On Fri, Aug 10, 2018 at 09:13:57PM +0300, Aapo Vienamo wrote:
> Hi all,
> This series implements support for HS400 signaling on Tegra210 and
> Tegra186. This includes programming the DQS trimmer values, implementing
> enhanced strobe and HS400 delay line calibration.
>
> This series depends on the
On Fri, 31 Aug 2018 at 13:18, Andi Shyti wrote:
>
> Hi Krzysztof,
>
> On Thu, Aug 30, 2018 at 08:02:05PM +0200, Krzysztof Kozlowski wrote:
> > Samsung Exynos SoCs and boards related bindings evolved since the initial
> > introduction, but initially the bindings were minimal and a bit incomplete
>
Document the device-tree bindings of the Network-On-Chip interconnect
hardware found on Qualcomm msm8916 platforms.
Signed-off-by: Georgi Djakov
---
.../bindings/interconnect/qcom-msm8916.txt| 41
include/dt-bindings/interconnect/qcom.h | 98 +++
2 files change
Currently we support only platform data for specifying the interconnect
endpoints. As now the endpoints are hard-coded into the consumer driver
this may lead to complications when a single driver is used by multiple
SoCs, which may have different interconnect topology.
To avoid cluttering the consu
Add a functionality to provide information about the current constraints
per each node and provider.
Signed-off-by: Georgi Djakov
Reviewed-by: Evan Green
---
drivers/interconnect/core.c | 78 +
1 file changed, 78 insertions(+)
diff --git a/drivers/interconne
This binding is intended to represent the relations between the interconnect
controllers (providers) and consumer device nodes. It will allow creating links
between consumers and interconnect paths (exposed by interconnect providers).
Signed-off-by: Georgi Djakov
---
.../bindings/interconnect/in
On Mon, Aug 20, 2018 at 12:23:33PM +0300, Aapo Vienamo wrote:
> Rerun the pad calibration procedure before sdhci_request() if
> the 100 ms recalibration interval has been exceeded.
>
> Signed-off-by: Aapo Vienamo
> ---
> drivers/mmc/host/sdhci-tegra.c | 22 ++
> 1 file change
On Fri, Aug 31, 2018 at 03:16:17PM +0200, Ulf Hansson wrote:
> On 30 August 2018 at 17:06, Aapo Vienamo wrote:
> > Parse the pinctrl state and nvidia,only-1-8-v properties from the device
> > tree. Validate the pinctrl and regulator configuration before unmasking
> > UHS modes. Implement pad volta
update_blocked_averages() is called to periodiccally decay the stalled load
of idle CPUs and to sync all loads before running load balance.
When cfs rq is idle, it trigs a load balance during pick_next_task_fair()
in order to potentially pull tasks and to use this newly idle CPU. This
load balance
On 31/08/18 14:56, Al Viro wrote:
> On Fri, Aug 31, 2018 at 02:39:11PM +0100, Colin Ian King wrote:
>> Hi,
>>
>> Static analysis has picked up a potential issue with an out of bounds
>> read in fs/hfs/extent.c; the following for-loop in hfs_free_fork()
>> increments i and also extent while also re
On Fri, Aug 31, 2018 at 02:39:11PM +0100, Colin Ian King wrote:
> Hi,
>
> Static analysis has picked up a potential issue with an out of bounds
> read in fs/hfs/extent.c; the following for-loop in hfs_free_fork()
> increments i and also extent while also reading extent[i].count. This
> looks inc
I sloppily passed a kernel-typed pointer to __range_not_ok(), and sparse
doesn't like that.
Make `prologue` an unsigned long and cast it to a kernel pointer when
calling probe_kernel_read(), just like ~everyone else who calls
probe_kernel_read().
Instead of __range_not_ok() with a cast, call __chk_
On Thu, Aug 30, 2018 at 04:12:00PM -0600, Jon Derrick wrote:
> Currently, a hotplug bridge will be given hpmemsize additional memory if
> available, in order to satisfy any future hotplug allocation
> requirements.
>
> These calculations don't consider the current memory size of the hotplug
> brid
Hi Kim,
Generally, I agree with you about breaking backward compatibility, but
in this case I don't think there is an actual problem. As I understand
it, you're worried that perf will break for people who are using an
older version (0.8.x) of the OpenCSD library for CoreSight trace decode
an
This patch modifies the place where resources and device tree properties
are searched.
Signed-off-by: Radu Pirea
Reviewed-by: Andy Shevchenko
Acked-by: Richard Genoud
Acked-by: Nicolas Ferre
Acked-by: Greg Kroah-Hartman
---
drivers/tty/serial/Kconfig| 1 +
drivers/tty/serial/atmel_s
This mfd driver is just a wrapper over atmel_serial driver and
spi-at91-usart driver. Selection of one of the drivers is based on a
property from device tree. If the property is not specified, the default
driver is atmel_serial.
Signed-off-by: Radu Pirea
Reviewed-by: Andy Shevchenko
Acked-by: Ro
Added entry for at91 usart mfd driver.
Signed-off-by: Radu Pirea
Acked-by: Nicolas Ferre
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 94b37382cd2b..d58bc2d6bb3d 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9542,6 +9542,13 @@ F:
This is the driver for at91-usart in spi mode. The USART IP can be configured
to work in many modes and one of them is SPI.
The driver was tested on sama5d3-xplained and sama5d4-xplained boards with
enc28j60 ethernet controller as slave.
Signed-off-by: Radu Pirea
Reviewed-by: Andy Shevchenko
Re
Added entry for at91 usart mfd driver.
Signed-off-by: Radu Pirea
Acked-by: Nicolas Ferre
Acked-for-MFD-by: Lee Jones
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index a5b256b25905..94b37382cd2b 100644
--- a/MAINTAINERS
+++ b/MAINTAINER
This patch moves the bindings for serial from serial/atmel-usart.txt to
mfd/atmel-usart.txt and adds bindings for USART in SPI mode.
Signed-off-by: Radu Pirea
Reviewed-by: Rob Herring
Acked-for-MFD-by: Lee Jones
Acked-by: Nicolas Ferre
---
.../bindings/{serial => mfd}/atmel-usart.txt | 25 ++
Hello,
This is the 11th version of driver. I added a mfd driver which by
default probes atmel_serial driver and if in dt is specified to probe
the spi driver, then the spi-at91-usart driver will be probed. The
compatible for atmel_serial is now the compatible for at91-usart mfd
driver and compatil
Hi,
Static analysis has picked up a potential issue with an out of bounds
read in fs/hfs/extent.c; the following for-loop in hfs_free_fork()
increments i and also extent while also reading extent[i].count. This
looks incorrect to me, I think the increment of extent is not needed:
for (i
On Fri, Aug 31, 2018 at 01:33:05PM +0200, Thomas Gleixner wrote:
> On Fri, 31 Aug 2018, Feng Tang wrote:
> > On Thu, Aug 30, 2018 at 03:25:42PM +0200, Thomas Gleixner wrote:
> > This panic happens as the earlycon's fixmap address has no
> > pmd/pte ready, and __set_fixmap will try to allocate memor
This patch adds functionality to perform flush from guest
to host over VIRTIO. We are registering a callback based
on 'nd_region' type. virtio_pmem driver requires this special
flush function. For rest of the region types we are registering
existing flush function. Report error returned by host f
Hi Linus,
The following changes since commit 5b394b2ddf0347bef56e50c69a58773c94343ff3:
Linux 4.19-rc1 (2018-08-26 14:11:59 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/geert/linux-m68k.git
tags/m68k-for-v4.19-tag2
for you to fetch ch
Michal Vokáč wrote:
> On 31.8.2018 14:45, Lothar Waßmann wrote:
> > Rob Herring wrote:
> >
> >> On Tue, Aug 21, 2018 at 04:38:52PM +0200, Michal Vokáč wrote:
> >>> Output of the PWM block of i.MX SoCs is always zero volts when the block
> >>> is disabled. This can caue issues when inverted
This patch series enhances the current EDAC driver to support different
platforms. This series adds support for ZynqMP DDRC controller in synopsys
EDAC driver. This series also adds Device tree properties and relevant
binding documentation.
Changes in v2:
- Moved checking of DDR_ECC_INTR_S
Add platform specific structures, so that we can add different IP
support later using quirks.
Signed-off-by: Manish Narani
---
drivers/edac/synopsys_edac.c | 78 +---
1 file changed, 59 insertions(+), 19 deletions(-)
diff --git a/drivers/edac/synopsys_eda
Add information of ZynqMP DDRC which reports the single bit errors that
are corrected and the double bit errors that are detected.
Signed-off-by: Manish Narani
---
.../bindings/memory-controllers/synopsys.txt | 27 ++
1 file changed, 22 insertions(+), 5 deletions(-)
di
Add EDAC ECC support for ZynqMP DDRC IP. Also add support for ECC Error
Injection in ZynqMP. The corrected and uncorrected error interrupts
support is added. The Row, Column, Bank, Bank Group and Rank bits
positions are determined via Address Map registers of Synopsys DDRC.
Minor indentation change
Add ddrc memory controller node in dts. The size mentioned in dts is
0x3, because we need to access DDR_QOS INTR registers located at
0xFD090208 from this driver.
Signed-off-by: Manish Narani
---
arch/arm64/boot/dts/xilinx/zynqmp.dtsi | 7 +++
1 file changed, 7 insertions(+)
diff --git
On Fri, Aug 31, 2018 at 10:27 AM Luc Van Oostenryck
wrote:
>
> On Thu, Aug 30, 2018 at 09:47:36PM +0200, Jann Horn wrote:
> > I sloppily passed a kernel-typed pointer to __range_not_ok(), and sparse
> > doesn't like that.
> > Make `prologue` a __user pointer (to protect against accidental
> > dere
On 31.8.2018 14:45, Lothar Waßmann wrote:
Rob Herring wrote:
On Tue, Aug 21, 2018 at 04:38:52PM +0200, Michal Vokáč wrote:
Output of the PWM block of i.MX SoCs is always zero volts when the block
is disabled. This can caue issues when inverted PWM polarity is needed.
With inverted polarity a
On 30 August 2018 at 17:06, Aapo Vienamo wrote:
> Document the Tegra SDHCI inbound and outbound sampling trimmer values.
>
> Signed-off-by: Aapo Vienamo
> Acked-by: Thierry Reding
Applied for next, thanks!
I noted that Rob added his tag for the earlier version, so I am
re-adding when applying.
On 30 August 2018 at 17:06, Aapo Vienamo wrote:
> Parse the pinctrl state and nvidia,only-1-8-v properties from the device
> tree. Validate the pinctrl and regulator configuration before unmasking
> UHS modes. Implement pad voltage state reconfiguration in the mmc
> start_signal_voltage_switch() c
On 30 August 2018 at 17:06, Aapo Vienamo wrote:
> Add bindings documentation for pad pull up and pull down offset values to be
> programmed before executing automatic pad drive strength calibration.
>
> Signed-off-by: Aapo Vienamo
> Acked-by: Thierry Reding
Applied for next, thanks!
I noted th
On 30 August 2018 at 17:06, Aapo Vienamo wrote:
> Document the pinctrl bindings used by the SDHCI driver to reconfigure
> pad voltages on controllers supporting multiple voltage levels.
>
> Signed-off-by: Aapo Vienamo
> Reviewed-by: Mikko Perttunen
> Reviewed-by: Rob Herring
> Acked-by: Thierry
On 08/31/2018 02:34 PM, Philipp Zabel wrote:
> Commit 1c892e38ce59 ("regulator: da9063: Handle less LDOs on DA9063L")
> reordered the da9063_regulator_info[] array, but not the DA9063_ID_*
> regulator ids and not the da9063_matches[] array, because ids are used
> as indices in the array initializer
On Thu, Aug 30, 2018 at 07:52:55PM +0300, Andy Shevchenko wrote:
> There are few Intel MFD PMIC device drivers which I would like
> to review.
>
> Note, Intel MSIC is old system controller that based mostly on PMIC
> integrated in it. Thus, I included it as well.
Good idea.
> Signed-off-by: Andy
On Thu, Aug 30, 2018 at 07:52:54PM +0300, Andy Shevchenko wrote:
> Reduce size of duplicated comments by switching to use SPDX identifier.
>
> No functional change.
>
> Signed-off-by: Andy Shevchenko
Reviewed-by: Mika Westerberg
On Thu, Aug 30, 2018 at 07:52:53PM +0300, Andy Shevchenko wrote:
> Sort headers alphabetically for better maintenance.
>
> No functional change.
>
> Signed-off-by: Andy Shevchenko
Reviewed-by: Mika Westerberg
On Thu, Aug 30, 2018 at 07:52:52PM +0300, Andy Shevchenko wrote:
> Power button IRQ actually has a second level of interrupts to
> distinguish between UI and POWER buttons. Moreover, current
> implementation looks awkward in approach to handle second level IRQs by
> first level related IRQ chip.
>
On Thu, Aug 30, 2018 at 07:52:51PM +0300, Andy Shevchenko wrote:
> Instead of open coding each data structure with regmap IRQresources,
> use dedicated macro.
>
> No functional change intended.
>
> Signed-off-by: Andy Shevchenko
Reviewed-by: Mika Westerberg
On Thu, Aug 30, 2018 at 07:52:50PM +0300, Andy Shevchenko wrote:
> Instead of open coding each data structure with IRQ resources,
> use dedicated macro.
>
> No functional change intended.
>
> Signed-off-by: Andy Shevchenko
Reviewed-by: Mika Westerberg
On Thu, Aug 30, 2018 at 07:52:49PM +0300, Andy Shevchenko wrote:
> Instead of open coding each data structure with IRQ resources,
> use dedicated macro.
>
> In one case use DEFINE_RES_IRQ_NAMED() and DEFINE_RES_MEM_NAMED().
>
> No functional change intended.
>
> Signed-off-by: Andy Shevchenko
Rob Herring wrote:
> On Tue, Aug 21, 2018 at 04:38:52PM +0200, Michal Vokáč wrote:
> > Output of the PWM block of i.MX SoCs is always zero volts when the block
> > is disabled. This can caue issues when inverted PWM polarity is needed.
> > With inverted polarity a duty cycle = 0% corresponds to s
Linus,
I2C has for you:
* regression fixes for i801 and designware
* better API and leak fix for releasing DMA safe buffers
* better greppable strings for the bitbang algorithm
Thanks,
Wolfram
The following changes since commit 5b394b2ddf0347bef56e50c69a58773c94343ff3:
Linux 4.19-rc1 (2
From: Marcel Ziswiler
There was a dot instead of a comma. Fix this.
Signed-off-by: Marcel Ziswiler
---
arch/arm/boot/dts/tegra30.dtsi | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index 1de10f0d1da7..
Hi Philipp,
On Fri, Aug 31, 2018 at 2:34 PM Philipp Zabel wrote:
> Commit 1c892e38ce59 ("regulator: da9063: Handle less LDOs on DA9063L")
> reordered the da9063_regulator_info[] array, but not the DA9063_ID_*
> regulator ids and not the da9063_matches[] array, because ids are used
> as indices in
Commit 1c892e38ce59 ("regulator: da9063: Handle less LDOs on DA9063L")
reordered the da9063_regulator_info[] array, but not the DA9063_ID_*
regulator ids and not the da9063_matches[] array, because ids are used
as indices in the array initializer. This mismatch between regulator id
and da9063_regul
Hello Afonso,
On Thu, Aug 30, 2018 at 10:18:22PM +0100, Afonso Bordado wrote:
> FXAS21002C is a 3 axis gyroscope with integrated temperature sensor
>
> Signed-off-by: Afonso Bordado
> ---
> Changes in v2
>- Use ANSI C Comments
>- Minor cleanups
>- More dscriptive devicetree bindings
On Thu, Aug 30, 2018 at 01:55:29AM +, Pasha Tatashin wrote:
> I would re-write the above function like this:
> static void check_for_memory(pg_data_t *pgdat, int nid)
> {
> enum zone_type zone_type;
>
> for (zone_type = 0; zone_type < ZONE_MOVABLE; zone_type++) {
>
On Fri, 2018-08-31 at 08:54 +0200, Jiri Slaby wrote:
> On 08/29/2018, 06:28 PM, Dmitry Safonov wrote:
> > On Wed, 2018-08-29 at 16:46 +0200, Jiri Slaby wrote:
> > > On 08/29/2018, 04:23 AM, Dmitry Safonov wrote:
> > > > It's safe to not lock both here - done to silence attempt
> > > > lockdep
> > >
aHi Robb
On Fri, Aug 31, 2018 at 2:17 PM Rob Herring wrote:
>
> On Tue, Aug 21, 2018 at 04:31:52PM +0200, Ricardo Ribalda Delgado wrote:
> > Add documentation for gpio-addr-flash. This binding allow creating
> > flash devices that are paged using GPIOs.
> >
> > Cc: devicet...@vger.kernel.org
> >
On 08/30/2018 03:18 PM, Pavel Machek wrote:
> Hi!
>
>>> Here's preview of driver for TI LMU. It controls LEDs on Droid 4
>>> smartphone, including keyboard and screen backlights.
>>>
>>> This adds backlight support for the following TI LMU
>>> chips: LM3532, LM3631, LM3632, LM3633, LM3695 and LM36
On Fri, 24 Aug 2018 08:56:11 +0100, Fabrizio Castro wrote:
> Document RZ/G2M (R8A774A1) SoC bindings.
>
> Signed-off-by: Fabrizio Castro
> Reviewed-by: Biju Das
> ---
> Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb3.txt | 10 ++
> 1 file changed, 6 insertions(+), 4 deletions(-
On Wed, Aug 29, 2018 at 07:36:13AM +, Huang, Kai wrote:
> > -Original Message-
> > From: Jarkko Sakkinen [mailto:jarkko.sakki...@linux.intel.com]
> > Sent: Tuesday, August 28, 2018 7:17 PM
> > To: Huang, Kai
> > Cc: x...@kernel.org; platform-driver-...@vger.kernel.org; Hansen, Dave
> >
On Wed, 22 Aug 2018 19:29:52 +0200, Paul Cercueil wrote:
> The maximum value found in that array is 15, there's no need to store
> these values as uint32_t, a uint8_t is enough.
>
> Signed-off-by: Paul Cercueil
> ---
> drivers/memory/jz4780-nemc.c | 6 +++---
> 1 file changed, 3 insertions(+), 3
On Wed, Aug 22, 2018 at 03:43:48PM +0200, Jan Tuerk wrote:
> This fixes the error in the compatible documentation for the EDT
> etm0700[g].. panels which have accidentally documented as etm0700[8]0..
This needs a more specific subject.
>
> Signed-off-by: Jan Tuerk
> ---
> .../devicetree/bindin
On Fri, 24 Aug 2018 08:56:10 +0100, Fabrizio Castro wrote:
> Document RZ/G2M (R8A774A1) SoC bindings.
>
> Signed-off-by: Fabrizio Castro
> Reviewed-by: Biju Das
> ---
> Documentation/devicetree/bindings/phy/rcar-gen3-phy-usb2.txt | 9 ++---
> 1 file changed, 6 insertions(+), 3 deletions(-)
On Tue, Aug 21, 2018 at 04:38:52PM +0200, Michal Vokáč wrote:
> Output of the PWM block of i.MX SoCs is always zero volts when the block
> is disabled. This can caue issues when inverted PWM polarity is needed.
> With inverted polarity a duty cycle = 0% corresponds to solid high level
> on the outp
On Tue, Aug 21, 2018 at 04:31:52PM +0200, Ricardo Ribalda Delgado wrote:
> Add documentation for gpio-addr-flash. This binding allow creating
> flash devices that are paged using GPIOs.
>
> Cc: devicet...@vger.kernel.org
> Signed-off-by: Ricardo Ribalda Delgado
> ---
> .../bindings/mtd/gpio-addr
On Wed, Aug 29, 2018 at 07:33:54AM +, Huang, Kai wrote:
> [snip..]
>
> > > >
> > > > @@ -38,6 +39,18 @@ static LIST_HEAD(sgx_active_page_list); static
> > > > DEFINE_SPINLOCK(sgx_active_page_list_lock);
> > > > static struct task_struct *ksgxswapd_tsk; static
> > > > DECLARE_WAIT_QUEUE_HEAD
Commit-ID: 6fb86d97207880c1286cd4cb3a7e6a598afbc727
Gitweb: https://git.kernel.org/tip/6fb86d97207880c1286cd4cb3a7e6a598afbc727
Author: Mukesh Ojha
AuthorDate: Tue, 28 Aug 2018 12:24:54 +0530
Committer: Thomas Gleixner
CommitDate: Fri, 31 Aug 2018 14:13:03 +0200
cpu/hotplug: Remove ski
On Fri, 31 Aug 2018, Peter Zijlstra wrote:
> On Thu, Aug 30, 2018 at 04:03:58AM -0700, tip-bot for Mukesh Ojha wrote:
> > Commit-ID: 935aad3015fb4afc0b7ef6e6c18175b95461de47
> > Gitweb:
> > https://git.kernel.org/tip/935aad3015fb4afc0b7ef6e6c18175b95461de47
> > Author: Mukesh Ojha
> > A
On Fri, 2018-08-31 at 13:21 +0200, Jiri Slaby wrote:
> On 08/31/2018, 01:17 PM, Tetsuo Handa wrote:
> > Also, noisy messages like
> >
> > pts pts4033: tty_release: tty->count(10529) != (#fd's(7) +
> > #kopen's(0))
> >
> > are gone.
>
> fwiw, thanks to 1/4…
>
> Dmitry, could you note the messa
There is one too many zeroes in the Power I2C base address. Fix this.
Signed-off-by: Marcel Ziswiler
---
arch/arm/boot/dts/pxa27x.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/pxa27x.dtsi b/arch/arm/boot/dts/pxa27x.dtsi
index 747f750f675d..837343370
Hi,
On Fri, 31 Aug 2018 15:59:58 +0530 Yogesh Gaur wrote:
> Add 'size' data variable in spi_device struct.
> This is to save the size of the connected slave device.
>
> After slave device scan, spi_nor_scan, size being assigned to this
> from MTD layer.
>
> SFDP read is being requested before co
On Fri, Aug 31, 2018 at 01:40:46PM +0200, Alexandre Belloni wrote:
> Define a mask for the IF_SI_OWNER field.
>
Thanks!
Acked-by: Andy Shevchenko
> Signed-off-by: Alexandre Belloni
> ---
> drivers/spi/spi-dw-mmio.c | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
> diff --git a/d
On Fri, 2018-08-31 at 08:47 +0200, Jiri Slaby wrote:
> On 08/29/2018, 06:13 PM, Dmitry Safonov wrote:
> > > I would just do:
> > > if (!retval)
> > > tty->count++;
> > > here. Nobody from ldiscs should rely on tty->count.
> >
> > I thought about that and probably should have described in com
On Fri, 31 Aug 2018 12:49:45 +0200
Peter Zijlstra wrote:
> On Fri, Aug 31, 2018 at 08:32:34PM +1000, Nicholas Piggin wrote:
> > Oh gee, I suppose. powerpc hash is kind of interesting because it's
> > crazy, Aneesh knows that code a lot better than I do. radix modulo
> > some minor details of exac
Hi Yogesh,
Thanks for your patch!
On Fri, Aug 31, 2018 at 12:33 PM Yogesh Gaur wrote:
> Add 'size' data variable in spi_device struct.
> This is to save the size of the connected slave device.
What is the "size" of an SPI slave device?
> After slave device scan, spi_nor_scan, size being assign
Define a mask for the IF_SI_OWNER field.
Signed-off-by: Alexandre Belloni
---
drivers/spi/spi-dw-mmio.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/spi-dw-mmio.c b/drivers/spi/spi-dw-mmio.c
index 351f49976161..a768461614a0 100644
--- a/drivers/spi/spi-dw-mmi
On Fri, 31 Aug 2018, Feng Tang wrote:
> On Thu, Aug 30, 2018 at 03:25:42PM +0200, Thomas Gleixner wrote:
> This panic happens as the earlycon's fixmap address has no
> pmd/pte ready, and __set_fixmap will try to allocate memory to
> setup the page table, and trigger panic due to no memory.
>
> x86
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