On Tue, Sep 4, 2018 at 2:15 PM Alexandre Belloni
wrote:
> On 04/09/2018 11:49:22+0200, Linus Walleij wrote:
>
> > This driver depends on the deleted AT91 architecture and cause
> > me headaches from a GPIO point of view. It is unused so delete
> > it.
> >
>
> While AVR32 is gone, AT91 is alive
On Tue, Sep 4, 2018 at 2:15 PM Alexandre Belloni
wrote:
> On 04/09/2018 11:49:22+0200, Linus Walleij wrote:
>
> > This driver depends on the deleted AT91 architecture and cause
> > me headaches from a GPIO point of view. It is unused so delete
> > it.
> >
>
> While AVR32 is gone, AT91 is alive
As we augmented the regulator core to accept a GPIO descriptor instead
of a GPIO number, we can augment the fixed GPIO regulator to look up
and pass that descriptor directly from device tree or board GPIO
descriptor look up tables.
Some boards just auto-enumerate their fixed regulator platform
As we augmented the regulator core to accept a GPIO descriptor instead
of a GPIO number, we can augment the fixed GPIO regulator to look up
and pass that descriptor directly from device tree or board GPIO
descriptor look up tables.
Some boards just auto-enumerate their fixed regulator platform
On 09/03/2018 04:26 AM, Shawn Guo wrote:
> Add Sébastien for a cross check.
>
> Shawn
>
> On Thu, Aug 30, 2018 at 01:20:05PM +0800, Anson Huang wrote:
>> Update i.MX6ULL iomux header according to latest reference
>> manual Rev.1, 11/2017.
>>
>> Signed-off-by: Anson Huang
Reviewed-by: Sébastien
On 09/03/2018 04:26 AM, Shawn Guo wrote:
> Add Sébastien for a cross check.
>
> Shawn
>
> On Thu, Aug 30, 2018 at 01:20:05PM +0800, Anson Huang wrote:
>> Update i.MX6ULL iomux header according to latest reference
>> manual Rev.1, 11/2017.
>>
>> Signed-off-by: Anson Huang
Reviewed-by: Sébastien
On Tue, 21 Aug 2018, Bin Yang wrote:
>
> +static inline bool
> +overlap(unsigned long start1, unsigned long end1,
> + unsigned long start2, unsigned long end2)
> +{
> + /* Is 'start2' within area 1? */
> + if (start1 <= start2 && end1 > start2)
> + return true;
>
On Tue, 21 Aug 2018, Bin Yang wrote:
>
> +static inline bool
> +overlap(unsigned long start1, unsigned long end1,
> + unsigned long start2, unsigned long end2)
> +{
> + /* Is 'start2' within area 1? */
> + if (start1 <= start2 && end1 > start2)
> + return true;
>
On 04/09/2018 11:49:22+0200, Linus Walleij wrote:
> This driver depends on the deleted AT91 architecture and cause
> me headaches from a GPIO point of view. It is unused so delete
> it.
>
While AVR32 is gone, AT91 is alive and well.
Also, get_maintainers is correct (for once):
Nicolas Ferre
On 04/09/2018 11:49:22+0200, Linus Walleij wrote:
> This driver depends on the deleted AT91 architecture and cause
> me headaches from a GPIO point of view. It is unused so delete
> it.
>
While AVR32 is gone, AT91 is alive and well.
Also, get_maintainers is correct (for once):
Nicolas Ferre
On 9/4/2018 12:03 PM, Neeraj Upadhyay wrote:
If takedown_cpu() fails during _cpu_down(), st->state is reset,
by calling cpuhp_reset_state(). This results in an additional
increment of st->state, which results in CPUHP_AP_SMPBOOT_THREADS
state being skipped during rollback. Fix this by not
On 9/4/2018 12:03 PM, Neeraj Upadhyay wrote:
If takedown_cpu() fails during _cpu_down(), st->state is reset,
by calling cpuhp_reset_state(). This results in an additional
increment of st->state, which results in CPUHP_AP_SMPBOOT_THREADS
state being skipped during rollback. Fix this by not
record__aio_sync() allocates index of free map->data buffer for
a cpu buffer or blocks till completion of any started operation
and then proceeds.
Trace file offset is calculated and updated linearly prior
enqueuing aio write at record__pushfn().
record__mmap_read_sync() implements a barrier
record__aio_sync() allocates index of free map->data buffer for
a cpu buffer or blocks till completion of any started operation
and then proceeds.
Trace file offset is calculated and updated linearly prior
enqueuing aio write at record__pushfn().
record__mmap_read_sync() implements a barrier
The map->data buffers are used to preserve map->base profiling data
for writing to disk. AIO map->cblocks are used to queue corresponding
map->data buffers for asynchronous writing. map->cblocks objects are
located in the last page of every map->data buffer.
Signed-off-by: Alexey Budankov
The map->data buffers are used to preserve map->base profiling data
for writing to disk. AIO map->cblocks are used to queue corresponding
map->data buffers for asynchronous writing. map->cblocks objects are
located in the last page of every map->data buffer.
Signed-off-by: Alexey Budankov
From: Linu Cherian
Added support in RVU AF driver to register for
CGX LMAC link status change events from firmware
and managing them. Processing part will be added
in followup patches.
- Introduced eventqueue for posting events from cgx lmac.
Queueing mechanism will ensure that events can be
On Fri, Aug 31, 2018 at 11:36 AM Benjamin Tissoires
wrote:
>
> This partially reverts commit f07b3c1da92db108662f99417a212fc1eddc44d1.
>
> It looks like some mice are not correctly treated by
> HID_QUIRK_INPUT_PER_APP. Those mice have the following
> report descriptor:
>
> 0x05, 0x01,
From: Sunil Goutham
Added maintainers entry for Marvell OcteonTX2 SOC's RVU
admin function driver.
Signed-off-by: Sunil Goutham
---
MAINTAINERS | 10 ++
1 file changed, 10 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index e178f2b..38f874c 100644
--- a/MAINTAINERS
+++
On Fri, Aug 31, 2018 at 11:36 AM Benjamin Tissoires
wrote:
>
> This partially reverts commit f07b3c1da92db108662f99417a212fc1eddc44d1.
>
> It looks like some mice are not correctly treated by
> HID_QUIRK_INPUT_PER_APP. Those mice have the following
> report descriptor:
>
> 0x05, 0x01,
From: Sunil Goutham
Added maintainers entry for Marvell OcteonTX2 SOC's RVU
admin function driver.
Signed-off-by: Sunil Goutham
---
MAINTAINERS | 10 ++
1 file changed, 10 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index e178f2b..38f874c 100644
--- a/MAINTAINERS
+++
From: Linu Cherian
Added support in RVU AF driver to register for
CGX LMAC link status change events from firmware
and managing them. Processing part will be added
in followup patches.
- Introduced eventqueue for posting events from cgx lmac.
Queueing mechanism will ensure that events can be
From: Linu Cherian
Each of the enabled CGX LMAC is considered a physical
interface and RVU PFs are mapped to these. VFs of these
SRIOV PFs will be virtual interfaces and share CGX LMAC
along with PF.
This mapping info will be used later on for Rx/Tx pkt steering.
Signed-off-by: Linu Cherian
From: Linu Cherian
CGX LMAC initialization, link status polling etc is done
by low level secure firmware. For link management this patch
adds a interface or communication mechanism between firmware
and this kernel CGX driver.
- Firmware interface specification is defined in cgx_fw_if.h.
-
From: Linu Cherian
CGX LMAC initialization, link status polling etc is done
by low level secure firmware. For link management this patch
adds a interface or communication mechanism between firmware
and this kernel CGX driver.
- Firmware interface specification is defined in cgx_fw_if.h.
-
From: Linu Cherian
Each of the enabled CGX LMAC is considered a physical
interface and RVU PFs are mapped to these. VFs of these
SRIOV PFs will be virtual interfaces and share CGX LMAC
along with PF.
This mapping info will be used later on for Rx/Tx pkt steering.
Signed-off-by: Linu Cherian
From: Sunil Goutham
This patch adds basic template for Marvell OcteonTX2's
CGX ethernet interface driver. Just the probe.
RVU AF driver will use APIs exported by this driver
for various things like PF to physical interface mapping,
loopback mode, interface stats etc. Hence marged both
drivers
From: Sunil Goutham
This patch adds basic template for Marvell OcteonTX2's
CGX ethernet interface driver. Just the probe.
RVU AF driver will use APIs exported by this driver
for various things like PF to physical interface mapping,
loopback mode, interface stats etc. Hence marged both
drivers
From: Geetha sowjanya
HW interprets RVU_AF_MSIXTR_BASE address as an IOVA, hence
create a IOMMU mapping for the physcial address configured by
firmware and reconfig RVU_AF_MSIXTR_BASE with IOVA.
Signed-off-by: Geetha sowjanya
Signed-off-by: Sunil Goutham
---
From: Sunil Goutham
Firmware configures a certain number of MSIX vectors to each of
enabled RVU PF/VF. When a block LF is attached to a PF/VF, number
of MSIX vectors needed by that LF are set aside (out of PF/VF's
total MSIX vectors) and LF's msix_offset is configured in HW.
Also added support
From: Geetha sowjanya
HW interprets RVU_AF_MSIXTR_BASE address as an IOVA, hence
create a IOMMU mapping for the physcial address configured by
firmware and reconfig RVU_AF_MSIXTR_BASE with IOVA.
Signed-off-by: Geetha sowjanya
Signed-off-by: Sunil Goutham
---
From: Sunil Goutham
Firmware configures a certain number of MSIX vectors to each of
enabled RVU PF/VF. When a block LF is attached to a PF/VF, number
of MSIX vectors needed by that LF are set aside (out of PF/VF's
total MSIX vectors) and LF's msix_offset is configured in HW.
Also added support
From: Sunil Goutham
Added support for a RVU PF/VF to request AF via mailbox
to attach or detach NPA/NIX/SSO/SSOW/TIM/CPT block LFs.
Also supports partial detachment and modifying current
LF attached count of a certian block type.
Signed-off-by: Sunil Goutham
---
From: Sunil Goutham
Added support for a RVU PF/VF to request AF via mailbox
to attach or detach NPA/NIX/SSO/SSOW/TIM/CPT block LFs.
Also supports partial detachment and modifying current
LF attached count of a certian block type.
Signed-off-by: Sunil Goutham
---
From: Sunil Goutham
Resource virtualization unit (RVU) on Marvell's OcteonTX2 SOC supports
multiple PCIe SRIOV physical functions (PFs) and virtual functions (VFs).
PF0 is called administrative / admin function (AF) and has privilege access
to registers to provision different RVU functional
From: Aleksey Makarov
With 10's of mailbox messages expected to be handled in future,
checking for message id could become a lengthy switch case. Hence
added a macro to auto generate the switch case for each msg id.
Signed-off-by: Aleksey Makarov
---
drivers/soc/marvell/octeontx2/rvu.c | 44
From: Sunil Goutham
Go through all BLKADDRs and check which ones are implemented
on this silicon and do a HW reset of each implemented block.
Also added all RVU AF and PF register offsets.
Signed-off-by: Sunil Goutham
---
drivers/soc/marvell/octeontx2/rvu.c| 78
From: Aleksey Makarov
This patch adds mailbox support infrastructure APIs.
Each RVU device has a dedicated 64KB mailbox region
shared with it's peer for communication. RVU AF has
a separate mailbox region shared with each of RVU PFs
and a RVU PF has a separate region shared with each of
it's VF.
From: Sunil Goutham
This patch adds support for mailbox interrupt and message
handling. Mapped mailbox region and registered a workqueue
for message handling. Enabled mailbox IRQ of RVU PFs
and registered a interrupt handler. When IRQ is triggered
work is added to the mbox workqueue for msgs to
From: Sunil Goutham
Resource virtualization unit (RVU) on Marvell's OcteonTX2 SOC supports
multiple PCIe SRIOV physical functions (PFs) and virtual functions (VFs).
PF0 is called administrative / admin function (AF) and has privilege access
to registers to provision different RVU functional
From: Aleksey Makarov
With 10's of mailbox messages expected to be handled in future,
checking for message id could become a lengthy switch case. Hence
added a macro to auto generate the switch case for each msg id.
Signed-off-by: Aleksey Makarov
---
drivers/soc/marvell/octeontx2/rvu.c | 44
From: Sunil Goutham
Go through all BLKADDRs and check which ones are implemented
on this silicon and do a HW reset of each implemented block.
Also added all RVU AF and PF register offsets.
Signed-off-by: Sunil Goutham
---
drivers/soc/marvell/octeontx2/rvu.c| 78
From: Aleksey Makarov
This patch adds mailbox support infrastructure APIs.
Each RVU device has a dedicated 64KB mailbox region
shared with it's peer for communication. RVU AF has
a separate mailbox region shared with each of RVU PFs
and a RVU PF has a separate region shared with each of
it's VF.
From: Sunil Goutham
This patch adds support for mailbox interrupt and message
handling. Mapped mailbox region and registered a workqueue
for message handling. Enabled mailbox IRQ of RVU PFs
and registered a interrupt handler. When IRQ is triggered
work is added to the mbox workqueue for msgs to
From: Sunil Goutham
Scan all RVU blocks to find any 'LF to RVU PF/VF' mapping done by
low level firmware. If found any, mark them as used in respective
block's LF bitmap and also save mapped PF/VF's PF_FUNC info.
This is done to avoid reattaching a block LF to a different RVU PF/VF.
From: Sunil Goutham
This patch adds basic template for Marvell OcteonTX2's
resource virtualization unit (RVU) admin function (AF)
driver. Just the driver registration and probe.
Signed-off-by: Sunil Goutham
---
drivers/soc/Kconfig| 1 +
drivers/soc/Makefile
From: Sunil Goutham
This patch gathers NPA/NIX/SSO/SSOW/TIM/CPT RVU blocks's
HW info like number of LFs. Important register offsets
saved for later use to avoid code duplication for each block.
A bitmap is allocated for each of the blocks which later
on will be used to allocate a LF for a RVU
From: Sunil Goutham
Scan all RVU blocks to find any 'LF to RVU PF/VF' mapping done by
low level firmware. If found any, mark them as used in respective
block's LF bitmap and also save mapped PF/VF's PF_FUNC info.
This is done to avoid reattaching a block LF to a different RVU PF/VF.
From: Sunil Goutham
This patch adds basic template for Marvell OcteonTX2's
resource virtualization unit (RVU) admin function (AF)
driver. Just the driver registration and probe.
Signed-off-by: Sunil Goutham
---
drivers/soc/Kconfig| 1 +
drivers/soc/Makefile
From: Sunil Goutham
This patch gathers NPA/NIX/SSO/SSOW/TIM/CPT RVU blocks's
HW info like number of LFs. Important register offsets
saved for later use to avoid code duplication for each block.
A bitmap is allocated for each of the blocks which later
on will be used to allocate a LF for a RVU
It is common for architectures with hugepage support to require only a
single TLB invalidation operation per hugepage during unmap(), rather than
iterating through the mapping at a PAGE_SIZE increment. Currently,
however, the level in the page table where the unmap() operation occurs
is not stored
It is common for architectures with hugepage support to require only a
single TLB invalidation operation per hugepage during unmap(), rather than
iterating through the mapping at a PAGE_SIZE increment. Currently,
however, the level in the page table where the unmap() operation occurs
is not stored
Hi all,
This series builds on the core changes I previously posted here:
rfc:
http://lists.infradead.org/pipermail/linux-arm-kernel/2018-August/597821.html
v1:
http://lists.infradead.org/pipermail/linux-arm-kernel/2018-August/598919.html
The main changes are:
* Move the mmu_gather
We recently had to debug a TLB invalidation problem on the munmap()
path, which was made more difficult than necessary because:
(a) The MMU gather code had changed without people realising
(b) Many people subtly misunderstood the operation of the MMU gather
code and its interactions
From: Peter Zijlstra
In preparation for maintaining the mmu_gather code as its own entity,
move the implementation out of memory.c and into its own file.
Cc: "Kirill A. Shutemov"
Cc: Andrew Morton
Cc: Michal Hocko
Signed-off-by: Peter Zijlstra
---
include/asm-generic/tlb.h | 1 +
Hi all,
This series builds on the core changes I previously posted here:
rfc:
http://lists.infradead.org/pipermail/linux-arm-kernel/2018-August/597821.html
v1:
http://lists.infradead.org/pipermail/linux-arm-kernel/2018-August/598919.html
The main changes are:
* Move the mmu_gather
We recently had to debug a TLB invalidation problem on the munmap()
path, which was made more difficult than necessary because:
(a) The MMU gather code had changed without people realising
(b) Many people subtly misunderstood the operation of the MMU gather
code and its interactions
From: Peter Zijlstra
In preparation for maintaining the mmu_gather code as its own entity,
move the implementation out of memory.c and into its own file.
Cc: "Kirill A. Shutemov"
Cc: Andrew Morton
Cc: Michal Hocko
Signed-off-by: Peter Zijlstra
---
include/asm-generic/tlb.h | 1 +
On 2018-09-04 13:30, Andy Shevchenko wrote:
> On Tue, Sep 04, 2018 at 02:08:59PM +0300, Yury Norov wrote:
>> On Sat, Aug 18, 2018 at 03:16:21PM +0200, Rasmus Villemoes wrote:
>>> It's not clear what's so horrible about emitting a function call to
>>> handle a run-time sized bitmap. Moreover, gcc
The inner workings of the mmu_gather-based TLB invalidation mechanism
are not relevant to nommu configurations, so guard them with an #ifdef.
This allows us to implement future functions using static inlines
without breaking the build.
Acked-by: Nicholas Piggin
Acked-by: Peter Zijlstra (Intel)
From: Peter Zijlstra
Some architectures require different TLB invalidation instructions
depending on whether it is only the last-level of page table being
changed, or whether there are also changes to the intermediate
(directory) entries higher up the tree.
Add a new bit to the flags bitfield
On 2018-09-04 13:30, Andy Shevchenko wrote:
> On Tue, Sep 04, 2018 at 02:08:59PM +0300, Yury Norov wrote:
>> On Sat, Aug 18, 2018 at 03:16:21PM +0200, Rasmus Villemoes wrote:
>>> It's not clear what's so horrible about emitting a function call to
>>> handle a run-time sized bitmap. Moreover, gcc
The inner workings of the mmu_gather-based TLB invalidation mechanism
are not relevant to nommu configurations, so guard them with an #ifdef.
This allows us to implement future functions using static inlines
without breaking the build.
Acked-by: Nicholas Piggin
Acked-by: Peter Zijlstra (Intel)
From: Peter Zijlstra
Some architectures require different TLB invalidation instructions
depending on whether it is only the last-level of page table being
changed, or whether there are also changes to the intermediate
(directory) entries higher up the tree.
Add a new bit to the flags bitfield
On Tue, Sep 04, 2018 at 02:08:59PM +0300, Yury Norov wrote:
> On Sat, Aug 18, 2018 at 03:16:21PM +0200, Rasmus Villemoes wrote:
> > It's not clear what's so horrible about emitting a function call to
> > handle a run-time sized bitmap. Moreover, gcc also emits a function call
> > for a
On Tue, Sep 04, 2018 at 02:08:59PM +0300, Yury Norov wrote:
> On Sat, Aug 18, 2018 at 03:16:21PM +0200, Rasmus Villemoes wrote:
> > It's not clear what's so horrible about emitting a function call to
> > handle a run-time sized bitmap. Moreover, gcc also emits a function call
> > for a
To prevent warning "kernfs: can not remove '(null)', no directory", if an
overlay isn't applied to the active devicetree.
Using of_remove_property and than of_add_property don't show the warning.
---
drivers/of/kobj.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
To prevent warning "kernfs: can not remove '(null)', no directory", if an
overlay isn't applied to the active devicetree.
Using of_remove_property and than of_add_property don't show the warning.
---
drivers/of/kobj.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Hello,
This series allows the ipu3-cio2 driver to properly expose a subset of the
media graph even if some drivers for the pending subdevices fail to probe.
Currently the driver exposes a non-functional graph since the pad links are
created and the subdev dev nodes are registered in the v4l2
Hello,
This series allows the ipu3-cio2 driver to properly expose a subset of the
media graph even if some drivers for the pending subdevices fail to probe.
Currently the driver exposes a non-functional graph since the pad links are
created and the subdev dev nodes are registered in the v4l2
From: Radu Pirea
This patch moves the bindings for serial from serial/atmel-usart.txt to
mfd/atmel-usart.txt and adds bindings for USART in SPI mode.
Signed-off-by: Radu Pirea
Reviewed-by: Rob Herring
Acked-for-MFD-by: Lee Jones
Acked-by: Nicolas Ferre
---
.../bindings/{serial =>
From: Radu Pirea
This patch moves the bindings for serial from serial/atmel-usart.txt to
mfd/atmel-usart.txt and adds bindings for USART in SPI mode.
Signed-off-by: Radu Pirea
Reviewed-by: Rob Herring
Acked-for-MFD-by: Lee Jones
Acked-by: Nicolas Ferre
---
.../bindings/{serial =>
Hi,
Well, this is the 12th version of this patch series.
In this version I fixed a warning from kbuild-robot and I have no idea
how I forgot to add static in declaration of that functions. Also I
fixed the example for the SPI driver in bindings.
Currently I am not working for Microchip, but I
Hi,
Well, this is the 12th version of this patch series.
In this version I fixed a warning from kbuild-robot and I have no idea
how I forgot to add static in declaration of that functions. Also I
fixed the example for the SPI driver in bindings.
Currently I am not working for Microchip, but I
From: Radu Pirea
Added entry for at91 usart mfd driver.
Signed-off-by: Radu Pirea
Acked-by: Nicolas Ferre
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 8aeaa2cc3e14..1bb477aab33b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@
From: Radu Pirea
Added entry for at91 usart mfd driver.
Signed-off-by: Radu Pirea
Acked-by: Nicolas Ferre
Acked-for-MFD-by: Lee Jones
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 544cac829cf4..8aeaa2cc3e14 100644
---
From: Radu Pirea
This patch modifies the place where resources and device tree properties
are searched.
Signed-off-by: Radu Pirea
Reviewed-by: Andy Shevchenko
Acked-by: Richard Genoud
Acked-by: Nicolas Ferre
Acked-by: Greg Kroah-Hartman
---
drivers/tty/serial/Kconfig| 1 +
From: Radu Pirea
Added entry for at91 usart mfd driver.
Signed-off-by: Radu Pirea
Acked-by: Nicolas Ferre
---
MAINTAINERS | 7 +++
1 file changed, 7 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 8aeaa2cc3e14..1bb477aab33b 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@
From: Radu Pirea
Added entry for at91 usart mfd driver.
Signed-off-by: Radu Pirea
Acked-by: Nicolas Ferre
Acked-for-MFD-by: Lee Jones
---
MAINTAINERS | 9 +
1 file changed, 9 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 544cac829cf4..8aeaa2cc3e14 100644
---
From: Radu Pirea
This patch modifies the place where resources and device tree properties
are searched.
Signed-off-by: Radu Pirea
Reviewed-by: Andy Shevchenko
Acked-by: Richard Genoud
Acked-by: Nicolas Ferre
Acked-by: Greg Kroah-Hartman
---
drivers/tty/serial/Kconfig| 1 +
From: Radu Pirea
This mfd driver is just a wrapper over atmel_serial driver and
spi-at91-usart driver. Selection of one of the drivers is based on a
property from device tree. If the property is not specified, the default
driver is atmel_serial.
Signed-off-by: Radu Pirea
Reviewed-by: Andy
From: Radu Pirea
This mfd driver is just a wrapper over atmel_serial driver and
spi-at91-usart driver. Selection of one of the drivers is based on a
property from device tree. If the property is not specified, the default
driver is atmel_serial.
Signed-off-by: Radu Pirea
Reviewed-by: Andy
From: Radu Pirea
This is the driver for at91-usart in spi mode. The USART IP can be configured
to work in many modes and one of them is SPI.
The driver was tested on sama5d3-xplained and sama5d4-xplained boards with
enc28j60 ethernet controller as slave.
Signed-off-by: Radu Pirea
Reviewed-by:
From: Radu Pirea
This is the driver for at91-usart in spi mode. The USART IP can be configured
to work in many modes and one of them is SPI.
The driver was tested on sama5d3-xplained and sama5d4-xplained boards with
enc28j60 ethernet controller as slave.
Signed-off-by: Radu Pirea
Reviewed-by:
Remove empty if statement from 'if - else if' and replace the
else if with if. Remove the now unused variable pmlmepriv.
Also clears line over 80 characters and CamelCase checkpatch
issues.
Signed-off-by: Michael Straube
---
drivers/staging/rtl8188eu/core/rtw_led.c | 5 +
1 file changed, 1
Remove empty if statement from 'if - else if' and replace the
else if with if. Remove the now unused variable pmlmepriv.
Also clears line over 80 characters and CamelCase checkpatch
issues.
Signed-off-by: Michael Straube
---
drivers/staging/rtl8188eu/core/rtw_led.c | 5 +
1 file changed, 1
Remove unnecessary parentheses from conditionals.
Also clears 'Alignment should match open parenthesis'
checkpatch issue.
Signed-off-by: Michael Straube
---
drivers/staging/rtl8188eu/core/rtw_led.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
Remove unnecessary parentheses from conditionals.
Also clears 'Alignment should match open parenthesis'
checkpatch issue.
Signed-off-by: Michael Straube
---
drivers/staging/rtl8188eu/core/rtw_led.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
On Mon, Sep 03, 2018 at 06:01:26PM +0300, Andy Shevchenko wrote:
> On Mon, Aug 27, 2018 at 9:58 PM Jarkko Sakkinen
> wrote:
> >
> > Add wrappers for Intel(R) SGX ENCLS opcode leaf functions except
> > ENCLS(EINIT). ENCLS invokes privileged functions for managing (creation,
> > initialization and
On Mon, Sep 03, 2018 at 06:01:26PM +0300, Andy Shevchenko wrote:
> On Mon, Aug 27, 2018 at 9:58 PM Jarkko Sakkinen
> wrote:
> >
> > Add wrappers for Intel(R) SGX ENCLS opcode leaf functions except
> > ENCLS(EINIT). ENCLS invokes privileged functions for managing (creation,
> > initialization and
On Tue, 2018-09-04 at 16:58 +0800, 焦晓冬 wrote:
> On Tue, Sep 4, 2018 at 3:53 PM Rogier Wolff wrote:
>
> ...
> > >
> > > Jlayton's patch is simple but wonderful idea towards correct error
> > > reporting. It seems one crucial thing is still here to be fixed. Does
> > > anyone have some idea?
> >
On Tue, 2018-09-04 at 16:58 +0800, 焦晓冬 wrote:
> On Tue, Sep 4, 2018 at 3:53 PM Rogier Wolff wrote:
>
> ...
> > >
> > > Jlayton's patch is simple but wonderful idea towards correct error
> > > reporting. It seems one crucial thing is still here to be fixed. Does
> > > anyone have some idea?
> >
On Sat, Aug 18, 2018 at 03:16:21PM +0200, Rasmus Villemoes wrote:
> It's not clear what's so horrible about emitting a function call to
> handle a run-time sized bitmap. Moreover, gcc also emits a function call
> for a compile-time-constant-but-huge nbits, so the comment isn't even
> accurate.
>
On Sat, Aug 18, 2018 at 03:16:21PM +0200, Rasmus Villemoes wrote:
> It's not clear what's so horrible about emitting a function call to
> handle a run-time sized bitmap. Moreover, gcc also emits a function call
> for a compile-time-constant-but-huge nbits, so the comment isn't even
> accurate.
>
This patch adds one new led trigger that LED device can configure
the software or hardware pattern and trigger it.
Consumers can write 'pattern' file to enable the software pattern
which alters the brightness for the specified duration with one
software timer.
Moreover consumers can write
This patch implements the 'pattern_set'and 'pattern_clear'
interfaces to support SC27XX LED breathing mode.
Signed-off-by: Baolin Wang
---
Changes from v7:
- Add its own ABI documentation file.
Changes from v6:
- None.
Changes from v5:
- None.
Changes from v4:
- None.
Changes from v3:
-
This patch adds one new led trigger that LED device can configure
the software or hardware pattern and trigger it.
Consumers can write 'pattern' file to enable the software pattern
which alters the brightness for the specified duration with one
software timer.
Moreover consumers can write
This patch implements the 'pattern_set'and 'pattern_clear'
interfaces to support SC27XX LED breathing mode.
Signed-off-by: Baolin Wang
---
Changes from v7:
- Add its own ABI documentation file.
Changes from v6:
- None.
Changes from v5:
- None.
Changes from v4:
- None.
Changes from v3:
-
On Monday 20 Aug 2018 at 10:44:19 (+0100), Quentin Perret wrote:
> Energy Aware Scheduling (EAS) is designed with the assumption that
> frequencies of CPUs follow their utilization value. When using a CPUFreq
> governor other than schedutil, the chances of this assumption being true
> are small,
On Monday 20 Aug 2018 at 10:44:19 (+0100), Quentin Perret wrote:
> Energy Aware Scheduling (EAS) is designed with the assumption that
> frequencies of CPUs follow their utilization value. When using a CPUFreq
> governor other than schedutil, the chances of this assumption being true
> are small,
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