On Fri 09-11-18 09:12:09, Anshuman Khandual wrote:
>
>
> On 11/08/2018 03:59 PM, Michal Hocko wrote:
> > [Removing Wen Congyang and Tang Chen from the CC list because their
> > emails bounce. It seems that we will never learn about their motivation]
> >
> > On Thu 08-11-18 11:04:13, Michal
On Fri 09-11-18 09:12:09, Anshuman Khandual wrote:
>
>
> On 11/08/2018 03:59 PM, Michal Hocko wrote:
> > [Removing Wen Congyang and Tang Chen from the CC list because their
> > emails bounce. It seems that we will never learn about their motivation]
> >
> > On Thu 08-11-18 11:04:13, Michal
On 08.11.18 11:25:24, Julien Thierry wrote:
> On 07/11/18 22:03, Robert Richter wrote:
> >-static int its_init_domain(struct fwnode_handle *handle, struct its_node
> >*its)
> >+static int its_init_domain(struct its_node *its)
> > {
> > struct irq_domain *inner_domain;
> > struct
On 08.11.18 11:25:24, Julien Thierry wrote:
> On 07/11/18 22:03, Robert Richter wrote:
> >-static int its_init_domain(struct fwnode_handle *handle, struct its_node
> >*its)
> >+static int its_init_domain(struct its_node *its)
> > {
> > struct irq_domain *inner_domain;
> > struct
> >
> > Can't we simply change de_thread() to use freezable_schedule() ?
> >
> > Oleg.
>
> We need to change freezable_schedule_timeout() instead.
> freezable_schedule also can't be frozen if sub-threads can't stop
> schedule().
> Furthermore, I'm not sure if it is safe to freeze it at
* Ingo Molnar wrote:
> > - Does this feature have much value without retpolines? If not, should
> > we make it depend on retpolines somehow?
>
> Paravirt patching, as you mention in your later reply?
BTW., to look for candidates of this API, I'd suggest looking at the
function call
> >
> > Can't we simply change de_thread() to use freezable_schedule() ?
> >
> > Oleg.
>
> We need to change freezable_schedule_timeout() instead.
> freezable_schedule also can't be frozen if sub-threads can't stop
> schedule().
> Furthermore, I'm not sure if it is safe to freeze it at
* Ingo Molnar wrote:
> > - Does this feature have much value without retpolines? If not, should
> > we make it depend on retpolines somehow?
>
> Paravirt patching, as you mention in your later reply?
BTW., to look for candidates of this API, I'd suggest looking at the
function call
czw., 8 lis 2018 o 23:08 Greg Kroah-Hartman
napisał(a):
>
> 4.14-stable review patch. If anyone has any objections, please let me know.
>
Hi Greg,
this looks like a new feature, not a fix. Are you sure this should go
into the stable branch?
Best regards,
Bartosz Golaszewski
>
czw., 8 lis 2018 o 23:08 Greg Kroah-Hartman
napisał(a):
>
> 4.14-stable review patch. If anyone has any objections, please let me know.
>
Hi Greg,
this looks like a new feature, not a fix. Are you sure this should go
into the stable branch?
Best regards,
Bartosz Golaszewski
>
Convert the GPIO driver to use the GPIO irqchip library
GPIOLIB_IRQCHIP instead of reimplementing the same.
Signed-off-by: Nishad Kamdar
---
drivers/staging/greybus/Kconfig | 1 +
drivers/staging/greybus/gpio.c | 123 ++--
2 files changed, 21 insertions(+), 103
Convert the GPIO driver to use the GPIO irqchip library
GPIOLIB_IRQCHIP instead of reimplementing the same.
Signed-off-by: Nishad Kamdar
---
drivers/staging/greybus/Kconfig | 1 +
drivers/staging/greybus/gpio.c | 123 ++--
2 files changed, 21 insertions(+), 103
On Thu, 08 Nov 2018 20:59:45 +0100,
Andy Shevchenko wrote:
>
> On Thu, Nov 8, 2018 at 7:17 PM Ayman Bagabas wrote:
>
> Is it supposed to go via PDx86 or ALSA tree?
I don't mind either way. The addition in platform is more
significant, so I suppose you can take it more easily.
thanks,
On Thu, 08 Nov 2018 20:59:45 +0100,
Andy Shevchenko wrote:
>
> On Thu, Nov 8, 2018 at 7:17 PM Ayman Bagabas wrote:
>
> Is it supposed to go via PDx86 or ALSA tree?
I don't mind either way. The addition in platform is more
significant, so I suppose you can take it more easily.
thanks,
Add device tree table for matching vendor ID.
Signed-off-by: Nishad Kamdar
---
drivers/staging/iio/adc/ad7816.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/staging/iio/adc/ad7816.c b/drivers/staging/iio/adc/ad7816.c
index a2fead85cd46..b8a9149fbac1 100644
---
Add device tree table for matching vendor ID.
Signed-off-by: Nishad Kamdar
---
drivers/staging/iio/adc/ad7816.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/staging/iio/adc/ad7816.c b/drivers/staging/iio/adc/ad7816.c
index a2fead85cd46..b8a9149fbac1 100644
---
The RD/WR pin and CONVST pin are logical inputs to the AD78xx
chip as per the datasheet. Hence convert them to outputs.
Signed-off-by: Nishad Kamdar
---
drivers/staging/iio/adc/ad7816.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/iio/adc/ad7816.c
The RD/WR pin and CONVST pin are logical inputs to the AD78xx
chip as per the datasheet. Hence convert them to outputs.
Signed-off-by: Nishad Kamdar
---
drivers/staging/iio/adc/ad7816.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/drivers/staging/iio/adc/ad7816.c
AD7818 does not support busy_pin functionality as per datasheet.
Hence drop busy_pin when AD7818 is used.
Signed-off-by: Nishad Kamdar
---
drivers/staging/iio/adc/ad7816.c | 35 ++--
1 file changed, 24 insertions(+), 11 deletions(-)
diff --git
AD7818 does not support busy_pin functionality as per datasheet.
Hence drop busy_pin when AD7818 is used.
Signed-off-by: Nishad Kamdar
---
drivers/staging/iio/adc/ad7816.c | 35 ++--
1 file changed, 24 insertions(+), 11 deletions(-)
diff --git
Use the gpiod interface for rdwr_pin, convert_pin and busy_pin
instead of the deprecated old non-descriptor interface.
Signed-off-by: Nishad Kamdar
---
drivers/staging/iio/adc/ad7816.c | 80 ++--
1 file changed, 34 insertions(+), 46 deletions(-)
diff --git
Use the gpiod interface for rdwr_pin, convert_pin and busy_pin
instead of the deprecated old non-descriptor interface.
Signed-off-by: Nishad Kamdar
---
drivers/staging/iio/adc/ad7816.c | 80 ++--
1 file changed, 34 insertions(+), 46 deletions(-)
diff --git
Changes in v4:
- Drop busy pin in case of AD7818.
- Set RD/WR pin and CONVST pin as outputs.
- Add device tree table.
Nishad Kamdar (4):
staging: iio: ad7816: Switch to the gpio descriptor interface
staging: iio: ad7816: Do not use busy_pin in case of AD7818
staging: iio: ad7816: Set
Changes in v4:
- Drop busy pin in case of AD7818.
- Set RD/WR pin and CONVST pin as outputs.
- Add device tree table.
Nishad Kamdar (4):
staging: iio: ad7816: Switch to the gpio descriptor interface
staging: iio: ad7816: Do not use busy_pin in case of AD7818
staging: iio: ad7816: Set
* Josh Poimboeuf wrote:
> These patches are related to two similar patch sets from Ard and Steve:
>
> - https://lkml.kernel.org/r/20181005081333.15018-1-ard.biesheu...@linaro.org
> - https://lkml.kernel.org/r/20181006015110.653946...@goodmis.org
>
> The code is also heavily inspired by the
* Josh Poimboeuf wrote:
> These patches are related to two similar patch sets from Ard and Steve:
>
> - https://lkml.kernel.org/r/20181005081333.15018-1-ard.biesheu...@linaro.org
> - https://lkml.kernel.org/r/20181006015110.653946...@goodmis.org
>
> The code is also heavily inspired by the
On 8/11/2018 8:47 PM, Thierry Reding wrote:
> On Mon, Nov 05, 2018 at 05:32:32PM +0800, Wei Ni wrote:
>> Convert warnings to info as not all platforms may
>> have all the thresholds and sensors enabled.
>>
>> Signed-off-by: Wei Ni
>> ---
>> drivers/thermal/tegra/soctherm.c | 6 +++---
>> 1
On 8/11/2018 8:47 PM, Thierry Reding wrote:
> On Mon, Nov 05, 2018 at 05:32:32PM +0800, Wei Ni wrote:
>> Convert warnings to info as not all platforms may
>> have all the thresholds and sensors enabled.
>>
>> Signed-off-by: Wei Ni
>> ---
>> drivers/thermal/tegra/soctherm.c | 6 +++---
>> 1
Hi Linus,
please pull s390 fixes for 4.20-rc2
The following changes since commit e5f6d9afa3415104e402cd69288bb03f7165eeba:
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc (2018-10-25
18:14:31 -0700)
are available in the git repository at:
Hi Linus,
please pull s390 fixes for 4.20-rc2
The following changes since commit e5f6d9afa3415104e402cd69288bb03f7165eeba:
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc (2018-10-25
18:14:31 -0700)
are available in the git repository at:
On Thu, Nov 08, 2018 at 12:05:42PM -0800, Andy Lutomirski wrote:
> This whole thing is a mess. I'm starting to think that the cleanest
> solution would be to provide a way to just tell the kernel that
> certain RIP values have exception fixups.
The bay far cleanest solution would be to say that
On Thu, Nov 08, 2018 at 12:05:42PM -0800, Andy Lutomirski wrote:
> This whole thing is a mess. I'm starting to think that the cleanest
> solution would be to provide a way to just tell the kernel that
> certain RIP values have exception fixups.
The bay far cleanest solution would be to say that
From: Sri Krishna chowdary
Memory reserved with "nomap" DT property in of_reserved_mem.c
removes the memory block. The removed memory blocks don't have
VA to PA mapping created in kernel page table. Kmemleak scan on
removed memory blocks is causing page faults and leading to
kernel panic. So,
From: Sri Krishna chowdary
Memory reserved with "nomap" DT property in of_reserved_mem.c
removes the memory block. The removed memory blocks don't have
VA to PA mapping created in kernel page table. Kmemleak scan on
removed memory blocks is causing page faults and leading to
kernel panic. So,
The aurora cache on the Marvell Armada-XP SoC supports ECC protection
for the L2 data arrays. Add a "marvell,ecc-enable" device tree property
which can be used to enable this.
Signed-off-by: Chris Packham
[j...@pengutronix.de: use aurora specific define AURORA_ACR_ECC_EN]
Signed-off-by: Jan
From: Jan Luebbe
We already have wrappers for x8 and x16, so add the missing x32 one.
Signed-off-by: Jan Luebbe
Reviewed-by: Borislav Petkov
Signed-off-by: Chris Packham
---
drivers/edac/debugfs.c | 11 +++
drivers/edac/edac_module.h | 5 +
2 files changed, 16 insertions(+)
From: Jan Luebbe
These defines will be used by subsequent patches to add support for the
parity check and error correction functionality in the Aurora L2 cache
controller.
Signed-off-by: Jan Luebbe
Signed-off-by: Chris Packham
---
.../include/asm/hardware/cache-aurora-l2.h| 48
From: Jan Luebbe
This include file will be used by the AURORA EDAC code.
Signed-off-by: Jan Luebbe
Reviewed-by: Gregory CLEMENT
Signed-off-by: Chris Packham
---
arch/arm/{mm => include/asm/hardware}/cache-aurora-l2.h | 0
arch/arm/mm/cache-l2x0.c| 2 +-
2
From: Jan Luebbe
We already have wrappers for x8 and x16, so add the missing x32 one.
Signed-off-by: Jan Luebbe
Reviewed-by: Borislav Petkov
Signed-off-by: Chris Packham
---
drivers/edac/debugfs.c | 11 +++
drivers/edac/edac_module.h | 5 +
2 files changed, 16 insertions(+)
From: Jan Luebbe
These defines will be used by subsequent patches to add support for the
parity check and error correction functionality in the Aurora L2 cache
controller.
Signed-off-by: Jan Luebbe
Signed-off-by: Chris Packham
---
.../include/asm/hardware/cache-aurora-l2.h| 48
From: Jan Luebbe
This include file will be used by the AURORA EDAC code.
Signed-off-by: Jan Luebbe
Reviewed-by: Gregory CLEMENT
Signed-off-by: Chris Packham
---
arch/arm/{mm => include/asm/hardware}/cache-aurora-l2.h | 0
arch/arm/mm/cache-l2x0.c| 2 +-
2
The aurora cache on the Marvell Armada-XP SoC supports ECC protection
for the L2 data arrays. Add a "marvell,ecc-enable" device tree property
which can be used to enable this.
Signed-off-by: Chris Packham
[j...@pengutronix.de: use aurora specific define AURORA_ACR_ECC_EN]
Signed-off-by: Jan
From: Jan Luebbe
Add support for the ECC functionality as found in the DDR RAM and L2
cache controllers on the MV78230/MV78x60 SoCs. This driver has been
tested on the MV78460 (on a custom board with a DDR3 ECC DIMM).
Signed-off-by: Jan Luebbe
[cp use SPDX license]
Signed-off-by: Chris Packham
The aurora cache on the Marvell Armada-XP SoC supports the same tag
parity features as the other l2x0 cache implementations.
Signed-off-by: Chris Packham
[j...@pengutronix.de: use aurora specific define AURORA_ACR_PARITY_EN]
Signed-off-by: Jan Luebbe
---
arch/arm/mm/cache-l2x0.c | 7 +++
1
The Armada 38x and other integrated SoCs use a reduced pin count so the
width of the SDRAM interface is smaller than the Armada XP SoCs. This
means that the definition of "full" and "half" width is reduced from
64/32 to 32/16.
Signed-off-by: Chris Packham
---
drivers/edac/armada_xp_edac.c | 5
Add documentation for the marvell,ecc-enable and marvell,ecc-disable
properties which can be used to enable/disable ECC on the Marvell aurora
cache.
Signed-off-by: Chris Packham
---
Notes:
Changes in v6:
- new (split binding doc from implementation).
From: Jan Luebbe
Add support for the ECC functionality as found in the DDR RAM and L2
cache controllers on the MV78230/MV78x60 SoCs. This driver has been
tested on the MV78460 (on a custom board with a DDR3 ECC DIMM).
Signed-off-by: Jan Luebbe
[cp use SPDX license]
Signed-off-by: Chris Packham
The aurora cache on the Marvell Armada-XP SoC supports the same tag
parity features as the other l2x0 cache implementations.
Signed-off-by: Chris Packham
[j...@pengutronix.de: use aurora specific define AURORA_ACR_PARITY_EN]
Signed-off-by: Jan Luebbe
---
arch/arm/mm/cache-l2x0.c | 7 +++
1
The Armada 38x and other integrated SoCs use a reduced pin count so the
width of the SDRAM interface is smaller than the Armada XP SoCs. This
means that the definition of "full" and "half" width is reduced from
64/32 to 32/16.
Signed-off-by: Chris Packham
---
drivers/edac/armada_xp_edac.c | 5
Add documentation for the marvell,ecc-enable and marvell,ecc-disable
properties which can be used to enable/disable ECC on the Marvell aurora
cache.
Signed-off-by: Chris Packham
---
Notes:
Changes in v6:
- new (split binding doc from implementation).
The current plan is for these to go in via the ARM tree once appropriate
Reviews/Acks have been given
http://lists.infradead.org/pipermail/linux-arm-kernel/2017-August/525561.html
This series adds drivers for the L2 cache and DDR RAM ECC functionality as
found on the MV78230/MV78x60 SoCs. Jan
The current plan is for these to go in via the ARM tree once appropriate
Reviews/Acks have been given
http://lists.infradead.org/pipermail/linux-arm-kernel/2017-August/525561.html
This series adds drivers for the L2 cache and DDR RAM ECC functionality as
found on the MV78230/MV78x60 SoCs. Jan
From: Jan Luebbe
The macro name is too generic, so add a AURORA_ prefix.
Signed-off-by: Jan Luebbe
Reviewed-by: Gregory CLEMENT
Signed-off-by: Chris Packham
---
arch/arm/include/asm/hardware/cache-aurora-l2.h | 2 +-
arch/arm/mm/cache-l2x0.c| 4 ++--
2 files changed,
From: Jan Luebbe
The macro name is too generic, so add a AURORA_ prefix.
Signed-off-by: Jan Luebbe
Reviewed-by: Gregory CLEMENT
Signed-off-by: Chris Packham
---
arch/arm/include/asm/hardware/cache-aurora-l2.h | 2 +-
arch/arm/mm/cache-l2x0.c| 4 ++--
2 files changed,
On Fri, Nov 09, 2018 at 10:52:17AM +0530, Vinod Koul wrote:
> On 08-11-18, 15:04, Shawn Guo wrote:
> > +static int qcom_snps_hsphy_config_regulators(struct hsphy_priv *priv, int
> > high)
> > +{
> > + int min, ret, i;
> > +
> > + min = high ? 1 : 0; /* low or none? */
> > +
> > + for (i =
On Fri, Nov 09, 2018 at 10:52:17AM +0530, Vinod Koul wrote:
> On 08-11-18, 15:04, Shawn Guo wrote:
> > +static int qcom_snps_hsphy_config_regulators(struct hsphy_priv *priv, int
> > high)
> > +{
> > + int min, ret, i;
> > +
> > + min = high ? 1 : 0; /* low or none? */
> > +
> > + for (i =
When the THP enabled policy is "always", or the mode is "madvise" and a
region is marked as MADV_HUGEPAGE, a hugepage is allocated on a page
fault if the PMD is empty. This yields the best VA translation
performance but increases memory consumption if a significant part of
the huge page is never
When the THP enabled policy is "always", or the mode is "madvise" and a
region is marked as MADV_HUGEPAGE, a hugepage is allocated on a page
fault if the PMD is empty. This yields the best VA translation
performance but increases memory consumption if a significant part of
the huge page is never
num_poisoned_pages_inc/dec had better be visible to some file like
mm/sparse.c and mm/page_alloc.c (for a subsequent patch). So let's
move it to include/linux/mm.h.
Signed-off-by: Naoya Horiguchi
---
include/linux/mm.h | 13 -
include/linux/swapops.h | 16
num_poisoned_pages_inc/dec had better be visible to some file like
mm/sparse.c and mm/page_alloc.c (for a subsequent patch). So let's
move it to include/linux/mm.h.
Signed-off-by: Naoya Horiguchi
---
include/linux/mm.h | 13 -
include/linux/swapops.h | 16
On (11/01/18 09:05), Daniel Wang wrote:
> > Another deadlock scenario could be the following one:
> >
> > printk()
> > console_trylock()
> > down_trylock()
> >raw_spin_lock_irqsave(>lock, flags)
> >
> > panic()
> >
On (11/01/18 09:05), Daniel Wang wrote:
> > Another deadlock scenario could be the following one:
> >
> > printk()
> > console_trylock()
> > down_trylock()
> >raw_spin_lock_irqsave(>lock, flags)
> >
> > panic()
> >
set_hwpoison_free_buddy_page() could fail, then the target page is
finally not isolated, so it's better to report -EBUSY for userspace
to know the failure and chance of retry.
And for consistency, this patch moves set_hwpoison_free_buddy_page()
in unmap_and_move() to __soft_offline_page().
Currently madvise_inject_error() pins the target page when calling
memory error handler, but it's not good because the refcount is just
an artifact of error injector and mock nothing about hw error itself.
IOW, pinning the error page is part of error handler's task, so
let's stop doing it.
The new function is a reverse operation of set_hwpoison_free_buddy_page()
to adjust unpoison_memory() to the new semantics.
Signed-off-by: Naoya Horiguchi
---
include/linux/page-flags.h | 8 +++-
mm/memory-failure.c| 5 +++--
mm/page_alloc.c| 21 +
Another memory error injection interface debugfs:hwpoison/corrupt-pfn
also takes bogus refcount for hwpoison_filter(). It's justified
because this does a coarse filter, expecting that memory_failure()
redoes the check for sure.
Signed-off-by: Naoya Horiguchi
---
mm/hwpoison-inject.c | 18
memory_failure() forks to memory_failure_hugetlb() for hugetlb pages,
so a PageHuge() check after the fork should not be necessary.
Signed-off-by: Naoya Horiguchi
---
mm/memory-failure.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git
Hard-offline of free buddy pages can be handled in the same manner as
soft-offline. So this patch applies the new semantics to hard-offline to
more complete isolation of offlined page. As a result, the successful
case is worth MF_RECOVERED instead of MF_DELAYED, so this patch also
changes it.
set_hwpoison_free_buddy_page() could fail, then the target page is
finally not isolated, so it's better to report -EBUSY for userspace
to know the failure and chance of retry.
And for consistency, this patch moves set_hwpoison_free_buddy_page()
in unmap_and_move() to __soft_offline_page().
Currently madvise_inject_error() pins the target page when calling
memory error handler, but it's not good because the refcount is just
an artifact of error injector and mock nothing about hw error itself.
IOW, pinning the error page is part of error handler's task, so
let's stop doing it.
The new function is a reverse operation of set_hwpoison_free_buddy_page()
to adjust unpoison_memory() to the new semantics.
Signed-off-by: Naoya Horiguchi
---
include/linux/page-flags.h | 8 +++-
mm/memory-failure.c| 5 +++--
mm/page_alloc.c| 21 +
Another memory error injection interface debugfs:hwpoison/corrupt-pfn
also takes bogus refcount for hwpoison_filter(). It's justified
because this does a coarse filter, expecting that memory_failure()
redoes the check for sure.
Signed-off-by: Naoya Horiguchi
---
mm/hwpoison-inject.c | 18
memory_failure() forks to memory_failure_hugetlb() for hugetlb pages,
so a PageHuge() check after the fork should not be necessary.
Signed-off-by: Naoya Horiguchi
---
mm/memory-failure.c | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git
Hard-offline of free buddy pages can be handled in the same manner as
soft-offline. So this patch applies the new semantics to hard-offline to
more complete isolation of offlined page. As a result, the successful
case is worth MF_RECOVERED instead of MF_DELAYED, so this patch also
changes it.
Hi everyone,
I wrote hwpoison patches which partially mention the problems
discussed recently on this area [1].
Main point of this series is how we isolate faulty pages more
safely/reliable. As pointed out from Michal in thread [2], we can
have better isolation functions rather than what we
One hopeful usecase of memory hotplug is to replace half-broken DIMMs
with new ones, so it makes sense to clear hwpoison info at the time of
memory hotremove.
I hope that this patch covers the topic discussed in
https://lkml.org/lkml/2018/1/17/1228
Signed-off-by: Naoya Horiguchi
---
Now there's no user of MF_COUNT_INCREASED, so we can safely remove
all calling points.
Signed-off-by: Naoya Horiguchi
---
include/linux/mm.h | 7 +++
mm/memory-failure.c | 16 +++-
2 files changed, 6 insertions(+), 17 deletions(-)
diff --git
Hi everyone,
I wrote hwpoison patches which partially mention the problems
discussed recently on this area [1].
Main point of this series is how we isolate faulty pages more
safely/reliable. As pointed out from Michal in thread [2], we can
have better isolation functions rather than what we
One hopeful usecase of memory hotplug is to replace half-broken DIMMs
with new ones, so it makes sense to clear hwpoison info at the time of
memory hotremove.
I hope that this patch covers the topic discussed in
https://lkml.org/lkml/2018/1/17/1228
Signed-off-by: Naoya Horiguchi
---
Now there's no user of MF_COUNT_INCREASED, so we can safely remove
all calling points.
Signed-off-by: Naoya Horiguchi
---
include/linux/mm.h | 7 +++
mm/memory-failure.c | 16 +++-
2 files changed, 6 insertions(+), 17 deletions(-)
diff --git
Soft-offline shares PG_hwpoison with hard-offline to keep track
of memory error, but recently we found that the approach can be
undesirable for soft-offline because it never expects to stop
applications unlike hard-offline.
So this patch suggests that memory error handler (not only sets
The argument @flag no longer affects the behavior of soft_offline_page()
and its variants, so let's remove them.
Signed-off-by: Naoya Horiguchi
---
drivers/base/memory.c | 2 +-
include/linux/mm.h| 2 +-
mm/madvise.c | 2 +-
mm/memory-failure.c | 27 +--
Soft-offline shares PG_hwpoison with hard-offline to keep track
of memory error, but recently we found that the approach can be
undesirable for soft-offline because it never expects to stop
applications unlike hard-offline.
So this patch suggests that memory error handler (not only sets
The argument @flag no longer affects the behavior of soft_offline_page()
and its variants, so let's remove them.
Signed-off-by: Naoya Horiguchi
---
drivers/base/memory.c | 2 +-
include/linux/mm.h| 2 +-
mm/madvise.c | 2 +-
mm/memory-failure.c | 27 +--
On Thu, Nov 8, 2018 at 7:15 PM Dmitry V. Levin wrote:
> The uapi/linux/audit.h header is going to use EM_XTENSA in order
> to define AUDIT_ARCH_XTENSA which is needed to implement
> syscall_get_arch() which in turn is required to extend
> the generic ptrace API with PTRACE_GET_SYSCALL_INFO
On Thu, Nov 8, 2018 at 7:15 PM Dmitry V. Levin wrote:
> The uapi/linux/audit.h header is going to use EM_XTENSA in order
> to define AUDIT_ARCH_XTENSA which is needed to implement
> syscall_get_arch() which in turn is required to extend
> the generic ptrace API with PTRACE_GET_SYSCALL_INFO
On 8/11/2018 8:37 PM, Thierry Reding wrote:
> On Mon, Nov 05, 2018 at 05:32:34PM +0800, Wei Ni wrote:
>> Fix dereference dev before null check.
>>
>> Signed-off-by: Wei Ni
>> ---
>> drivers/thermal/tegra/soctherm.c | 4 +++-
>> 1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git
On 8/11/2018 8:37 PM, Thierry Reding wrote:
> On Mon, Nov 05, 2018 at 05:32:34PM +0800, Wei Ni wrote:
>> Fix dereference dev before null check.
>>
>> Signed-off-by: Wei Ni
>> ---
>> drivers/thermal/tegra/soctherm.c | 4 +++-
>> 1 file changed, 3 insertions(+), 1 deletion(-)
>>
>> diff --git
On Fri, Nov 09, 2018 at 10:38:19AM +0530, Vinod Koul wrote:
> On 08-11-18, 15:04, Shawn Guo wrote:
> > From: Sriharsha Allenki
> >
> > It adds bindings for Synopsys 28nm femto phy controller that supports
> > LS/FS/HS usb connectivity on Qualcomm chipsets.
> >
> > Signed-off-by: Sriharsha
On Fri, Nov 09, 2018 at 10:38:19AM +0530, Vinod Koul wrote:
> On 08-11-18, 15:04, Shawn Guo wrote:
> > From: Sriharsha Allenki
> >
> > It adds bindings for Synopsys 28nm femto phy controller that supports
> > LS/FS/HS usb connectivity on Qualcomm chipsets.
> >
> > Signed-off-by: Sriharsha
On 08-11-18, 22:27, Bjorn Andersson wrote:
> On Thu 08 Nov 22:16 PST 2018, Vinod Koul wrote:
>
> > From: Bjorn Andersson
> >
> > Enable remoteproc configs to boot the remoteprocs on QC chipsets. These
> > are common configs and not specific to a specific SoC so should be enabled
> > across the
On 08-11-18, 22:27, Bjorn Andersson wrote:
> On Thu 08 Nov 22:16 PST 2018, Vinod Koul wrote:
>
> > From: Bjorn Andersson
> >
> > Enable remoteproc configs to boot the remoteprocs on QC chipsets. These
> > are common configs and not specific to a specific SoC so should be enabled
> > across the
On Fri, 9 Nov 2018 10:30:39 +0530
Naga Sureshkumar Relli wrote:
> This patch adds the dts binding document for arasan nand flash controller
>
> Signed-off-by: Naga Sureshkumar Relli
> ---
> Changes in v12:
> - Removed interrupt-parent description as it is implied as suggested by
>Rob
On Fri, 9 Nov 2018 10:30:39 +0530
Naga Sureshkumar Relli wrote:
> This patch adds the dts binding document for arasan nand flash controller
>
> Signed-off-by: Naga Sureshkumar Relli
> ---
> Changes in v12:
> - Removed interrupt-parent description as it is implied as suggested by
>Rob
On Thu 08 Nov 22:16 PST 2018, Vinod Koul wrote:
> From: Bjorn Andersson
>
> Enable remoteproc configs to boot the remoteprocs on QC chipsets. These
> are common configs and not specific to a specific SoC so should be enabled
> across the board.
>
> Signed-off-by: Bjorn Andersson
>
On Thu 08 Nov 22:16 PST 2018, Vinod Koul wrote:
> From: Bjorn Andersson
>
> Enable remoteproc configs to boot the remoteprocs on QC chipsets. These
> are common configs and not specific to a specific SoC so should be enabled
> across the board.
>
> Signed-off-by: Bjorn Andersson
>
On Thu, Nov 08 2018, J. Bruce Fields wrote:
> On Fri, Nov 09, 2018 at 11:38:19AM +1100, NeilBrown wrote:
>> On Thu, Nov 08 2018, J. Bruce Fields wrote:
>>
>> > On Mon, Nov 05, 2018 at 12:30:48PM +1100, NeilBrown wrote:
>> >> When we find an existing lock which conflicts with a request,
>> >> and
On Thu, Nov 08 2018, J. Bruce Fields wrote:
> On Fri, Nov 09, 2018 at 11:38:19AM +1100, NeilBrown wrote:
>> On Thu, Nov 08 2018, J. Bruce Fields wrote:
>>
>> > On Mon, Nov 05, 2018 at 12:30:48PM +1100, NeilBrown wrote:
>> >> When we find an existing lock which conflicts with a request,
>> >> and
On 2018-11-04 21:26, Boris Brezillon wrote:
Hi Abhishek,
On Fri, 20 Jul 2018 15:03:48 +0200
Boris Brezillon wrote:
On Fri, 20 Jul 2018 17:46:38 +0530
Abhishek Sahu wrote:
> Hi Boris,
>
> On 2018-07-19 03:13, Boris Brezillon wrote:
> > On Wed, 18 Jul 2018 23:23:50 +0200
> > Miquel Raynal
On 2018-11-04 21:26, Boris Brezillon wrote:
Hi Abhishek,
On Fri, 20 Jul 2018 15:03:48 +0200
Boris Brezillon wrote:
On Fri, 20 Jul 2018 17:46:38 +0530
Abhishek Sahu wrote:
> Hi Boris,
>
> On 2018-07-19 03:13, Boris Brezillon wrote:
> > On Wed, 18 Jul 2018 23:23:50 +0200
> > Miquel Raynal
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