Add documentation about how to properly use the Ingenic TCU
(Timer/Counter Unit) drivers from devicetree.
Signed-off-by: Paul Cercueil
---
Notes:
v4: New patch in this series. Corresponds to V2 patches 3-4-5 with
added content.
v5: - Edited PWM/watchdog DT bindings
Add myself as maintainer for the ingenic-timer and ingenic-ost drivers.
Signed-off-by: Paul Cercueil
---
Notes:
v2: No change
v3: No change
v4: No change
v5: Update with new files
v6: No change
v7: No change
v8: No change
v9: No
Previously the jz4740_wdt_set_timeout() function was starting the timer
unconditionally, even if it was stopped when that function was entered.
Now, the timer will be restarted only if it was already running before
this function is called.
Signed-off-by: Paul Cercueil
Reviewed-by: Guenter Roeck
From: Maarten ter Huurne
OST is the OS Timer, a 64-bit timer/counter with buffered reading.
SoCs before the JZ4770 had (if any) a 32-bit OST; the JZ4770 and
JZ4780 have a 64-bit OST.
This driver will register both a clocksource and a sched_clock to the
system.
Signed-off-by: Maarten ter
This is cleaner, more future-proof, and incidentally it also fixes the
PWM resetting its config when stopped/started several times.
Signed-off-by: Paul Cercueil
---
Notes:
v9: New patch
drivers/pwm/pwm-jz4740.c | 37 -
1 file changed, 12 insertions(+),
Since we broke the ABI by changing the clock, the driver was also
updated to use the regmap provided by the TCU driver.
Signed-off-by: Paul Cercueil
Reviewed-by: Guenter Roeck
---
Notes:
v6: New patch
v7: No change
v8: No change
v9: No change
The previous algorithm hardcoded details about how the TCU clocks work.
The new algorithm will use clk_round_rate to find the perfect clock rate
for the PWM channel.
Signed-off-by: Paul Cercueil
---
Notes:
v9: New patch
drivers/pwm/pwm-jz4740.c | 26 +++---
1 file
Right now none of the Ingenic-based boards probe this driver from
devicetree. This driver defined three compatible strings for the exact
same behaviour. Before these strings are used, we can remove two of
them.
Signed-off-by: Paul Cercueil
Acked-by: Thierry Reding
---
Notes:
v5: New patch
On Thu, Dec 27, 2018 at 9:02 AM Vincent Guittot
wrote:
>
> In the original behavior, the cs_rq was removed from the list only
> when the cgroup was removed.
> patch a9e7f6544b9c (sched/fair: Fix O(nr_cgroups) in load balance
> path) has added an optimization which remove the cfs_rq when there
>
Depending on MACH_JZ47xx prevent us from creating a generic kernel that
works on more than one MIPS board. Instead, we just depend on MIPS being
set.
On other architectures, this driver can still be built, thanks to
COMPILE_TEST. This is used by automated tools to find bugs, for
instance.
Stefan Wahren writes:
> Hi Paul,
>
>> Paul Kocialkowski hat am 24. Dezember 2018
>> um 10:10 geschrieben:
>>
>>
>> Hi,
>>
>> On Sat, 2018-12-22 at 13:19 +0100, Stefan Wahren wrote:
>> > Hi Paul,
>> >
>> > > Paul Kocialkowski hat am 21. Dezember
>> > > 2018 um 13:11 geschrieben:
>> > >
The ingenic-timer "TCU" driver provides us with a regmap, that we can
use to safely access the TCU registers.
While this driver is devicetree-compatible, it is never (as of now)
probed from devicetree, so this change does not introduce a ABI problem
with current devicetree files.
Signed-off-by:
The ingenic-timer "TCU" driver provides us with clocks, that can be
(un)gated, reparented or reclocked from devicetree, instead of having
these settings hardcoded in this driver.
While this driver is devicetree-compatible, it is never (as of now)
probed from devicetree, so this change does not
The default clock (12 MHz) is too fast for the system timer.
Signed-off-by: Paul Cercueil
---
Notes:
v8: New patch
v9: Don't configure clock timer1, as the OS Timer is used as
clocksource on this SoC
arch/mips/boot/dts/ingenic/gcw0.dts | 6 ++
1 file changed, 6
The default clock (12 MHz) is too fast for the system timer, which fails
to report time accurately.
Signed-off-by: Paul Cercueil
---
Notes:
v5: New patch
v6: Remove ingenic,clocksource-channel property
v7: No change
v8: No change
v9: No change
The OST driver provides a clocksource and sched_clock that are much more
accurate than the default ones.
Signed-off-by: Paul Cercueil
---
Notes:
v8: New patch
v9: No change
arch/mips/configs/gcw0_defconfig | 17 +++--
1 file changed, 11 insertions(+), 6 deletions(-)
Probe the few drivers using PWMs from devicetree, now that we have a
devicetree node for the PWM driver.
Signed-off-by: Paul Cercueil
---
Notes:
v5: New patch
v6: No change
v7: No change
v8: No change
v9: No change
arch/mips/boot/dts/ingenic/qi_lb60.dts |
Add the missing TCU clock to the list of clocks supplied by the CGU for
the JZ4740 SoC.
Signed-off-by: Paul Cercueil
Acked-by: Stephen Boyd
Acked-by: Rob Herring
---
Notes:
v5: New patch
v6: No change
v7: No change
v8: No change
v9: No change
We cannot boot to userspace (not even initramfs) if the timer driver is
not present; so it makes sense to enable it unconditionally when
MACH_INGENIC is set.
Signed-off-by: Paul Cercueil
---
Notes:
v5: New patch
v6: No change
v7: No change
v8: No change
v9:
The default clock (48 MHz) is too fast for the system timer.
Signed-off-by: Paul Cercueil
---
Notes:
v5: New patch
v6: Set also the rate for the clocksource channel's clock
v7: No change
v8: No change
v9: Don't configure clock timer1, as the OS Timer is used
The OST driver provides a clocksource and sched_clock that are much more
accurate than the default ones.
Signed-off-by: Paul Cercueil
---
Notes:
v5: New patch
v6: No change
v7: No change
v8: No change
v9: No change
arch/mips/configs/ci20_defconfig | 1 +
1
The TCU channels 0 and 1 were previously reserved for system tasks, and
thus unavailable for PWM.
Signed-off-by: Paul Cercueil
---
Notes:
v6: New patch
v7: No change
v8: ingenic_tcu_[request,release]_channel are dropped. We now use
the memory resources provided to
This driver handles the TCU (Timer Counter Unit) present on the Ingenic
JZ47xx SoCs, and provides the kernel with a system timer, and optionally
with a clocksource and a sched_clock.
It also provides clocks and interrupt handling to client drivers.
Signed-off-by: Paul Cercueil
---
Notes:
The old clocksource/timer platform code is now obsoleted by the newly
introduced ingenic-timer and ingenic-ost drivers.
Signed-off-by: Paul Cercueil
---
Notes:
v5: New patch
v6: No change
v7: No change
v8: No change
v9: No change
Add DTS nodes for the JZ4780, JZ4770 and JZ4740 devicetree files.
Signed-off-by: Paul Cercueil
---
Notes:
v5: New patch
v6: Fix register lengths in watchdog/pwm nodes
v7: No change
v8: - Fix wrong start address for PWM node
- Add system timer and
Instead of requesting the "ext" clock and handling the watchdog clock
divider and gating in the watchdog driver, we now request and use the
"wdt" clock that is supplied by the ingenic-timer "TCU" driver.
The major benefit is that the watchdog's clock rate and parent can now
be specified from
Depending on MACH_INGENIC prevent us from creating a generic kernel that
works on more than one MIPS board. Instead, we just depend on MIPS being
set.
On other architectures, this driver can still be built, thanks to
COMPILE_TEST. This is used by automated tools to find bugs, for
instance.
This header provides clock numbers for the ingenic,tcu
DT binding.
Signed-off-by: Paul Cercueil
Reviewed-by: Rob Herring
Acked-by: Stephen Boyd
---
Notes:
v2: Use SPDX identifier for the license
v3: No change
v4: No change
v5: s/JZ47*_/TCU_/ and dropped
Hi,
This is the v9 of my patchset to add support for the Timer/Counter Unit
present on Ingenic JZ47xx SoCs.
Changes from v8 mainly include:
- The system timer and clocksource sub-nodes of the ingenic-timer driver
are gone. Now, the ingenic-timer will use the (optional) property
named
Add a documentation file about the Timer/Counter Unit (TCU) present in
the Ingenic JZ47xx SoCs.
The Timer/Counter Unit (TCU) in Ingenic JZ47xx SoCs is a multi-function
hardware block. It features up to to eight channels, that can be used as
counters, timers, or PWM.
- JZ4725B, JZ4750, JZ4755
* Adhemerval Zanella:
> Also for glibc standpoint, although reverting it back to use getdents
> syscall for non-LFS mode might fix this issue for architectures that
> provides non-LFS getdents syscall it won't be a fix for architectures
> that still provides off_t different than off64_t *and*
On 27/12/2018 15:18, Florian Weimer wrote:
> We have a bit of an interesting problem with respect to the d_off
> field in struct dirent.
>
> When running a 64-bit kernel on certain file systems, notably ext4,
> this field uses the full 63 bits even for small directories (strace -v
> output,
* Andy Lutomirski:
>> On Dec 27, 2018, at 10:18 AM, Florian Weimer wrote:
>>
>> We have a bit of an interesting problem with respect to the d_off
>> field in struct dirent.
>>
>> When running a 64-bit kernel on certain file systems, notably ext4,
>> this field uses the full 63 bits even for
of_find_node_by_type() acquires a reference to the node returned by it
and that reference needs to be dropped by its caller. setup_smp()
doesn't do that, so fix it by converting to for_each_of_cpu_node().
Signed-off-by: Yangtao Li
---
arch/csky/kernel/smp.c | 2 +-
1 file changed, 1
On Thu, 27 Dec 2018 at 17:19, Florian Weimer wrote:
> We have a bit of an interesting problem with respect to the d_off
> field in struct dirent.
>
> When running a 64-bit kernel on certain file systems, notably ext4,
> this field uses the full 63 bits even for small directories (strace -v
>
* Da Shi Cao:
> The cpu_khz and tsc_khz are now read directly by the cpuid
> instruction, and they are deemed to be very accurate. But this is not
> the case in our situation. The OS time lags behind about 8 seconds per
> hour. The CPU information is as follows:
Is virtualization involved? Do
We have a bit of an interesting problem with respect to the d_off
field in struct dirent.
When running a 64-bit kernel on certain file systems, notably ext4,
this field uses the full 63 bits even for small directories (strace -v
output, wrapped here for readability):
getdents(3, [
Convert VBUS GPIO to use GPIO descriptors from
and stop using the old GPIO API.
Signed-off-by: Nishad Kamdar
---
drivers/staging/emxx_udc/emxx_udc.c | 31 +++--
drivers/staging/emxx_udc/emxx_udc.h | 2 ++
2 files changed, 18 insertions(+), 15 deletions(-)
diff --git
Currently attach_dev() in power domain infrastructure still does
not support multi domains case as the struct device *dev passed
down from genpd_dev_pm_attach_by_id() is a virtual PD device, it
does not help for parsing the real device information from device
tree, e.g. Device/Power IDs, Clocks
On Tue, Dec 18, 2018 at 06:24:35PM +0100, Andrea Righi wrote:
> On Tue, Dec 18, 2018 at 01:50:26PM +0900, Masami Hiramatsu wrote:
> ...
> > > Side question: there are certain symbols in arch/x86/xen that should be
> > > blacklisted explicitly, because they're non-attachable.
> > >
> > > More
On Thu, Dec 27, 2018 at 6:28 AM Dmitry Vyukov wrote:
>
> Lots of kernel bug reports routinely get lost on mailing lists, which is bad.
Nobody reads the kernel mailing list directly - there's just too much traffic.
And honestly, even fewer people then read the syzbot reports, because
they are so
Hi Li,
On Thu, Dec 27, 2018 at 11:27:11AM -0500, Yangtao Li wrote:
> The of_find_node_by_type() returns a node pointer with refcount
> incremented, but there is the lack of use of the of_node_put() when
> done. Add the missing of_node_put() to release the refcount.
>
> Signed-off-by: Yangtao Li
On Thu, 27 Dec 2018 at 17:40, Sargun Dhillon wrote:
>
> On Thu, Dec 27, 2018 at 5:23 AM Vincent Guittot
> wrote:
> >
> > Adding Sargun and Dimitry who faced similar problem
> > Adding Tejun
> >
> > On Thu, 27 Dec 2018 at 11:21, Vincent Guittot
> > wrote:
> > >
> > > Le Thursday 27 Dec 2018 à
On Thu 27-12-18 16:05:18, Konstantin Khorenko wrote:
> On 12/26/2018 11:40 AM, Michal Hocko wrote:
> > Appart from general comments as a reply to the cover (btw. this all
> > should be in the changelog because this is the _why_ part of the
> > justification which should be _always_ part of the
h8300 builds fail with:
In file included from drivers/of/address.c:11:
include/linux/pci.h:1966:20: error: redefinition of 'pcibios_penalize_isa_irq'
This is because CONFIG_PCI is not enabled, and pcibios_penalize_isa_irq()
is now declared as inline static function in generic code if this is the
On Thu 27-12-18 15:18:54, Konstantin Khorenko wrote:
> Hi Michal,
>
> thank you very much for your questions, please see my notes below.
>
> On 12/26/2018 11:35 AM, Michal Hocko wrote:
> > On Tue 25-12-18 18:39:26, Konstantin Khorenko wrote:
> >> Q: Why do we need to bother at all?
> >> A: If a
On 12/26/18 7:50 PM, Matthew Wilcox wrote:
> On Wed, Dec 26, 2018 at 01:42:56PM -0600, Aditya Pakki wrote:
>> In sysctl_extfrag_handler(), proc_dointvec_minmax() can return an
>> error. The fix propagates the error upstream in case of failure.
>
> Why not just ...
Yes, this change (below) makes
On Thu, Dec 27, 2018 at 5:23 AM Vincent Guittot
wrote:
>
> Adding Sargun and Dimitry who faced similar problem
> Adding Tejun
>
> On Thu, 27 Dec 2018 at 11:21, Vincent Guittot
> wrote:
> >
> > Le Thursday 27 Dec 2018 à 10:21:53 (+0100), Vincent Guittot a écrit :
> > > Hi Xie,
> > >
> > > On Thu,
On 12/26/18 3:03 PM, Sam Ravnborg wrote:
Fix fallout in various files/drivers.
What fallout is being fixed? It would be helpful if we received the full
patch series for context. It would also be nice to have a more detailed
description in this commit message.
The of_find_node_by_type() returns a node pointer with refcount
incremented, but there is the lack of use of the of_node_put() when
done. Add the missing of_node_put() to release the refcount.
Signed-off-by: Yangtao Li
---
arch/csky/kernel/smp.c | 10 --
1 file changed, 8 insertions(+),
Introduce bitmap alloc/free helpers when contiguous
memory is not necessary.
Signed-off-by: Peng Wang
---
include/linux/bitmap.h | 3 +++
lib/bitmap.c | 19 +++
2 files changed, 22 insertions(+)
diff --git a/include/linux/bitmap.h b/include/linux/bitmap.h
index
On 11:43-20181227, Lokesh Vutla wrote:
> Each resource with in the device can be uniquely identified
> by a type and subtype as defined by TISCI. Since this is generic
> across the devices, resource allocation also can be made generic
> instead of each client driver handling the reso
On 12/26/2018 11:40 AM, Michal Hocko wrote:
> Appart from general comments as a reply to the cover (btw. this all
> should be in the changelog because this is the _why_ part of the
> justification which should be _always_ part of the changelog).
Thank you, will add in the next version of the
The driver's interrupt handler checks whether a message is currently
being handled with the curr_msg pointer. When it is NULL, the interrupt
is considered to be unexpected. Similarly, the i2c_start_transfer
routine checks for the remaining number of messages to handle in
num_msgs.
However, these
On 2018-10-31 15:30, Richard Guy Briggs wrote:
> On 2018-10-19 19:18, Paul Moore wrote:
> > On Sun, Aug 5, 2018 at 4:33 AM Richard Guy Briggs wrote:
> > > Add audit container identifier auxiliary record(s) to NETFILTER_PKT
> > > event standalone records. Iterate through all potential audit
On Wed, Dec 26, 2018 at 3:06 AM Qian Cai wrote:
>
> Due to 871ac3d540f (kasan: initialize shadow to 0xff for tag-based
> mode), kmemleak is broken again with KASAN. It needs a similar fix
> from e55058c2983 (mm/memblock.c: skip kmemleak for kasan_init()).
>
> Signed-off-by: Qian Cai
Hi Qian,
Hi Michal,
thank you very much for your questions, please see my notes below.
On 12/26/2018 11:35 AM, Michal Hocko wrote:
> On Tue 25-12-18 18:39:26, Konstantin Khorenko wrote:
>> Q: Why do we need to bother at all?
>> A: If a node is highly loaded and its memory is significantly fragmented
>>
This patch set adds devicetree support for hih6130, so it can
be properly auto-probed using devicetree files
Andreas Kemnade (2):
hwmon: (hih6130) add dtb compatibility tables
devicetree: hwmon: Add bindings documentation for HIH6130
Documentation/devicetree/bindings/hwmon/hih6130.txt | 12
Add bindings documentation for HIH6130 driver.
Signed-off-by: Andreas Kemnade
---
Documentation/devicetree/bindings/hwmon/hih6130.txt | 12
1 file changed, 12 insertions(+)
create mode 100644 Documentation/devicetree/bindings/hwmon/hih6130.txt
diff --git
This allows the hih6130 to be used in devicetree files and auto-probed
that way.
Signed-off-by: Andreas Kemnade
---
drivers/hwmon/hih6130.c | 11 ++-
1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/drivers/hwmon/hih6130.c b/drivers/hwmon/hih6130.c
index
From: Juergen Fitschen
Slave mode driver is based on the concept of i2c-designware driver.
Signed-off-by: Juergen Fitschen
[ludovic.desroc...@microchip.com: rework Kconfig]
Signed-off-by: Ludovic Desroches
---
drivers/i2c/busses/Kconfig | 13 +++
drivers/i2c/busses/Makefile
From: Juergen Fitschen
The single file i2c-at91.c has been split into core code (i2c-at91-core.c)
and master mode specific code (i2c-at91-master.c). This should enhance
maintainability and reduce ifdeffery for slave mode related code.
The code itself hasn't been touched. Shared functions only
From: Juergen Fitschen
In order to implement slave mode support for the at91 hardware we have to
segregate all master mode specific function parts from the general parts.
The upcoming slave mode patch will call its sepcific probe resp. init
function instead of the master mode functions after the
[Ludovic Desroches: see Changes section]
Based on the discussion we had on the i2c-linux list [1], I wrote a patch for
AT91 hardware and tried to fulfill the Linux I2C slave interface description
[2] as good as possible. This enables aforementioned hardware to act as an I2C
slave that can be
Hi Stefan,
On Thu, 2018-12-27 at 15:05 +0100, Stefan Wahren wrote:
> Hi Paul,
>
> > Paul Kocialkowski hat am 24. Dezember 2018
> > um 10:10 geschrieben:
> >
> >
> > Hi,
> >
> > On Sat, 2018-12-22 at 13:19 +0100, Stefan Wahren wrote:
> > > Hi Paul,
> > >
> > > > Paul Kocialkowski hat am
On Wed, Jun 13, 2018 at 9:15 AM Peng Donglin wrote:
>
> Use DEFINE_SHOW_ATTRIBUTE macro to simplify the code.
>
> Signed-off-by: Peng Donglin
> ---
> arch/arm/mm/ptdump_debugfs.c | 13 +
> 1 file changed, 1 insertion(+), 12 deletions(-)
>
> diff --git a/arch/arm/mm/ptdump_debugfs.c
On Mon, Dec 17, 2018 at 12:54:58PM -0800, a...@linux-foundation.org wrote:
> http://ozlabs.org/~akpm/mmots/broken-out/proc-commit-to-genradix.patch
> Subject: proc: commit to genradix
>
> The new generic radix trees have a simpler API and implementation, and no
> limitations on number of
在 2018-12-27四的 22:34 +0800，Icenowy Zheng写道：
> The SMI SM3350 USB-UFS bridge controller cannot handle long sense
> request
> correctly and will make the chip refuse to do read/write when
> requested
> long sense.
>
> Add a bad sense quirk for it.
>
> Signed-off-by: Icenowy Zheng
> ---
I forgot
在 2018-12-27四的 22:34 +0800，Icenowy Zheng写道：
> Currently the code will set US_FL_SANE_SENSE flag unconditionally if
> device claims SPC3+, however we should allow US_FL_BAD_SENSE flag to
> prevent this behavior, because SMI SM3350 UFS-USB bridge controller,
> which claims SPC4, will show strange
Currently the code will set US_FL_SANE_SENSE flag unconditionally if
device claims SPC3+, however we should allow US_FL_BAD_SENSE flag to
prevent this behavior, because SMI SM3350 UFS-USB bridge controller,
which claims SPC4, will show strange behavior with 96-byte sense
(put the chip into a wrong
The SMI SM3350 USB-UFS bridge controller cannot handle long sense request
correctly and will make the chip refuse to do read/write when requested
long sense.
Add a bad sense quirk for it.
Signed-off-by: Icenowy Zheng
---
drivers/usb/storage/unusual_devs.h | 12
1 file changed, 12
SMI SM3350 UFS-USB bridge controller cannot handle REQUEST SENSE command
with long sense (96-bytes) well, and will even trap the controller into
a state that refuses to do read/write command.
Currently Linux uncondintionally set US_FL_SANE_SENSE for devices
claiming SPC3+, which makes simply add
Hi Linus,
Here's the PR with MMC updates for v4.21. Details about the highlights are as
usual found in the signed tag. Please pull this in!
This time, the PR contains changes crossing subsystems/archs/platforms, which
is mainly because of a bigger modernization of moving from legacy GPIO to GPIO
On Thu, Dec 27, 2018 at 07:09:07AM +, james qian wang (Arm Technology
China) wrote:
> On Mon, Dec 24, 2018 at 08:32:14PM +0800, Liviu Dudau wrote:
> > On Fri, Dec 21, 2018 at 10:00:33AM +, james qian wang (Arm Technology
> > China) wrote:
> > > Add komeda_kms abstracton to attach
On Sun, Nov 25, 2018 at 6:31 PM Paolo Bonzini wrote:
>
> On 20/11/18 09:34, Wanpeng Li wrote:
> > From: Wanpeng Li
> > ...
> > This patch fixes it by bailing out scan ioapic if ioapic is not initialized
> > in
> > kernel.
> > Reported-by: Wei Wu
+Linus, Greg
I want to point out that this was
On Thu, Dec 27, 2018 at 07:09:07AM +, james qian wang (Arm Technology
China) wrote:
> On Mon, Dec 24, 2018 at 08:32:14PM +0800, Liviu Dudau wrote:
> > On Fri, Dec 21, 2018 at 10:00:33AM +, james qian wang (Arm Technology
> > China) wrote:
> > > Add komeda_kms abstracton to attach
Hi everyone,
I already posted this in NXP forum as a comment
(https://community.nxp.com/thread/359397), in yocto mailing list
(https://lists.yoctoproject.org/pipermail/yocto/2018-December/043664.html)
and in meta-freescale mailing list
Hi Paul,
> Paul Kocialkowski hat am 24. Dezember 2018 um
> 10:10 geschrieben:
>
>
> Hi,
>
> On Sat, 2018-12-22 at 13:19 +0100, Stefan Wahren wrote:
> > Hi Paul,
> >
> > > Paul Kocialkowski hat am 21. Dezember
> > > 2018 um 13:11 geschrieben:
> > >
> > >
> > > The driver's interrupt
On Tue, Dec 25, 2018 at 11:12:20PM +0100, Tom Psyborg wrote:
> there was discussion about this just some days ago. CC 4-5 lists is
> more than enough
>
I don't know who you were discussing this with...
You should CC the 0th patch to all the mailinglists. That much is a
clear rule.
For the
HI,
>>
>> The host side of USBSS-DRD controller is compliance
>> with XHCI specification, so it works with
>> standard XHCI linux driver.
>>
>
>After adding my glue layer change (with my phy part) and make one
>change for this code,
>the xHCI can work at my platform. I list the comments from
From: Shun-Chih Yu
MediaTek Command-Queue DMA controller (CQDMA) on MT6765 SoC is dedicated
to memory-to-memory transfer through queue based descriptor management.
There are only 3 physical channels inside CQDMA, while the driver is
extended to support 32 virtual channels for multiple dma users
Changes since v3:
- simplify the ISR and management on descriptors by removing tasklet and
ASYNC_TX_ENABLE_CHANNEL_SWITCH
- remove useless field in mtk_cqdma_vdesc structure
- change dev_info to dev_dbg
- fix typos
Changes since v2:
- fix build warning for kernel with DMA address in 32-bit
From: Shun-Chih Yu
Document the devicetree bindings for MediaTek Command-Queue DMA controller
which could be found on MT6765 SoC or other similar Mediatek SoCs.
Change-Id: I9736c8cac9be160358feeab935fabaffc5730519
Signed-off-by: Shun-Chih Yu
Reviewed-by: Rob Herring
---
The actual value of the RC5 System Number (address) is stored in the
IR_READ_DATA common register masked with 0x1F00 so it have to be shifted
by 8 bits.
Signed-off-by: Ettore Chimenti
---
drivers/media/platform/seco-cec/seco-cec.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
Quoting Brajeswar Ghosh (2018-12-25 13:23:40)
> Remove i915_scheduler.h which is included more than once
>
> Signed-off-by: Brajeswar Ghosh
Thanks for the patch, pushed to dinq.
-Chris
Em Thu, Dec 27, 2018 at 09:06:38AM +0100, Jiri Olsa escreveu:
> On Wed, Dec 26, 2018 at 12:21:21PM +0100, Jiri Olsa wrote:
> > Ondřej reported that when compiled with python3, the python
> > extension regress in evlist.get_pollfd function behaviour.
> >
> > The evlist.get_pollfd creates file
On 27.12.2018 12:59, Christian Borntraeger wrote:
> On 27.12.2018 12:31, Christian Borntraeger wrote:
>> This patch triggers random crashes in the guest kernel on s390 early during
>> boot.
>> No migration and no setting of the balloon is involved.
>>
>
> Adding Conny and Halil,
>
> As the
On Wed, Dec 26, 2018 at 10:03:49PM +0100, Sam Ravnborg wrote:
> Move drm_can_sleep() out of drmP.h to allow users
> to get rid of the drmP.h include.
>
> There was no header file that was a good match for this helper function.
> So add this to drm_util with the relevant includes.
>
> Add include
On Wed, Dec 26, 2018 at 10:03:48PM +0100, Sam Ravnborg wrote:
> Move DRM_SWITCH_POWER out of drmP.h to allow users
> to get rid of the drmP include.
>
> DRM_SWITCH_POWER defines are used in combination
> with drm_device.switch_power_state.
>
> Move the DRM_SWITCH_POWER defines to the file where
On Wed, Dec 26, 2018 at 10:03:47PM +0100, Sam Ravnborg wrote:
> Move DRM_IF_VERSION out of drmP.h to allow users
> to get rid of the drmP include.
>
> Signed-off-by: Sam Ravnborg
> Cc: Maarten Lankhorst
> Cc: Maxime Ripard
> Cc: Sean Paul
> Cc: David Airlie
> Cc: Daniel Vetter
Applied to
On 27.08.2018 03:32, Wei Wang wrote:
> static int init_vqs(struct virtio_balloon *vb)
> {
> - struct virtqueue *vqs[3];
> - vq_callback_t *callbacks[] = { balloon_ack, balloon_ack, stats_request
> };
> - static const char * const names[] = { "inflate", "deflate", "stats" };
> -
On Wed, Dec 26, 2018 at 05:11:23PM +0500, Ivan Mironov wrote:
> SDL 1.2 sets all fields related to the pixel format to zero in some
> cases[1]. Prior to commit db05c48197759 ("drm: fb-helper: Reject all
> pixel format changing requests"), there was an unintentional workaround
> for this that
On 27.12.2018 12:31, Christian Borntraeger wrote:
> This patch triggers random crashes in the guest kernel on s390 early during
> boot.
> No migration and no setting of the balloon is involved.
>
Adding Conny and Halil,
As the QEMU provides no PAGE_HINT feature yet, this quick hack makes the
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Hi Linus,
Please pull powerpc updates for 4.21:
The following changes since commit ccda4af0f4b92f7b4c308d3acc262f4a7e3affad:
Linux 4.20-rc2 (2018-11-11 17:12:31 -0600)
are available in the git repository at:
Dnia środa, 19 grudnia 2018 17:22:51 CET Krzysztof Kozlowski pisze:
> On Wed, 19 Dec 2018 at 17:04, Paweł Chmiel
> wrote:
> >
> > This commit documents new compatible for s5pv210 soc,
> > which will be also supported by this driver.
> >
> > Signed-off-by: Paweł Chmiel
> > ---
> >
On 2018-12-23 10:44 p.m., Yu Zhao wrote:
> On Fri, Dec 21, 2018 at 10:07:26AM +0100, Michel Dänzer wrote:
>> On 2018-12-21 4:10 a.m., Yu Zhao wrote:
>>> Userspace may request pitch alignment that is not supported by GPU.
>>> Some requests 32, but GPU ignores it and uses default 64 when cpp is
>>>
I just got a used Thinkpad X201 (Core i5 M 520, Intel QM57
chipset) and hit some kernel panics while trying to view
image/animation-intensive stuff in Firefox (X11) unless I use
"iommu_intel=igfx_off".
With Debian stable backport kernels, "linux-image-4.17.0-0.bpo.3-amd64"
(4.17.17-1~bpo9+1) has
On Mon, Dec 24, 2018 at 08:06:36PM +0530, Brajeswar Ghosh wrote:
> Remove drm_crtc_internal.h which is included more than once
>
> Signed-off-by: Brajeswar Ghosh
Applied, thanks for your patch.
-Daniel
> ---
> drivers/gpu/drm/drm_drv.c | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git
Hi,
Static analysis with CoverityScan on linux-next detected a potential
null pointer dereference with the following commit:
>From d8a1051ed4ba55679ef24e838a1942c9c40f0a14 Mon Sep 17 00:00:00 2001
From: Mike Kravetz
Date: Sat, 22 Dec 2018 10:55:57 +1100
Subject: [PATCH] hugetlbfs: use
This patch triggers random crashes in the guest kernel on s390 early during
boot.
No migration and no setting of the balloon is involved.
On 27.08.2018 03:32, Wei Wang wrote:
> The new feature, VIRTIO_BALLOON_F_FREE_PAGE_HINT, implemented by this
> series enables the virtio-balloon driver to
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