On Mon, 21 Jan 2019 at 23:53, Rafael J. Wysocki wrote:
>
> On Mon, Jan 21, 2019 at 4:17 PM Vincent Guittot
> wrote:
> >
> > On Fri, 18 Jan 2019 at 13:08, Guenter Roeck wrote:
> > >
> > > On 1/18/19 3:05 AM, Rafael J. Wysocki wrote:
> > > > On Fri, Jan 18, 2019 at 11:53 AM Vincent Guittot
> > >
On Tue, Jan 22, 2019 at 03:20:09PM +0900, Chanwoo Choi wrote:
> Hi Vijai,
>
> This patch looks better. But theare are comments about code clean.
> I added the comments.
>
Thanks. And Thank you for reviewing it Chanwoo. Please find my inline comments.
I will rebase, implement the review comments
On Thu, Jan 17, 2019 at 05:52:28PM +0800, Ching Huang wrote:
> On Thu, 2019-01-17 at 12:16 +0300, Dan Carpenter wrote:
> > On Thu, Jan 17, 2019 at 04:47:07PM +0800, Ching Huang wrote:
> > > On Thu, 2019-01-17 at 10:59 +0300, Dan Carpenter wrote:
> > > > On Thu, Jan 17, 2019 at 11:45:03AM +0800,
> Am 17.01.19 um 08:01 schrieb Peter Chen:
> >
> >>
> >> The i.MX6q/dl USB controller may drive the usb power line directly,
> >> but the polarity depends on the board. Reset state of the polarity is
> >> low-active so add this property to allow it to be high-active.
> >>
> >
> > As far as I
Hi Masahiro,
Masahiro Yamada wrote on Tue, 22 Jan
2019 16:42:55 +0900:
> Although drivers do not directly get access to the private data of
> instruction patterns, let's use unnamed union field to be consistent
> with nand_op_instr.
>
Actually this is how we wrote it the first time. Then we
On Fri, 18 Jan 2019 at 19:12, Liming Sun wrote:
>
> The SPDX license identifier and the boiler plate text are
> contradicting. Only the SPDX license identifier is needed. The
> other one is removed.
>
> Fixes: 86958dcc5ad7 ("mmc: dw_mmc-bluefield: Add driver extension")
> Cc:
On Thu, 10 Jan 2019 at 23:46, Sowjanya Komatineni
wrote:
>
> Add SDMMC initial pad offsets used by auto calibration process.
>
> Add SDMMC fixed drive strengths for Tegra210, Tegra186 and
> Tegra194 which are used when calibration timeouts.
>
> Fixed drive strengths are based on Pre SI Analysis
On Thu, 10 Jan 2019 at 23:46, Sowjanya Komatineni
wrote:
>
> Program initial drive code offsets which will be used by auto
> calibration process.
>
> Program fixed drive strengths for SDMMC pads in pad control
> register when auto cal timeouts.
> Fixed settings are based on Pre-SI analysis of the
On Mon, 14 Jan 2019 at 21:42, Mathieu Malaterre wrote:
>
> There is a plan to build the kernel with -Wimplicit-fallthrough and
> this place in the code produced a warning (W=1).
>
> In this particular case rewrote the comment to start with the string "fall
> through", so as to match the regular
On Wed, 16 Jan 2019 at 20:52, Mathieu Malaterre wrote:
>
> There is a plan to build the kernel with -Wimplicit-fallthrough and
> these places in the code produced warnings (W=1).
>
> This commit removes the following warnings:
>
> drivers/mmc/host/jz4740_mmc.c:745:3: warning: this statement may
On Thu, 10 Jan 2019 at 23:46, Sowjanya Komatineni
wrote:
>
> Add pinctrls for 3V3 and 1V8 pad drive strength configuration for
> Tegra210 sdmmc.
>
> Tegra210 sdmmc has pad configuration registers in pinmux register
> domain and handled thru pinctrl to pinmux device node.
>
> Tegra186 and Tegra194
This patch enable HDMI output on sun8i-h3-nanopi-m1-plus.
Signed-off-by: Corentin Labbe
---
Change since v1:
- removed status=okay from hdmi_out
arch/arm/boot/dts/sun8i-h3-nanopi-m1-plus.dts | 25 +++
1 file changed, 25 insertions(+)
diff --git
Getting the instruction private data ends up with a quite long
accessors, annoyingly.
Use anonymous union field to save 4 characters "ctx." This should
not introduce ambiguity.
I do not know when GCC started to support unnamed struct/union field,
but at least, the current minimum compiler
The new exec_op() scheme takes advantage of union
in order to store instruction private data, which is mutually
exclusive.
I felt a bit annoyed with the long accessors.
At least, we can omit "ctx." by making the union anonymous.
I converted nand_op_instr and nand_op_parser_pattern_elem.
I still
Although drivers do not directly get access to the private data of
instruction patterns, let's use unnamed union field to be consistent
with nand_op_instr.
Signed-off-by: Masahiro Yamada
---
drivers/mtd/nand/raw/nand_base.c | 12 ++--
include/linux/mtd/rawnand.h | 8
2
I wanted to test the virtex440-ml507 qemu machine and found that the dtb
for it was not builded.
All powerpc DTB are only built when CONFIG_OF_ALL_DTBS is set which depend on
COMPILE_TEST.
This patchs adds build of virtex dtbs depending on
CONFIG_XILINX_VIRTEX440_GENERIC_BOARD option.
On Mon, Dec 31, 2018 at 3:54 AM Sergei Trofimovich wrote:
>
> Fix page fault handling code to fixup r16-r18 registers.
> Before the patch code had off-by-two registers bug.
> This bug caused overwriting of ps,pc,gp registers instead
> of fixing intended r16,r17,r18 (see `struct pt_regs`).
>
>
Hi, Kirll,
On 1/15/19 7:45 PM, Cao jin wrote:
> Hi,
> I have been digging into this file for a while, and I still have 2
> questions unclear, hope to get your help.
>
>
> 2.
> Why gdt64 has following definition?:
>
> gdt64:
> .word gdt_end - gdt
> .long 0
> .word 0
>
From: Priit Laes
Although TMDS clock is required for HDMI to properly function,
nobody called clk_prepare_enable(). This fixes reference counting
issues and makes sure clock is running when it needs to be running.
Due to TDMS clock being parent clock for DDC clock, TDMS clock
was turned on/off
On Mon, Jan 21, 2019 at 06:58:57PM -0200, Rodrigo Siqueira wrote:
> Fixes license inconsistent related to the VKMS driver and remove the
> redundant boilerplate comment.
>
> Fixes: 854502fa0a38 ("drm/vkms: Add basic CRTC initialization")
>
> Signed-off-by: Rodrigo Siqueira
> ---
>
Hi Takashi,
I love your patch! Yet something to improve:
[auto build test ERROR on sound/for-next]
[also build test ERROR on v5.0-rc2]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
On Mon, Jan 21, 2019 at 05:45:43PM -0500, Antoine Robertson wrote:
> Fix coding style issues
>
> Signed-off-by: Antoine Robertson
> ---
> drivers/tty/moxa.c | 20 +---
> 1 file changed, 9 insertions(+), 11 deletions(-)
What changed from v1?
Always put that below the --- line,
On 18-01-19, 14:45, Matthias Kaehlcke wrote:
> On Fri, Jan 18, 2019 at 03:32:34PM +0530, Viresh Kumar wrote:
> > On 17-01-19, 17:03, Matthias Kaehlcke wrote:
> > > On Fri, Jan 11, 2019 at 02:48:34PM +0530, Viresh Kumar wrote:
> > > > +static void fcs_update(struct freq_constraints *fcs, struct
On Tue, Jan 22, 2019 at 12:31:08AM -0500, Konrad Rzeszutek Wilk wrote:
> On Tue, Jan 22, 2019 at 11:29:16AM +0800, Lei Chen wrote:
> > Hi Konrad,
>
> Hi,
>
> CC-ing stable,Greg,and LKML. Pls see attached and inline patch and explanation
> at bottom.
>
> > I'm running kernel 4.4.153. When
On 21-01-19, 15:12, Amit Kucheria wrote:
> Fix up a couple of error messages
>
> Amit Kucheria (2):
> thermal: of-thermal: Print name of device node with error
> thermal: cpu_cooling: Clarify error message
Acked-by: Viresh Kumar
--
viresh
On Tue, Jan 22, 2019 at 02:27:51PM +0900, Chanwoo Choi wrote:
> Hi Vijai,
>
> On 19. 1. 22. 오후 1:42, Vijai Kumar K wrote:
> > Hi Chanwoo Choi,
> >
> > This is the first time I am sending a driver to LKML. I have a few doubts.
> > Can
> > you please clarify them when you are free?
> >
> > 1. I
From: kbuild test robot
drivers/bluetooth/btusb.c:2683:2-3: Unneeded semicolon
Remove unneeded semicolon.
Generated by: scripts/coccinelle/misc/semicolon.cocci
Fixes: 49e8dd3d9eae ("Bluetooth: btusb: Add protocol support for MediaTek
MT7668U USB devices")
CC: Sean Wang
Signed-off-by:
Hi Sean,
I love your patch! Perhaps something to improve:
[auto build test WARNING on bluetooth-next/master]
[also build test WARNING on v5.0-rc2 next-20190116]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
On Wed, 2019-01-09 at 17:58 +0100, Matthias Brugger wrote:
>
> On 04/01/2019 08:03, chunhui dai wrote:
> > DPI sample on rising and falling edge. It can reduce half data io.
> >
> > Signed-off-by: Jitao Shi
> > Signed-off-by: chunhui dai
> > ---
> > drivers/gpu/drm/mediatek/mtk_dpi.c | 30
On Fri, Jan 11, 2019 at 8:33 PM Souptick Joarder wrote:
>
> Previouly drivers have their own way of mapping range of
> kernel pages/memory into user vma and this was done by
> invoking vm_insert_page() within a loop.
>
> As this pattern is common across different drivers, it can
> be generalized
On Mon 21-01-19 16:27:47, Qian Cai wrote:
[...]
Sorry to miss this before but you want to
> +#define pfn_to_online_page(pfn) \
> +({ \
> + struct page *___page = NULL;
On Tue, Jan 22, 2019 at 01:57:46PM +0900, MyungJoo Ham wrote:
> >Hi Chanwoo Choi,
> >
> >This is the first time I am sending a driver to LKML. I have a few doubts.
> >Can
> >you please clarify them when you are free?
>
> Although I'm not Chanwoo, but a guy who's about 50ft away from his cubicle,
Hi, Eduardo
Best Regards!
Anson Huang
> -Original Message-
> From: Anson Huang
> Sent: 2019年1月10日 17:28
> To: 'Eduardo Valentin'
> Cc: 'robh...@kernel.org' ; 'mark.rutl...@arm.com'
> ; 'catalin.mari...@arm.com'
> ; 'will.dea...@arm.com'
> ; 'rui.zh...@intel.com' ;
>
Please don't review this patch. I've resend patches after adding all the
mailing list.
Sorry for inconvenience. Please review patches with spi/i2c/uart/kernel
mailing list added.
On 2019-01-21 16:51, Alok Chauhan wrote:
Get the interconnect paths for I2C based Serial Engine device
and vote
> On Jan 22, 2019, at 14:45, Kai-Heng Feng wrote:
>
> There are some e1000e devices can only be woken up from D3 one time, by
> plugging ethernet cable. Subsequent cable plugging does set PME bit
> correctly, but it still doesn't get woken up.
>
> Since e1000e connects to the root complex
There are some e1000e devices can only be woken up from D3 one time, by
plugging ethernet cable. Subsequent cable plugging does set PME bit
correctly, but it still doesn't get woken up.
Since e1000e connects to the root complex directly, we rely on ACPI to
wake it up. In this case, the GPE from
Please don't review this patch. I've resend patches after adding all the
mailing list.
Sorry for inconvenience.
On 2019-01-21 16:51, Alok Chauhan wrote:
Add the wrapper to support for interconnect path voting
from GENI QUP. This wrapper provides the functionalities
to individual Serial Engine
Please don't review this patch. I've resend patches after adding all the
mailing list.
Sorry for inconvenience.
On 2019-01-21 16:51, Alok Chauhan wrote:
Add documentation for the interconnect and interconnect-names bindings
for the GENI QUP as detailed by
On Tue, Jan 22, 2019 at 03:46:48AM +, Dexuan Cui wrote:
> > From: Kimberly Brown
> > Sent: Monday, January 21, 2019 6:08 PM
> > Subject: [PATCH] Drivers: hv: vmbus: Add mutex lock to channel show
> > functions
> >
> > The channel level "_show" functions are vulnerable to race conditions.
>
Cadence OSPI controller IP supports Octal IO (x8 IO lines),
It also has an integrated PHY. IP register layout is very
similar to existing QSPI IP except for additional bits to support Octal
and Octal DDR mode. Therefore, extend current driver to support Octal
mode. Only Octal SDR read (1-1-8)mode
AM654 SoC has Cadence Octal SPI controller, which is similar to Cadence
QSPI controller but supports Octal IO(x8 data lines) and Double Data
Rate(DDR) mode. Add new compatible to support OSPI controller on TI's
AM654 SoCs.
Signed-off-by: Vignesh R
Reviewed-by: Rob Herring
---
v4: No changes
Hi CK,
Ok, I'll send it again in an independent patch.
Best Regards
Jitao
On Wed, 2019-01-16 at 14:52 +0800, CK Hu (胡俊光) wrote:
> Hi, Chunhui:
>
> > -Original Message-
> > From: chunhui dai [mailto:chunhui@mediatek.com]
> > Sent: Friday, January 04, 2019 3:04 PM
> > To:
This series adds support for OSPI version of Cadence QSPI controller IP.
Tested with AM654 EVM with MT35x512 Octal flash
Changes:
v4:
Fix comments on v3 by Tudor.
Rebase on top latest linux-next(all dependencies are now part of -next)
v3:
Rebase on top of v7 of Yogesh's series[1]
v2:
spi-nor
Add the layerscape EP device support in pci_endpoint_test driver.
Signed-off-by: Xiaowei Bao
Reviewed-by: Minghuan Lian
Reviewed-by: Zhiqiang Hou
Reviewed-by: Greg KH
---
v2:
- no change
v3:
- no change
v4:
- delate the comments.
v5:
- no change.
v6:
- no change.
Add the PCIE EP node in dts for ls1046a.
Signed-off-by: Xiaowei Bao
Reviewed-by: Minghuan Lian
Reviewed-by: Zhiqiang Hou
Reviewed-by: Rob Herring
---
v2:
- Add the SoC specific compatibles.
v3:
- no change
v4:
- no change
v5:
- change the OB win number due to the RM update.
v6:
- no
Add the PCIe EP mode support for layerscape platform.
Signed-off-by: Xiaowei Bao
Reviewed-by: Minghuan Lian
Reviewed-by: Zhiqiang Hou
Reviewed-by: Kishon Vijay Abraham I
---
depends on: https://patchwork.kernel.org/project/linux-pci/list/?series=66177
v2:
- remove the EP mode check
Add the documentation for the Device Tree binding for the layerscape PCIe
controller with EP mode.
Signed-off-by: Xiaowei Bao
Reviewed-by: Minghuan Lian
Reviewed-by: Zhiqiang Hou
Reviewed-by: Rob Herring
---
v2:
- Add the SoC specific compatibles.
v3:
- modify the commit message.
v4:
- no
Get the interconnect paths for Uart based Serial Engine device
and vote accordingly based on maximum supported Uart frequency.
Signed-off-by: Alok Chauhan
---
drivers/tty/serial/qcom_geni_serial.c | 27 ++-
1 file changed, 26 insertions(+), 1 deletion(-)
diff --git
Add interconnect ports for GENI QUPs to set bus
capabilities.
Signed-off-by: Alok Chauhan
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b/arch/arm64/boot/dts/qcom/sdm845.dtsi
index
Get the interconnect paths for SPI based Serial Engine device
and vote accordingly based on maximum supported SPI frequency.
Signed-off-by: Alok Chauhan
---
drivers/spi/spi-geni-qcom.c | 20 +++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git
Add documentation for the interconnect and interconnect-names bindings
for the GENI QUP as detailed by bindings/interconnect/interconnect.txt.
Signed-off-by: Alok Chauhan
---
Documentation/devicetree/bindings/soc/qcom/qcom,geni-se.txt | 10 ++
1 file changed, 10 insertions(+)
diff
Add the wrapper to support for interconnect path voting
from GENI QUP. This wrapper provides the functionalities
to individual Serial Engine device to get the interconnect
path and to vote for bandwidth based on their need.
This wrapper maintains bandwidth votes from each Serial Engine
and send
Get the interconnect paths for I2C based Serial Engine device
and vote accordingly based on maximum supported I2C frequency.
Signed-off-by: Alok Chauhan
---
drivers/i2c/busses/i2c-qcom-geni.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/i2c/busses/i2c-qcom-geni.c
This patch series contains following:
* Add wrapper framework to support interconnect path from GENI QUPs.
This wrapper enabled and help individual SEs to put their BW request.
Adding this wrapper make sense because we don't want individual SEs
to request to interconnect driver separately
On 19/01/19 1:28 PM, J, KEERTHY wrote:
>
>
> On 1/19/2019 12:42 PM, Andreas Kemnade wrote:
>> On Sat, 19 Jan 2019 12:09:48 +0530
>> "J, KEERTHY" wrote:
>>
>>> On 1/19/2019 1:18 AM, Tony Lindgren wrote:
* Andreas Kemnade [190118 19:42]:
> On Fri, 18 Jan 2019 20:38:47 +0100
>
Documents the protocol that user-space should follow when
communicating with stateless video decoders.
The stateless video decoding API makes use of the new request and tags
APIs. While it has been implemented with the Cedrus driver so far, it
should probably still be considered staging for a
On 2019-01-21 18:13, Mark Brown wrote:
On Mon, Jan 21, 2019 at 04:51:41PM +0530, Alok Chauhan wrote:
Get the interconnect paths for SPI based Serial Engine device
and vote accordingly based on maximum supported SPI frequency.
I don't have any of the other patches in this series or a cover
Hi Vijai,
This patch looks better. But theare are comments about code clean.
I added the comments.
On 19. 1. 21. 오후 6:09, Vijai Kumar K wrote:
> PTN5150A is a small thin low power CC Logic chip supporting
> the USB Type-C connector application with Configurationn Channel(CC)
> control logic
On Mon, Jan 21, 2019 at 10:40:18AM -0500, Jerome Glisse wrote:
> On Mon, Jan 21, 2019 at 03:57:00PM +0800, Peter Xu wrote:
> > There was a special path in handle_userfault() in the past that we'll
> > return a VM_FAULT_NOPAGE when we detected non-fatal signals when waiting
> > for userfault
On Mon, Jan 21, 2019 at 04:53:27PM +0100, Stefan Agner wrote:
> A valid WEIM range configuration must specify range entries for
> all four chip selects. This fixes an error on boot:
> imx-weim: probe of 21b8000.weim failed with error -22
>
> Signed-off-by: Stefan Agner
Applied, thanks.
On Mon, Jan 21, 2019 at 09:57:04AM +, Martyn Welch wrote:
> Add vendor prefix "catalyst" for Catalyst Semiconductor which is
> already in use but undocumented.
>
> Signed-off-by: Martyn Welch
> Reviewed-by: Rob Herring
Applied both, thanks.
From: Rajendra Nayak
With rpmh ARC resources being modelled as power domains with performance
state, we need to proxy vote on these for SDM845.
Add support to vote on multiple of them, now that genpd supports
associating mutliple power domains to a device.
Tested-by: Sibi Sankar
Reviewed-by:
Add binding for the QMP based side-channel communication mechanism to
the AOSS, which is used to control resources not exposed through the
RPMh interface.
Reviewed-by: Rob Herring
Reviewed-by: Stephen Boyd
Signed-off-by: Bjorn Andersson
---
Changes since v2:
- Update indentation of example
-
Update existing and add all missing PIL regions to the reserved memory
map, as described in version 10.
Signed-off-by: Bjorn Andersson
---
Changes since v2:
- New patch
arch/arm64/boot/dts/qcom/sdm845.dtsi | 61 ++--
1 file changed, 58 insertions(+), 3 deletions(-)
Add the ADSP and CDSP nodes for PAS-based remoteproc, supporting booting
these cores on e.g. the MTP, and enable the same for the MTP.
Signed-off-by: Bjorn Andersson
---
Changes since v2:
- New patch
arch/arm64/boot/dts/qcom/sdm845-mtp.dts | 8
arch/arm64/boot/dts/qcom/sdm845.dtsi|
The SDM845 MSS needs the load_state powerdomain voted for during the
duration of the MSS being powered on, to let the AOSS know that it may
not perform certain power save measures. So vote for this.
Tested-by: Sibi Sankar
Reviewed-by: Sibi Sankar
Signed-off-by: Bjorn Andersson
---
Changes
Define the rmtfs memory node, as described in version 10 of the memory
map.
Signed-off-by: Bjorn Andersson
---
Changes since v2:
- New patch
arch/arm64/boot/dts/qcom/sdm845.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
Update the reserved memory map for SDM845, add the ADSP and CDSP nodes,
introduce a communication driver for the AOSS and a PD driver for this and
finally add the modem remoteproc driver.
Bjorn Andersson (8):
arm64: dts: qcom: sdm845: Update PIL region memory map
arm64: dts: qcom: sdm845:
The AOSS QMP genpd provider implements control over power-related
resources related to low-power state associated with the remoteprocs in
the system as well as control over a set of clocks related to debug
hardware in the SoC.
Tested-by: Sai Prakash Ranjan
Signed-off-by: Bjorn Andersson
---
From: Sibi Sankar
This patch adds Q6V5 MSS remoteproc node for SDM845 SoCs.
Signed-off-by: Sibi Sankar
Reviewed-by: Douglas Anderson
Signed-off-by: Bjorn Andersson
---
Changes since v2:
- Picked up Sibi's patch
- Fixed reg to work with address/size-cells as 2
The AOSS QMP driver is used to communicate with the AOSS for certain
side-channel requests, that are not enabled through the RPMh interface.
The communication is a very simple synchronous mechanism of messages
being written in message RAM and a doorbell in the AOSS is rung. As the
AOSS has
The AOSS QMP provides a number of power domains, used for QDSS and
PIL, add the node for this.
Signed-off-by: Bjorn Andersson
---
Changes since v2:
- New patch
arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git
On Mon, Jan 21, 2019 at 11:35:30AM +0530, Vivek Gautam wrote:
> On Sun, Jan 20, 2019 at 5:31 AM Will Deacon wrote:
> > On Thu, Jan 17, 2019 at 02:57:18PM +0530, Vivek Gautam wrote:
> > > Adding a device tree option for arm smmu to enable non-cacheable
> > > memory for page tables.
> > > We
On Mon, Jan 21, 2019 at 10:12:34AM +0100, Peter Zijlstra wrote:
> diff --git a/kernel/locking/qspinlock.c b/kernel/locking/qspinlock.c
> index 8a8c3c208c5e..983b49a75826 100644
> --- a/kernel/locking/qspinlock.c
> +++ b/kernel/locking/qspinlock.c
> @@ -412,6 +412,12 @@ void
Hi Catalin,
On Mon, Jan 21, 2019 at 02:21:28PM +, Catalin Marinas wrote:
> On Sat, Jan 19, 2019 at 11:58:27PM +, Will Deacon wrote:
> > On Thu, Jan 17, 2019 at 07:42:44AM +, chenwandun wrote:
> > > Recently, I do some tests on linux-4.19 and hit a softlockup issue.
> > >
> > > I find
Hi Heikki,
Heikki Krogerus 于2018年10月24日周三 下午11:06写道：
>
> When the connections are defined in firmware, struct
> device_connection will have the fwnode member pointing to
> the device node (struct fwnode_handle) of the requested
> device, and the endpoint will not be used at all in that
> case.
>
On Thu, Jan 17, 2019 at 02:12:24AM +, Peng Ma wrote:
> Add SATA device nodes for fsl-lx2160a and enable support
> for QDS and RDB boards.
>
> Signed-off-by: Peng Ma
> ---
> changed for V3:
> - updated the commit log
>
> arch/arm64/boot/dts/freescale/fsl-lx2160a-qds.dts | 16
On Fri, Jan 18, 2019 at 02:31:13PM +0100, Stefan Agner wrote:
> Since commit d2d0ad2aec4a ("i2c: imx: use open drain for recovery
> GPIO") GPIO lib expects this GPIO to be configured as open drain.
> Make sure we define this GPIO as open drain in the device tree.
> This gets rid of the following
Hi Bjorn and Michael
After trying to reproduce the problem for a whole day, the bug did not show up
any more. So I think the new patch does solve this problem.
> -Original Message-
> From: Bjorn Helgaas [mailto:helg...@kernel.org]
> Sent: Sunday, January 20, 2019 4:13 AM
> To: Michael S.
On Tue, Jan 22, 2019 at 1:06 PM Stephen Rothwell wrote:
>
> Hi all,
>
> Today's linux-next merge of the akpm tree got a conflict in:
>
> Makefile
>
> between commit:
>
> b57304bb03de ("kbuild: remove meaningless prepare2 target")
>
> from the kbuild tree and patch:
>
> "locking/atomics:
On Tue, Jan 22, 2019 at 11:29:16AM +0800, Lei Chen wrote:
> Hi Konrad,
Hi,
CC-ing stable,Greg,and LKML. Pls see attached and inline patch and explanation
at bottom.
> I'm running kernel 4.4.153. When running iotop, I got such failure:
> # iotop -P
> Traceback (most recent call last):
> File
Hi Vijai,
On 19. 1. 22. 오후 1:42, Vijai Kumar K wrote:
> Hi Chanwoo Choi,
>
> This is the first time I am sending a driver to LKML. I have a few doubts. Can
> you please clarify them when you are free?
>
> 1. I have developed and tested this patch on 4.14.89 kernel. When trying to
> mainline
small updates for am335x based shc board:
- switch DTS to SPDX identifier
- fix wrong gpio level for mmc1 cd pin
Heiko Schocher (2):
ARM: dts: am335x-shc.dts: Switch to SPDX identifier
ARM: dts: am335x-shc.dts: fix wrong cd pin level
arch/arm/boot/dts/am335x-shc.dts | 6 ++
1 file
Adopt the SPDX license identifier headers to ease license
compliance management.
Signed-off-by: Heiko Schocher
---
arch/arm/boot/dts/am335x-shc.dts | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm/boot/dts/am335x-shc.dts b/arch/arm/boot/dts/am335x-shc.dts
index
cd pin on mmc1 is GPIO_ACTIVE_LOW not GPIO_ACTIVE_HIGH
Signed-off-by: Heiko Schocher
---
arch/arm/boot/dts/am335x-shc.dts | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/am335x-shc.dts b/arch/arm/boot/dts/am335x-shc.dts
index 5cdaf0cd9401..bfbe27a80006
Hi Laura,
On 17/01/19, 12:39 AM, "linux-nfs-ow...@vger.kernel.org on behalf of Laura
Abbott" wrote:
On 1/7/19 11:18 AM, Dave Jones wrote:
> [ 53.980701] NFSD: Using /var/lib/nfs/v4recovery as the NFSv4 state
recovery directory
> [ 53.981216] NFSD: starting 45-second grace
On 1/21/19 6:30 PM, Rajendra Nayak wrote:
On 1/18/2019 11:09 PM, Stephen Boyd wrote:
Quoting Rajendra Nayak (2019-01-17 20:48:01)
drivers/soc/qcom/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/soc/qcom/Kconfig b/drivers/soc/qcom/Kconfig
index
Signed-off-by: Arthur Demchenkov
>Hi Chanwoo Choi,
>
>This is the first time I am sending a driver to LKML. I have a few doubts. Can
>you please clarify them when you are free?
Although I'm not Chanwoo, but a guy who's about 50ft away from his cubicle,
as he appears to be busy today... :)
>
>1. I have developed and tested this
Hi Chen-Yu,
On Tue, 22 Jan 2019 10:20:28 +0800 Chen-Yu Tsai wrote:
>
> Sorry about that. I've been doing for some time now.
> Should none of the tags be wrapped?
Generally they should be single lines (in my opinion) ... it makes
grepping for things a lot harder if they are split.
--
Cheers,
Hi Chanwoo Choi,
This is the first time I am sending a driver to LKML. I have a few doubts. Can
you please clarify them when you are free?
1. I have developed and tested this patch on 4.14.89 kernel. When trying to
mainline the driver should I rebase and send the patch on top of current
The pull request you sent on Mon, 21 Jan 2019 19:31:35 -0800:
> git://git.infradead.org/users/willy/linux-dax.git tags/xarray-5.0-rc3
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/48b161983ae5266ffa42f0ccaf7224eaeda38e59
Thank you!
--
Deet-doot-dot, I am a bot.
Hi all,
Changes since 20190121:
The vfs tree still had its build failure for which I applied a patch.
The netfilter-next tree still had its build failures but I applied some
supplied patches.
The mali-dp tree still had its failure for which I applied a merge
fix patch.
The pidfd tree changed
On 2019/1/19 0:30, Shannon Nelson wrote:
On Fri, Jan 18, 2019 at 2:51 AM Thomas Gleixner wrote:
The recent addition of SPDX license identifiers to the files in
drivers/net/ethernet/sun created a licensing conflict.
The cassini driver files contain a proper license notice:
* This program
Add devicetree support for Oxalis SoM board from EBS-SYSTART. This
board is one of the 96Boards Enterprise Edition platform. Below are some
of the key features of this board:
* SoC: NXP Layerscape LS1012A
* RAM: 1GB DDR3L
* PMU: NXP VR5100
* Storage: 64MByte SPI Flash for bootloader and RCW,
When building this code on a 32-bit platform such as ARM, there is a
link time error (lld error shown, happpens with ld.bfd too):
ld.lld: error: undefined symbol: __aeabi_uldivmod
>>> referenced by devlink.c
>>> net/core/devlink.o:(devlink_health_buffers_create) in archive
>>>
Hello,
This patchset adds Oxalis board support. This board is one of the
96Boards Enterprise Edition platform from EBS-SYSTART GmbH. Below are some
of the key features of this board:
* SoC: NXP Layerscape LS1012A
* RAM: 1GB DDR3L
* PMU: NXP VR5100
* Storage: 64MByte SPI Flash for bootloader and
Add vendor prefix for EBS-SYSTART GmbH.
Signed-off-by: Manivannan Sadhasivam
Reviewed-by: Rob Herring
---
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
Add devicetree binding for LS1012A SoC based Oxalis board.
Signed-off-by: Manivannan Sadhasivam
---
Documentation/devicetree/bindings/arm/fsl.yaml | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/arm/fsl.yaml
b/Documentation/devicetree/bindings/arm/fsl.yaml
Fix devicetree bindings for Freescale LS1012A and LS1021A SoC based boards.
Fixes: a1a38e1f4d1d ("dt-bindings: arm: Convert FSL board/soc bindings to
json-schema")
Signed-off-by: Manivannan Sadhasivam
---
Documentation/devicetree/bindings/arm/fsl.yaml | 10 +-
1 file changed, 9
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