On Fri, Apr 12, 2019 at 4:12 PM Axel Lin wrote:
> Current code is using devm_regulator_register() so we don't need to save
> *regulator for clean up, use a local variable instead.
>
> Signed-off-by: Axel Lin
Reviewed-by: Linus Walleij
Yours,
Linus Walleij
From: Bartosz Golaszewski
This series adds support for max77650 ultra low-power PMIC. It provides
the core mfd driver and a set of five sub-drivers for the regulator,
power supply, gpio, leds and input subsystems.
Patches 1-4 add the DT binding documents. Patch 5 documents mfd_add_devices().
Hi all,
Today's linux-next merge of the akpm-current tree got a conflict in:
arch/powerpc/mm/mmu_context_iommu.c
between commits:
eb9d7a62c386 ("powerpc/mm_iommu: Fix potential deadlock")
7a3a4d763837 ("powerpc/mm_iommu: Allow pinning large regions")
from the powerpc-fixes tree and
From: Bartosz Golaszewski
Add the DT binding document for the battery charger module of max77650.
Signed-off-by: Bartosz Golaszewski
---
.../power/supply/max77650-charger.txt | 28 +++
1 file changed, 28 insertions(+)
create mode 100644
From: Bartosz Golaszewski
Add a DT binding document for max77650 ultra-low power PMIC. This
describes the core mfd device and the GPIO module.
Signed-off-by: Bartosz Golaszewski
Reviewed-by: Rob Herring
Acked-by: Pavel Machek
Acked-for-MFD-by: Lee Jones
---
From: Bartosz Golaszewski
Add a kernel doc for mfd_add_devices().
Signed-off-by: Bartosz Golaszewski
Acked-by: Pavel Machek
Acked-for-MFD-by: Lee Jones
---
drivers/mfd/mfd-core.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/mfd/mfd-core.c
From: Bartosz Golaszewski
This adds basic support for LEDs for the max77650 PMIC. The device has
three current sinks for driving LEDs.
Signed-off-by: Bartosz Golaszewski
Acked-by: Jacek Anaszewski
Acked-by: Pavel Machek
---
drivers/leds/Kconfig | 6 ++
drivers/leds/Makefile
From: Bartosz Golaszewski
Add the DT binding document for the LEDs module of max77650.
Signed-off-by: Bartosz Golaszewski
Reviewed-by: Rob Herring
Acked-by: Pavel Machek
---
.../bindings/leds/leds-max77650.txt | 57 +++
1 file changed, 57 insertions(+)
create mode
From: Bartosz Golaszewski
Add the core mfd driver for max77650 PMIC. We define five sub-devices
for which the drivers will be added in subsequent patches.
Signed-off-by: Bartosz Golaszewski
---
drivers/mfd/Kconfig | 14 +++
drivers/mfd/Makefile | 1 +
From: Bartosz Golaszewski
Add support for the push- and slide-button events for max77650.
Signed-off-by: Bartosz Golaszewski
Acked-by: Dmitry Torokhov
Acked-by: Pavel Machek
---
drivers/input/misc/Kconfig | 9 +++
drivers/input/misc/Makefile | 1 +
On Mon, Apr 22, 2019 at 10:21:17AM +0800, 王贇 wrote:
> numa balancer is a module which will try to automatically adjust numa
> balancing stuff to gain numa bonus as much as possible.
>
> For each memory cgroup, we process the work in two steps:
>
> On stage 1 we check cgroup's exectime and memory
From: Bartosz Golaszewski
Add the DT binding document for the onkey module of max77650.
Signed-off-by: Bartosz Golaszewski
Reviewed-by: Rob Herring
---
.../bindings/input/max77650-onkey.txt | 26 +++
1 file changed, 26 insertions(+)
create mode 100644
From: Bartosz Golaszewski
Add GPIO support for max77650 mfd device. This PMIC exposes a single
GPIO line.
Signed-off-by: Bartosz Golaszewski
Reviewed-by: Linus Walleij
---
drivers/gpio/Kconfig | 7 ++
drivers/gpio/Makefile| 1 +
drivers/gpio/gpio-max77650.c | 190
From: Bartosz Golaszewski
Add basic support for the battery charger for max77650 PMIC.
Signed-off-by: Bartosz Golaszewski
Reviewed-by: Linus Walleij
Reviewed-by: Sebastian Reichel
---
drivers/power/supply/Kconfig| 7 +
drivers/power/supply/Makefile | 1 +
From: Bartosz Golaszewski
I plan on extending this set of drivers so add myself as maintainer.
Signed-off-by: Bartosz Golaszewski
---
MAINTAINERS | 14 ++
1 file changed, 14 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 09f43f1bdd15..aed6698cc4eb 100644
---
On 4/23/19 10:47 AM, Linus Walleij wrote:
On Wed, Apr 10, 2019 at 1:31 PM Alexandre Torgue
wrote:
The series adds support of chip packages for STM32MP157 SOC.
Patches 1-4 applied to the pin control tree.
Sorry for slowness :(
No pb, thanks Linus. I'll take DT patch in my stm32 tree
There is no reason for another device to request the MMC irq. It should
only be used the MMC device, so remove IRQ_SHARED and replace by
IRQ_ONESHOT as we don't the irq to fire again until the irq thread is
done
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 2 +-
1 file
This is merely a clean up. It makes sense to only ack raised irqs
instead of acking everything all the time.
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/mmc/host/meson-gx-mmc.c
At the moment, all our attempts to enable HS400 on Amlogic chipsets have
been unsuccessful or unreliable. Until we can figure out how to enable this
mode safely and reliably, let's force it off.
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 11 +++
1 file changed, 7
There is already a function available to poll a register until a
condition is met. Let's use it instead of open coding it.
Reviewed-by: Martin Blumenstingl
Signed-off-by: Jerome Brunet
---
drivers/mmc/host/meson-gx-mmc.c | 18 --
1 file changed, 4 insertions(+), 14 deletions(-)
The purpose of this series is too improve reliability of the amlogic mmc
driver on new (g12a) and old ones (axg, gxl, gxbb, etc...)
* The 3 first patches are just harmless clean ups.
* Patch 4 makes sure HS400 can't be enabled, we still have not been able
to crack this modes.
* Patch 5 removes
This remove all the code related to phase settings. Using the Rx phase
for tuning has not been reliable. We had several issues over the past
months, on both v2 and v3 mmc chips After discussing the issue matter
with Amlogic, They suggested to set a phase shift of 180 between Core and
Tx and use
On Fri, Apr 12, 2019 at 8:01 AM Wen Yang wrote:
> The call to of_get_child_by_name returns a node pointer with refcount
> incremented thus it must be explicitly decremented after the last
> usage.
>
> Detected by coccinelle with the following warnings:
> ./drivers/pinctrl/pinctrl-st.c:1188:3-9:
Activating DDR in the Amlogic mmc controller, among other things, will
divide the output clock by 2. So by activating it with clock on, we are
creating a glitch on the output.
Instead, let's deal with DDR when the clock output is off, when setting
the clock.
Signed-off-by: Jerome Brunet
---
Use signal resampling tuning for the UHS and HS200 modes.
Instead of trying to get the *best* resampling setting with complex
window calculation, we just stop on the first working setting.
If the tuning setting later proves unstable, we will just continue the
tuning where we left it.
This patch fixes the sparse warning:
warning: restricted __fs16 degrades to integer
inode->ui_u1.oldids.ui_suid is of type __fs16, a restricted integer.
0X is a 16 bit unsigned integer. Use __force to fix the sparse
warning.
Signed-off-by: Bharath Vedartham
---
fs/ufs/util.h | 4 ++--
1
On Fri, Apr 12, 2019 at 8:01 AM Wen Yang wrote:
> The call to of_find_compatible_node returns a node pointer with refcount
> incremented thus it must be explicitly decremented after the last
> usage.
>
> Detected by coccinelle with the following warnings:
>
Hi Jonathan,
On 4/22/19 10:42, Jonathan Cameron wrote:
On Tue, 16 Apr 2019 14:49:19 +0200
Alexandre wrote:
Hello Jonathan,
On 4/7/19 12:20, Jonathan Cameron wrote:
Hi Alexandre,
So I have no problem with this as an IIO driver, but for devices that
are somewhat 'on the edge' I always like
Hi all,
Today's linux-next merge of the akpm-current tree got a conflict in:
arch/powerpc/mm/mem.c
between commit:
f172acbfae1a ("powerpc/mm: move warning from resize_hpt_for_hotplug()")
26ad26718dfa ("powerpc/mm: Fix section mismatch warning")
from the powerpc tree and commit:
On Mon, Apr 22, 2019 at 10:13:36AM +0800, 王贇 wrote:
> diff --git a/mm/mempolicy.c b/mm/mempolicy.c
> index af171ccb56a2..6513504373b4 100644
> --- a/mm/mempolicy.c
> +++ b/mm/mempolicy.c
> @@ -2031,6 +2031,10 @@ alloc_pages_vma(gfp_t gfp, int order, struct
> vm_area_struct *vma,
>
> pol =
On Mon, Apr 22, 2019 at 10:12:20AM +0800, 王贇 wrote:
> This patch introduced numa execution information, to imply the numa
> efficiency.
>
> By doing 'cat /sys/fs/cgroup/memory/CGROUP_PATH/memory.numa_stat', we
> see new output line heading with 'exectime', like:
>
> exectime 24399843 27865444
On Tue, Apr 23, 2019 at 12:51:13PM +0530, Mukesh Ojha wrote:
> On 4/23/2019 8:58 AM, dmitry.torok...@gmail.com wrote:
> > On Fri, Apr 19, 2019 at 02:13:48PM +0530, Mukesh Ojha wrote:
> > > On 4/19/2019 12:41 PM, dmitry.torok...@gmail.com wrote:
> > > > On Fri, Apr 19, 2019 at 12:17:44PM +0530,
On Wed, Apr 10, 2019 at 1:31 PM Alexandre Torgue
wrote:
> Four packages exist for stm32mp157 die. As ball-out is different between
> them, this patch covers those differences by creating dedicated pinctrl
> dtsi files. Each dtsi pinctrl package file describes the package ball-out
> through
On Wed, Apr 10, 2019 at 1:31 PM Alexandre Torgue
wrote:
> The series adds support of chip packages for STM32MP157 SOC.
Patches 1-4 applied to the pin control tree.
Sorry for slowness :(
Yours,
Linus Walleij
On Mon, Apr 22, 2019 at 10:11:24AM +0800, 王贇 wrote:
> + p->numa_faults_locality[mem_node == numa_node_id() ? 4 : 3] += pages;
Possibly: 3 + !!(mem_node = numa_node_id()), generates better code.
Hi all,
Today's linux-next merge of the akpm-current tree got a conflict in:
kernel/fork.c
between commit:
2897d468ea48 ("clone: add CLONE_PIDFD")
from the pidfd tree and commit:
83e1afab81ac ("userfaultfd: use RCU to free the task struct when fork fails")
from the akpm-current tree.
On Mon, Apr 22, 2019 at 10:11:24AM +0800, 王贇 wrote:
> + * 0 -- remote faults
> + * 1 -- local faults
> + * 2 -- page migration failure
> + * 3 -- remote page accessing after page migration
> + * 4 -- local page accessing after page migration
> @@ -2387,6 +2388,11 @@ void
> 在 2019年4月23日，下午4:06，Paul E. McKenney 写道：
>
> On Tue, Apr 23, 2019 at 09:21:55AM +0800, Jiang Biao wrote:
>> rdp is initialized but never used in synchronize_rcu_expedited(),
>> just remove it.
>>
>> Signed-off-by: Jiang Biao
>
> I queued and pushed both patches for testing and review,
On Mon, Apr 22, 2019 at 10:11:24AM +0800, 王贇 wrote:
> +#ifdef CONFIG_NUMA_BALANCING
> +
> +enum memcg_numa_locality_interval {
> + PERCENT_0_9,
> + PERCENT_10_19,
> + PERCENT_20_29,
> + PERCENT_30_39,
> + PERCENT_40_49,
> + PERCENT_50_59,
> + PERCENT_60_69,
> +
Hi Kefeng,
On Tue, Apr 23, 2019 at 03:50:04PM +0800, Kefeng Wang wrote:
> Using dev_get_drvdata directly.
This assumes that generic device's driver data is exactly the same as platform
device's driver data. This is true today, but does not have to be true
tomorrow.
What is the benefit of
On 18-04-19, 16:11, Rafael J. Wysocki wrote:
> From: Rafael J. Wysocki
>
> There are problems with running time_cpufreq_notifier() on SMP
> systems.
>
> First off, the rdtsc() called from there runs on the CPU executing
> that code and not necessarily on the CPU whose sched_clock() rate is
>
On 23-04-19, 10:19, Rafael J. Wysocki wrote:
> On Mon, Apr 22, 2019 at 10:17 AM Viresh Kumar wrote:
> >
> > On 18-04-19, 16:11, Rafael J. Wysocki wrote:
> > > From: Rafael J. Wysocki
> > >
> > > There are problems with running time_cpufreq_notifier() on SMP
> > > systems.
> > >
> > > First off,
On Thu, 18 Apr 2019, Josh Poimboeuf wrote:
> On Thu, Apr 18, 2019 at 01:29:36PM +0200, Petr Mladek wrote:
> > The commit d0807da78e11d46f ("livepatch: Remove immediate feature") caused
> > that any livepatch was refused when reliable stacktraces were not supported
> > on the given architecture.
>
Hi,
On Thu, 2019-04-11 at 10:37 -0700, Dhaval Giani wrote:
> Hi Folks,
>
> This is a call for participation for the Linux Testing microconference
> at LPC this year.
>
> For those who were at LPC last year, as the closing panel mentioned,
> testing is probably the next big push needed to
On 04/23/2019 01:21 PM, David Hildenbrand wrote:
> On 23.04.19 09:45, Anshuman Khandual wrote:
>>
>>
>> On 04/23/2019 01:07 PM, David Hildenbrand wrote:
>>> On 23.04.19 09:31, Anshuman Khandual wrote:
On 04/18/2019 10:58 AM, Anshuman Khandual wrote:
> On 04/17/2019 11:09 PM,
Compliment of the day to you Dear Friend.
Dear Friend.
I am Mrs.M Compola. am sending this brief letter to solicit your
partnership to transfer $5 million US Dollars. I shall send you
more information and procedures when I receive positive response from
you.
Mrs M Compola
On 23-04-19, 09:07, Quentin Perret wrote:
> On Monday 22 Apr 2019 at 13:55:18 (+0530), Viresh Kumar wrote:
> > On 18-04-19, 09:04, Quentin Perret wrote:
> > > On Thursday 18 Apr 2019 at 09:23:23 (+0530), Viresh Kumar wrote:
> > > > On 17-04-19, 10:43, Quentin Perret wrote:
> > > > > static struct
Actually, the clocks exposed for the cluster are not the CPU clocks, but
the PLL clock used as entry clock for the CPU clocks. The CPU clock will
be managed by a driver submitting in the following patches.
Signed-off-by: Gregory CLEMENT
---
drivers/clk/mvebu/ap806-system-controller.c | 4 ++--
Clock drivers for Armada AP and Armada CP use the same function to
generate unique clock name. A third drivers is coming with the same
need, so it's time to move this function in a common file.
Signed-off-by: Gregory CLEMENT
---
drivers/clk/mvebu/Kconfig | 5
The CPU frequency is managed at the AP level for the Armada 7K/8K. The
CPU frequency is modified by cluster: the CPUs of the same cluster have
the same frequency.
This patch adds the clock driver that will be used by CPUFreq, it is
based on the work of Omri Itach .
Signed-off-by: Gregory CLEMENT
Add cpu clock node on AP
Signed-off-by: Gregory CLEMENT
---
arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi | 4
arch/arm64/boot/dts/marvell/armada-ap806.dtsi | 7 +++
2 files changed, 11 insertions(+)
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
This commit makes sure the driver for the Armada 7K/8K CPU clock is
enabled.
Signed-off-by: Gregory CLEMENT
---
arch/arm64/Kconfig.platforms | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/Kconfig.platforms b/arch/arm64/Kconfig.platforms
index 70498a033cf5..b68b89e7bcb4 100644
Document the device tree binding for the cluster clock controllers found
in the Armada 7K/8K SoCs.
Signed-off-by: Gregory CLEMENT
---
.../arm/marvell/ap806-system-controller.txt | 26 +++
1 file changed, 26 insertions(+)
diff --git
Hello,
This is the forth version of a series allowing to manage the cpu clock
for Armada 7K/8K. The third version was sent more than 3 months
without any relevant feedback since this end of decembe last year.
For these SoCs, the CPUs share the same clock by cluster, so actually
the clock
Hi,
On Mon, 2019-04-15 at 13:48 -0700, Eric Anholt wrote:
> Paul Kocialkowski writes:
>
> > Since the OOM interrupt directly deals with the binner bo, it doesn't
> > make sense to try and handle it without a binner buffer registered.
> >
> > Signed-off-by: Paul Kocialkowski
> > ---
> >
Hi Martin,
On 13/04/2019 14:02, Martin Blumenstingl wrote:
> Hi Neil,
>
> On Fri, Apr 12, 2019 at 12:05 PM Neil Armstrong
> wrote:
>>
>> Amlogic G12A SoCs uses the exact same IR decoder as previous
>> families, add the IR node and the pintctrl setting.
> as far as I can tell there are either
Add PCIe host controller driver for DesignWare core based
PCIe controller IP present in Tegra194.
Signed-off-by: Vidya Sagar
---
Changes since [v3]:
* None
Changes since [v2]:
* None
Changes since [v1]:
* Changed CONFIG_PCIE_TEGRA194 from 'y' to 'm'
arch/arm64/configs/defconfig | 1 +
1 file
Add support for Synopsys DesignWare core IP based PCIe host controller
present in Tegra194 SoC.
Signed-off-by: Vidya Sagar
---
Changes since [v3]:
* None
Changes since [v2]:
* Changed 'nvidia,init-speed' to 'nvidia,init-link-speed'
* Changed 'nvidia,pex-wake' to 'nvidia,wake-gpios'
* Removed
On Mon, Apr 22, 2019 at 10:27:27AM -0300, Mauro Carvalho Chehab wrote:
> In order to prepare to add them to the Kernel API book,
> convert the files to ReST format.
>
> The conversion is actually:
> - add blank lines and identation in order to identify paragraphs;
> - fix tables markups;
>
Synopsys DesignWare core based PCIe controllers in Tegra 194 SoC interface
with Universal PHY (UPHY) module through a PIPE2UPHY (P2U) module.
For each PCIe lane of a controller, there is a P2U unit instantiated at
hardware level. This driver provides support for the programming required
for each
Add support to enable CDM (Configuration Dependent Module) register check
for any data corruption based on the device-tree flag 'enable-cdm-check'.
Signed-off-by: Vidya Sagar
Acked-by: Gustavo Pimentel
---
Changes since [v3]:
* None
Changes since [v2]:
* Changed code and commit description to
Add support for Tegra194 P2U (PIPE to UPHY) module block which is a glue
module instantiated one for each PCIe lane between Synopsys Designware core
based PCIe IP and Universal PHY block.
---
Changes since [v3]:
* None
Changes since [v2]:
* Changed node label to reflect new format that includes
Add P2U (PIPE to UPHY) and PCIe controller nodes to device tree.
The Tegra194 SoC contains six PCIe controllers and twenty P2U instances
grouped into two different PHY bricks namely High-Speed IO (HSIO-12 P2Us)
and NVIDIA High Speed (NVHS-8 P2Us) respectively.
Signed-off-by: Vidya Sagar
---
Enable PCIe controller nodes to enable respective PCIe slots on
P2972- board. Following is the ownership of slots by different
PCIe controllers.
Controller-0 : M.2 Key-M slot
Controller-1 : On-board Marvell eSATA controller
Controller-3 : M.2 Key-E slot
Signed-off-by: Vidya Sagar
---
Changes
Add support for Tegra194 PCIe controllers. These controllers are based
on Synopsys DesignWare core IP.
Signed-off-by: Vidya Sagar
---
Changes since [v3]:
* None
Changes since [v2]:
* Using only 'Cx' (x-being controller number) format to represent a controller
* Changed to 'value: description'
Export pcie_pme_disable_msi() & pcie_pme_no_msi() APIs to enable drivers
using this API be able to build as loadable modules.
Signed-off-by: Vidya Sagar
---
Changes from [v3]:
* None
Changes from [v2]:
* Exported pcie_pme_no_msi() API after making pcie_pme_msi_disabled a static
Changes from
Add support to enable CDM (Configuration Dependent Module) registers check
for any data corruption. CDM registers include standard PCIe configuration
space registers, Port Logic registers and iATU and DMA registers.
Refer Section S.4 of Synopsys DesignWare Cores PCI Express Controller Databook
Some host controllers need to know the existence of clkreq signal routing to
downstream devices to be able to advertise low power features like ASPM L1
substates. Without clkreq signal routing being present, enabling ASPM L1 sub
states might lead to downstream devices falling off the bus. Hence a
Add extended configuration space capability search API using struct dw_pcie *
pointer
Signed-off-by: Vidya Sagar
Acked-by: Gustavo Pimentel
---
Changes from [v3]:
* None
Changes from [v2]:
* None
Changes from [v1]:
* This is a new patch in v2 series
Remove multiple write enable and disable sequences of dbi registers as
Tegra194 implements writes to BAR-0 register (offset: 0x10) controlled by
DBI write-lock enable bit thereby not allowing any further writes to BAR-0
register in config space to take place. Hence disabling write permission
only
Move PCIe config space capability search API to common DesignWare file
as this can be used by both host and ep mode codes.
Signed-off-by: Vidya Sagar
Acked-by: Gustavo Pimentel
---
Changes from [v3]:
* Rebased to linux-next top of the tree
Changes from [v2]:
* None
Changes from [v1]:
*
Tegra194 has six PCIe controllers based on Synopsys DesignWare core.
There are two Universal PHY (UPHY) blocks with each supporting 12(HSIO:
Hisg Speed IO) and 8(NVHS: NVIDIA High Speed) lanes respectively.
Controllers:0~4 use UPHY lanes from HSIO brick whereas Controller:5 uses
UPHY lanes from
Add #defines only for the Data Link Feature and Physical Layer 16.0 GT/s
features.
Signed-off-by: Vidya Sagar
Reviewed-by: Thierry Reding
---
Changes from [v3]:
* None
Changes from [v2]:
* Updated commit message and description to explicitly mention that defines are
added only for some of
Export pcie_bus_config to enable host controller drivers setting it to a
specific configuration be able to build as loadable modules
Signed-off-by: Vidya Sagar
---
Changes since [v3]:
* None
Changes since [v2]:
* None
Changes since [v1]:
* This is a new patch in v2 series
drivers/pci/pci.c |
On 4/23/19 2:48 PM, John Ogness wrote:
On 2019-04-22, Hongzhi, Song wrote:
Anyone notice this issue?
Yes, I am aware of the issue. It is actually a feature, not a bug. ;-)
Individual LOG_CONT messages, when classified as emergency messages, are
printed immediately to the console.
Yes,
On Fri, Apr 19, 2019 at 09:36:46PM -0700, Randy Dunlap wrote:
> On 4/19/19 2:53 PM, a...@linux-foundation.org wrote:
> > The mm-of-the-moment snapshot 2019-04-19-14-53 has been uploaded to
> >
> >http://www.ozlabs.org/~akpm/mmotm/
> >
> > mmotm-readme.txt says
> >
> > README for
On Mon, Apr 22, 2019 at 5:55 PM Gustavo A. R. Silva
wrote:
>
> Hi all,
>
> Friendly ping:
>
> Who can take this?
I've been waiting for Len to comment on this, let me talk to him offlist.
Thanks!
On Mon, Apr 22, 2019 at 10:17 AM Viresh Kumar wrote:
>
> On 18-04-19, 16:11, Rafael J. Wysocki wrote:
> > From: Rafael J. Wysocki
> >
> > There are problems with running time_cpufreq_notifier() on SMP
> > systems.
> >
> > First off, the rdtsc() called from there runs on the CPU executing
> >
On Tue, Apr 23, 2019 at 2:51 AM Stephen Rothwell wrote:
>
> Hi all,
>
> Today's linux-next merge of the v4l-dvb-next tree got a conflict in:
>
> drivers/media/platform/Kconfig
>
> between commit:
>
> 63604a143fe1 ("media: seco-cec: fix building with RC_CORE=m")
>
> from the v4l-dvb tree and
Callers don't expect it to return NULL, but an error code.
Fixes Oops such as the one below, when one tries to set a governor that
isn't available:
Unable to handle kernel NULL pointer dereference at virtual address 0018
[] (governor_store) from [] (kernfs_fop_write+0x100/0x1e0)
[]
On Sat, Apr 20, 2019 at 12:44 AM Robert R. Howell wrote:
>
> On 4/18/19 5:42 AM, Hans de Goede wrote:
>
> >> On 4/8/19 2:16 AM, Hans de Goede wrote:>
> >>>
> >>> Hmm, interesting so you have hibernation working on a T100TA
> >>> (with 5.0 + 02e45646d53b reverted), right ?
> >>>
>
> > Still since
Dont support 'MAP_SYNC' with non-DAX files and DAX files
with asynchronous dax_device. Virtio pmem provides
asynchronous host page cache flush mechanism. We don't
support 'MAP_SYNC' with virtio pmem and ext4.
Signed-off-by: Pankaj Gupta
---
fs/ext4/file.c | 11 ++-
1 file changed, 6
This patch introduces 'daxdev_mapping_supported' helper
which checks if 'MAP_SYNC' is supported with filesystem
mapping. It also checks if corresponding dax_device is
synchronous. Virtio pmem device is asynchronous and
does not not support VM_SYNC.
Suggested-by: Jan Kara
Signed-off-by: Pankaj
On Mon, Apr 22, 2019 at 7:38 PM Patrick Venture wrote:
>
> Create a SoC folder for the ASPEED parts and place the misc drivers
> currently present into this folder. These drivers are not generic part
> drivers, but rather only apply to the ASPEED SoCs.
>
> Signed-off-by: Patrick Venture
Looks
This patch adds 'DAXDEV_SYNC' flag which is set
for nd_region doing synchronous flush. This later
is used to disable MAP_SYNC functionality for
ext4 & xfs filesystem for devices don't support
synchronous flush.
Signed-off-by: Pankaj Gupta
---
drivers/dax/bus.c| 2 +-
On Monday 22 Apr 2019 at 13:55:18 (+0530), Viresh Kumar wrote:
> On 18-04-19, 09:04, Quentin Perret wrote:
> > On Thursday 18 Apr 2019 at 09:23:23 (+0530), Viresh Kumar wrote:
> > > On 17-04-19, 10:43, Quentin Perret wrote:
> > > > static struct thermal_cooling_device *
> > > >
On Tue, Apr 23, 2019 at 09:21:55AM +0800, Jiang Biao wrote:
> rdp is initialized but never used in synchronize_rcu_expedited(),
> just remove it.
>
> Signed-off-by: Jiang Biao
I queued and pushed both patches for testing and review, good eyes,
thank you! I reworded the subject and commit logs,
This patch series has implementation for "virtio pmem".
"virtio pmem" is fake persistent memory(nvdimm) in guest
which allows to bypass the guest page cache. This also
implements a VIRTIO based asynchronous flush mechanism.
Sharing guest kernel driver in this patchset with the
changes
On Mon, Apr 22, 2019 at 7:52 PM 'Nick Desaulniers' via Clang Built
Linux wrote:
> > @@ -20,7 +20,7 @@ extern __u8 _ebc_tolower[256]; /* EBCDIC -> lowercase */
> > extern __u8 _ebc_toupper[256]; /* EBCDIC -> uppercase */
> >
> > static inline void
> > -codepage_convert(const __u8 *codepage,
On Sun, Apr 21, 2019 at 1:48 PM Fuqian Huang wrote:
>
> The pointer should be printed with %p or %px rather than
> cast to long long type and printed with %016llx.
> Change %x to %p to print the pointer.
>
> Signed-off-by: Fuqian Huang
I would recommend to also use %pad for printing dma_addr_t
On 23.04.19 09:45, Anshuman Khandual wrote:
>
>
> On 04/23/2019 01:07 PM, David Hildenbrand wrote:
>> On 23.04.19 09:31, Anshuman Khandual wrote:
>>>
>>>
>>> On 04/18/2019 10:58 AM, Anshuman Khandual wrote:
On 04/17/2019 11:09 PM, Mark Rutland wrote:
> On Wed, Apr 17, 2019 at 10:15:35PM
This commit introduces basic classification offloading support for the
PPv2 controller.
The PPv2 classifier has many classification engines, for now we only use
the C2 TCAM match engine.
This engine allows to perform ternary lookups on 64 bits keys (called
Header Extracted Key), that are built
Using dev_get_drvdata directly.
Cc: "David S. Miller"
Cc: net...@vger.kernel.org
Signed-off-by: Kefeng Wang
---
drivers/net/ethernet/calxeda/xgmac.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/calxeda/xgmac.c
Using dev_get_drvdata directly.
Cc: Dmitry Torokhov
Cc: Shawn Guo
Cc: Sascha Hauer
Cc: linux-in...@vger.kernel.org
Signed-off-by: Kefeng Wang
---
drivers/input/touchscreen/imx6ul_tsc.c | 6 ++
drivers/input/touchscreen/s3c2410_ts.c | 3 +--
2 files changed, 3 insertions(+), 6
Using dev_get_drvdata directly.
Cc: Dmitry Torokhov
Cc: linux-in...@vger.kernel.org
Signed-off-by: Kefeng Wang
---
drivers/input/mouse/navpoint.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/input/mouse/navpoint.c b/drivers/input/mouse/navpoint.c
index
Using dev_get_drvdata directly.
Cc: "Rafael J. Wysocki"
Cc: Srinivas Pandruvada
Cc: linux-a...@vger.kernel.org
Signed-off-by: Kefeng Wang
---
drivers/acpi/dptf/dptf_power.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/acpi/dptf/dptf_power.c
Using dev_get_drvdata directly.
Cc: Jamie Iles
Cc: Herbert Xu
Cc: "David S. Miller"
Cc: linux-cry...@vger.kernel.org
Cc: linux-arm-ker...@lists.infradead.org
Signed-off-by: Kefeng Wang
---
drivers/crypto/picoxcell_crypto.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Using dev_get_drvdata directly.
Cc: Ulf Hansson
Cc: Linus Walleij
Cc: linux-...@vger.kernel.org
Cc: linux-o...@vger.kernel.org
Signed-off-by: Kefeng Wang
---
drivers/mmc/host/omap_hsmmc.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/mmc/host/omap_hsmmc.c
Using dev_get_drvdata directly.
Cc: Vinod Koul
Cc: dmaeng...@vger.kernel.org
Signed-off-by: Kefeng Wang
---
drivers/dma/bcm-sba-raid.c | 3 +--
drivers/dma/nbpfaxi.c | 4 ++--
2 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/drivers/dma/bcm-sba-raid.c
Using dev_get_drvdata directly.
Cc: Anup Patel
Cc: Jassi Brar
Signed-off-by: Kefeng Wang
---
drivers/mailbox/bcm-flexrm-mailbox.c | 6 ++
1 file changed, 2 insertions(+), 4 deletions(-)
diff --git a/drivers/mailbox/bcm-flexrm-mailbox.c
b/drivers/mailbox/bcm-flexrm-mailbox.c
index
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