On Thu, May 2, 2019 at 4:25 AM Miquel Raynal wrote:
>
> Hi Kamal,
>
> Kamal Dasu wrote on Wed, 1 May 2019 13:46:15
> -0400:
>
> > If mtd_oops is in progress switch to polling for nand command completion
>
> s/nand/NAND/
Will change this.
>
> > interrupts and use PIO mode wihtout DMA so that
From: Ludovic Barre
This patch series updates stm32 watchdog driver on:
-use devm_watchdog_register_device
-Guenter's recommendation about return value:
set_timeout return 0 on succes, -EINVAL for "parameter out of range"
and -EIO for "could not write value to the watchdog".
Set of reload and
From: Ludovic Barre
This patch allows to define the max prescaler by compatible.
To set a large range of timeout, the prescaler should be set
dynamically (from the timeout request) to improve the resolution
in order to have a timeout close to the expected value.
Signed-off-by: Ludovic Barre
From: Ludovic Barre
This patch updates to devm_watchdog_register_device interface
Signed-off-by: Ludovic Barre
---
drivers/watchdog/stm32_iwdg.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/watchdog/stm32_iwdg.c b/drivers/watchdog/stm32_iwdg.c
index
On Thu, 2 May 2019 at 05:57, NeilBrown wrote:
> On Wed, May 01 2019, Amir Goldstein wrote:
> > On Wed, May 1, 2019 at 10:03 PM NeilBrown wrote:
> >> On Tue, Dec 06 2016, J. Bruce Fields wrote:
> >> > On Tue, Dec 06, 2016 at 02:18:31PM +0100, Andreas Gruenbacher wrote:
> >> >> On Tue, Dec 6, 2016
> On May 2, 2019, at 7:04 AM, Christoph Hellwig wrote:
>
> Except that we don't pass v9fs_vfs_readpage as the filler any more,
> we now pass v9fs_fid_readpage.
True, so never mind. :-)
On Tue, Apr 30, 2019 at 04:03:32AM +0530, Raag Jadav wrote:
> External E-Mail
>
>
> On Mon, Apr 29, 2019 at 11:00:05AM +0200, Ludovic Desroches wrote:
> > Hello Raag,
> >
> > On Tue, Apr 23, 2019 at 01:06:48PM +0530, Raag Jadav wrote:
> > > External E-Mail
> > >
> > >
> > > Performing i2c
NeilBrown:
> If the upper and lower layers use incompatible ACL formats, it is not
> possible to copy the ACL xttr from one to the other, so overlayfs
> cannot work with them.
> This happens particularly with NFSv4 which uses system.nfs4_acl, and
> ext4 which uses system.posix_acl_access.
FYI,
Hi Linus,
I apologize for sending these so late in the cycle. We went back and forth
about how to deal with the unexpected logging of intentional link state
changes and finally decided to just config them off by default.
PCI fixes:
- Stop ignoring "pci=disable_acs_redir" parameter (Logan
On Thu, May 2, 2019 at 10:07 AM Guido Günther wrote:
>
> It's defined in imx8mq-clock.h but wasn't assigned yet. It's used as
> clk_tx_esc in the nwl dsi host controller (i.MX8MQ RM, Rev. 0, 01/2018
> Sect. 13.5.3.7.4).
>
> Signed-off-by: Guido Günther
Reviewed-by: Fabio Estevam
On Mon, 2019-04-29 at 11:25 +0800, Nicolas Boichat wrote:
> pinctrl variants that include pinctrl-mtk-common-v2.h (and not
> pinctrl-mtk-common.h) also need to use mtk_eint_pm_ops to setup
> wake mask properly, so copy over the pm_ops to v2.
>
> It is not easy to merge the 2 copies (or move
>
Just like the Bananapi M2 Ultra, enable the ahci controller and
the two regulators needed to activate it.
Reviewed-by: Jagan Teki
Signed-off-by: Pablo Greco
---
arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts | 18 ++
1 file changed, 18 insertions(+)
diff --git
The AP6212 is based on the Broadcom BCM43430 or BCM43438. The WiFi side
identifies as BCM43430, while the Bluetooth side identifies as BCM43438.
The Bluetooth side is connected to UART3 in a 4 wire configuration. Same
as the WiFi side, due to being the same chip and package, DLDO1 and
DLDO2
This patch adds the hdmi nodes to the Bananapi M2 Berry, the same way it
was done to the Bananapi M2 Ultra
Signed-off-by: Pablo Greco
---
arch/arm/boot/dts/sun8i-v40-bananapi-m2-berry.dts | 29 +++
1 file changed, 29 insertions(+)
diff --git
On 02/05/2019 13:55, Sameer Pujar wrote:
> Audio DMA(ADMA) interface is a gateway in the AHUB for facilitating DMA
> transfers between memory and all of its clients. Currently the driver
> supports Tegra210 based platforms. This series adds support for Tegra186
> and Tegra194 based platforms and
On 5/2/19 6:34 AM, Yash Shah wrote:
> The driver currently supports only SiFive FU540-C000 platform.
>
> The initial version of L2 cache controller driver includes:
> - Initial configuration reporting at boot up.
> - Support for ECC related functionality.
>
> Signed-off-by: Yash Shah
> ---
>
On 5/2/2019 5:55 PM, Vinod Koul wrote:
On 02-05-19, 16:23, Sameer Pujar wrote:
On 5/2/2019 11:34 AM, Vinod Koul wrote:
On 30-04-19, 17:00, Sameer Pujar wrote:
During the DMA transfers from memory to I/O, it was observed that transfers
were inconsistent and resulted in glitches for audio
On Thu, 2019-05-02 at 15:10 +0200, Michal Kubecek wrote:
> On Thu, May 02, 2019 at 02:51:33PM +0200, Johannes Berg wrote:
> > On Thu, 2019-05-02 at 12:48 +, Michal Kubecek wrote:
> > > Unlike do requests, dump genetlink requests now perform strict validation
> > > by default even if the
Em Fri, Apr 26, 2019 at 09:38:04AM +0200, Jiri Olsa escreveu:
> When compiled with libunwind, perf does some preparatory work
> when processing side-band events. This is not needed when report
> actually don't unwind dwarf callchains, so it's disabled with
> dwarf_callchain_users bool.
>
>
Register the ADDA DAI driver into the MT8516 PCM driver.
Signed-off-by: Fabien Parent
---
This patch depends on patch serie:
[PATCH 0/5] ASoC: mediatek: Add basic PCM driver for MT8516
v2:
* Register ADDA before memif to fix ordering issue.
---
From: Steffen Dirkwinkel
There are several Beckhoff Automation industrial PC boards which use
pmc_plt_clk* clocks for ethernet controllers. The patch adds affected boards
to critclk_systems DMI table so the clocks are marked as CLK_CRITICAL and
not turned off.
This should be applied on top of
From: Steffen Dirkwinkel
There are several Beckhoff Automation industrial PC boards which use
pmc_plt_clk* clocks for ethernet controllers. This adds affected boards
to critclk_systems DMI table so the clocks are marked as CLK_CRITICAL and
not turned off.
Fixes: 648e921888ad ("clk: x86: Stop
It's defined in imx8mq-clock.h but wasn't assigned yet. It's used as
clk_tx_esc in the nwl dsi host controller (i.MX8MQ RM, Rev. 0, 01/2018
Sect. 13.5.3.7.4).
Signed-off-by: Guido Günther
---
This is basically a resend January with a slightly more exhaustive
commit message.
On 02/05/2019 14.29, Jeff Mahoney wrote:
> On 5/2/19 5:41 AM, Rasmus Villemoes wrote:
>> But we cannot really know whether there is some userspace tool that
>> parses the .ko ELF objects the same way that file2alias does, doing
>> pattern matching on the symbol names etc. I cannot see why anybody
On Thu, May 02, 2019 at 12:08:29AM -0600, William Kucharski wrote:
> 1) You need to pass "filp" rather than "filp->private_data" to
> read_cache_pages()
> in v9fs_fid_readpage().
With this patch v9fs_fid_readpage takes a void pointer that must be
a FID, and we pass the FID everywhere:
-
On Thu, May 02, 2019 at 05:59:17PM +0900, Akinobu Mita wrote:
> This enables to capture snapshot of controller information via device
> coredump machanism, and it helps diagnose and debug issues.
>
> The nvme device coredump is triggered before resetting the controller
> caused by I/O timeout,
On Mon, Apr 22, 2019 at 10:40:02PM +0200, Greg Kroah-Hartman wrote:
On Mon, Apr 22, 2019 at 03:41:37PM -0400, Sasha Levin wrote:
From: Fabien Dessenne
[ Upstream commit f4e68d58cf2b20a581759bbc7228052534652673 ]
Unlike 'client_ops' which is initialized to 'default_client_ops', the
port
Status of ADMA channel registers is not saved and restored during system
suspend. During active playback if system enters suspend, this results in
wrong state of channel registers during system resume and playback fails
to resume properly. Fix this by saving following channel registers in
runtime
Em Fri, 12 Apr 2019 18:59:15 +0300
Stanimir Varbanov escreveu:
> This changes v4l2_pix_format and v4l2_plane_pix_format sizeimage
> field description to allow v4l clients to set bigger image size
> in case of variable length compressed data.
>
> Signed-off-by: Stanimir Varbanov
> ---
>
Following kernel panic is seen during DMA driver unload->load sequence
==
Unable to handle kernel paging request at virtual address ff8001198880
Internal error: Oops: 8607 [#1] PREEMPT SMP
CPU: 0 PID: 5907 Comm:
During an audio playback session it is observed that, audio goes off after
few seconds of continuous pause and play. No audio is heard even when the
playback is resumed.
The reason for above is, currently ADMA driver does not handle DMA_PAUSE/
DMA_RESUME and relevant callbacks for dma_device are
Since commit ad67b74d2469d9b8 ("printk: hash addresses printed with
%p"), an obfuscated kernel pointer is printed at every boot if
debugging is enabled:
vdso: 1 text pages at base (ptrval)
Remove the print completely, as it's useless without the address.
Based on commit
Add Tegra186 specific macro defines and chip_data structure for chip
specific information. New compatibility is added to select relevant
chip details. There is no major change for Tegra194 and hence it can
use the same chip data.
The bits in the BURST_SIZE field of the ADMA CH_CONFIG register are
This is a preparatory patch to add support for Tegra186 and Tegra194 chips.
Following changes are necessary to make driver code generic.
* chip_data structure is enhanced to have chip specific details and
following are the additions to the structure
* Offset addresses for ADMA global and
Audio DMA(ADMA) interface is a gateway in the AHUB for facilitating DMA
transfers between memory and all of its clients. Currently the driver
supports Tegra210 based platforms. This series adds support for Tegra186
and Tegra194 based platforms and fixes few functional issues.
Patches in the
Tegra186 Audio DMA controller has new updates from Tegra210 version.
Thus add new compatibility binding string and the same can be used
by Tegra194 as well.
Signed-off-by: Sameer Pujar
---
Documentation/devicetree/bindings/dma/nvidia,tegra210-adma.txt | 4 +++-
1 file changed, 3 insertions(+),
From: Tomer Tayar
The CPU accessible DMA pool is general and not used only for PQ.
Accordingly, this patch rename the "free_cpu_pq_pool" label with
"free_cpu_accessible_dma_pool".
Signed-off-by: Tomer Tayar
Signed-off-by: Oded Gabbay
---
drivers/misc/habanalabs/goya/goya.c | 4 ++--
1 file
Hello.
Just merged the two dicussed patches and fixed an overlooked warning.
v2
- insert a patch refactoring validate_prctl_map
- move find_vma out of the arg_lock critical section
v3
- squash get_cmdline and prctl_set_mm patches (to keep locking
consistency)
- validate_prctl_map_addr: remove
The commit a3b609ef9f8b ("proc read mm's {arg,env}_{start,end} with mmap
semaphore taken.") added synchronization of reading argument/environment
boundaries under mmap_sem. Later commit 88aa7cc688d4 ("mm: introduce
arg_lock to protect arg_start|end and env_start|end in mm_struct")
avoided the
Despite comment of validate_prctl_map claims there are no capability
checks, it is not completely true since commit 4d28df6152aa ("prctl:
Allow local CAP_SYS_ADMIN changing exe_file"). Extract the check out of
the function and make the function perform purely arithmetic checks.
This patch should
On Thu, 2019-05-02 at 12:48 +, Michal Kubecek wrote:
> The check that attribute type is within 0...maxtype range in
> __nla_validate_parse() sets only error message but not bad_attr in extack.
> Set also bad_attr to tell userspace which attribute failed validation.
Good catch, we actually do
On Thu, 2019-05-02 at 17:59 +0900, Akinobu Mita wrote:
>
> static void devcd_del(struct work_struct *wk)
> {
> struct devcd_entry *devcd;
> + int i;
>
> devcd = container_of(wk, struct devcd_entry, del_wk.work);
>
> + for (i = 0; i < devcd->num_files; i++) {
> +
There is no need to print a backtrace or other error message if
kzalloc(), kmemdup(), or devm_kzalloc() fails, as the memory allocation
core already takes care of that.
Signed-off-by: Geert Uytterhoeven
---
drivers/of/unittest.c | 13 -
1 file changed, 4 insertions(+), 9
On Thu, 2019-05-02 at 17:59 +0900, Akinobu Mita wrote:
> Use memory_read_from_buffer() to simplify devcd_readv().
Reviewed-by: Johannes Berg
> Cc: Johannes Berg
> Cc: Keith Busch
> Cc: Jens Axboe
> Cc: Christoph Hellwig
> Cc: Sagi Grimberg
> Signed-off-by: Akinobu Mita
> ---
>
On 5/2/19 5:48 AM, Jessica Yu wrote:
> +++ Prarit Bhargava [01/05/19 17:26 -0400]:
>>
>>
>> On 4/30/19 6:22 PM, Prarit Bhargava wrote:
>>> On a s390 z14 LAR with 2 cpus about stalls about 3% of the time while
>>> loading the s390_trng.ko module.
>>>
>>> Add a reschedule point to the loop that
There is no need to print a backtrace if kzalloc() fails, as the memory
allocation core already takes care of that.
Signed-off-by: Geert Uytterhoeven
---
drivers/of/irq.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/of/irq.c b/drivers/of/irq.c
index
Hi Lee
Could you help clarify whether or not this patch is trying to do
something odd/wrong?
I might be misunderstanding Andy (probably is), but the discussion
revolves around the changes I propose where I change the serial8250
driver to use platform_get_resource() in favour of
On 5/2/19 5:41 AM, Rasmus Villemoes wrote:
On 26/04/2019 11.27, Arnd Bergmann wrote:
On Thu, Apr 25, 2019 at 10:31 PM Rasmus Villemoes
wrote:
For an arm imx_v6_v7_defconfig kernel, .rodata becomes 70K smaller;
.init.data shrinks by another ~13K, making the whole kernel image
about 83K, or
On Mon, 8 Apr 2019 at 18:33, pierre Kuo wrote:
>
> The following is schematic diagram of the program before and after the
> modification.
>
> Before:
> if (memstart_addr + linear_region_size < memblock_end_of_DRAM()) {} --(a)
> if (memory_limit != PHYS_ADDR_MAX) {}
On 02-05-19, 16:23, Sameer Pujar wrote:
>
> On 5/2/2019 11:34 AM, Vinod Koul wrote:
> > On 30-04-19, 17:00, Sameer Pujar wrote:
> > > During the DMA transfers from memory to I/O, it was observed that
> > > transfers
> > > were inconsistent and resulted in glitches for audio playback. It happened
Hi Sébastien,
On Tue, Apr 30, 2019 at 4:47 AM Sébastien Szymanski
wrote:
> + csi: csi@21c4000 {
> + compatible = "fsl,imx6ul-csi", "fsl,imx7-csi";
After adding "fsl,imx6ul-csi" to
Documentation/devicetree/bindings/media/imx7-csi.txt:
Add AUDSYS device tree bindings documentation for MediaTek MT8516 SoC.
Signed-off-by: Fabien Parent
---
.../bindings/arm/mediatek/mediatek,audsys.txt | 1 +
include/dt-bindings/clock/mt8516-clk.h | 17 +
2 files changed, 18 insertions(+)
diff --git
Add audsys clock driver for MediaTek MT8516 SoC.
Signed-off-by: Fabien Parent
---
drivers/clk/mediatek/Kconfig | 6 +++
drivers/clk/mediatek/Makefile | 1 +
drivers/clk/mediatek/clk-mt8516-aud.c | 65 +++
3 files changed, 72 insertions(+)
create mode
When allocating dynamic major, the minor range overlap check
in __register_chrdev_region() will not fail, so actually
there is no real case to passing non negative error code to
caller. However, set variable ret to -EBUSY before checking
minor range overlap will avoid false-positive warning from
Add documentation for the bindings of the MT8516 AFE PCM driver.
Signed-off-by: Fabien Parent
---
.../bindings/sound/mt8516-afe-pcm.txt | 28 +++
1 file changed, 28 insertions(+)
create mode 100644 Documentation/devicetree/bindings/sound/mt8516-afe-pcm.txt
diff --git
This patch series add a basic PCM driver for MediaTek MT8516 with only
support for ADDA Playback & Recording for now.
Fabien Parent (5):
ASoC: mediatek: make agent_disable, msb & hd fields optional
dt-bindings: sound: Add MT8516 AFE PCM bindings
ASoC: mediatek: Add MT8516 PCM driver
ASoC:
This commit adds the PCM driver for the MediaTek MT8516 SoC.
Signed-off-by: Fabien Parent
---
sound/soc/mediatek/Kconfig | 10 +
sound/soc/mediatek/Makefile | 1 +
sound/soc/mediatek/mt8516/Makefile | 6 +
sound/soc/mediatek/mt8516/mt8516-afe-pcm.c
Not every SoC have the following registers: agent_disable_reg,
msg_reg, and hd_reg. Make them optional in order to allow more
SoC to use the common DAI FE code.
Signed-off-by: Fabien Parent
---
sound/soc/mediatek/common/mtk-afe-fe-dai.c | 23 +-
1 file changed, 14
Le 02/05/2019 à 14:02, Michael Ellerman a écrit :
Christophe Leroy writes:
Use VM_BUG_ON() instead of BUG_ON(), as those BUG_ON()
are not there to catch runtime errors but to catch errors
during development cycle only.
I've dropped this one and the next, because I don't like VM_BUG_ON().
Register the ADDA DAI driver into the MT8516 PCM driver.
Signed-off-by: Fabien Parent
---
sound/soc/mediatek/mt8516/mt8516-afe-pcm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/sound/soc/mediatek/mt8516/mt8516-afe-pcm.c
b/sound/soc/mediatek/mt8516/mt8516-afe-pcm.c
index
Add the ADDA DAI driver for the MediaTek MT8516 SoC.
Signed-off-by: Fabien Parent
---
sound/soc/mediatek/mt8516/Makefile| 3 +-
sound/soc/mediatek/mt8516/mt8516-afe-common.h | 18 +
sound/soc/mediatek/mt8516/mt8516-dai-adda.c | 316 ++
3 files changed, 336
Aviso de seguridad:
Este mensaje es de nuestro centro de mensajería Web Admin a todos nuestros
propietarios de cuentas de correo electrónico. Estamos eliminando el acceso a
todos nuestros clientes de correo web. Su cuenta de correo electrónico se
actualizará a una nueva y mejorada interfaz de
Hi Shiva,
"Shivamurthy Shastri (sshivamurthy)" wrote on
Thu, 2 May 2019 11:37:10 +:
> Hi Miquel,
>
> >
> > Hi Shivamurthy,
> >
> > "Shivamurthy Shastri (sshivamurthy)" wrote
> > on
> > Tue, 26 Mar 2019 10:52:00 +:
> >
> > > Some of the SPI NAND devices has parameter page which is
On 01-05-19, 17:19, Bjorn Andersson wrote:
> The QCS404 platform contains a PCIe controller of version 2.4.0 and a
> Qualcomm PCIe2 PHY. The driver already supports version 2.4.0, for the
> IPQ4019, but this support touches clocks and resets related to the PHY
> as well, and there's no upstream
On 01-05-19, 17:19, Bjorn Andersson wrote:
> The Qualcomm QCS404 platform contains a PCIe controller, add this to the
> Qualcomm PCI binding document. The controller is the same version as the
> one used in IPQ4019, but the PHY part is described separately, hence the
> difference in clocks and
On 01-05-19, 17:19, Bjorn Andersson wrote:
> Before introducing the QCS404 platform, which uses the same PCIe
> controller as IPQ4019, migrate this to use the bulk clock API, in order
> to make the error paths slighly cleaner.
>
> Acked-by: Stanimir Varbanov
> Reviewed-by: Niklas Cassel
>
On 01-05-19, 17:24, Bjorn Andersson wrote:
> The QCS404 has a PCIe2 PHY and a Qualcomm PCIe controller, add these to
> the platform dtsi and enable them for the EVB with the perst gpio
> and analog supplies defined.
>
> Reviewed-by: Niklas Cassel
> Signed-off-by: Bjorn Andersson
> ---
>
> The
Note that currently the number of hw queues reserved for mdev,
has to be pre determined on module load.
(I used to allocate the queues dynamicaly on demand, but
recent changes to allocate polled/read queues made
this somewhat difficult, so I dropped this for now)
Signed-off-by: Maxim Levitsky
Use the block layer (bio_submit) to pass through the IO to the nvme driver
instead of the direct IO submission hooks.
Currently that code supports only read/write, and it still assumes that
we talk to an nvme driver.
Signed-off-by: Maxim Levitsky
---
drivers/nvme/mdev/Kconfig | 8 ++
This state will be used by a controller that is going to
suspended state, and will later be used by mdev
framework to detect this and flush its queues
Signed-off-by: Maxim Levitsky
---
drivers/nvme/host/core.c | 15 +++
drivers/nvme/host/nvme.h | 1 +
2 files changed, 16
This code might not be needed to be merged in the final version
Signed-off-by: Maxim Levitsky
---
drivers/nvme/mdev/instance.c | 62
drivers/nvme/mdev/io.c | 21
drivers/nvme/mdev/irq.c | 6
drivers/nvme/mdev/priv.h | 13
On Tue, Apr 30, 2019 at 11:37:48AM +0200, Rafael J. Wysocki wrote:
> On Tue, Apr 30, 2019 at 11:00 AM Mika Westerberg
> wrote:
> >
> > +Rafael, Furquan and linux-acpi
> >
> > (The original thread is here
> > https://lore.kernel.org/lkml/s5hy33siofw.wl-ti...@suse.de/T/#u)
> >
> > On Tue, Apr 30,
This adds infrastructure for a nvme-mdev
to attach to the core driver, to be able to
know which nvme controllers are present and which
namespaces they have.
It also adds an interface to nvme device drivers
which expose the its queues in a controlled manner
to the nvme mdev core driver. A driver
This adds few defines from the spec,
that will be used in the nvme-mdev driver
Signed-off-by: Maxim Levitsky
---
include/linux/nvme.h | 88 ++--
1 file changed, 68 insertions(+), 20 deletions(-)
diff --git a/include/linux/nvme.h b/include/linux/nvme.h
This will allow the hotplug to be enabled for mediated devices
Signed-off-by: Maxim Levitsky
---
drivers/vfio/mdev/vfio_mdev.c | 11 +++
include/linux/mdev.h | 4
2 files changed, 15 insertions(+)
diff --git a/drivers/vfio/mdev/vfio_mdev.c b/drivers/vfio/mdev/vfio_mdev.c
Hi everyone!
In this patch series, I would like to introduce my take on the problem of doing
as fast as possible virtualization of storage with emphasis on low latency.
For more information for the inner working you can look at V1 of the submission
at
https://lkml.org/lkml/2019/3/19/458
***
Allow an VFIO mdev device to listen to map events
This will allow a mdev driver to dma map memory
as soon as it gets added to the domain
--
Signed-off-by: Maxim Levitsky
---
drivers/vfio/vfio_iommu_type1.c | 97 +
include/linux/vfio.h| 4 ++
2 files
When enteriing low power state, the nvme
driver will now inform the core with the NVME_CTRL_SUSPENDED state
which will allow mdev driver to act on this information
Signed-off-by: Maxim Levitsky
---
drivers/nvme/host/pci.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git
Hi,
Static analysis with Coverity has picked up an issue in commit:
commit ba44dc04300441b47618f9933bf36e75a280e5fe
Author: Sugaya Taichi
Date: Mon Apr 15 20:31:40 2019 +0900
serial: Add Milbeaut serial control
In function mlb_usio_rx_chars() the u8 status is being bit-wise AND'd
with
On Thu, May 2, 2019 at 12:35 AM NeilBrown wrote:
>
>
> If the upper and lower layers use incompatible ACL formats, it is not
> possible to copy the ACL xttr from one to the other, so overlayfs
> cannot work with them.
> This happens particularly with NFSv4 which uses system.nfs4_acl, and
> ext4
On 05/02, Oleg Nesterov wrote:
>
> But this all is cosmetic, it seems that we can remove ->rw_sem altogether
> but I am not sure...
I mean, afaics percpu_down_read() can just do
wait_event(readers_block == 0);
in the slow path, while percpu_down_write()
> Testing
> ---
>
> Kernel build configuration
>
> $ egrep LIVEPATCH .config
> CONFIG_HAVE_LIVEPATCH=y
> CONFIG_LIVEPATCH=y
> CONFIG_TEST_LIVEPATCH=m
>
> $ egrep FTRACE .config
> CONFIG_KPROBES_ON_FTRACE=y
> CONFIG_HAVE_KPROBES_ON_FTRACE=y
>
Hi Miquel,
>
> Hi Shivamurthy,
>
> "Shivamurthy Shastri (sshivamurthy)" wrote
> on
> Tue, 26 Mar 2019 10:52:04 +:
>
> > Driver is redesigned using parameter page to support Micron SPI NAND
> > flashes.
> >
> > Support for selecting die is enabled for multi-die flashes.
> > Turn OOB layout
Hi Miquel,
>
> Hi Shivamurthy,
>
> "Shivamurthy Shastri (sshivamurthy)" wrote
> on
> Tue, 26 Mar 2019 10:52:00 +:
>
> > Some of the SPI NAND devices has parameter page which is similar to ONFI
> > table.
> >
> > But, it may not be self sufficient to propagate all the required
> >
Aviso de seguridad:
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On Sat, Apr 27, 2019 at 10:46 PM Ingo Molnar wrote:
> - A C language runtime that is a subset of current C syntax and
>semantics used in the kernel, and which doesn't allow access outside
>of existing objects and thus creates a strictly enforced separation
>between memory used for
From: Colin Ian King
Currently there are two null checks of pointer dai in function
sof_connect_dai_widget and yet there is no null check of dai
at the end of the function when checking !dai->name. The latter
would be a null pointer deference if dai is null (as picked up
by static analysis),
Aviso de seguridad:
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propietarios de cuentas de correo electrónico. Estamos eliminando el acceso a
todos nuestros clientes de correo web. Su cuenta de correo electrónico se
actualizará a una nueva y mejorada interfaz de
On 5/2/19 04:33, Mark Brown wrote:
> On Mon, Apr 29, 2019 at 02:31:55PM +0200, Jorge Ramirez wrote:
>> On 4/27/19 20:21, Mark Brown wrote:
>
>>> Since the point of this change is AFAICT that this regulator only has a
>>> single linear range it seems like it should just be able to use the
>>>
On Thu, May 02, 2019 at 12:45:05PM +0200, Andreas Färber wrote:
> Am 02.05.19 um 12:38 schrieb Greg Kroah-Hartman:
> > On Thu, May 02, 2019 at 12:25:36PM +0200, Andreas Färber wrote:
> >> Am 02.05.19 um 09:07 schrieb Greg Kroah-Hartman:
> >>> On Wed, May 01, 2019 at 10:20:44PM +0200, Andreas
The initial ver of EDAC driver supports:
- ECC event monitoring and reporting through the EDAC framework for SiFive
L2 cache controller.
This patch depends on patch
'RISC-V: sifive_l2_cache: Add L2 cache controller driver for SiFive SoCs'
https://lkml.org/lkml/2019/5/2/309
The EDAC driver
Adds an EDAC platform driver for SiFive SoCs.
This patch was earlier part of the patch series:
'L2 cache controller and EDAC support for SiFive SoCs'
https://lkml.org/lkml/2019/4/15/320
In order to merge L2 cache controller driver without any dependency on EDAC,
this EDAC patch is re-posted
On Tue, 23 Apr 2019, Srinivas Pandruvada wrote:
> +Jiri
>
> He is not copied.
Could you please resubmit the final version, and CC linux-input@ and
Benjamin Tissories as appropriate?
Thanks,
--
Jiri Kosina
SUSE Labs
Hi Rob,
Please find my inline comments below
Thank you
Dragan
> -Original Message-
> From: Rob Herring [mailto:r...@kernel.org]
> Sent: Wednesday 1 May 2019 20:48
> To: Dragan Cvetic
> Cc: a...@arndb.de; gre...@linuxfoundation.org; Michal Simek
> ;
Most development boards and devices have one or more LEDs. It is
useful during debugging if they can be wired to show different
behaviours such as disk or cpu activity or a load-average dependent
heartbeat. Enable panic and disk activity triggers so they can be tied
to LED activity during
On 5/2/2019 11:34 AM, Vinod Koul wrote:
On 30-04-19, 17:00, Sameer Pujar wrote:
During the DMA transfers from memory to I/O, it was observed that transfers
were inconsistent and resulted in glitches for audio playback. It happened
because fifo size on DMA did not match with slave channel
Hi Peter,
New PEBS feature: output to Intel PT stream instead of the DS area. It's
theoretically useful in virtualized environments, where DS area can't be
used. It's also good for those who are interested in instruction trace for
context of the PEBS events. As PEBS goes, it can provide LBR
In some cases, ordinary (non-AUX) events can generate data for AUX events.
For example, PEBS events can come out as records in the Intel PT stream
instead of their usual DS records, if configured to do so.
Add an attribute bit for such events to be configured to generate AUX data.
Signed-off-by:
If PEBS declares ability to output its data to Intel PT stream, use the
aux_source attribute bit to enable PEBS data output to PT. This requires
a PT event to be present and scheduled in the same context. Unlike the
DS area, the kernel does not extract PEBS records from the PT stream to
generate
On 2019-04-23 16:26:36 [+0200], To linux-kernel@vger.kernel.org wrote:
> In commit 4b53a3412d66 ("sched/core: Remove the tsk_nr_cpus_allowed()
> wrapper") the tsk_nr_cpus_allowed() wrapper was removed. There was not
> much difference in !RT but in RT we used this to implement
> migrate_disable().
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