Re: [PATCH 3/6] svm: Add support for APIC_ACCESS_PAGE_PRIVATE_MEMSLOT setup/destroy

On 22/03/2019 12.57, Suthikulpanit, Suravee wrote: > Activate/deactivate AVIC requires setting/unsetting the memory region used > for APIC_ACCESS_PAGE_PRIVATE_MEMSLOT. So, re-factor avic_init_access_page() > to avic_setup_access_page() and add srcu_read_lock/unlock, which are needed > to allow

Re: [PATCH v8 04/16] sched/core: uclamp: Add system default clamps

On Wed, May 08, 2019 at 09:07:33PM +0200, Peter Zijlstra wrote: > On Tue, Apr 02, 2019 at 11:41:40AM +0100, Patrick Bellasi wrote: > > +static inline struct uclamp_se > > +uclamp_eff_get(struct task_struct *p, unsigned int clamp_id) > > +{ > > + struct uclamp_se uc_req = p->uclamp_req[clamp_id];

Re: [PATCH] nvme-pci: Use non-operational power state instead of D3 on Suspend-to-Idle

Did you get a chance to run this patch through checkpatch.pl ? On 05/08/2019 12:00 PM, Kai-Heng Feng wrote: > Several NVMes consume lots of power during Suspend-to-Idle. > > According to the NVMe vendors, APST should be used and there are two > things that should be prevented: > - Controller

Re: [PATCH v2] cifs: fix strcat buffer overflow and reduce raciness in smb21_set_oplock_level()

at 02:42, Pavel Shilovsky wrote: ср, 8 мая 2019 г. в 01:23, Kai-Heng Feng : at 02:28, Pavel Shilovsky wrote: вт, 7 мая 2019 г. в 09:13, Steve French via samba-technical : merged into cifs-2.6.git for-next On Tue, May 7, 2019 at 10:17 AM Christoph Probst via samba-technical wrote:

Re: [PATCH] percpu: remove spurious lock dependency between percpu and sched

On Wed, May 8, 2019 at 11:59 AM Dennis Zhou wrote: > > On Tue, May 07, 2019 at 06:43:20PM -0700, John Sperbeck wrote: > > In free_percpu() we sometimes call pcpu_schedule_balance_work() to > > queue a work item (which does a wakeup) while holding pcpu_lock. > > This creates an unnecessary lock

Re: [PATCH v8 04/16] sched/core: uclamp: Add system default clamps

There was a bunch of repetition that seemed fragile; does something like the below make sense? Index: linux-2.6/kernel/sched/core.c === --- linux-2.6.orig/kernel/sched/core.c +++ linux-2.6/kernel/sched/core.c @@ -770,6 +770,9 @@

[PATCH] nvme-pci: Use non-operational power state instead of D3 on Suspend-to-Idle

Several NVMes consume lots of power during Suspend-to-Idle. According to the NVMe vendors, APST should be used and there are two things that should be prevented: - Controller shutdown (CC.SHN) - PCI D3 I think that's because the Windows Modern Standby design document [1] states below as a

Re: [RFC PATCH 1/2] mmc: sdhci: Manually check card status after reset

On Fri, May 03, 2019 at 09:12:24AM -0600, Raul Rangel wrote: > On Wed, May 01, 2019 at 11:54:56AM -0600, Raul E Rangel wrote: > > I am running into a kernel panic. A task gets stuck for more than 120 > > seconds. I keep seeing blkdev_close in the stack trace, so maybe I'm not > > calling something

Re: [PATCH] percpu: remove spurious lock dependency between percpu and sched

On Tue, May 07, 2019 at 06:43:20PM -0700, John Sperbeck wrote: > In free_percpu() we sometimes call pcpu_schedule_balance_work() to > queue a work item (which does a wakeup) while holding pcpu_lock. > This creates an unnecessary lock dependency between pcpu_lock and > the scheduler's pi_lock.

[PATCH 2/2] mmc: v4.14: Kill the request if the queuedata has been removed

No reason to even try processing the request if the queue is shutting down. Signed-off-by: Raul E Rangel --- This commit applies to v4.14.116. This doesn't apply to 5.1 since mmc has been migrated to blk-mq. drivers/mmc/core/queue.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff

[PATCH 1/2] mmc: v4.14: Fix null pointer dereference in mmc_init_request

It is possible for queuedata to be cleared in mmc_cleanup_queue before the request has been started. This will result in dereferencing a null pointer. Signed-off-by: Raul E Rangel --- I think we should cherry-pick 41e3efd07d5a02c80f503e29d755aa1bbb4245de

RE: [EXT] Re: [PATCH 1/3] dt-bindings: i2c: add optional mul-value property to binding

> -Original Message- > From: Chuanhua Han > Sent: Wednesday, May 8, 2019 6:45 AM > To: Rob Herring > Cc: mark.rutl...@arm.com; shawn...@kernel.org; > s.ha...@pengutronix.de; Leo Li ; linux- > ker...@vger.kernel.org; devicet...@vger.kernel.org; linux-arm- > ker...@lists.infradead.org;

Re: EDAC: Fix memory leak in creating CSROW object

On Wed, May 08, 2019 at 02:47:54PM +0200, Greg KH wrote: > Looks good to me, ship it! Thx, done! :-) -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply.

Re: [PATCH 2/4] x86/kprobes: Fix frame pointer annotations

On Wed, May 08, 2019 at 05:39:07PM +0200, Peter Zijlstra wrote: > On Wed, May 08, 2019 at 07:42:48AM -0500, Josh Poimboeuf wrote: > > On Wed, May 08, 2019 at 02:04:16PM +0200, Peter Zijlstra wrote: > > > > Do the x86_64 variants also want some ORC annotation? > > > > Maybe so. Though it looks

icache_is_aliasing and big.LITTLE

Hi, What is the intention behind icache_is_aliasing on big.LITTLE systems where some icaches are VIPT and others are PIPT? Is it meant to be conservative in some sense or should it be made per-CPU? Thanks for your help, Salman

Re: [RFC PATCH v2 11/17] sched: Basic tracking of matching tasks

On 5/8/19 11:19 AM, Subhra Mazumdar wrote: On 5/8/19 8:49 AM, Aubrey Li wrote: Pawan ran an experiment setting up 2 VMs, with one VM doing a parallel kernel build and one VM doing sysbench, limiting both VMs to run on 16 cpu threads (8 physical cores), with 8 vcpu for each VM. Making the

Re: [PATCH v2] cifs: fix strcat buffer overflow and reduce raciness in smb21_set_oplock_level()

ср, 8 мая 2019 г. в 01:23, Kai-Heng Feng : > > at 02:28, Pavel Shilovsky wrote: > > > вт, 7 мая 2019 г. в 09:13, Steve French via samba-technical > > : > >> merged into cifs-2.6.git for-next > >> > >> On Tue, May 7, 2019 at 10:17 AM Christoph Probst via samba-technical > >> wrote: > >>> Change

Re: [PATCH v8 04/16] sched/core: uclamp: Add system default clamps

On Tue, Apr 02, 2019 at 11:41:40AM +0100, Patrick Bellasi wrote: > Add a privileged interface to define a system default configuration via: > > /proc/sys/kernel/sched_uclamp_util_{min,max} Isn't the 'u' in "uclamp" already for util?

[PATCH v3] checkpatch: add command-line option for TAB size

Linux kernel coding style requires a size of 8 characters for both TAB and indentation, and such value is embedded as magic value allover the checkpatch script. This makes hard to reuse the script by other projects with different requirements in their coding style (e.g. OpenOCD [1] requires TAB

[GIT PULL] CIFS/SMB3 fixes

Please pull the following changes since commit d3511f53bb2475f2a4e8460bee5a1ae6dea2a433: Merge branch 'parisc-5.2-1' of git://git.kernel.org/pub/scm/linux/kernel/git/deller/parisc-linux (2019-05-07 19:34:17 -0700) are available in the Git repository at:

Re: [GIT PULL] pin control changes for v5.2

The pull request you sent on Wed, 8 May 2019 10:28:41 +0200: > git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl.git > tags/pinctrl-v5.2-1 has been merged into torvalds/linux.git: https://git.kernel.org/torvalds/c/fe460a6df6a8427d4ce7c731a0de43b6e10e9f6b Thank you! --

Re: [GIT PULL] TTY/Serial patches for 5.2-rc1

The pull request you sent on Wed, 8 May 2019 12:31:46 +0200: > git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/tty.git tags/tty-5.2-rc1 has been merged into torvalds/linux.git: https://git.kernel.org/torvalds/c/b3a5e648f5917ea508ecab9a629028b186d38eae Thank you! -- Deet-doot-dot, I am a

Re: [RFC PATCH v2 11/17] sched: Basic tracking of matching tasks

On 5/8/19 8:49 AM, Aubrey Li wrote: Pawan ran an experiment setting up 2 VMs, with one VM doing a parallel kernel build and one VM doing sysbench, limiting both VMs to run on 16 cpu threads (8 physical cores), with 8 vcpu for each VM. Making the fix did improve kernel build time by 7%. I'm

[PATCH v1 1/3] clk: qcom: rcg: Return failure for RCG update

In case of update config failure, return -EBUSY, so that consumers could handle the failure gracefully. Signed-off-by: Taniya Das --- drivers/clk/qcom/clk-rcg2.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c index

[PATCH v1 3/3] clk: qcom: rcg: update the DFS macro for RCG

Update the init data name for each of the dynamic frequency switch controlled clock associated with the RCG clock name, so that it can be generated as per the hardware plan. Thus update the macro accordingly. Signed-off-by: Taniya Das --- drivers/clk/qcom/clk-rcg.h| 2 +-

[PATCH v1 2/3] clk: qcom: rcg2: Add support for hardware control mode

Add a flag to indicate to support and enable hardware control mode of an RCG. Signed-off-by: Taniya Das --- drivers/clk/qcom/clk-rcg.h | 3 +++ drivers/clk/qcom/clk-rcg2.c | 3 +++ 2 files changed, 6 insertions(+) diff --git a/drivers/clk/qcom/clk-rcg.h b/drivers/clk/qcom/clk-rcg.h index

[PATCH v1 0/3] clk: qcom: Misc updates for Root Clock Generators

This patch adds support for the below 1) There could be failure while updating the RCG and not returning the failure could cause the consumer to assume the clock update is a success and not handling the failure gracefully. 2) There are few clocks in certain clock controllers which might

Re: [PATCH v2] checkpatch: add command-line option for TAB size

On Wed, May 8, 2019 at 7:56 PM Joe Perches wrote: > > On Wed, 2019-05-08 at 19:43 +0200, Antonio Borneo wrote: > > The size of 8 characters used for both TAB and indentation is > > embedded as magic value allover the checkpatch script, and this > > makes the script less readable. > > I doubt this

Re: [PATCH v2] kvm: nVMX: Set nested_run_pending in vmx_set_nested_state after checks complete

On Wed, May 08, 2019 at 10:53:12AM -0700, Aaron Lewis wrote: > nested_run_pending is also checked in > nested_vmx_check_vmentry_postreqs > (https://elixir.bootlin.com/linux/v5.1/source/arch/x86/kvm/vmx/nested.c#L2709) > so I think the setting needs to be moved to just prior to that call > with

Re: [PATCH v2] pstore/ram: Improve backward compatibility with older Chromebooks

On Wed, May 8, 2019 at 8:49 AM Douglas Anderson wrote: > When you try to run an upstream kernel on an old ARM-based Chromebook > you'll find that console-ramoops doesn't work. > > Old ARM-based Chromebooks, before > ("ramoops: support upstream

Re: [PATCH] ide: officially deprecated the legacy IDE driver

On 5/8/19 12:01 PM, Christoph Hellwig wrote: > After a recent chat with Dave we agreed to try to finally kill off the > legacy IDE code base. Set a two year grace period in which we try > to move everyone over. There are a few pieces of hardware not > supported by libata yet, but for many of

Re: ptrace warning due to "cgroup: get rid of cgroup_freezer_frozen_exit()"

Hello, Oleg! On Wed, May 08, 2019 at 05:25:36PM +0200, Oleg Nesterov wrote: > On 05/07, Roman Gushchin wrote: > > > > --- a/kernel/signal.c > > +++ b/kernel/signal.c > > @@ -2484,9 +2484,6 @@ bool get_signal(struct ksignal *ksig) > > sigdelset(>pending.signal, SIGKILL); > >

Re: [PATCH v2 02/18] fpga: dfl: fme: remove copy_to_user() in ioctl for PR

On Tue, May 7, 2019 at 12:26 PM Moritz Fischer wrote: > > On Mon, Apr 29, 2019 at 04:55:35PM +0800, Wu Hao wrote: > > This patch removes copy_to_user() code in partial reconfiguration > > ioctl, as it's useless as user never needs to read the data > > structure after ioctl. > > > > Signed-off-by:

[PATCH] ide: officially deprecated the legacy IDE driver

After a recent chat with Dave we agreed to try to finally kill off the legacy IDE code base. Set a two year grace period in which we try to move everyone over. There are a few pieces of hardware not supported by libata yet, but for many of them we aren't even sure if there are any users. For

Re: [PATCH v2] checkpatch: add command-line option for TAB size

On Wed, 2019-05-08 at 19:43 +0200, Antonio Borneo wrote: > The size of 8 characters used for both TAB and indentation is > embedded as magic value allover the checkpatch script, and this > makes the script less readable. I doubt this bit of the commit message is proper. Tabs _are_ 8 in the

Re: [PATCH v2] kvm: nVMX: Set nested_run_pending in vmx_set_nested_state after checks complete

From: Sean Christopherson Date: Wed, May 8, 2019 at 7:20 AM To: Paolo Bonzini Cc: , , Peter Shier, Aaron Lewis > On Wed, May 08, 2019 at 02:16:39PM +0200, Paolo Bonzini wrote: > > From: Aaron Lewis > > If this is actually attributed to Aaron it needs his SOB. > > > nested_run_pending=1 implies

Re: [RFC PATCH v2 00/17] Core scheduling v2

On 08-May-2019 10:30:09 AM, Aaron Lu wrote: > On Mon, May 06, 2019 at 03:39:37PM -0400, Julien Desfossez wrote: > > On 29-Apr-2019 11:53:21 AM, Aaron Lu wrote: > > > This is what I have used to make sure no two unmatched tasks being > > > scheduled on the same core: (on top of v1, I thinks it's

Re: [PATCH] vfio: add myself as reviewer

On Wed, 8 May 2019 18:06:32 +0200 Cornelia Huck wrote: > I'm trying to look at vfio patches, and it's easier if > I'm cc:ed. > > Signed-off-by: Cornelia Huck > --- > MAINTAINERS | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/MAINTAINERS b/MAINTAINERS > index

[RFC PATCH 4/7] sched/cpufreq: Move up sugov_cpu_is_busy()

From: Douglas RAILLARD Move sugov_cpu_is_busy() static function of cpufreq_schedutil.c higher in the file so it can be used by other functions. Signed-off-by: Douglas RAILLARD --- kernel/sched/cpufreq_schedutil.c | 26 +- 1 file changed, 13 insertions(+), 13

[PATCH v2] checkpatch: fix multiple const * types

Commit 1574a29f8e76 ("checkpatch: allow multiple const * types") claims to support repetition of pattern "const *", but it actually allows only one extra instance. Check the following lines int a(char const * const x[]); int b(char const * const *x); int c(char const *

[PATCH v2] checkpatch: add command-line option for TAB size

The size of 8 characters used for both TAB and indentation is embedded as magic value allover the checkpatch script, and this makes the script less readable. Replace the magic value 8 with a variable. >From the context of the code it's clear if it is used for indentation or tabulation, so no need

[RFC PATCH 2/7] sched/cpufreq: Attach perf domain to sugov policy

From: Douglas RAILLARD Attach an Energy Model perf_domain to each sugov_policy to prepare the ground for energy-aware schedutil. Signed-off-by: Douglas RAILLARD --- kernel/sched/cpufreq_schedutil.c | 39 1 file changed, 39 insertions(+) diff --git

[RFC PATCH 0/7] sched/cpufreq: Make schedutil energy aware

From: Douglas RAILLARD Make schedutil cpufreq governor energy-aware. - patch 1 introduces a function to retrieve a frequency given a base frequency and an energy cost margin. - patch 2 links Energy Model perf_domain to sugov_policy. - patch 3 updates get_next_freq() to make use of the Energy

[RFC PATCH 1/7] PM: Introduce em_pd_get_higher_freq()

From: Douglas RAILLARD em_pd_get_higher_freq() returns a frequency greater or equal to the provided one while taking into account a given cost margin. It also skips inefficient OPPs that have a higher cost than another one with a higher frequency. Signed-off-by: Douglas RAILLARD ---

[RFC PATCH 6/7] sched/cpufreq: Improve sugov_cpu_is_busy accuracy

From: Douglas RAILLARD Avoid assuming a CPU is busy when it has begun being idle before get_next_freq() is called. This is achieved by making sure the CPU will not be detected as busy by other CPUs whenever its utilization is decreasing. Signed-off-by: Douglas RAILLARD ---

[RFC PATCH 3/7] sched/cpufreq: Hook em_pd_get_higher_power() into get_next_freq()

From: Douglas RAILLARD Choose the highest OPP for a given energy cost, allowing to skip lower frequencies that would not be cheaper in terms of consumed power. These frequencies can still be interesting to keep in the energy model to give more freedom to thermal throttling, but should not be

[RFC PATCH 7/7] sched/cpufreq: Boost schedutil frequency ramp up

From: Douglas RAILLARD In some situations, it can be interesting to spend temporarily more power if that can give a useful frequency boost. The sugov_cpu_is_busy() heuristic is reused to check if there has been some idle time on all CPUs in the considered perf domain since last call to

[RFC PATCH 5/7] sched/cpufreq: sugov_cpu_is_busy for shared policy

From: Douglas RAILLARD Allow using sugov_cpu_is_busy() from sugov_update_shared(). This means that the heuristic needs to return stable results across multiple calls for a given CPU, even if there has been no utilization change since last call. sugov_cpu_is_busy() currently both checks business

Re: [PATCH 6/6] svm: Temporary deactivate AVIC during ExtINT handling

Hi Suravee. I wonder, how this interacts with Hyper-V SynIC; see comments below. On 22/03/2019 12.57, Suthikulpanit, Suravee wrote: > AMD AVIC does not support ExtINT. Therefore, AVIC must be temporary > deactivated and fall back to using legacy interrupt injection via > vINTR and interrupt

Re: [PATCH] x86/kvm/pmu: Set AMD's virt PMU version to 1

On Wed, May 08, 2019 at 05:08:44PM +, Lendacky, Thomas wrote: > On 5/8/19 12:02 PM, Borislav Petkov wrote: > > From: Borislav Petkov > > > > After commit: > > > > 672ff6cff80c ("KVM: x86: Raise #GP when guest vCPU do not support PMU") > > You should add this commit as a fixes tag. Since

Re: [PATCHv2 09/10] vfio/mdev: Avoid creating sysfs remove file on stale device removal

On Tue, 30 Apr 2019 17:49:36 -0500 Parav Pandit wrote: > If device is removal is initiated by two threads as below, mdev core > attempts to create a syfs remove file on stale device. > During this flow, below [1] call trace is observed. > > cpu-0cpu-1 >

Re: [PATCH v3 09/11] platform/x86: asus-wmi: Control RGB keyboard backlight

Hi! > > The WMI exposes two methods for controlling RGB keyboard backlight, which > > allows controlling: > > * RGB components in range 00 - ff, > > * Switch between 4 effects, > > * Switch between 3 effect speed modes, > > * Separately enable the backlight on boot, in the awake state (after

Re: [PATCHv2 08/10] vfio/mdev: Improve the create/remove sequence

On Tue, 30 Apr 2019 17:49:35 -0500 Parav Pandit wrote: > This patch addresses below two issues and prepares the code to address > 3rd issue listed below. > > 1. mdev device is placed on the mdev bus before it is created in the > vendor driver. Once a device is placed on the mdev bus without

Re: [PATCH] x86/kvm/pmu: Set AMD's virt PMU version to 1

On 5/8/19 12:02 PM, Borislav Petkov wrote: > From: Borislav Petkov > > After commit: > > 672ff6cff80c ("KVM: x86: Raise #GP when guest vCPU do not support PMU") You should add this commit as a fixes tag. Since that commit went into 5.1 it would be worth this fix going into the 5.1 stable

Re: [PATCH, RFC 48/62] selftests/x86/mktme: Test the MKTME APIs

Please ignore this patch. It includes an outdated draft from early testing. Other than showing our intent to deliver selftests, it is not out for review. Alison

[PATCH v7 02/18] selftests/x86/fsgsbase: Test ptracer-induced GSBASE write

The test validates to make sure the selector is not changed when a ptracer writes a ptracee's GSBASE. Suggested-by: Andy Lutomirski Signed-off-by: Chang S. Bae Cc: Thomas Gleixner Cc: Ingo Molnar Cc: H. Peter Anvin Cc: Andi Kleen --- tools/testing/selftests/x86/fsgsbase.c | 70

[PATCH v7 00/18] x86: Enable FSGSBASE instructions

Updates from v6 [6]: * Fix ptracer-induced FS/GSBASE write behavior (Andy) * Fix GSBASE handling in the NMI path * Remove local_irq_save/restore() from switch_to() * Separate things into new patches (from 12th to 9th and 10th) * Add GSBASE handling in the documentation * Add more comments for

[PATCH v7 03/18] x86/fsgsbase/64: Add 'unsafe_fsgsbase' to enable CR4.FSGSBASE

From: Andy Lutomirski This is temporary. It will allow the next few patches to be tested incrementally. Setting unsafe_fsgsbase is a root hole. Don't do it. Signed-off-by: Andy Lutomirski Signed-off-by: Chang S. Bae Reviewed-by: Andi Kleen Reviewed-by: Andy Lutomirski Cc: Thomas Gleixner

[PATCH v7 06/18] x86/fsgsbase/64: Enable FSGSBASE instructions in the helper functions

The helper functions will switch on faster accesses to FSBASE and GSBASE when the FSGSBASE feature is enabled. Accessing user GSBASE needs a couple of SWAPGS operations. It is avoidable, if the user GSBASE is saved at kernel entry, being updated as changes, and restored back at kernel exit.

Re: [PATCH v2 2/2] ASoC: Intel: Skylake: Add Cometlake PCI IDs

On 5/8/19 11:51 AM, Evan Green wrote: On Tue, May 7, 2019 at 3:31 PM Pierre-Louis Bossart wrote: On 5/7/19 4:53 PM, Evan Green wrote: Add PCI IDs for Intel CometLake platforms, which from a software point of view are extremely similar to Cannonlake platforms. Humm, I have mixed feelings

[PATCH v7 01/18] x86/fsgsbase/64: Fix ARCH_SET_FS/GS behaviors for a remote task

When a ptracer writes to a ptracee's FS/GSBASE with a different value, the selector is also cleared. This behavior is not straightforward. The change will make the behavior simple and sensible, as it will (only) update the base when requested. Also, the condition check for comparing the base is

[PATCH v7 09/18] x86/entry/64: Add the READ_MSR_GSBASE macro

Factor out the RDMSR-based GSBASE read into a new macro. Signed-off-by: Chang S. Bae Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Andy Lutomirski Cc: H. Peter Anvin Cc: Andi Kleen Cc: Dave Hansen --- arch/x86/entry/calling.h | 9 + arch/x86/entry/entry_64.S | 12 2 files

[PATCH v7 10/18] x86/entry/64: Switch CR3 before SWAPGS on the paranoid entry

When FSGSBASE is enabled, GSBASE handling on the paranoid entry will need to retrieve the kernel GSBASE. Thus, the kernel page table should be in. As a preparation, the CR3 switching is moved to happen at first, before the SWAPGS. Current GSBASE switching mechanism is possible without the kernel

[PATCH v7 12/18] x86/fsgsbase/64: GSBASE handling with FSGSBASE in the paranoid path

Without FSGSBASE, user space cannot change GSBASE other than through the PRCTL. On the transition from user space to kernel, SWAPGS is used to swap the content of GSBASE and MSR_KERNEL_GS_BASE. However, SWAPGS should only be used if entering from user mode to kernel mode. Particularly in an

[PATCH v7 17/18] x86/elf: Enumerate kernel FSGSBASE capability in AT_HWCAP2

From: Andi Kleen The kernel needs to explicitly enable FSGSBASE. So, the application needs to know if it can safely use these instructions. Just looking at the CPUID bit is not enough because it may be running in a kernel that does not enable the instructions. One way for the application would

[PATCH v7 15/18] selftests/x86/fsgsbase: Test ptracer-induced GSBASE write with FSGSBASE

This validates that GS and GSBASE are independently preserved in ptracer commands. Suggested-by: Andy Lutomirski Signed-off-by: Chang S. Bae Cc: Thomas Gleixner Cc: Ingo Molnar Cc: H. Peter Anvin Cc: Andi Kleen --- tools/testing/selftests/x86/fsgsbase.c | 11 +-- 1 file changed, 9

[PATCH v7 16/18] x86/fsgsbase/64: Enable FSGSBASE by default and add a chicken bit

From: Andy Lutomirski Now that FSGSBASE is fully supported, remove unsafe_fsgsbase, enable FSGSBASE by default, and add nofsgsbase to disable it. Signed-off-by: Andy Lutomirski Signed-off-by: Chang S. Bae Reviewed-by: Andi Kleen Cc: Thomas Gleixner Cc: Ingo Molnar Cc: H. Peter Anvin ---

[PATCH v7 14/18] selftests/x86/fsgsbase: Test WRGSBASE

From: Andy Lutomirski This validates that GS and GSBASE are independently preserved across context switches. [ chang: Use FSGSBASE instructions directly instead of .byte ] Signed-off-by: Andy Lutomirski Reviewed-by: Andi Kleen Signed-off-by: Chang S. Bae Cc: Thomas Gleixner Cc: Ingo Molnar

[PATCH v7 18/18] x86/fsgsbase/64: Add documentation for FSGSBASE

From: Andi Kleen v2: Minor updates to documentation requested in review. v3: Update for new gcc and various improvements. v4: Address the typos pointed by Randy Dunlap Signed-off-by: Andi Kleen Signed-off-by: Chang S. Bae Cc: Randy Dunlap Cc: Thomas Gleixner Cc: Ingo Molnar Cc: Andy

[PATCH v7 08/18] x86/fsgsbase/64: When copying a thread, use the FSGSBASE instructions

Copy real FS/GSBASE values instead of approximation when FSGSBASE is enabled. Suggested-by: Andy Lutomirski Signed-off-by: Chang S. Bae Cc: Thomas Gleixner Cc: Ingo Molnar Cc: H. Peter Anvin Cc: Andi Kleen --- arch/x86/kernel/process_64.c | 15 +-- 1 file changed, 9

Re: [PATCH 4/4] checkpatch: replace magic value for TAB size

On Wed, 2019-05-08 at 17:32 +0200, Antonio Borneo wrote: > On Wed, May 8, 2019 at 4:52 PM Joe Perches wrote: > ... > > > In these cases the script will be probably modified and adapted, > > > so there is no need (at least for the moment) to expose this > > > setting on the script's command line.

[PATCH v7 07/18] x86/fsgsbase/64: Preserve FS/GS state in __switch_to() if FSGSBASE is on

From: Andy Lutomirski With the new FSGSBASE instructions, we can efficiently read and write the FSBASE and GSBASE in __switch_to(). Use that capability to preserve the full state. This will enable user code to do whatever it wants with the new instructions without any kernel-induced gotchas.

[PATCH] x86/kvm/pmu: Set AMD's virt PMU version to 1

From: Borislav Petkov After commit: 672ff6cff80c ("KVM: x86: Raise #GP when guest vCPU do not support PMU") my AMD guests started #GPing like this: general protection fault: [#1] PREEMPT SMP CPU: 1 PID: 4355 Comm: bash Not tainted 5.1.0-rc6+ #3 Hardware name: QEMU Standard PC

[PATCH v7 05/18] x86/fsgsbase/64: Add intrinsics for FSGSBASE instructions

From: Andi Kleen Add C intrinsics and assembler macros for the new FSBASE and GSBASE instructions. Very straight forward. Used in followon patches. [ luto: Rename the variables from FS and GS to FSBASE and GSBASE and make safe to include on 32-bit kernels. ] Signed-off-by: Andi Kleen

[PATCH v7 11/18] x86/fsgsbase/64: Introduce the FIND_PERCPU_BASE macro

On the paranoid entry, by far, SWAPGS is needed when entering from user space. A positive GSBASE means it is a user value and a negative GSBASE means it is a kernel value. When FSGSBASE is enabled, however, user space can write arbitrary values to GSBASE, so it will break the existing logic to

[PATCH v7 04/18] kbuild: Raise the minimum required binutils version to 2.21

It helps to use some new instructions directly in assembly code. Suggested-by: Andi Kleen Signed-off-by: Chang S. Bae Reviewed-by: Andi Kleen Acked-by: Andrew Morton Cc: Andy Lutomirski Cc: Linux Torvalds Cc: Thomas Gleixner Cc: Ingo Molnar Cc: H. Peter Anvin ---

[PATCH v7 13/18] x86/fsgsbase/64: Document GSBASE handling in the paranoid path

On a FSGSBASE system, the way to handle GSBASE in the paranoid path will be different from the existing SWAPGS-based. Document the reason and what is done by the (new) GSBASE handling. In non-paranoid path, it will keep working exactly like it does today. Signed-off-by: Chang S. Bae Cc: Andy

Re: [PATCH v2 1/2] ASoC: SOF: Add Comet Lake PCI IDs

On 5/8/19 11:42 AM, Evan Green wrote: On Tue, May 7, 2019 at 3:14 PM Pierre-Louis Bossart wrote: Minor nit-picks below. The Kconfig would work but select CANNONLAKE even if you don't want it. +config SND_SOC_SOF_COMETLAKE_LP + tristate + select SND_SOC_SOF_CANNONLAKE This

[PATCH v4 1/2] firmware: arm_scmi: Fetch and store sensor scale

In preparation for dealing with scales within the SCMI HWMON driver, fetch and store the sensor unit scale into the scmi_sensor_info structure. In order to simplify computations for upper layer, take care of sign extending the scale to a full 8-bit signed value. Signed-off-by: Florian Fainelli

Re: [PATCH 02/16] treewide: rename match_string() -> __match_string()

(Trimming the lists but keeping lkml) Quoting Alexandru Ardelean (2019-05-08 04:28:28) > This change does a rename of match_string() -> __match_string(). > > There are a few parts to the intention here (with this change): > 1. Align with sysfs_match_string()/__sysfs_match_string() > 2. This

Re: BUG: soft lockup in kvm_vm_ioctl

From: Dmitry Vyukov Date: Wed, May 8, 2019 at 1:25 PM To: Eric Biggers Cc: syzbot, KVM list, , David Miller, Artem Bityutskiy, , Josh Poimboeuf, LKML, , Andy Lutomirski, Ingo Molnar, Peter Zijlstra, Richard Weinberger, Rik van Riel, Steven Rostedt, syzkaller-bugs, Thomas Gleixner > From: Eric

Re: [PATCH, RFC 52/62] x86/mm: introduce common code for mem encryption

On Wed, May 08, 2019 at 05:44:12PM +0300, Kirill A. Shutemov wrote: > +EXPORT_SYMBOL_GPL(__mem_encrypt_dma_set); > + > +phys_addr_t __mem_encrypt_dma_clear(phys_addr_t paddr) > +{ > + if (sme_active()) > + return __sme_clr(paddr); > + > + return paddr & ~mktme_keyid_mask; > +}

Re: [PATCH] mm: filemap: correct the comment about VM_FAULT_RETRY

Ping. Josef, any comment on this one? Thanks, Yang On 4/25/19 4:22 PM, Yang Shi wrote: The commit 6b4c9f446981 ("filemap: drop the mmap_sem for all blocking operations") changed when mmap_sem is dropped during filemap page fault and when returning VM_FAULT_RETRY. Correct the comment to

[PATCH v2 4/4] reset: Switch to SPDX license identifier for reset-simple

Switch to SPDX license identifier for reset-simple driver. Cc: Maxime Ripard Signed-off-by: Manivannan Sadhasivam --- drivers/reset/reset-simple.c | 6 +- 1 file changed, 1 insertion(+), 5 deletions(-) diff --git a/drivers/reset/reset-simple.c b/drivers/reset/reset-simple.c index

[PATCH v2 3/4] reset: Add reset controller support for BM1880 SoC

Add reset controller support for Bitmain BM1880 SoC reusing the reset-simple driver. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Philipp Zabel --- drivers/reset/Kconfig| 3 ++- drivers/reset/reset-simple.c | 2 ++ 2 files changed, 4 insertions(+), 1 deletion(-) diff --git

[PATCH v2 2/4] arm64: dts: bitmain: Add reset controller support for BM1880 SoC

Add reset controller support for Bitmain BM1880 SoC. This SoC has two reset controllers, each controlling reset lines of different peripherals. This commit also adds reset support to UART peripherals. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Philipp Zabel ---

Re: [PATCH] ftrace: enable trampoline when rec count decrement to one

On Wed, 8 May 2019 23:02:33 +0800 "chengjian (D)" wrote: > function tracer uses ftrace_caller() and livepatch uses > ftrace_regs_caller(). > > I can modify my testcase to trigger this race condition. > > > #enable livepatch > insmod klp_unshare_files.ko > cat

[PATCH v2 1/4] dt-bindings: reset: Add devicetree binding for BM1880 reset controller

Add devicetree binding for Bitmain BM1880 SoC reset controller. This SoC has two reset controllers each controlling reset lines of different peripherals. Signed-off-by: Manivannan Sadhasivam Reviewed-by: Rob Herring --- .../bindings/reset/bitmain,bm1880-reset.txt | 18 +++

Re: [PATCH v2] netfilter: xt_owner: Add supplementary groups option

On 5/8/19 11:56 AM, Lukasz Pawelczyk wrote: > On Wed, 2019-05-08 at 08:41 -0700, Eric Dumazet wrote: >> >> On 5/8/19 11:25 AM, Lukasz Pawelczyk wrote: >>> On Wed, 2019-05-08 at 07:58 -0700, Eric Dumazet wrote: On 5/8/19 10:12 AM, Lukasz Pawelczyk wrote: > The XT_SUPPL_GROUPS flag

[PATCH v2 0/4] Add reset controller support for BM1880 SoC

Hello, This patchset adds reset controller support for Bitmain BM1880 SoC. BM1880 SoC has two reset controllers each controlling reset lines of different peripherals. And the reset-simple driver has been reused here. This patchset has been tested on 96Boards Sophon Edge board. Thanks, Mani

Re: [PATCH v2 2/2] ASoC: Intel: Skylake: Add Cometlake PCI IDs

On Tue, May 7, 2019 at 3:31 PM Pierre-Louis Bossart wrote: > > On 5/7/19 4:53 PM, Evan Green wrote: > > Add PCI IDs for Intel CometLake platforms, which from a software > > point of view are extremely similar to Cannonlake platforms. > > Humm, I have mixed feelings here. > > Yes the hardware is

Re: [alsa-devel] [RFC PATCH 2/7] soundwire: add Slave sysfs support

Vinod, the question was not for dp0 and dpN, it's fine to have subdirectories there, but rather why we need separate devices for the master and slave properties. Slave does not have a separate device. IIRC the properties for Slave are in /sys/bus/soundwire/device//... I am not sure this is

[PATCH] platform/x86: acer-wmi: Mark expected switch fall-throughs

In preparation to enabling -Wimplicit-fallthrough, mark switch cases where we are expecting to fall through. This patch fixes the following warnings: drivers/platform/x86/acer-wmi.c: In function ‘set_u32’: drivers/platform/x86/acer-wmi.c:1378:33: warning: this statement may fall through

Re: [PATCH] net: dsa: lantiq: fix spelling mistake "brigde" -> "bridge"

From: Colin King Date: Wed, 8 May 2019 11:22:09 +0100 > From: Colin Ian King > > There are several spelling mistakes in dev_err messages. Fix these. > > Signed-off-by: Colin Ian King Applied.

Re: [PATCH v2 1/2] ASoC: SOF: Add Comet Lake PCI IDs

On Tue, May 7, 2019 at 3:14 PM Pierre-Louis Bossart wrote: > > Minor nit-picks below. The Kconfig would work but select CANNONLAKE even > if you don't want it. > > > > > +config SND_SOC_SOF_COMETLAKE_LP > > + tristate > > + select SND_SOC_SOF_CANNONLAKE > > This should be > select

Re: [PATCH] openvswitch: Replace removed NF_NAT_NEEDED with IS_ENABLED(CONFIG_NF_NAT)

From: Geert Uytterhoeven Date: Wed, 8 May 2019 08:52:32 +0200 > Commit 4806e975729f99c7 ("netfilter: replace NF_NAT_NEEDED with > IS_ENABLED(CONFIG_NF_NAT)") removed CONFIG_NF_NAT_NEEDED, but a new user > popped up afterwards. > > Fixes: fec9c271b8f1bde1 ("openvswitch: load and reference the

Re: [PATCH 1/2] coresight: Do not call smp_processor_id() from preemptible

On 08/05/2019 17:39, Mathieu Poirier wrote: Hi Suzuki, On Fri, 3 May 2019 at 10:04, Suzuki K Poulose wrote: Instead of using smp_processor_id() to figure out the node, use the numa_node_id() for the current CPU node to avoid splats like : BUG: using smp_processor_id() in preemptible

Re: [alsa-devel] [RFC PATCH 1/7] soundwire: Add sysfs support for master(s)

On 5/8/19 4:16 AM, Greg KH wrote: On Wed, May 08, 2019 at 01:16:06PM +0530, Vinod Koul wrote: On 07-05-19, 17:49, Pierre-Louis Bossart wrote: The model here is that Master device is PCI or Platform device and then creates a bus instance which has soundwire slave devices. So for any

[PATCH v2 2/2] mmc: sdhci-iproc: Set NO_HISPD bit to fix HS50 data hold time problem

From: Trac Hoang The iproc host eMMC/SD controller hold time does not meet the specification in the HS50 mode. This problem can be mitigated by disabling the HISPD bit; thus forcing the controller output data to be driven on the falling clock edges rather than the rising clock edges. Cc:

[PATCH v2 1/2] mmc: sdhci-iproc: cygnus: Set NO_HISPD bit to fix HS50 data hold time problem

From: Trac Hoang The iproc host eMMC/SD controller hold time does not meet the specification in the HS50 mode. This problem can be mitigated by disabling the HISPD bit; thus forcing the controller output data to be driven on the falling clock edges rather than the rising clock edges. This

<    1   2   3   4   5   6   7   8   9   >