On Mon, Jul 22, 2019 at 03:34:13PM -0700, john.hubb...@gmail.com wrote:
> +enum pup_flags_t {
> + PUP_FLAGS_CLEAN = 0,
> + PUP_FLAGS_DIRTY = 1,
> + PUP_FLAGS_LOCK = 2,
> + PUP_FLAGS_DIRTY_LOCK= 3,
> +};
Well, the enum defeats the ease of just being
On 7/19/2019 10:34 AM, Vinod Koul wrote:
On 05-07-19, 11:45, Sameer Pujar wrote:
Hi Vinod,
What are your final thoughts regarding this?
Hi sameer,
Sorry for the delay in replying
On this, I am inclined to think that dma driver should not be involved.
The ADMAIF needs this configuration
On Mon, Jul 22, 2019 at 03:11:33PM +0100, Mark Rutland wrote:
> The naming of pgtable_page_{ctor,dtor}() seems to have confused a few
> people, and until recently arm64 used these erroneously/pointlessly for
> other levels of page table.
>
> To make it incredibly clear that these only apply to
From: Jia He
Commit b92df1de5d28 ("mm: page_alloc: skip over regions of invalid pfns
where possible") optimized the loop in memmap_init_zone(). But it causes
possible panic on x86 due to specific memory mapping on x86_64 which will
skip valid pfns as well, so Daniel Vacek reverted it later.
But
From: Jia He
After skipping some invalid pfns in memmap_init_zone(), there is still
some room for improvement.
E.g. if pfn and pfn+1 are in the same memblock region, we can simply pfn++
instead of doing the binary search in memblock_next_valid_pfn.
Furthermore, if the pfn is in a gap of two
Here is new version of "[PATCH v11 0/3] remain and optimize
memblock_next_valid_pfn on arm and arm64" from Jia He, which is suggested
by Ard to respin this patch set [1].
In the new version, I squashed patch 1/3 and patch 2/3 in v11 into
one patch, fixed a bug for possible out of bound accessing
On Wed, Jul 10, 2019 at 04:13:37AM +, Fancy Fang wrote:
> Rename 'lcdif' pixel clock related names to 'disp' names, since:
>
> First, the lcdif pixel clock is not supplied to LCDIF controller
> directly, but to some LPCG clock in display mix. So rename it to
> 'disp' pixel clock is more
On 2019/7/23 下午1:02, Michael S. Tsirkin wrote:
On Tue, Jul 23, 2019 at 11:55:28AM +0800, Jason Wang wrote:
On 2019/7/22 下午4:02, Michael S. Tsirkin wrote:
On Mon, Jul 22, 2019 at 01:21:59PM +0800, Jason Wang wrote:
On 2019/7/21 下午6:02, Michael S. Tsirkin wrote:
On Sat, Jul 20, 2019 at
The fix was sent last morning my time:
https://marc.info/?l=linux-scsi=156378725427719=2
ping (with the merge window now closed).
On Wed, Jul 17, 2019 at 03:14:57PM -0700, Suren Baghdasaryan wrote:
> Hi Minchan,
> Couple comments inline.
> Thanks!
>
> On Sun, Jul 14, 2019 at 4:34 PM Minchan Kim wrote:
> >
> > When a process expects no accesses to a certain memory range, it could
> > give a hint to kernel that the pages can
On 2019/7/23 下午1:01, Michael S. Tsirkin wrote:
On Tue, Jul 23, 2019 at 12:01:40PM +0800, Jason Wang wrote:
On 2019/7/22 下午4:08, Michael S. Tsirkin wrote:
On Mon, Jul 22, 2019 at 01:24:24PM +0800, Jason Wang wrote:
On 2019/7/21 下午8:18, Michael S. Tsirkin wrote:
On Sun, Jul 21, 2019 at
> On 22 Jul 2019, at 06.31, Minwoo Im wrote:
>
>>> @@ -,27 +1112,27 @@ static int nvm_init(struct nvm_dev *dev)
>>> int ret = -EINVAL;
>>>
>>> if (dev->ops->identity(dev)) {
>>> - pr_err("nvm: device could not be identified\n");
>>> + pr_err("device could not be
> -Original Message-
> From: Ondrej Mosnacek [mailto:omosn...@redhat.com]
> Sent: Monday, July 22, 2019 6:48 PM
> To: Gote, Nitin R
> Cc: Kees Cook ; kernel-
> harden...@lists.openwall.com; Paul Moore ;
> Stephen Smalley ; Eric Paris ;
> SElinux list ; Linux kernel mailing list
Fix a crash with multipath activated. It happends when ANA log
page is larger than MDTS and because of that ANA is disabled.
The driver then tries to access unallocated buffer when connecting
to a nvme target. The signature is as follows:
[ 300.433586] nvme nvme0: ANA log page size (8208) larger
On Tue, Jul 09, 2019 at 09:19:17AM +0200, Stefan Riedmueller wrote:
> This patchstack adjusts the already existing naming for the PHYTEC
> phyBOARD-Segin to the PHYTEC naming scheme that is already used with the
> phyCORE-i.MX 6 and the phyBOARD-Mira.
>
> Furthermore it introduces some small
On Mon 22 Jul 22:14 PDT 2019, Vinod Koul wrote:
> On 23-07-19, 10:38, Amit Kucheria wrote:
> > On Mon, Jul 22, 2019 at 6:06 PM Vinod Koul wrote:
> > >
> > > Unit name is supposed to be a number, using a macro with hex value is
> >
> > /s/name/address?
>
> Right, will fix.
>
> > > not
From: Sultan Alsawaf
In order to prevent redundant entry creation by racing against itself,
mb_cache_entry_create scans through a hash-list of all current entries
in order to see if another allocation for the requested new entry has
been made. Furthermore, it allocates memory for a new entry
On 7/22/19 6:02 PM, Andrew Morton wrote:
On Mon, 22 Jul 2019 09:25:09 +0200 Vlastimil Babka wrote:
since there may be pages off LRU temporarily. We should migrate other
pages if MPOL_MF_MOVE* is specified. Set has_unmovable flag if some
paged could not be not moved, then return -EIO for
On Mon, Jul 22, 2019 at 2:42 AM Christoph Hellwig wrote:
>
> memremap.c implements MM functionality for ZONE_DEVICE, so it really
> should be in the mm/ directory, not the kernel/ one.
>
> Signed-off-by: Christoph Hellwig
Acked-by: Dan Williams
On Mon, 2019-07-22 at 19:42 -0700, Guenter Roeck wrote:
> On 7/22/19 4:45 PM, James Bottomley wrote:
> > [linux-scsi added to cc]
> > On Mon, 2019-07-22 at 15:21 -0700, Guenter Roeck wrote:
> > > On Sun, Jul 21, 2019 at 02:33:38PM -0700, Linus Torvalds wrote:
> > >
> > > [ ... ]
> > > >
> > > >
On 23/07/19 1:31 AM, Alan Cooper wrote:
> I'm having a problem with a new SD/MMC controller and PHY in our
> latest SoC's. The issue I'm seeing is that I can't switch into HS400
> mode. This looks like something the driver is doing that doesn't meet
> the JEDEC spec. In the "HS400 timing mode
On 23-07-19, 10:38, Amit Kucheria wrote:
> On Mon, Jul 22, 2019 at 6:06 PM Vinod Koul wrote:
> >
> > Unit name is supposed to be a number, using a macro with hex value is
>
> /s/name/address?
Right, will fix.
> > not recommended, so add the value in unit name.
> >
> >
As clocks are registered their parents are resolved and the parent_map
is updated to cache the clk_core objects of each existing parent.
But in the event of a clock being unregistered this cache will carry
dangling pointers if not invalidated, so do this for all children of the
clock being
On Mon, Jul 22, 2019 at 6:06 PM Vinod Koul wrote:
>
> Unit name is supposed to be a number, using a macro with hex value is
/s/name/address?
> not recommended, so add the value in unit name.
>
> arch/arm64/boot/dts/qcom/sdm845-cheza.dtsi:966.16-969.4: Warning
> (unit_address_format):
Mikhail Gavrilov writes:
> On Mon, 22 Jul 2019 at 12:53, Huang, Ying wrote:
>>
>> Yes. This is quite complex. Is the transparent huge page enabled in
>> your system? You can check the output of
>>
>> $ cat /sys/kernel/mm/transparent_hugepage/enabled
>
> always [madvise] never
>
>> And,
Hi,
> Looks like this one crept back as the fix is missing from v5.3-rc1.
>
> Forgot to include in the pull request?
More like forgot to send the pull request, my bad. I eventually realized
a couple of days ago and it'll be coming upstream soon. Sorry about
that.
johannes
On Tue, Jul 23, 2019 at 11:55:28AM +0800, Jason Wang wrote:
>
> On 2019/7/22 下午4:02, Michael S. Tsirkin wrote:
> > On Mon, Jul 22, 2019 at 01:21:59PM +0800, Jason Wang wrote:
> > > On 2019/7/21 下午6:02, Michael S. Tsirkin wrote:
> > > > On Sat, Jul 20, 2019 at 03:08:00AM -0700, syzbot wrote:
> > >
On Tue, Jul 23, 2019 at 12:01:40PM +0800, Jason Wang wrote:
>
> On 2019/7/22 下午4:08, Michael S. Tsirkin wrote:
> > On Mon, Jul 22, 2019 at 01:24:24PM +0800, Jason Wang wrote:
> > > On 2019/7/21 下午8:18, Michael S. Tsirkin wrote:
> > > > On Sun, Jul 21, 2019 at 06:02:52AM -0400, Michael S. Tsirkin
On Mon, 2019-07-22 at 21:35 -0700, Andrew Morton wrote:
> On Mon, 22 Jul 2019 17:38:15 -0700 Joe Perches wrote:
>
> > Several uses of strlcpy and strscpy have had defects because the
> > last argument of each function is misused or typoed.
> >
> > Add macro mechanisms to avoid this defect.
> >
On Mon, 22 Jul 2019 17:38:15 -0700 Joe Perches wrote:
> Several uses of strlcpy and strscpy have had defects because the
> last argument of each function is misused or typoed.
>
> Add macro mechanisms to avoid this defect.
>
> stracpy (copy a string to a string array) must have a string
>
Hi,
[This is an automated email]
This commit has been processed because it contains a "Fixes:" tag,
fixing commit: 240c35a3783a kvm: x86: Use task structs fpu field for user.
The bot has tested the following trees: v5.2.2, v5.1.19.
v5.2.2: Build OK!
v5.1.19: Failed to apply! Possible
Hi All,
Am facing some issues getting CPU limiting working with cgroups v2. Pl read on
for the details; a solution is much appreciated!
Env: 5.0.0 Linux kernel on x86_64 Fedora 29
When attempting to setup CPU limiting using cgroups v2, I effectively
disabled cgroups v1 by passing
Hi all,
Changes since 20190722:
The v4l-dvb tree gained a build failure for which I applied a patch.
The drm-intel tree gained a conflict against the kspp-gustavo tree.
Non-merge commits (relative to Linus' tree): 1453
1509 files changed, 143742 insertions(+), 24819 deletions
Commit 415008af3219 ("docs-rst: convert lsm from DocBook to ReST")
removed the last users of this macro.
Signed-off-by: Masahiro Yamada
---
scripts/Kbuild.include | 3 ---
1 file changed, 3 deletions(-)
diff --git a/scripts/Kbuild.include b/scripts/Kbuild.include
index
On Tue, 2019-07-16 at 09:50 +0800, CK Hu wrote:
> Hi, Weiyi:
>
> On Mon, 2019-07-15 at 17:07 +0800, Weiyi Lu wrote:
> > On Mon, 2019-07-15 at 16:07 +0800, CK Hu wrote:
> > > Hi, Weiyi:
> > >
> > > On Mon, 2019-07-01 at 16:57 +0800, CK Hu wrote:
> > > > Hi, Weiyi:
> > > >
> > > > On Thu,
On 2019/7/22 下午4:08, Michael S. Tsirkin wrote:
On Mon, Jul 22, 2019 at 01:24:24PM +0800, Jason Wang wrote:
On 2019/7/21 下午8:18, Michael S. Tsirkin wrote:
On Sun, Jul 21, 2019 at 06:02:52AM -0400, Michael S. Tsirkin wrote:
On Sat, Jul 20, 2019 at 03:08:00AM -0700, syzbot wrote:
syzbot has
On 2019/7/22 下午4:02, Michael S. Tsirkin wrote:
On Mon, Jul 22, 2019 at 01:21:59PM +0800, Jason Wang wrote:
On 2019/7/21 下午6:02, Michael S. Tsirkin wrote:
On Sat, Jul 20, 2019 at 03:08:00AM -0700, syzbot wrote:
syzbot has bisected this bug to:
commit 7f466032dc9e5a61217f22ea34b2df932786bbfc
On 7/22/19 8:24 PM, Masanari Iida wrote:
> This patch fixes some spelling typos in config-bisect.pl
>
> Signed-off-by: Masanari Iida
Acked-by: Randy Dunlap
Thanks.
> ---
> tools/testing/ktest/config-bisect.pl | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git
23.07.2019 6:31, Sowjanya Komatineni пишет:
>
> On 7/22/19 8:25 PM, Dmitry Osipenko wrote:
>> 23.07.2019 6:09, Sowjanya Komatineni пишет:
>>> On 7/22/19 8:03 PM, Dmitry Osipenko wrote:
23.07.2019 4:52, Sowjanya Komatineni пишет:
> On 7/22/19 6:41 PM, Dmitry Osipenko wrote:
>>
On Tue, 23 Jul 2019 at 11:21, Chunyan Zhang wrote:
>
> On Tue, 23 Jul 2019 at 11:05, Baolin Wang wrote:
> >
> > Hi Ulf,
> >
> > On Mon, 22 Jul 2019 at 19:54, Ulf Hansson wrote:
> > >
> > > On Wed, 17 Jul 2019 at 04:29, Baolin Wang wrote:
> > > >
> > > > In sdhci_runtime_resume_host() function,
On 7/22/19 8:25 PM, Dmitry Osipenko wrote:
23.07.2019 6:09, Sowjanya Komatineni пишет:
On 7/22/19 8:03 PM, Dmitry Osipenko wrote:
23.07.2019 4:52, Sowjanya Komatineni пишет:
On 7/22/19 6:41 PM, Dmitry Osipenko wrote:
23.07.2019 4:08, Dmitry Osipenko пишет:
23.07.2019 3:58, Dmitry Osipenko
arg2 will never < 0, for its type is 'unsigned long'. So negative
judgment is meaningless.
Signed-off-by: Yang Xu
---
kernel/sys.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/kernel/sys.c b/kernel/sys.c
index 2969304c29fe..399457d26bef 100644
--- a/kernel/sys.c
+++
Hi Rob,
>
> Re: [PATCH v5 2/2] dt-bindings: mtd: Document Macronix raw NAND
controller bindings
>
> On Wed, Jul 03, 2019 at 03:15:44PM +0800, Mason Yang wrote:
> > Document the bindings used by the Macronix raw NAND controller.
> >
> > Signed-off-by: Mason Yang
> > ---
> >
23.07.2019 6:09, Sowjanya Komatineni пишет:
>
> On 7/22/19 8:03 PM, Dmitry Osipenko wrote:
>> 23.07.2019 4:52, Sowjanya Komatineni пишет:
>>> On 7/22/19 6:41 PM, Dmitry Osipenko wrote:
23.07.2019 4:08, Dmitry Osipenko пишет:
> 23.07.2019 3:58, Dmitry Osipenko пишет:
>> 21.07.2019
This patch fixes some spelling typos in config-bisect.pl
Signed-off-by: Masanari Iida
---
tools/testing/ktest/config-bisect.pl | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/tools/testing/ktest/config-bisect.pl
b/tools/testing/ktest/config-bisect.pl
index
On Tue, 23 Jul 2019 at 11:05, Baolin Wang wrote:
>
> Hi Ulf,
>
> On Mon, 22 Jul 2019 at 19:54, Ulf Hansson wrote:
> >
> > On Wed, 17 Jul 2019 at 04:29, Baolin Wang wrote:
> > >
> > > In sdhci_runtime_resume_host() function, we will always do software reset
> > > for all, which will cause
Hi Russell, Stefano
> Subject: [PATCH] arm: xen: mm: use __GPF_DMA32 for arm64
Any comments?
>
> arm64 shares some code under arch/arm/xen, including mm.c.
> However ZONE_DMA is removed by commit
> ad67f5a6545("arm64: replace ZONE_DMA with ZONE_DMA32").
> So to ARM64, need use __GFP_DMA32.
>
Tegra's APB DMA engine updates words counter after each transferred burst
of data, hence it can report transfer's residual with more fidelity which
may be required in cases like audio playback. In particular this fixes
audio stuttering during playback in a chromium web browser. The patch is
based
Now Terga20 and Tegra30 EMC drivers should provide clock-rounding
functionality using the new Tegra-CLK driver API.
Acked-by: Peter De Schrijver
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/tegra20-emc.c | 50 --
1 file changed, 48 insertions(+), 2
Turned out that it could take over a millisecond under some circumstances,
like running on a very low CPU/memory frequency. TRM says that handshake
happens when there is a "safe" moment, but not explains exactly what that
moment is. Apparently at least memory should be idling and thus the low
The "interruptible" variant may error out, the "uninterruptible" not.
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/tegra20-emc.c | 6 +-
1 file changed, 1 insertion(+), 5 deletions(-)
diff --git a/drivers/memory/tegra/tegra20-emc.c
b/drivers/memory/tegra/tegra20-emc.c
index
The driver expects certain debug features to be disabled in order to
work properly. Let's disable them explicitly for consistency and to not
rely on a boot state.
Acked-by: Peter De Schrijver
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/tegra20-emc.c | 17 -
1 file
A proper External Memory Controller clock rounding and parent selection
functionality is required by the EMC drivers, it is not available using
the generic clock implementation because only the Memory Controller driver
is aware of what clock rates are actually available for a particular
device.
Add binding for the NVIDIA Tegra30 SoC Memory Controller.
Signed-off-by: Dmitry Osipenko
---
.../memory-controllers/nvidia,tegra30-mc.yaml | 173 ++
1 file changed, 173 insertions(+)
create mode 100644
Documentation/devicetree/bindings/memory-controllers/nvidia,tegra30-mc.yaml
The Tegra30 binding will actually differ from the Tegra124 a tad, in
particular the EMEM configuration description. Hence rename the binding
to Tegra124 during of the conversion to YAML.
Signed-off-by: Dmitry Osipenko
---
.../nvidia,tegra124-mc.yaml | 156 ++
Timing control debug features should be disabled at a boot time, but you
never now and hence it's better to disable them explicitly because some of
those features are crucial for the driver to do a proper thing.
Acked-by: Peter De Schrijver
Signed-off-by: Dmitry Osipenko
---
Introduce driver for the External Memory Controller (EMC) found on Tegra30
chips, it controls the external DRAM on the board. The purpose of this
driver is to program memory timing for external memory on the EMC clock
rate change.
Acked-by: Peter De Schrijver
Signed-off-by: Dmitry Osipenko
---
During boot print how many memory timings got the driver and what's the
RAM code. This is a very useful information when something is wrong with
boards memory timing.
Suggested-by: Marc Dietrich
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/tegra20-emc.c | 7 +++
1 file changed,
Add External Memory Controller node to the device-tree.
Acked-by: Peter De Schrijver
Signed-off-by: Dmitry Osipenko
---
arch/arm/boot/dts/tegra30.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/arm/boot/dts/tegra30.dtsi b/arch/arm/boot/dts/tegra30.dtsi
index
The memory frequency scaling will be managed by tegra20-devfreq driver
and PM QoS once all the prerequisite patches will get upstreamed.
The parent clock is now managed by the clock driver and we also should
assume that PLLM rate can't be changed on some devices (Galaxy Tab 10.1
for example).
The Memory Controller registers definition is sparse and duplicated,
let's consolidate everything into a common place for consistency.
Acked-by: Peter De Schrijver
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/mc.c | 30 ---
drivers/memory/tegra/mc.h | 52
Add device-tree binding for NVIDIA Tegra30 External Memory Controller.
The binding is based on the Tegra124 EMC binding since hardware is
similar, although there are couple significant differences.
Note that the memory timing description is given in a platform-specific
form because there is no
The register polling code was gone, but the included header change was
missed. Fix it up for consistency.
Acked-by: Peter De Schrijver
Signed-off-by: Dmitry Osipenko
---
drivers/memory/tegra/tegra20-emc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Hello,
This series introduces driver for the External Memory Controller (EMC)
found on Tegra30 chips, it controls the external DRAM on the board. The
purpose of this driver is to program memory timing for external memory on
the EMC clock rate change. The driver was tested using the ACTMON devfreq
On (07/19/19 14:57), Petr Mladek wrote:
[..]
> > Where do nested printk()-s come from? Which one of the following
> > scenarios you cover in commit message:
> >
> > scenario 1
> >
> > - we have CPUB which holds logbuf_lock
> > - we have CPUA which panic()-s the system, but can't bring CPUB down,
> -Original Message-
> From: David Binderman [mailto:dcb...@hotmail.com]
> Sent: Monday, July 22, 2019 4:12 PM
> To: Pkshih; kv...@codeaurora.org; da...@davemloft.net;
> linux-wirel...@vger.kernel.org;
> net...@vger.kernel.org; linux-kernel@vger.kernel.org
> Subject:
On Tue, Jul 09, 2019 at 09:19:19AM +0200, Stefan Riedmueller wrote:
> There is now a PHYTEC phyCORE-i.MX 6UL with eMMC instead of NAND flash
> available. The dts filename needs to reflect that to differentiate both.
>
> Signed-off-by: Stefan Riedmueller
> ---
> arch/arm/boot/dts/Makefile
From: Miklos Szeredi
commit 7bf2d1df80822ec056363627e2014990f068f7aa upstream.
Signed-off-by: Miklos Szeredi
Signed-off-by: Al Viro
Signed-off-by: Ajay Kaher
Reviewed-by: Srivatsa S. Bhat (VMware)
---
fs/fuse/dev.c | 2 +-
fs/splice.c | 4 ++--
From: Matthew Wilcox
commit 15fab63e1e57be9fdb5eec1bbc5916e9825e9acb upstream.
Change pipe_buf_get() to return a bool indicating whether it succeeded
in raising the refcount of the page (if the thing in the pipe is a page).
This removes another mechanism for overflowing the page refcount. All
From: Linus Torvalds
commit 8fde12ca79aff9b5ba951fce1a2641901b8d8e64 upstream.
If the page refcount wraps around past zero, it will be freed while
there are still four billion references to it. One of the possible
avenues for an attacker to try to make this happen is by doing direct IO
on a
On 7/22/19 8:03 PM, Dmitry Osipenko wrote:
23.07.2019 4:52, Sowjanya Komatineni пишет:
On 7/22/19 6:41 PM, Dmitry Osipenko wrote:
23.07.2019 4:08, Dmitry Osipenko пишет:
23.07.2019 3:58, Dmitry Osipenko пишет:
21.07.2019 22:40, Sowjanya Komatineni пишет:
This patch implements PMC wakeup
The original issue,
https://lore.kernel.org/netdev/1562959401-19815-1-git-send-email-...@lca.pw/
The debugging so far seems point to that the compilers get confused by the
module sections. During module_param(), it stores “__param_rx_frag_size"
as a “struct kernel_param” into the __param
From: Will Deacon
commit a3e328556d41bb61c55f9dfcc62d6a826ea97b85 upstream.
When operating on hugepages with DEBUG_VM enabled, the GUP code checks
the compound head for each tail page prior to calling
page_cache_add_speculative. This is broken, because on the fast-GUP
path (where we don't hold
From: "Kirill A. Shutemov"
commit 7aef4172c7957d7e65fc172be4c99becaef855d4 upstream.
With new refcounting we are going to see THP tail pages mapped with PTE.
Generic fast GUP rely on page_cache_get_speculative() to obtain
reference on page. page_cache_get_speculative() always fails on tail
From: Punit Agrawal
commit d63206ee32b6e64b0e12d46e5d6004afd9913713 upstream.
When speculatively taking references to a hugepage using
page_cache_add_speculative() in gup_huge_pmd(), it is assumed that the
page returned by pmd_page() is the head page. Although normally true,
this assumption
From: Linus Torvalds
commit 88b1a17dfc3ed7728316478fae0f5ad508f50397 upsteam.
This is the same as the traditional 'get_page()' function, but instead
of unconditionally incrementing the reference count of the page, it only
does so if the count was "safe". It returns whether the reference count
These patches include few backported fixes for the 4.4 stable
tree.
I would appreciate if you could kindly consider including them in the
next release.
Ajay
---
[PATCH 1/8]:
Backporting of upstream commit f958d7b528b1:
mm: make page ref count overflow check tighter and more explicit
[PATCH
From: Linus Torvalds
commit f958d7b528b1b40c44cfda5eabe2d82760d868c3 upsteam.
We have a VM_BUG_ON() to check that the page reference count doesn't
underflow (or get close to overflow) by checking the sign of the count.
That's all fine, but we actually want to allow people to use a "get page
Hi Ulf,
On Mon, 22 Jul 2019 at 19:54, Ulf Hansson wrote:
>
> On Wed, 17 Jul 2019 at 04:29, Baolin Wang wrote:
> >
> > In sdhci_runtime_resume_host() function, we will always do software reset
> > for all, which will cause Spreadtrum host controller work abnormally after
> > resuming.
>
> What
23.07.2019 4:52, Sowjanya Komatineni пишет:
>
> On 7/22/19 6:41 PM, Dmitry Osipenko wrote:
>> 23.07.2019 4:08, Dmitry Osipenko пишет:
>>> 23.07.2019 3:58, Dmitry Osipenko пишет:
21.07.2019 22:40, Sowjanya Komatineni пишет:
> This patch implements PMC wakeup sequence for Tegra210 and
On Fri, Jul 05, 2019 at 04:54:05PM +0800, anson.hu...@nxp.com wrote:
> From: Anson Huang
>
> i.MX8MM can reuse i.MX8MQ's reset driver, update the compatible
> property and related info to support i.MX8MM.
>
> Signed-off-by: Anson Huang
Hi Philipp,
Let me know if you want me to pick this up.
On Fri, Jul 05, 2019 at 04:54:06PM +0800, anson.hu...@nxp.com wrote:
> From: Anson Huang
>
> i.MX8MM can reuse i.MX8MQ's src driver, add "fsl,imx8mq-src" as
> src's fallback compatible to enable it.
>
> Signed-off-by: Anson Huang
> Reviewed-by: Philipp Zabel
Applied this one, thanks.
On 7/21/19 4:49 PM, Luis Henriques wrote:
> Waiman Long writes:
>
>> On 7/20/19 4:41 AM, Luis Henriques wrote:
>>> "Linus Torvalds" writes:
>>>
On Fri, Jul 19, 2019 at 12:32 PM Waiman Long wrote:
> This patch shouldn't change the behavior of the rwsem code. The code
> only access
Unset "enable" bit means that divider is in bypass mode, hence it doesn't
have any effect in that case. Please note that there are no known bugs
caused by the missing check.
Signed-off-by: Dmitry Osipenko
---
Changelog:
v2: Changed the commit's description from 'Fix' to 'Add' in response to
All Super clocks have a divider that has the enable bit.
Signed-off-by: Dmitry Osipenko
---
Changelog:
v2: Improved commit's message.
drivers/clk/tegra/clk-divider.c | 12
drivers/clk/tegra/clk-super.c | 1 +
drivers/clk/tegra/clk.h | 4
3 files changed, 17
On Mon, Jul 22, 2019 at 6:43 PM Aaron Lu wrote:
>
> On 2019/7/22 18:26, Aubrey Li wrote:
> > The granularity period of util_avg seems too large to decide task priority
> > during pick_task(), at least it is in my case, cfs_prio_less() always picked
> > core max task, so pick_task() eventually
On Fri, Jul 05, 2019 at 12:56:12PM +0800, anson.hu...@nxp.com wrote:
> From: Anson Huang
>
> i.MX8MQ has clock gate for TMU module, add clock info to TMU
> node for clock management.
>
> Signed-off-by: Anson Huang
Applied, thanks.
On Fri, Jul 05, 2019 at 12:56:11PM +0800, anson.hu...@nxp.com wrote:
> From: Anson Huang
>
> IMX8MQ_CLK_TMU_ROOT is ONLY used for thermal module, the driver
> should manage this clock, so no need to have CLK_IS_CRITICAL flag
> set.
>
> Signed-off-by: Anson Huang
Applied, thanks.
If INFINIBAND_HNS_HIP08 is selected and HNS3 is m,
but INFINIBAND_HNS is y, building fails:
drivers/infiniband/hw/hns/hns_roce_hw_v2.o: In function `hns_roce_hw_v2_exit':
hns_roce_hw_v2.c:(.exit.text+0xd): undefined reference to
`hnae3_unregister_client'
On Thu, Jul 04, 2019 at 09:43:55PM +0800, fugang.d...@nxp.com wrote:
> From: Fugang Duan
>
> Add the baud clock requirement for imx8qxp.
>
> Signed-off-by: Fugang Duan
Applied, thanks.
The ADC in the JZ4740 can work either in high-precision mode with a 2.5V
range, or in low-precision mode with a 7.5V range. The code in place in
this driver will select the proper scale according to the maximum
voltage of the battery.
The JZ4770 however only has one mode, with a 6.6V range. If
If INFINIBAND_HNS_HIP06 is selected and HNS_DSAF
is m, but INFINIBAND_HNS is y, building fails:
drivers/infiniband/hw/hns/hns_roce_hw_v1.o: In function `hns_roce_v1_reset':
hns_roce_hw_v1.c:(.text+0x39fa): undefined reference to `hns_dsaf_roce_reset'
hns_roce_hw_v1.c:(.text+0x3a25): undefined
On 2019/7/22 18:33, Marc Zyngier wrote:
> So far, we've let the arm64 kernel start its meaningful time stamping
> of the kernel log pretty late, which is caused by sched_clock() being
> initialised rather late compared to other architectures.
>
> Pavel Tatashin proposed[1] to move the
On 7/22/19 4:45 PM, James Bottomley wrote:
[linux-scsi added to cc]
On Mon, 2019-07-22 at 15:21 -0700, Guenter Roeck wrote:
On Sun, Jul 21, 2019 at 02:33:38PM -0700, Linus Torvalds wrote:
[ ... ]
Go test,
Things looked pretty good until a few days ago. Unfortunately,
the last few days
The removed barrier isn't needed because the writes/reads are strictly
ordered and even if PMC had separate ports for the writes, it wouldn't
matter since the hardware logic takes into effect after triggering CPU's
power-gating and at that point all CPU accesses are guaranteed to be
completed.
[add linux-scsi]
On 7/22/19 4:39 PM, Murphy Zhou wrote:
>
> Hi,
>
> It reproduces every time. It's ok on v5.2. So it's a regression in v5.3-rc1.
>
> Thanks,
> M
>
> [root@7u ~]# modprobe scsi_debug
> [ 244.084203] scsi host2: scsi_debug: version 0188 [20190125]
> [ 244.084203]
The PCLK clock is running off SCLK, which is a critical clock that is
very unlikely to randomly change its rate. It's also a bit clumsy (and
apparently incorrect) to query the clock's rate with interrupts being
disabled because clk_get_rate() takes a mutex and that's the case during
Hi, Shawn
> On Wed, Jul 10, 2019 at 02:30:54PM +0800, anson.hu...@nxp.com wrote:
> > From: Anson Huang
> >
> > Add i.MX8MM system counter node to enable timer-imx-sysctr broadcast
> > timer driver.
> >
> > Signed-off-by: Anson Huang
>
> Do I need to wait for patch #1 landing before I apply #3
On 22-07-19, 17:39, Rob Herring wrote:
> On Tue, Jul 02, 2019 at 06:10:19PM -0700, Saravana Kannan wrote:
> > Add support for listing bandwidth OPP tables for each interconnect path
> > listed using the interconnects property.
> >
> > Signed-off-by: Saravana Kannan
> > ---
> >
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