[PATCH 28/29] ia64: remove CONFIG_ACPI_NUMA ifdefs

CONFIG_ACPI_NUMA is now unconditionally selected on ia64, so remove the ifdefs. Signed-off-by: Christoph Hellwig --- arch/ia64/include/asm/acpi.h | 5 - arch/ia64/kernel/acpi.c | 17 - arch/ia64/kernel/setup.c | 2 -- 3 files changed, 24 deletions(-) diff --git

[PATCH 27/29] ia64: remove CONFIG_SWIOTLB ifdefs

CONFIG_SWIOTLB is now unconditionally selected on ia64, so remove the ifdefs. Signed-off-by: Christoph Hellwig --- arch/ia64/kernel/dma-mapping.c | 2 -- arch/ia64/mm/init.c| 2 -- 2 files changed, 4 deletions(-) diff --git a/arch/ia64/kernel/dma-mapping.c

[PATCH 25/29] ia64: move the screen_info setup to common code

There is nothing really platform specific about setting about the screen_info from the ia64_boot_param structure, so move it from the dig machvec to common code. Signed-off-by: Christoph Hellwig --- arch/ia64/dig/setup.c| 30 -- arch/ia64/kernel/setup.c | 34

[PATCH 22/29] ia64: remove the unused sn_coherency_id symbol

The sn_coherency_id symbol isn't used anywhere, remove it. Signed-off-by: Christoph Hellwig --- arch/ia64/uv/kernel/setup.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/arch/ia64/uv/kernel/setup.c b/arch/ia64/uv/kernel/setup.c index 6ac4bd314d92..b081f5138f5c 100644 ---

[PATCH 17/29] ia64: remove the hpsim platform

The hpsim platform supports the HP IA64 simulator which was useful as a bring up platform. But it is fairly non-standard vs real IA64 system in that it for example doesn't support ACPI. It also comes with a whole bunch of simulator specific drivers. Remove it to simplify the IA64 port.

[PATCH 09/29] char/mspec: remove SGI SN2 support

The SGI SN2 support is about to be removed, so drops the bits specific to it from this driver. Signed-off-by: Christoph Hellwig --- drivers/char/mspec.c | 155 +++ 1 file changed, 11 insertions(+), 144 deletions(-) diff --git a/drivers/char/mspec.c

[PATCH 21/29] ia64: remove the SGI UV simulator support

The simulator support was marked as temporary since the initial commit, so drop it more than 10 years later. Signed-off-by: Christoph Hellwig --- arch/ia64/include/asm/sn/simulator.h | 25 -- arch/ia64/include/asm/sn/sn_sal.h| 10 - arch/ia64/include/asm/uv/uv.h

[PATCH 16/29] ia64: remove now unused machvec indirections

With the SGI SN2 machvec removal most of the indirections are unused now, so remove them. This includes the entire removal of the mmio read*/write* macros as the generic ones are identical to the asm-generic/io.h version. Signed-off-by: Christoph Hellwig --- arch/ia64/include/asm/hw_irq.h

[PATCH 06/29] tty/serial: remove the sn_console driver

The SGI SN2 support is about to be removed. Remove this driver that depends on the SN2 support. Signed-off-by: Christoph Hellwig --- arch/ia64/configs/generic_defconfig |1 - arch/ia64/configs/gensparse_defconfig |1 - arch/ia64/kernel/setup.c |7 -

[PATCH 18/29] ia64: remove CONFIG_PCI ifdefs

Now that hpsim support is gone, CONFIG_PCI is forced on for ia64, and we can remove a few ifdefs for it. Signed-off-by: Christoph Hellwig --- arch/ia64/Makefile | 2 +- arch/ia64/hp/common/sba_iommu.c | 10 +- arch/ia64/include/asm/dma.h | 6 +-

[PATCH 20/29] ia64: remove the zx1 swiotlb machvec

The aim of this machvec is to support devices with < 32-bit dma masks. But given that ia64 only has a ZONE_DMA32 and not a ZONE_DMA that isn't supported by swiotlb either. Signed-off-by: Christoph Hellwig --- .../admin-guide/kernel-parameters.txt | 2 +- arch/ia64/Kconfig

[PATCH 14/29] drivers: remove the SGI SN2 IOC4 base support

The IOC4 is a multi-function chip seen on SGI SN2 and some SGI MIPS systems. This removes the base driver, which while not having an SN2 Kconfig dependency was only for sub-drivers that had one. Signed-off-by: Christoph Hellwig --- Documentation/driver-api/sgi-ioc4.rst| 49 ---

Re: [PATCH 5/5] serial: lantiq: Add support for Lightning Mountain SoC

On Wed, Aug 07, 2019 at 05:21:35PM +0800, Rahul Tanwar wrote: > This patch adds IRQ & ISR support in the driver for Lightning Mountain SoC. > +#define ASC_IRNCR_MASK 0x7 GENMASK() ? > +static irqreturn_t lqasc_irq(int irq, void *p) > +{ > + unsigned long flags; > + u32

[PATCH 13/29] drivers: remove the SGI SN2 IOC3 base support

The IOC3 is a multi-function chip seen on SGI SN2 and some SGI MIPS systems. This removes the last bit of SN2 specific support, while the bits used by the mips ports are still around (and being substantially rewritten at the moment). Signed-off-by: Christoph Hellwig --- arch/ia64/Kconfig

[PATCH 08/29] tty/serial: remove the ioc3_serial driver

The SGI SN2 support is about to be removed. Remove this driver that depends on the SN2 support. Signed-off-by: Christoph Hellwig --- MAINTAINERS |6 - arch/ia64/configs/gensparse_defconfig |1 - drivers/tty/serial/Kconfig|8 -

[PATCH 05/29] PCI/hotplug: remove the sgi_hotplug driver

The SGI SN2 support is about to be removed. Remove this driver that depends on the SN2 support. Signed-off-by: Christoph Hellwig --- drivers/pci/hotplug/Kconfig | 9 - drivers/pci/hotplug/Makefile | 1 - drivers/pci/hotplug/sgi_hotplug.c | 700 -- 3

[PATCH 11/29] qla1280: remove SGI SN2 support

The SGI SN2 support is about to be removed, so drops the bits specific to it from this driver. Signed-off-by: Christoph Hellwig --- drivers/scsi/qla1280.c | 37 - drivers/scsi/qla1280.h | 3 --- 2 files changed, 40 deletions(-) diff --git

[PATCH 03/29] char/agp: remove the sgi-agp driver

The SGI SN2 support is about to be removed. Remove this driver that depends on the SN2 support. Signed-off-by: Christoph Hellwig --- arch/ia64/configs/generic_defconfig | 1 - arch/ia64/configs/gensparse_defconfig | 1 - drivers/char/agp/Kconfig | 7 -

[PATCH 04/29] ide: remove the sgiioc4 driver

The SGI SN2 support is about to be removed. Remove this driver that depends on the SN2 support. Signed-off-by: Christoph Hellwig --- arch/ia64/configs/generic_defconfig | 1 - arch/ia64/configs/gensparse_defconfig | 1 - drivers/Kconfig | 2 - drivers/ide/Kconfig

[PATCH 10/29] misc/sgi-xp: remove SGI SN2 support

Note this also marks xp broken on ia64 now, as the UV support, which was disable in generic kernels before actually never compiled due to undefined uv_gpa_to_soc_phys_ram and uv_gpa_in_mmr_space symbols since at least commit c2c9f1157414 ("x86: uv: update XPC to handle updated BIOS interface").

RFC: remove sn2, hpsim and ia64 machvecs

Hi Tony, let me know what you think of this series. This drops the pretty much dead sn2 and hpsim support, which then allows us to build a single ia64 kernel image that supports all remaining systems without extra indirections in the fast path. A git tree is also available at:

Applied "ASoC: fsl_sai: Update Tx/Rx channel enable mask" to the asoc tree

The patch ASoC: fsl_sai: Update Tx/Rx channel enable mask has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.4 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours)

Applied "ASoC: fsl_sai: Add support for imx7ulp/imx8mq" to the asoc tree

The patch ASoC: fsl_sai: Add support for imx7ulp/imx8mq has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.4 All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and

Applied "ASoC: fsl_sai: Add registers definition for multiple datalines" to the asoc tree

The patch ASoC: fsl_sai: Add registers definition for multiple datalines has been applied to the asoc tree at https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.4 All being well this means that it will be integrated into the linux-next tree (usually sometime in the

Re: [PATCH 3/5] serial: lantiq: Make IRQ & ISR assignment dynamic

On Wed, Aug 07, 2019 at 05:21:33PM +0800, Rahul Tanwar wrote: > This driver/IP is reused across multiple SoCs. Older SoCs supported three > separate IRQs for tx, rx & err interrupts. Newer Lightning Mountain SoC > supports single IRQ for all of tx/rx/err interrupts. This patch modifies > the

Re: [PATCH] kernfs: fix memleak in kernel_ops_readdir()

Hi, * Tejun Heo [691231 23:00]: > From: Andrea Arcangeli > > If getdents64 is killed or hits on segfault, it'll leave cgroups > directories in sysfs pinned leaking memory because the kernfs node > won't be freed on rmdir and the parent neither. Somehow this causes a regression in Linux next

[tip:x86/apic] x86/apic: Annotate global config variables as "read-only after init"

Commit-ID: 6444b40eeda4f78f57b255dd7ecb8d3e5936eea2 Gitweb: https://git.kernel.org/tip/6444b40eeda4f78f57b255dd7ecb8d3e5936eea2 Author: Sean Christopherson AuthorDate: Mon, 5 Aug 2019 14:21:34 -0700 Committer: Thomas Gleixner CommitDate: Wed, 7 Aug 2019 15:24:21 +0200 x86/apic:

[tip:x86/boot] x86/boot: Save fields explicitly, zero out everything else

Commit-ID: a156cadef2fe445ac423670eace517b39a01ccd0 Gitweb: https://git.kernel.org/tip/a156cadef2fe445ac423670eace517b39a01ccd0 Author: John Hubbard AuthorDate: Tue, 30 Jul 2019 22:46:27 -0700 Committer: Thomas Gleixner CommitDate: Wed, 7 Aug 2019 15:22:53 +0200 x86/boot: Save fields

Re: [PATCH] i2c: imx: Allow the driver to be built for ARM64 SoCs such as i.MX8M

On 07.08.19 14:09, Alexander Stein wrote: > On Wednesday, August 7, 2019, 1:44:06 PM CEST Schrempf Frieder wrote: >> From: Frieder Schrempf >> >> The imx I2C controller is used in some ARM64 SoCs such as i.MX8M. >> To make use of it, append ARM64 to the list of dependencies. >> >> Signed-off-by:

Re: [PATCH] net: fec: Allow the driver to be built for ARM64 SoCs such as i.MX8

On 07.08.19 14:20, Fabio Estevam wrote: > Hi Frieder, > > On Wed, Aug 7, 2019 at 9:04 AM Schrempf Frieder > wrote: >> >> From: Frieder Schrempf >> >> The FEC ethernet controller is used in some ARM64 SoCs such as i.MX8. >> To make use of it, append ARM64 to the list of dependencies. > >

[PATCH] of: irq: fix a trivial typo in a doc comment

Diverged from what the code does with commit 530210c7814e ("of/irq: Replace of_irq with of_phandle_args"). Signed-off-by: Lubomir Rintel --- drivers/of/irq.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/of/irq.c b/drivers/of/irq.c index

[PATCH] PCI: OF: fix a trivial typo in a doc comment

Diverged from what the code does with commit 530210c7814e ("of/irq: Replace of_irq with of_phandle_args"). Signed-off-by: Lubomir Rintel --- drivers/pci/of.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/of.c b/drivers/pci/of.c index

Re: [PATCH 1/9] KVM: arm64: Document PV-time interface

On 05/08/2019 17:40, Christophe de Dinechin wrote: > > Steven Price writes: > >> Introduce a paravirtualization interface for KVM/arm64 based on the >> "Arm Paravirtualized Time for Arm-Base Systems" specification DEN 0057A. >> >> This only adds the details about "Stolen Time" as the details of

Re: [PATCH 2/5] serial: lantiq: Use proper DT compatible string

On Wed, Aug 07, 2019 at 05:21:32PM +0800, Rahul Tanwar wrote: > The patch adds change to use explicit string instead of a macro for > DT compatible string. For consistency you may need to convert OF_EARLYCON_DECLARE() as well. Perhaps commit message should explain the rationale, i.e. the

Re: [PATCH net-next] net: dsa: sja1105: remove set but not used variables 'tx_vid' and 'rx_vid'

On Wed, 7 Aug 2019 at 16:19, Vladimir Oltean wrote: > > On Wed, 7 Aug 2019 at 16:09, YueHaibing wrote: > > > > Fixes gcc '-Wunused-but-set-variable' warning: > > > > drivers/net/dsa/sja1105/sja1105_main.c: In function sja1105_fdb_dump: > > drivers/net/dsa/sja1105/sja1105_main.c:1226:14: warning:

Re: [PATCH 06/16] net: phy: adin: support PHY mode converters

> Is it ok if we defer the solution for this drivers/patchset? Yes, not a problem if phy-mode means phy-mode. Andrew

Re: [PATCH 1/5] serial: lantiq: Add SMP support

On Wed, Aug 07, 2019 at 05:21:31PM +0800, Rahul Tanwar wrote: > The existing driver can only support single core SoC. But new multicore > platforms which reuse the same driver/IP need SMP support. This patch adds > multicore support in the driver. Reviewed-by: Andy Shevchenko > >

Re: [PATCH net-next] net: dsa: sja1105: remove set but not used variables 'tx_vid' and 'rx_vid'

On Wed, 7 Aug 2019 at 16:09, YueHaibing wrote: > > Fixes gcc '-Wunused-but-set-variable' warning: > > drivers/net/dsa/sja1105/sja1105_main.c: In function sja1105_fdb_dump: > drivers/net/dsa/sja1105/sja1105_main.c:1226:14: warning: > variable tx_vid set but not used [-Wunused-but-set-variable] >

Re: [PATCH 0/8] irqdomain/debugfs: Fix uses of irq_domain_alloc_fwnode

On Tue, 6 Aug 2019, Marc Zyngier wrote: > I recently noticed that all irq_domain_alloc_fwnode were passing a VA > to it, which is unfortunate as this is designed to appear in debugfs > (and we don't like to leak VAs). Disaster was avoided thanks to our > ptrval friend, but it remains that

[PATCH net] net: phy: rtl8211f: do a double read to get real time link status

[ 27.232781] hns3 :bd:00.3 eth7: net open [ 27.237303] 8021q: adding VLAN 0 to HW filter on device eth7 [ 27.242972] IPv6: ADDRCONF(NETDEV_CHANGE): eth7: link becomes ready [ 27.29] hns3 :bd:00.3: invalid speed (-1) [ 27.253904] hns3 :bd:00.3 eth7: failed to adjust link.

[tip:x86/boot] x86/boot: Save fields explicitly, zero out everything else

Commit-ID: 610666f0581557944c3abec93a7c125b8303442c Gitweb: https://git.kernel.org/tip/610666f0581557944c3abec93a7c125b8303442c Author: John Hubbard AuthorDate: Tue, 30 Jul 2019 22:46:27 -0700 Committer: Thomas Gleixner CommitDate: Wed, 7 Aug 2019 15:16:04 +0200 x86/boot: Save fields

Re: [PATCH v4 2/2] x86/purgatory: use CFLAGS_REMOVE rather than reset KBUILD_CFLAGS

On Fri, 26 Jul 2019, Thomas Gleixner wrote: Ping... > On Thu, 25 Jul 2019, Nick Desaulniers wrote: > > > KBUILD_CFLAGS is very carefully built up in the top level Makefile, > > particularly when cross compiling or using different build tools. > > Resetting KBUILD_CFLAGS via := assignment is an

Re: [PATCH 4/5] dt-bindings: serial: lantiq: Update for new SoC

On Wed, Aug 07, 2019 at 05:21:34PM +0800, Rahul Tanwar wrote: > There is a new Intel Atom based Lightning Mountain(LGM) network processor SoC > which > reuses Lantiq ASC serial controller IP. This patch adds new compatible string > and its expected property value in order to support the driver

[tip:x86/urgent] x86: mtrr: cyrix: Mark expected switch fall-through

Commit-ID: 7468a4eae541ce5aff65595aa502aa0a4def6615 Gitweb: https://git.kernel.org/tip/7468a4eae541ce5aff65595aa502aa0a4def6615 Author: Gustavo A. R. Silva AuthorDate: Mon, 5 Aug 2019 15:17:12 -0500 Committer: Thomas Gleixner CommitDate: Wed, 7 Aug 2019 15:12:01 +0200 x86: mtrr:

Re: [PATCH 2/2] /proc/kpageflags: do not use uninitialized struct pages

On Tue 06-08-19 09:15:25, Dan Williams wrote: > On Mon, Aug 5, 2019 at 11:47 PM Michal Hocko wrote: > > > > On Mon 05-08-19 20:27:03, Dan Williams wrote: > > > On Sun, Aug 4, 2019 at 10:31 PM Toshiki Fukasawa > > > wrote: > > > > > > > > On 2019/07/26 16:06, Michal Hocko wrote: > > > > > On Fri

[tip:x86/urgent] x86/ptrace: Mark expected switch fall-through

Commit-ID: 4ab9ab656a6cea5257bfa31f00c922d68f7a5c2f Gitweb: https://git.kernel.org/tip/4ab9ab656a6cea5257bfa31f00c922d68f7a5c2f Author: Gustavo A. R. Silva AuthorDate: Mon, 5 Aug 2019 14:56:54 -0500 Committer: Thomas Gleixner CommitDate: Wed, 7 Aug 2019 15:12:01 +0200 x86/ptrace: Mark

Re: [PATCH v5 01/10] powerpc: unify definition of M_IF_NEEDED

Jason Yan writes: > M_IF_NEEDED is defined too many times. Move it to a common place. The name is not great, can you call it MAS2_M_IF_NEEDED, which at least gives a clue what it's for? cheers > Signed-off-by: Jason Yan > Cc: Diana Craciun > Cc: Michael Ellerman > Cc: Christophe Leroy >

Re: [PATCH] mfd: db8500-prcmu: Mark expected switch fall-throughs

On Mon, Jul 29, 2019 at 1:56 AM Gustavo A. R. Silva wrote: > Mark switch cases where we are expecting to fall through. > > This patch fixes the following warnings: > > drivers/mfd/db8500-prcmu.c: In function 'dsiclk_rate': > drivers/mfd/db8500-prcmu.c:1592:7: warning: this statement may fall

Re: [PATCH v5 00/10] implement KASLR for powerpc/fsl_booke/32

Hi Jason, Jason Yan writes: > This series implements KASLR for powerpc/fsl_booke/32, as a security > feature that deters exploit attempts relying on knowledge of the location > of kernel internals. Thanks for doing this work. Sorry I didn't get a chance to look at this until v5, I sent a few

[PATCH net-next] fq_codel: remove set but not used variables 'prev_ecn_mark' and 'prev_drop_count'

Fixes gcc '-Wunused-but-set-variable' warning: net/sched/sch_fq_codel.c: In function fq_codel_dequeue: net/sched/sch_fq_codel.c:288:23: warning: variable prev_ecn_mark set but not used [-Wunused-but-set-variable] net/sched/sch_fq_codel.c:288:6: warning: variable prev_drop_count set but not used

Re: [PATCH v7 01/20] pinctrl: tegra: Add suspend and resume support

On Wed, Aug 7, 2019 at 5:40 AM Sowjanya Komatineni wrote: > On 8/6/19 2:51 PM, Sowjanya Komatineni wrote: > > > > On 8/5/19 2:20 AM, Linus Walleij wrote: > >> On Wed, Jul 31, 2019 at 11:11 PM Sowjanya Komatineni > >> wrote: > >> > >>> This patch adds support for Tegra pinctrl driver suspend and

Re: [PATCH v8 02/14] media: doc: add document for rkisp1 meta buffer format

Hi Helen, On Tue, Jul 30, 2019 at 03:42:44PM -0300, Helen Koike wrote: > From: Jacob Chen > > This commit add document for rkisp1 meta buffer format > > Signed-off-by: Jacob Chen > Acked-by: Hans Verkuil > [update for upstream] > Signed-off-by: Helen Koike > > --- > > Changes in v8: > -

[PATCH net-next] net: dsa: sja1105: remove set but not used variables 'tx_vid' and 'rx_vid'

Fixes gcc '-Wunused-but-set-variable' warning: drivers/net/dsa/sja1105/sja1105_main.c: In function sja1105_fdb_dump: drivers/net/dsa/sja1105/sja1105_main.c:1226:14: warning: variable tx_vid set but not used [-Wunused-but-set-variable] drivers/net/dsa/sja1105/sja1105_main.c:1226:6: warning:

Re: [PATCH v8 04/14] media: rkisp1: add Rockchip MIPI Synopsys DPHY driver

Hi Helen, Thanks for the patchset. On Tue, Jul 30, 2019 at 03:42:46PM -0300, Helen Koike wrote: > From: Jacob Chen > > This commit adds a subdev driver for Rockchip MIPI Synopsys DPHY driver > > Signed-off-by: Jacob Chen > Signed-off-by: Shunqian Zheng > Signed-off-by: Tomasz Figa >

Re: [PATCH v5 09/10] powerpc/fsl_booke/kaslr: support nokaslr cmdline parameter

Jason Yan writes: > diff --git a/arch/powerpc/kernel/kaslr_booke.c > b/arch/powerpc/kernel/kaslr_booke.c > index c6b326424b54..436f9a03f385 100644 > --- a/arch/powerpc/kernel/kaslr_booke.c > +++ b/arch/powerpc/kernel/kaslr_booke.c > @@ -361,6 +361,18 @@ static unsigned long __init

Re: [PATCH v5 06/10] powerpc/fsl_booke/32: implement KASLR infrastructure

Jason Yan writes: > This patch add support to boot kernel from places other than KERNELBASE. > Since CONFIG_RELOCATABLE has already supported, what we need to do is > map or copy kernel to a proper place and relocate. Freescale Book-E > parts expect lowmem to be mapped by fixed TLB entries(TLB1).

Re: [PATCH v1] perf record: Add an option to take an AUX snapshot on exit

Em Wed, Aug 07, 2019 at 10:40:39AM +0300, Adrian Hunter escreveu: > On 6/08/19 5:41 PM, Alexander Shishkin wrote: > > It is sometimes useful to generate a snapshot when perf record exits; > > I've been using a wrapper script around the workload that would do a > > killall -USR2 perf when the

Re: [PATCH v5 10/10] powerpc/fsl_booke/kaslr: dump out kernel offset information on panic

Jason Yan writes: > When kaslr is enabled, the kernel offset is different for every boot. > This brings some difficult to debug the kernel. Dump out the kernel > offset when panic so that we can easily debug the kernel. Some of this is taken from the arm64 version right? Please say so when you

Re: [PATCH v5 07/10] powerpc/fsl_booke/32: randomize the kernel image offset

Jason Yan writes: > After we have the basic support of relocate the kernel in some > appropriate place, we can start to randomize the offset now. > > Entropy is derived from the banner and timer, which will change every > build and boot. This not so much safe so additionally the bootloader may >

Re: [PATCH v5 03/10] powerpc: introduce kimage_vaddr to store the kernel base

Jason Yan writes: > Now the kernel base is a fixed value - KERNELBASE. To support KASLR, we > need a variable to store the kernel base. > > Signed-off-by: Jason Yan > Cc: Diana Craciun > Cc: Michael Ellerman > Cc: Christophe Leroy > Cc: Benjamin Herrenschmidt > Cc: Paul Mackerras > Cc:

[PATCH] x86/kconfig: remove X86_DIRECT_GBPAGES dependency on !DEBUG_PAGEALLOC

These days CONFIG_DEBUG_PAGEALLOC just compiles in the code that has to be enabled on boot time, or with an extra config option, and only then are the large page based direct mappings disabled. Therefore remove the config dependency, allowing 1GB direct mappings with debug_pagealloc compiled in

Re: [PATCH v5 02/10] powerpc: move memstart_addr and kernstart_addr to init-common.c

Jason Yan writes: > These two variables are both defined in init_32.c and init_64.c. Move > them to init-common.c. > > Signed-off-by: Jason Yan > Cc: Diana Craciun > Cc: Michael Ellerman > Cc: Christophe Leroy > Cc: Benjamin Herrenschmidt > Cc: Paul Mackerras > Cc: Nicholas Piggin > Cc:

Re: [PATCH 7/8] PCI: hv: Allocate a named fwnode instead of an address-based one

On 06/08/2019 15:57, Marc Zyngier wrote: > To allocate its fwnode that is then used to allocate an irqdomain, > the driver uses irq_domain_alloc_fwnode(), passing it a VA as an > identifier. This is a rather bad idea, as this address ends up > published in debugfs (and we want to move away from

[PATCH] firmware: arm_scmi: Use {get,put}_unaligned_le32 accessors

Instead of type-casting the {tx,rx}.buf all over the place while accessing them to read/write __le32 from/to the firmware, let's use the nice existing {get,put}_unaligned_le32 accessors to hide all the type cast ugliness. Suggested-by: Philipp Zabel Signed-off-by: Sudeep Holla ---

Re: [PATCH v10 20/22] x86: mm: Convert dump_pagetables to use walk_page_range

On 07/08/2019 00:58, Andrew Morton wrote: > On Wed, 31 Jul 2019 16:46:01 +0100 Steven Price wrote: > >> Make use of the new functionality in walk_page_range to remove the >> arch page walking code and use the generic code to walk the page tables. >> >> The effective permissions are passed down

hello

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Re: NULL ptr deref in wq_worker_sleeping on 4.19

On Wed, 7 Aug 2019, Austin Kim wrote: A: Because it messes up the order in which people normally read text. Q: Why is top-posting such a bad thing? A: Top-posting. Q: What is the most annoying thing in e-mail? A: No. Q: Should I include quotations after my reply?

Re: [PATCH v4 2/3] OPP: Add support for bandwidth OPP tables

Hi Saravana, On 7/27/19 02:15, Saravana Kannan wrote: > Not all devices quantify their performance points in terms of frequency. > Devices like interconnects quantify their performance points in terms of > bandwidth. We need a way to represent these bandwidth levels in OPP. So, > add support for

[PATCH 0/3] bus: ti-sysc: fixes for reset handling

Hi, Here are a few patches to fix reset handling for ti-sysc bus driver. Without these, the iommu won't be working properly at least. -Tero -- Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki

[PATCH 2/3] bus: ti-sysc: rework the reset handling

If reset controllers are assigned to the ti-sysc target-module, only ti-sysc is going to be able to control these. Thus, remove all the disable_on_idle flag usage, and assert/de-assert the reset always in the idle path. Otherwise the reset signal will always just be de-asserted. Signed-off-by:

[PATCH 1/3] bus: ti-sysc: re-order the clkdm control around reset handling

Parenting clockdomain for the IP should be enabled during the reset handling logic, otherwise the reset may not finish properly. Re-order the clockdomain control logic to avoid this. Signed-off-by: Tero Kristo --- drivers/bus/ti-sysc.c | 9 + 1 file changed, 5 insertions(+), 4

[PATCH 3/3] bus: ti-sysc: allow reset sharing across devices

Some devices need to share their reset signals, like DSP MMUs, thus drop the exclusive notation from reset request. Also, balance the init time reset count, otherwise the resets will never be applied post boot. Signed-off-by: Tero Kristo --- drivers/bus/ti-sysc.c | 12 +--- 1 file

Re: [PATCH v3 2/2] pinctrl: qcom: Add SC7180 pinctrl driver

On Tue, Aug 6, 2019 at 8:05 AM Rajendra Nayak wrote: > From: Jitendra Sharma > > Add initial pinctrl driver to support pin configuration with > pinctrl framework for SC7180 > > Signed-off-by: Jitendra Sharma > Signed-off-by: Vivek Gautam > [rnayak: modify to use upstream tile support >

Re: [PATCH v3 1/2] dt-bindings: pinctrl: qcom: Add SC7180 pinctrl binding

On Tue, Aug 6, 2019 at 8:05 AM Rajendra Nayak wrote: > From: Jitendra Sharma > > Add the binding for the TLMM pinctrl block found in the SC7180 platform > > Signed-off-by: Jitendra Sharma > Signed-off-by: Vivek Gautam > [rnayak: Fix some copy-paste issues, sort and fix functions] >

Re: [PATCH][ocfs2-next] ocfs2: ensure ret is set to zero before returning

On 07/08/2019 13:35, Joseph Qi wrote: > > > On 19/8/7 20:19, Colin King wrote: >> From: Colin Ian King >> >> A previous commit introduced a regression where variable ret was >> originally being set from the return from a call to function >> dlm_create_debugfs_subroot and this set was removed.

Re: [PATCH v2 13/14] PCI/P2PDMA: No longer require no-mmu for host bridge whitelist

On Wed, Aug 07, 2019 at 07:59:58AM +0200, Christoph Hellwig wrote: > no-mmu sounds stange, as we use that for linux ports without paging > hardware. I think an "io" got lost somewhere.. I had already changed the subject to PCI/P2PDMA: Allow IOMMU for host bridge whitelist but certainly open

[PATCHv1] arm64: dts: imx8qm: add compatible string for usdhc3

add compatible string for usdhc3 --- This Patch is on top of 10/15 of this series: https://patchwork.kernel.org/patch/11046343/ [v2,10/15] arm64: dts: imx8qm: add conn ss support --- arch/arm64/boot/dts/freescale/imx8qm-ss-conn.dtsi | 4 1 file changed, 4 insertions(+) diff --git

Re: [PATCH 6/8] gpio/ixp4xx: Register the base PA instead of its VA in fwnode

On Tue, Aug 6, 2019 at 4:57 PM Marc Zyngier wrote: > Do not expose the base VA (it appears in debugfs). Instead, > record the PA, which at least can be used to precisely identify > the associated irqchip and domain. > > Signed-off-by: Marc Zyngier Reviewed-by: Linus Walleij Please apply this

Re: [PATCH v3] gpio: mpc8xxx: Add new platforms GPIO DT node description

On Wed, Aug 7, 2019 at 4:22 AM Hui Song wrote: > From: Song Hui > > Update the NXP GPIO node dt-binding file for QorIQ and > Layerscape platforms, and add one more example with > ls1028a GPIO node. > > Signed-off-by: Song Hui Patch applied! Thanks, Linus Walleij

Re: Bisected: Kernel 4.14 + has 3 times higher write IO latency than Kernel 4.4 with raid1

On Wed, Aug 7, 2019 at 8:36 AM Jinpu Wang wrote: > > On Wed, Aug 7, 2019 at 1:40 AM NeilBrown wrote: > > > > On Tue, Aug 06 2019, Jinpu Wang wrote: > > > > > On Tue, Aug 6, 2019 at 9:54 AM Jinpu Wang > > > wrote: > > >> > > >> On Tue, Aug 6, 2019 at 1:46 AM NeilBrown wrote: > > >> > > > >> >

Re: [PATCH][ocfs2-next] ocfs2: ensure ret is set to zero before returning

On 19/8/7 20:19, Colin King wrote: > From: Colin Ian King > > A previous commit introduced a regression where variable ret was > originally being set from the return from a call to function > dlm_create_debugfs_subroot and this set was removed. Currently > ret is now uninitialized if no

[PATCH v4 20/20] RISC-V: KVM: Add MAINTAINERS entry

Add myself as maintainer for KVM RISC-V as Atish as designated reviewer. For time being, we use my GitHub repo as KVM RISC-V gitrepo. We will update this once we have common KVM RISC-V gitrepo under kernel.org. Signed-off-by: Atish Patra Signed-off-by: Anup Patel --- MAINTAINERS | 10

[PATCH v4 17/20] RISC-V: KVM: Implement ONE REG interface for FP registers

From: Atish Patra Add a KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctl interface for floating point registers such as F0-F31 and FCSR. This support is added for both 'F' and 'D' extensions. Signed-off-by: Atish Patra Signed-off-by: Anup Patel --- arch/riscv/include/uapi/asm/kvm.h | 10 +++

[PATCH v4 18/20] RISC-V: KVM: Add SBI v0.1 support

From: Atish Patra The KVM host kernel running in HS-mode needs to handle SBI calls coming from guest kernel running in VS-mode. This patch adds SBI v0.1 support in KVM RISC-V. All the SBI calls are implemented correctly except remote tlb flushes. For remote TLB flushes, we are doing full TLB

[PATCH v4 19/20] RISC-V: Enable VIRTIO drivers in RV64 and RV32 defconfig

This patch enables more VIRTIO drivers (such as console, rpmsg, 9p, rng, etc.) which are usable on KVM RISC-V Guest and Xvisor RISC-V Guest. Signed-off-by: Anup Patel --- arch/riscv/configs/defconfig | 13 + arch/riscv/configs/rv32_defconfig | 13 + 2 files changed,

[PATCH v4 14/20] RISC-V: KVM: Implement MMU notifiers

This patch implements MMU notifiers for KVM RISC-V so that Guest physical address space is in-sync with Host physical address space. This will allow swapping, page migration, etc to work transparently with KVM RISC-V. Signed-off-by: Anup Patel --- arch/riscv/include/asm/kvm_host.h | 7 ++

[PATCH v4 13/20] RISC-V: KVM: Implement stage2 page table programming

This patch implements all required functions for programming the stage2 page table for each Guest/VM. At high-level, the flow of stage2 related functions is similar from KVM ARM/ARM64 implementation but the stage2 page table format is quite different for KVM RISC-V. Signed-off-by: Anup Patel

[PATCH v4 15/20] RISC-V: KVM: Add timer functionality

From: Atish Patra The RISC-V hypervisor specification doesn't have any virtual timer feature. Due to this, the guest VCPU timer will be programmed via SBI calls. The host will use a separate hrtimer event for each guest VCPU to provide timer functionality. We inject a virtual timer interrupt to

[PATCH v4 10/20] RISC-V: KVM: Handle MMIO exits for VCPU

We will get stage2 page faults whenever Guest/VM access SW emulated MMIO device or unmapped Guest RAM. This patch implements MMIO read/write emulation by extracting MMIO details from the trapped load/store instruction and forwarding the MMIO read/write to user-space. The actual MMIO emulation

[PATCH v4 16/20] RISC-V: KVM: FP lazy save/restore

From: Atish Patra This patch adds floating point (F and D extension) context save/restore for guest VCPUs. The FP context is saved and restored lazily only when kernel enter/exits the in-kernel run loop and not during the KVM world switch. This way FP save/restore has minimal impact on KVM

[PATCH v4 12/20] RISC-V: KVM: Implement VMID allocator

We implement a simple VMID allocator for Guests/VMs which: 1. Detects number of VMID bits at boot-time 2. Uses atomic number to track VMID version and increments VMID version whenever we run-out of VMIDs 3. Flushes Guest TLBs on all host CPUs whenever we run-out of VMIDs 4. Force updates HW

[PATCH v4 09/20] RISC-V: KVM: Implement VCPU world-switch

This patch implements the VCPU world-switch for KVM RISC-V. The KVM RISC-V world-switch (i.e. __kvm_riscv_switch_to()) mostly switches general purpose registers, SSTATUS, STVEC, SSCRATCH and HSTATUS CSRs. Other CSRs are switched via vcpu_load() and vcpu_put() interface in kvm_arch_vcpu_load() and

[PATCH v4 11/20] RISC-V: KVM: Handle WFI exits for VCPU

We get illegal instruction trap whenever Guest/VM executes WFI instruction. This patch handles WFI trap by blocking the trapped VCPU using kvm_vcpu_block() API. The blocked VCPU will be automatically resumed whenever a VCPU interrupt is injected from user-space or from in-kernel IRQCHIP

Re: [PATCH] riscv: kbuild: drop CONFIG_RISCV_ISA_C

On Wed, Aug 7, 2019 at 10:30 AM Paul Walmsley wrote: > > > The baseline ISA support requirement for the RISC-V Linux kernel > mandates compressed instructions, so it doesn't make sense for > compressed instruction support to be configurable. > > Signed-off-by: Paul Walmsley > Cc: Atish Patra >

[PATCH v4 00/20] KVM RISC-V Support

This series adds initial KVM RISC-V support. Currently, we are able to boot RISC-V 64bit Linux Guests with multiple VCPUs. Few key aspects of KVM RISC-V added by this series are: 1. Minimal possible KVM world-switch which touches only GPRs and few CSRs. 2. Full Guest/VM switch is done via

[PATCH v4 08/20] RISC-V: KVM: Implement KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls

For KVM RISC-V, we use KVM_GET_ONE_REG/KVM_SET_ONE_REG ioctls to access VCPU config and registers from user-space. We have three types of VCPU registers: 1. CONFIG - these are VCPU config and capabilities 2. CORE - these are VCPU general purpose registers 3. CSR- these are VCPU control and

[PATCH v4 02/20] RISC-V: Add bitmap reprensenting ISA features common across CPUs

This patch adds riscv_isa bitmap which represents Host ISA features common across all Host CPUs. The riscv_isa is not same as elf_hwcap because elf_hwcap will only have ISA features relevant for user-space apps whereas riscv_isa will have ISA features relevant to both kernel and user-space apps.

[PATCH v4 06/20] RISC-V: KVM: Implement VCPU create, init and destroy functions

This patch implements VCPU create, init and destroy functions required by generic KVM module. We don't have much dynamic resources in struct kvm_vcpu_arch so thest functions are quite simple for KVM RISC-V. Signed-off-by: Anup Patel --- arch/riscv/include/asm/kvm_host.h | 68

[PATCH v4 07/20] RISC-V: KVM: Implement VCPU interrupts and requests handling

This patch implements VCPU interrupts and requests which are both asynchronous events. The VCPU interrupts can be set/unset using KVM_INTERRUPT ioctl from user-space. In future, the in-kernel IRQCHIP emulation will use kvm_riscv_vcpu_set_interrupt() and kvm_riscv_vcpu_unset_interrupt() functions

[PATCH v4 05/20] RISC-V: Add initial skeletal KVM support

This patch adds initial skeletal KVM RISC-V support which has: 1. A simple implementation of arch specific VM functions except kvm_vm_ioctl_get_dirty_log() which will implemeted in-future as part of stage2 page loging. 2. Stubs of required arch specific VCPU functions except

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