In fdp1_open(), 'ctx' is allocated through kzalloc(). However, it is not
deallocated if v4l2_ctrl_new_std() fails, leading to a memory leak bug. To
fix this issue, free 'ctx' before going to the 'done' label.
Signed-off-by: Wenwen Wang
---
drivers/media/platform/rcar_fdp1.c | 1 +
1 file
On Sun, Aug 18, 2019 at 1:03 AM Greg KH wrote:
>
> On Sat, Aug 17, 2019 at 05:37:58PM -0400, Donald Yandt wrote:
> > This patch removes the todo for the ion chunk and
> > carveout device tree bindings.
> >
> > Signed-off-by: Donald Yandt
> > ---
> > drivers/staging/android/TODO | 2 --
> > 1
If saa7146_register_device() fails, no cleanup is executed, leading to
memory/resource leaks. To fix this issue, perform necessary cleanup work
before returning the error.
Signed-off-by: Wenwen Wang
---
drivers/media/pci/saa7146/hexium_gemini.c | 3 +++
1 file changed, 3 insertions(+)
diff
If saa7146_register_device(), no cleanup is executed, leading to
memory/resource leaks. To fix this issue, perform necessary cleanup work
before returning the error.
Signed-off-by: Wenwen Wang
---
drivers/media/pci/saa7146/hexium_gemini.c | 3 +++
1 file changed, 3 insertions(+)
diff --git
From: Jassi Brar
Driver for Socionext Milbeaut XDMAC controller. The controller only
supports Mem-To-Mem transfers over upto 8 configurable channels.
Signed-off-by: Jassi Brar
---
drivers/dma/Kconfig | 10 +
drivers/dma/Makefile | 1 +
drivers/dma/milbeaut-xdmac.c | 426
From: Jassi Brar
Document the devicetree bindings for Socionext Milbeaut XDMAC
controller. Controller only supports Mem->Mem transfers. Number
of physical channels are determined by the number of irqs registered.
Signed-off-by: Jassi Brar
---
.../bindings/dma/milbeaut-m10v-xdmac.txt | 24
From: Jassi Brar
The following series adds AXI DMA (XDMAC) controller support on Milbeaut series.
This controller is capable of only Mem<->MEM transfers. Number of channels is
configurable {2,4,8}
Jassi Brar (2):
dt-bindings: milbeaut-m10v-xdmac: Add Socionext Milbeaut XDMAC
bindings
From: Jassi Brar
Driver for Socionext Milbeaut HDMAC controller. The controller has
upto 8 floating channels, that need a predefined slave-id to work
from a set of slaves.
Signed-off-by: Jassi Brar
---
drivers/dma/Kconfig | 10 +
drivers/dma/Makefile | 1 +
From: Jassi Brar
Document the devicetree bindings for Socionext Milbeaut HDMAC
controller. Controller has upto 8 floating channels, that need
a predefined slave-id to work from a set of slaves.
Signed-off-by: Jassi Brar
---
.../bindings/dma/milbeaut-m10v-hdmac.txt | 32
From: Jassi Brar
Changes since v1:
1) Drop uncessary headers from driver
2) Some Cosmetic changes.
3) Define macro for magic numbers
4) Specify constraints on number of channels/irq in DT bindings
Jassi Brar (2):
dt-bindings: milbeaut-m10v-hdmac: Add Socionext Milbeaut HDMAC
bindings
On Sat, Aug 17, 2019 at 05:37:58PM -0400, Donald Yandt wrote:
> This patch removes the todo for the ion chunk and
> carveout device tree bindings.
>
> Signed-off-by: Donald Yandt
> ---
> drivers/staging/android/TODO | 2 --
> 1 file changed, 2 deletions(-)
>
> diff --git
In dvb_create_media_entity(), 'dvbdev->entity' is allocated through
kzalloc(). Then, 'dvbdev->pads' is allocated through kcalloc(). However, if
kcalloc() fails, the allocated 'dvbdev->entity' is not deallocated, leading
to a memory leak bug. To fix this issue, free 'dvbdev->entity' before
> On Aug 17, 2019, at 12:59 PM, Dan Williams wrote:
>
> On Sat, Aug 17, 2019 at 4:13 AM Qian Cai wrote:
>>
>>
>>
>>> On Aug 16, 2019, at 11:57 PM, Dan Williams wrote:
>>>
>>> On Fri, Aug 16, 2019 at 8:34 PM Qian Cai wrote:
> On Aug 16, 2019, at 5:48 PM, Dan
The pull request you sent on Sat, 17 Aug 2019 15:59:35 -0400:
> git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux.git
> tags/hyperv-fixes-signed
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/85d8d3b172eb37b23dcdbe9fa7a85e343642bfea
Thank you!
--
Hi!
On Sun, Aug 18, 2019 at 2:06 AM Oleksij Rempel wrote:
> >> SYSC_REG_CPLL_CLKCFG1 register is a clock gate controller. It is used to
> >> enable or disable clocks.
> >> Jist wild assumption. All peripheral devices are suing bus clock.
> >
> > This assumption is incorrect. When this patchset
Thx Christoph,
On Fri, Aug 16, 2019 at 3:03 PM Christoph Hellwig wrote:
>
> On Thu, Aug 15, 2019 at 07:28:57PM +0800, guo...@kernel.org wrote:
> > From: Guo Ren
> >
> > Implement the following apis to meet usage in different scenarios.
> >
> > - ioremap (NonCache + StrongOrder)
> > -
Hi Christophe,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on linus/master]
[cannot apply to v5.3-rc4 next-20190816]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system]
url:
On Wed, Aug 07, 2019 at 09:41:46AM +0800, Paul Wise wrote:
On Tue, 2019-08-06 at 17:33 -0400, Sasha Levin wrote:
From: Paul Wise
[ Upstream commit 315c69261dd3fa12dbc830d4fa00d1fad98d3b03 ]
The patch changes the behaviour of the interface between the Linux
kernel and userspace core dump
On Tue, Aug 06, 2019 at 02:55:29PM -0700, Max Filippov wrote:
Hello,
On Tue, Aug 6, 2019 at 2:33 PM Sasha Levin wrote:
From: Max Filippov
[ Upstream commit e3cacb73e626d885b8cf24103fed0ae26518e3c4 ]
Assembly entry/return abstraction change didn't add asmmacro.h include
statement to
Quoting Manivannan Sadhasivam (2019-08-16 20:55:57)
> Hi Stephen,
>
> On Wed, Aug 07, 2019 at 10:15:59PM -0700, Stephen Boyd wrote:
> > Quoting Manivannan Sadhasivam (2019-07-05 08:14:39)
> > > diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
> > > index fc1e0cf44995..ffc61ed85ade 100644
>
Quoting Manivannan Sadhasivam (2019-08-16 20:58:45)
> On Fri, Aug 16, 2019 at 08:46:11PM -0700, Stephen Boyd wrote:
> > Quoting Manivannan Sadhasivam (2019-08-16 20:34:22)
> > > On Wed, Aug 07, 2019 at 10:01:28PM -0700, Stephen Boyd wrote:
> > > > Quoting Manivannan Sadhasivam (2019-07-05
Quoting Rishi Gupta (2019-08-16 23:35:59)
> An extra 'for' word is grammatically incorrect in the comment
> 'verifying ops for multi-parent clks'. This commit removes
> this extra for word.
>
> Signed-off-by: Rishi Gupta
> ---
Applied to clk-next
Quoting Anson Huang (2019-08-17 15:22:01)
> Hi, Stephen
>
> > Quoting anson.hu...@nxp.com (2019-08-15 03:59:42)
> > > diff --git a/drivers/clk/imx/clk-imx8mn.c
> > > b/drivers/clk/imx/clk-imx8mn.c index ecd1062..3f1239a 100644
> > > --- a/drivers/clk/imx/clk-imx8mn.c
> > > +++
Quoting Jeffrey Hugo (2019-06-11 12:20:49)
> +
> +static int gpucc_msm8998_probe(struct platform_device *pdev)
> +{
> + struct regmap *regmap;
> + struct clk *xo;
> +
> + /*
> +* We must have a valid XO to continue until orphan probe defer is
> +* implemented. XO
Quoting Mao Wenan (2019-08-15 00:48:48)
> There is one compilation error when CONFIG_INTERCONNECT_QCOM_QCS404=y and
> CONFIG_INTERCONNECT_QCOM_SMD_RPM=y, as well as CONFIG_COMPILE_TEST=y,
> but CONFIG_QCOM_SMD_RPM is not set, logs as below:
>
> drivers/interconnect/qcom/smd-rpm.o: In function
Quoting Niklas Cassel (2019-07-25 03:41:31)
> From: Sricharan R
>
> The kryo cpufreq driver reads the nvmem cell and uses that data to
> populate the opps. There are other qcom cpufreq socs like krait which
> does similar thing. Except for the interpretation of the read data,
> rest of the
Hello My Dear.
Please do not feel disturbed for contacting you, based on the
critical condition I find mine self, though, it's not financial
problem, but my health, you might have know that cancer is not what to
talk home about, I am married to Mr. Abaulkarim Rail who worked with
Tunisia embassy
Quoting Niklas Cassel (2019-07-25 03:41:39)
> diff --git a/drivers/power/avs/Kconfig b/drivers/power/avs/Kconfig
> index b5a217b828dc..4d4d742b3c6f 100644
> --- a/drivers/power/avs/Kconfig
> +++ b/drivers/power/avs/Kconfig
> @@ -12,6 +12,21 @@ menuconfig POWER_AVS
>
> Say Y here to
On Sun, Aug 18, 2019 at 3:14 AM Roman Gushchin wrote:
>
> On Sat, Aug 17, 2019 at 11:33:57AM +0800, Yafang Shao wrote:
> > On Sat, Aug 17, 2019 at 8:47 AM Roman Gushchin wrote:
> > >
> > > Commit 766a4c19d880 ("mm/memcontrol.c: keep local VM counters in sync
> > > with the hierarchical ones")
On Sat 17 Aug 01:25 PDT 2019, Alex Dewar wrote:
> In pinctrl-spmi-gpio.c there is a switch case which is obviously
> intended to fall through to the next label. Add a comment to suppress
> -Wimplicit-fallthrough warning.
>
Thanks for your patch Alex, this was fixed in 6161dc03587b ("pinctrl:
On Sat, Aug 17, 2019 at 09:03:30PM +0100, Valentin Schneider wrote:
> Apologies to Steve for continuing this thread when all he wanted was moving
> an operation inside a mutex...
>
> On 17/08/2019 16:02, Mathieu Desnoyers wrote:
> [...]
> > However, if the state of "x" can be any pointer value,
Add i.MX8MN to blacklist, so that imx-cpufreq-dt driver can handle
speed grading bits just like other i.MX8M SoCs.
Signed-off-by: Anson Huang
---
No changes.
---
drivers/cpufreq/cpufreq-dt-platdev.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/cpufreq/cpufreq-dt-platdev.c
i.MX8MN supports CPU running at 1.5GHz/1.4GHz/1.2GHz, add missing
frequency for ARM PLL table, also add .rate_count assignment which
is necessary for searching required PLL rate from the table.
Signed-off-by: Anson Huang
---
Changes since V1:
- Improve commit log, no code change.
---
On i.MX8MN DDR4 EVK board, there is a rohm,bd71847 PMIC
on i2c1 bus, enable it.
Signed-off-by: Anson Huang
---
No changes.
---
arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts | 109 ++
1 file changed, 109 insertions(+)
diff --git
Enable i2c1 on i.MX8MN DDR4 EVK board.
Signed-off-by: Anson Huang
---
No changes.
---
arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
Add A53 OPP table, cpu regulator and speed grading node to
support cpu-freq driver.
Signed-off-by: Anson Huang
---
No changes.
---
arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts | 4 +++
arch/arm64/boot/dts/freescale/imx8mn.dtsi | 41 +++
2 files changed, 45
i.MX8MN has different speed grading definition as below, it has 4 bits
to define speed grading, add support for it.
SPEED_GRADE[3:0]MHz
2300
00012200
00102100
00112000
01001900
01011800
On Sat, Aug 17, 2019 at 01:28:48AM -0700, Linus Torvalds wrote:
[ . . . ]
> Put another way: a WRITE_ONCE() without a paired READ_ONCE() is almost
> certainly pointless.
"Your honor, I have no further questions at this time, but I reserve
the right to recall this witness."
Outside of things
Hi, Stephen
> Quoting anson.hu...@nxp.com (2019-08-15 03:59:42)
> > diff --git a/drivers/clk/imx/clk-imx8mn.c
> > b/drivers/clk/imx/clk-imx8mn.c index ecd1062..3f1239a 100644
> > --- a/drivers/clk/imx/clk-imx8mn.c
> > +++ b/drivers/clk/imx/clk-imx8mn.c
> > @@ -82,6 +84,7 @@ static struct
On Sat, Aug 17, 2019 at 12:40:40PM -0400, Steven Rostedt wrote:
> On Sat, 17 Aug 2019 11:55:17 -0400 (EDT)
> Mathieu Desnoyers wrote:
>
> > - On Aug 17, 2019, at 11:26 AM, rostedt rost...@goodmis.org wrote:
> >
> > > On Sat, 17 Aug 2019 10:40:31 -0400 (EDT)
> > > Mathieu Desnoyers wrote:
>
On Sat, Aug 17, 2019 at 01:53:29AM -0400, Joel Fernandes wrote:
> On Fri, Aug 16, 2019 at 10:20:23PM -0700, Paul E. McKenney wrote:
> > On Sat, Aug 17, 2019 at 12:30:24AM -0400, Joel Fernandes wrote:
> > > On Fri, Aug 16, 2019 at 08:56:37PM -0700, Paul E. McKenney wrote:
> > > > On Fri, Aug 16,
After some private coaching from Serge Belyshev on git-revert I can confirm
that reverting that commit atop the current tree resolves the issue (the wifi
card scans for and finds networks just fine, no dmesg errors reported, etc.).
On Sat, Aug 17, 2019 at 11:59:59AM +0300, Serge Belyshev wrote:
On Sat, Aug 17, 2019 at 12:43:08AM -0400, Joel Fernandes wrote:
> On Fri, Aug 16, 2019 at 09:38:54PM -0700, Paul Walmsley wrote:
> > On Sat, 17 Aug 2019, Joel Fernandes (Google) wrote:
> >
> > > xchg() on a bool is causing issues on riscv and arm32.
> >
> > Indeed, it seems best not to use
This patch removes the todo for the ion chunk and
carveout device tree bindings.
Signed-off-by: Donald Yandt
---
drivers/staging/android/TODO | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/staging/android/TODO b/drivers/staging/android/TODO
index fbf015cc6..767dd98fd 100644
---
Thomas Gleixner,
Alright. Then I guess I am wasting everyone's time and everything is as
it should be according to you.
I will unsubscribe from this mailing list because it is flooding my
mail box with so many messages and I don't know of any way to subscribe
only to this particular thread.
On Fri, 16 Aug 2019, Guenter Roeck wrote:
> On Fri, Aug 16, 2019 at 12:22:22PM +0200, Thomas Gleixner wrote:
> > diff --git a/arch/x86/kernel/process.c b/arch/x86/kernel/process.c
> > index 75fea0d48c0e..625627b1457c 100644
> > --- a/arch/x86/kernel/process.c
> > +++ b/arch/x86/kernel/process.c
>
Apologies to Steve for continuing this thread when all he wanted was moving
an operation inside a mutex...
On 17/08/2019 16:02, Mathieu Desnoyers wrote:
[...]
> However, if the state of "x" can be any pointer value, or a reference
> count value, then not using "WRITE_ONCE()" to store a constant
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA512
The following changes since commit 5f9e832c137075045d15cd6899ab0505cfb2ca4b:
Linus 5.3-rc1 (2019-07-21 14:05:38 -0700)
are available in the Git repository at:
git://git.kernel.org/pub/scm/linux/kernel/git/hyperv/linux.git
From: Jose Abreu
Date: Sat, 17 Aug 2019 20:54:39 +0200
> Couple of improvements for -next tree. More info in commit logs.
Series applied.
On Fri, Aug 16, 2019 at 5:02 PM Amit Kucheria wrote:
>
> On Sat, Aug 17, 2019 at 3:06 AM Rob Herring wrote:
> >
> > On Fri, Jul 26, 2019 at 03:48:42AM +0530, Amit Kucheria wrote:
> > > Define two new required properties to define interrupts and
> > > interrupt-names for tsens.
> > >
> > >
Arul,
On Sat, 17 Aug 2019, Arul Jeniston wrote:
> Do you agree the possibility of returning zero value from timerfd_read()?
Obviosuly it happens.
> > That has absolutely nothing to do with CLOCK_REALTIME. Your machines
> > TSC is either going backwards or not synchronized between cores.
> >
>
On Sat, Aug 17, 2019 at 08:36:16AM +0200, Greg KH wrote:
> On Fri, Aug 16, 2019 at 05:47:26PM -0700, Roman Gushchin wrote:
> > Commit 766a4c19d880 ("mm/memcontrol.c: keep local VM counters in sync
> > with the hierarchical ones") effectively decreased the precision of
> > per-memcg vmstats_local
On Sat, Aug 17, 2019 at 11:33:57AM +0800, Yafang Shao wrote:
> On Sat, Aug 17, 2019 at 8:47 AM Roman Gushchin wrote:
> >
> > Commit 766a4c19d880 ("mm/memcontrol.c: keep local VM counters in sync
> > with the hierarchical ones") effectively decreased the precision of
> > per-memcg vmstats_local
In order to add Split Header support, stmmac_rx() needs to take into
account that packet may be split accross multiple descriptors.
Refactor the logic of this function in order to support this scenario.
Changes from v2:
- Fixup if condition detection (Jakub)
- Don't stop NAPI
Add 4 new tests:
- SA Insertion (register based)
- SA Insertion (descriptor based)
- SA Replacament (register based)
- SA Replacement (descriptor based)
Signed-off-by: Jose Abreu
---
Cc: Giuseppe Cavallaro
Cc: Alexandre Torgue
Cc: Jose Abreu
Cc: "David S.
Add support for EEE in XGMAC cores by implementing the necessary
callbacks.
Signed-off-by: Jose Abreu
---
Cc: Giuseppe Cavallaro
Cc: Alexandre Torgue
Cc: Jose Abreu
Cc: "David S. Miller"
Cc: Maxime Coquelin
Cc: net...@vger.kernel.org
Cc: linux-st...@st-md-mailman.stormreply.com
Cc:
Add 2 new selftests for VLAN Insertion offloading. Tests are for inner
and outer VLAN offloading.
Signed-off-by: Jose Abreu
---
Cc: Giuseppe Cavallaro
Cc: Alexandre Torgue
Cc: Jose Abreu
Cc: "David S. Miller"
Cc: Maxime Coquelin
Cc: net...@vger.kernel.org
Cc:
Add the ethtool interface to dump the register map in XGMAC cores.
Changes from v2:
- Remove uneeded memset (Jakub)
Signed-off-by: Jose Abreu
---
Cc: Giuseppe Cavallaro
Cc: Alexandre Torgue
Cc: Jose Abreu
Cc: "David S. Miller"
Cc: Maxime Coquelin
Cc: net...@vger.kernel.org
Cc:
TX Timestamp in XGMAC comes from MAC instead of descriptors. Implement
this in a new callback.
Also, RX Timestamp in XGMAC must be cheked against corruption and we need
a barrier to make sure that descriptor fields are read correctly.
Changes from v2:
- Rework return code check (Jakub)
Add the support for Split Header feature in the RX path and enable it in
XGMAC cores.
This does not impact neither beneficts bandwidth but it does reduces CPU
usage because without the feature all the entire packet is memcpy'ed,
while that with the feature only the header is.
With Split Header
Add the support for Flexible PPS in XGMAC cores.
Signed-off-by: Jose Abreu
---
Cc: Giuseppe Cavallaro
Cc: Alexandre Torgue
Cc: Jose Abreu
Cc: "David S. Miller"
Cc: Maxime Coquelin
Cc: net...@vger.kernel.org
Cc: linux-st...@st-md-mailman.stormreply.com
Cc:
Add a counter that increments each time a packet with split header is
received.
Signed-off-by: Jose Abreu
---
Cc: Giuseppe Cavallaro
Cc: Alexandre Torgue
Cc: Jose Abreu
Cc: "David S. Miller"
Cc: Maxime Coquelin
Cc: net...@vger.kernel.org
Cc: linux-st...@st-md-mailman.stormreply.com
Cc:
Add the support for Source Address Insertion and Replacement in XGMAC
cores. Two methods are supported: Descriptor based and register based.
Signed-off-by: Jose Abreu
---
Cc: Giuseppe Cavallaro
Cc: Alexandre Torgue
Cc: Jose Abreu
Cc: "David S. Miller"
Cc: Maxime Coquelin
Cc:
Return the correct value when RX descriptor is not the last one.
Signed-off-by: Jose Abreu
---
Cc: Giuseppe Cavallaro
Cc: Alexandre Torgue
Cc: Jose Abreu
Cc: "David S. Miller"
Cc: Maxime Coquelin
Cc: net...@vger.kernel.org
Cc: linux-st...@st-md-mailman.stormreply.com
Cc:
Adds the logic to insert a given VLAN ID in a packet. This is offloaded
to HW and its descriptor based. For now, only XGMAC implements the
necessary callbacks.
Signed-off-by: Jose Abreu
---
Cc: Giuseppe Cavallaro
Cc: Alexandre Torgue
Cc: Jose Abreu
Cc: "David S. Miller"
Cc: Maxime Coquelin
Couple of improvements for -next tree. More info in commit logs.
---
Cc: Giuseppe Cavallaro
Cc: Alexandre Torgue
Cc: Jose Abreu
Cc: "David S. Miller"
Cc: Maxime Coquelin
Cc: net...@vger.kernel.org
Cc: linux-st...@st-md-mailman.stormreply.com
Cc: linux-arm-ker...@lists.infradead.org
Cc:
The new implementation for determining parent map uses multiple ways
to pass parent info. The order in which it gets processed depends on
the first available member. Hence, it is necessary to zero init the
clk_init_data struct so that the expected member gets processed correctly.
So, add a warning
The clk_init_data struct needs to be initialized to zero for the new
parent_map implementation to work correctly. Otherwise, the member which
is available first will get processed.
Signed-off-by: Manivannan Sadhasivam
---
drivers/clk/clk-composite.c | 2 +-
drivers/clk/clk-divider.c| 2 +-
Add MAINTAINERS entry for Bitmain BM1880 SoC clock driver.
Signed-off-by: Manivannan Sadhasivam
---
MAINTAINERS | 2 ++
1 file changed, 2 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 997a4f8fe88e..280defec35b2 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1503,8 +1503,10 @@ M:
The below exemples of use of WARN_ON() show that the result
is sub-optimal in regard of the capabilities of powerpc.
void test_warn1(unsigned long long a)
{
WARN_ON(a);
}
void test_warn2(unsigned long a)
{
WARN_ON(a);
}
void test_warn3(unsigned long a, unsigned long b)
{
Add common clock driver for Bitmain BM1880 SoC. The clock controller on
BM1880 has supplies clocks to all peripherals in the form of gate clocks
and composite clocks (fixed factor + gate).
Signed-off-by: Manivannan Sadhasivam
---
drivers/clk/Kconfig | 6 +
drivers/clk/Makefile | 1
Remove fixed clock and source common clock for UART controllers.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm64/boot/dts/bitmain/bm1880-sophon-edge.dts | 9 -
arch/arm64/boot/dts/bitmain/bm1880.dtsi| 12
2 files changed, 12 insertions(+), 9 deletions(-)
Add clock controller support for Bitmain BM1880 SoC.
Signed-off-by: Manivannan Sadhasivam
---
arch/arm64/boot/dts/bitmain/bm1880.dtsi | 16
1 file changed, 16 insertions(+)
diff --git a/arch/arm64/boot/dts/bitmain/bm1880.dtsi
b/arch/arm64/boot/dts/bitmain/bm1880.dtsi
index
Hello,
This patchset adds common clock driver for Bitmain BM1880 SoC clock
controller. The clock controller consists of gate, divider, mux
and pll clocks with different compositions. Hence, the driver uses
composite clock structure in place where multiple clocking units are
combined together.
Add YAML devicetree binding for Bitmain BM1880 SoC.
Signed-off-by: Manivannan Sadhasivam
---
.../bindings/clock/bitmain,bm1880-clk.yaml| 83 +++
include/dt-bindings/clock/bm1880-clock.h | 82 ++
2 files changed, 165 insertions(+)
create mode 100644
On Sat, Aug 17, 2019 at 11:00:13AM +0800, Zhaoyang Huang wrote:
> From: Zhaoyang Huang
>
> pfn_valid can be wrong while the MSB of physical address be trimed as pfn
> larger than the max_pfn.
What scenario are you addressing here? At a guess, you're addressing
the non-LPAE case with PFNs that
On Fri, 16 Aug 2019 20:41:22 +0200
Lubomir Rintel wrote:
> On Fri, 2019-08-09 at 13:12 +0100, Marc Zyngier wrote:
> > On 09/08/2019 10:31, Lubomir Rintel wrote:
> > > The "regs" property of the "mrvl,mmp2-mux-intc" devices are silly. They
> > > are offsets from intc's base, not addresses on
Am 17.08.19 um 18:22 schrieb Chuanhong Guo:
> Hi!
>
> On Sat, Aug 17, 2019 at 11:40 PM Oleksij Rempel wrote:
>
>> In provided link [0] the ralink_clk_init function is reading
>> SYSC_REG_CPLL_CLKCFG0 R/W register.
>> This register is used to determine clock source, clock freq and CPU or bus
On Sat, 17 Aug 2019 18:47:05 +0200,
Hui Peng wrote:
>
> No, there was not triggering. I found it accidentally when I was going through
> the code.
>
> Yeah, you are right. it is handled in the last check. Is it defined in the
> spec that the descriptor needs to have 4/6/2 additional bytes for
The pull request you sent on Fri, 16 Aug 2019 18:25:40 -0700 (PDT):
> git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux.git
> tags/riscv/for-v5.3-rc5
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/2f478b60118f48bf66eaddcca0d23e80f87a682d
Thank you!
--
The pull request you sent on Sat, 17 Aug 2019 16:12:32 +0200:
> git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux.git i2c/for-current
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/05c525326957b504561d271f669d3b315930422f
Thank you!
--
Deet-doot-dot, I am a
/commits/Matthew-Hanzelik/Staging-speakup-spk_types-fixed-an-unnamed-parameter-style-issue/20190817-235230
config: x86_64-allyesconfig (attached as .config)
compiler: gcc-7 (Debian 7.4.0-10) 7.4.0
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64
If you fix
On Sat, Aug 17, 2019 at 4:13 AM Qian Cai wrote:
>
>
>
> > On Aug 16, 2019, at 11:57 PM, Dan Williams wrote:
> >
> > On Fri, Aug 16, 2019 at 8:34 PM Qian Cai wrote:
> >>
> >>
> >>
> >>> On Aug 16, 2019, at 5:48 PM, Dan Williams
> >>> wrote:
> >>>
> >>> On Fri, Aug 16, 2019 at 2:36 PM Qian Cai
On Sat, 17 Aug 2019 11:53:41 -0400 (EDT)
Mathieu Desnoyers wrote:
> kernel/trace/trace.c:tracing_record_taskinfo_sched_switch()
> kernel/trace/trace.c:tracing_record_taskinfo()
>
> where @flags is used to control a few branches. I don't think any of those
> would end up causing corruption if
On Sat, 17 Aug 2019 11:55:17 -0400 (EDT)
Mathieu Desnoyers wrote:
> - On Aug 17, 2019, at 11:26 AM, rostedt rost...@goodmis.org wrote:
>
> > On Sat, 17 Aug 2019 10:40:31 -0400 (EDT)
> > Mathieu Desnoyers wrote:
> >
> >> > I'm now even more against adding the READ_ONCE() or WRITE_ONCE().
Hello,
I've added a pipe file descriptor (fd1) to an epoll (fd3) with
EPOLLOUT in edge-triggered mode, and then added the fd3 to another
epoll (fd4) with EPOLLIN in edge-triggered too.
Next, waiting for fd4 without timeout. When fd1 to be writable, i
think epoll_wait(fd4, ...) only return once,
On 8/17/19 10:24 AM, Sander Eikelenboom wrote:
> On 12/08/2019 19:56, Eric Dumazet wrote:
>>
>>
>> On 8/12/19 2:50 PM, Sander Eikelenboom wrote:
>>> L.S.,
>>>
>>> While testing a somewhere-after-5.3-rc3 kernel (which included the latest
>>> net merge (33920f1ec5bf47c5c0a1d2113989bdd9dfb3fae9),
Hi!
On Sat, Aug 17, 2019 at 11:40 PM Oleksij Rempel wrote:
> In provided link [0] the ralink_clk_init function is reading
> SYSC_REG_CPLL_CLKCFG0 R/W register.
> This register is used to determine clock source, clock freq and CPU or bus
> clocks.
This register should only be changed by
On Sat, 17 Aug 2019 17:57:38 +0200,
Hui Peng wrote:
>
> Looking around, there are other suspicious codes. E.g., in the following
> function, it seems to be the same as `uac_mixer_unit_bmControls`, but it is
> accessing `desc->bNrInPins + 5`, in case of UAC_VERSION_1.
> Is this intended?
Yes,
On Sat, 2019-08-17 at 08:59 -0700, Richard Cochran wrote:
> On Wed, Aug 14, 2019 at 10:47:11AM +0300, Felipe Balbi wrote:
> > The current version of the IOCTL have a small problem which prevents us
> > from extending the API by making use of reserved fields. In these new
> > IOCTLs, we are now
On Wed, Aug 14, 2019 at 10:47:12AM +0300, Felipe Balbi wrote:
> diff --git a/include/uapi/linux/ptp_clock.h b/include/uapi/linux/ptp_clock.h
> index 039cd62ec706..9412b16cc8ed 100644
> --- a/include/uapi/linux/ptp_clock.h
> +++ b/include/uapi/linux/ptp_clock.h
> @@ -67,7 +67,9 @@ struct
On Wed, Aug 14, 2019 at 10:47:11AM +0300, Felipe Balbi wrote:
> The current version of the IOCTL have a small problem which prevents us
> from extending the API by making use of reserved fields. In these new
> IOCTLs, we are now making sure that flags and rsv fields are zero which
> will allow us
- On Aug 17, 2019, at 11:26 AM, rostedt rost...@goodmis.org wrote:
> On Sat, 17 Aug 2019 10:40:31 -0400 (EDT)
> Mathieu Desnoyers wrote:
>
>> > I'm now even more against adding the READ_ONCE() or WRITE_ONCE().
>>
>> I'm not convinced by your arguments.
>
> Prove to me that there's an
- On Aug 17, 2019, at 11:42 AM, rostedt rost...@goodmis.org wrote:
> On Sat, 17 Aug 2019 10:27:39 -0400 (EDT)
> Mathieu Desnoyers wrote:
>
>> I get your point wrt WRITE_ONCE(): since it's a cache it should not have
>> user-visible effects if a temporary incorrect value is observed. Well in
On Sat, 17 Aug 2019 10:27:39 -0400 (EDT)
Mathieu Desnoyers wrote:
> I get your point wrt WRITE_ONCE(): since it's a cache it should not have
> user-visible effects if a temporary incorrect value is observed. Well in
> reality, it's not a cache: if the lookup fails, it returns "<...>" instead,
>
Hi,
Am 17.08.19 um 16:42 schrieb Chuanhong Guo:
Hi!
On Tue, Aug 13, 2019 at 11:51 PM Rob Herring wrote:
[...]
+Example:
+ pll {
+ compatible = "mediatek,mt7621-pll";
You didn't answer Stephen's question on v1.
I thought he was asking why there's a syscon in compatible
Hi,
Am 17.08.19 um 16:42 schrieb Chuanhong Guo:
Hi!
On Tue, Aug 13, 2019 at 11:51 PM Rob Herring wrote:
[...]
+Example:
+ pll {
+ compatible = "mediatek,mt7621-pll";
You didn't answer Stephen's question on v1.
I thought he was asking why there's a syscon in compatible
syzbot has bisected this bug to:
commit bc389fd101e57b36aacfaec2df8fe479eabb44ea
Author: David S. Miller
Date: Tue Jul 2 21:12:30 2019 +
Merge branch 'macsec-fix-some-bugs-in-the-receive-path'
bisection log: https://syzkaller.appspot.com/x/bisect.txt?x=125c5c4c60
start commit:
On Sat, 17 Aug 2019 10:40:31 -0400 (EDT)
Mathieu Desnoyers wrote:
> > I'm now even more against adding the READ_ONCE() or WRITE_ONCE().
>
> I'm not convinced by your arguments.
Prove to me that there's an issue here beyond theoretical analysis,
then I'll consider that patch.
Show me a
- On Aug 17, 2019, at 4:44 AM, Linus Torvalds torva...@linux-foundation.org
wrote:
>
> But I'm seeing a lot of WRITE_ONCE(x, constantvalue) kind of things
> and don't seem to find a lot of reason to think that they are any
> inherently better than "x = constantvalue".
If the only states
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