On Tue, 27 Aug 2019 20:49:48 +0800
Ben Luo wrote:
> currently, if the page is not a tail of compound page, it will be
> checked twice for the same thing.
>
> Signed-off-by: Ben Luo
> ---
> drivers/vfio/vfio_iommu_type1.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff
Most 8xx registers have specific names, so just include
reg_8xx.h all the time in reg.h in order to have them defined
even when CONFIG_PPC_8xx is not selected. This will avoid
the need for #ifdefs in C code.
Guard SPRN_ICTRL in an #ifdef CONFIG_PPC_8xx as this register
has same name but different
On Tue, Aug 27, 2019 at 07:39:50PM +0200, Michal Hocko wrote:
> On Tue 27-08-19 19:06:18, Greg KH wrote:
> > On Tue, Aug 27, 2019 at 04:10:16PM +0200, Michal Hocko wrote:
> > > On Sat 24-08-19 23:23:07, Thomas Backlund wrote:
> > > > Den 24-08-2019 kl. 22:57, skrev Andrew Morton:
> > > > > On Sat,
SET_MSR_EE() is just use in this file and doesn't provide
any added value compared to mtmsr(). Drop it.
Add a wrtee() inline function to use wrtee/wrteei insn.
Replace #ifdefs by IS_ENABLED()
Signed-off-by: Christophe Leroy
---
v2: Changed wrtee()/wrteei() to a single wrtee() inline which
On Thu, Aug 22, 2019 at 02:58:37PM +0800, Sam Shih wrote:
> From: Ryder Lee
The subject should indicate this is for Mediatek.
>
> This adds a property "num-pwms" in example so that we could
> specify the number of PWM channels via device tree.
>
> Signed-off-by: Ryder Lee
> Signed-off-by:
2019-08-23 13:55-0700, Sean Christopherson:
> Don't advance RIP or inject a single-step #DB if emulation signals a
> fault. This logic applies to all state updates that are conditional on
> clean retirement of the emulation instruction, e.g. updating RFLAGS was
> previously handled by commit
The pull request you sent on Tue, 27 Aug 2019 14:21:49 +0100:
> git://git.kernel.org/pub/scm/linux/kernel/git/lee/mfd.git mfd-fixes-5.3
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/8d6454083d463a44097566616b473c7e6d4bdf02
Thank you!
--
Deet-doot-dot, I am a bot.
The pull request you sent on Tue, 27 Aug 2019 10:07:47 -0700:
> git://git.kernel.org/pub/scm/linux/kernel/git/vgupta/arc.git/ tags/arc-5.3-rc7
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/6525771f58cbc6ab97b5cff9069865cde8283346
Thank you!
--
Deet-doot-dot, I am
The pull request you sent on Tue, 27 Aug 2019 11:36:28 +0200:
> git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git
> tags/sound-5.3-rc7
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/0004654fb14859e49bab66aba881d64f605682a4
Thank you!
--
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The pull request you sent on Sun, 25 Aug 2019 23:29:02 -0700 (PDT):
> git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net.git refs/heads/master
has been merged into torvalds/linux.git:
https://git.kernel.org/torvalds/c/452a04441b4d0d2d567e4128af58867739002640
Thank you!
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Le 27/08/2019 à 20:26, Segher Boessenkool a écrit :
On Tue, Aug 27, 2019 at 07:36:35PM +0200, Christophe Leroy wrote:
Le 27/08/2019 à 19:29, Segher Boessenkool a écrit :
On Tue, Aug 27, 2019 at 10:48:24PM +1000, Nicholas Piggin wrote:
Christophe Leroy's on August 27, 2019 6:13 pm:
On Tue, 2019-08-27 at 19:59 +0200, Geert Uytterhoeven wrote:
> On Tue, Aug 27, 2019 at 7:46 PM Al Viro wrote:
> > On Tue, Aug 27, 2019 at 07:29:52PM +0200, Geert Uytterhoeven wrote:
> > > On Tue, Aug 27, 2019 at 4:17 PM David Laight
> > > wrote:
> > > > From: Geert Uytterhoeven
> > > > > Sent:
On Tue, Aug 27, 2019 at 09:16:39PM +0300, Vladimir Oltean wrote:
> I can't seem to find any situation where it performs worse. Hence my
> question on whether it's a better idea to condition this behavior on a
> Kconfig option rather than a DT blob which may or may not be in sync.
If it's
On 8/23/19 3:52 PM, Nadav Amit wrote:
> INVPCID is considerably slower than INVLPG of a single PTE. Using it to
> flush the user page-tables when PTI is enabled therefore introduces
> significant overhead.
I'm not sure this is worth all the churn, especially in the entry code.
For large flushes
On Tue, Aug 27, 2019 at 07:36:35PM +0200, Christophe Leroy wrote:
> Le 27/08/2019 à 19:29, Segher Boessenkool a écrit :
> >On Tue, Aug 27, 2019 at 10:48:24PM +1000, Nicholas Piggin wrote:
> >>Christophe Leroy's on August 27, 2019 6:13 pm:
> >>>+#define wrtee(val)asm volatile("wrtee %0" : :
On 8/23/19 3:52 PM, Nadav Amit wrote:
> n_pages concurrent +deferred-pti change
> --- -- - --
> 121191986-6.7%
Is this implying that a single-page INVPCID is 133
On 8/27/19 10:55 AM, Laurent Pinchart wrote:
Hi Shuah,
Thank you for the patch.
On Tue, Aug 20, 2019 at 03:18:41PM -0600, Shuah Khan wrote:
vimc uses Component API to split the driver into functional components.
The real hardware resembles a monolith structure than component and
component
On Tue, 27 Aug 2019 at 21:13, Mark Brown wrote:
>
> On Tue, Aug 27, 2019 at 09:06:14PM +0300, Vladimir Oltean wrote:
> > On Tue, 27 Aug 2019 at 21:05, Mark Brown wrote:
> > > On Mon, Aug 26, 2019 at 04:10:51PM +0300, Vladimir Oltean wrote:
>
> > > > I noticed you skipped applying this patch, and
On Mon, Aug 26, 2019 at 09:20:50AM -0700, Tony Lindgren wrote:
> * Markus Elfring [190826 06:31]:
> > From: Markus Elfring
> > Date: Mon, 26 Aug 2019 15:05:31 +0200
> >
> > A null pointer would be passed to a call of the function "kfree" directly
> > after a call of the function "kzalloc"
On Tue, Aug 27, 2019 at 09:06:14PM +0300, Vladimir Oltean wrote:
> On Tue, 27 Aug 2019 at 21:05, Mark Brown wrote:
> > On Mon, Aug 26, 2019 at 04:10:51PM +0300, Vladimir Oltean wrote:
> > > I noticed you skipped applying this patch, and I'm not sure that Shawn
> > > will review it/take it.
> > >
In preparation for static_call and variable size jump_label support,
teach text_poke_bp() to emulate instructions, namely:
JMP32, JMP8, CALL, NOP2, NOP_ATOMIC5
The current text_poke_bp() takes a @handler argument which is used as
a jump target when the temporary INT3 is hit by a different CPU.
Ftrace was one of the last W^X violators; these patches move it over to the
generic text_poke() interface and thereby get rid of this oddity.
The first patch has been posted before and was/is part of my (in-progress)
static_call and jump_label/jmp8 patch series; but is equally needed here.
The
Adding another text_poke_bp_batch() user made me realize the interface
is all sorts of wrong. The text poke vector should be internal to the
implementation.
This then results in a trivial interface:
text_poke_queue() - which has the 'normal' text_poke_bp() interface
text_poke_finish() -
Move ftrace over to using the generic x86 text_poke functions; this
avoids having a second/different copy of that code around.
This also avoids ftrace violating the (new) W^X rule and avoids
fragmenting the kernel text page-tables, due to no longer having to
toggle them RW.
Cc: Steven Rostedt
On 8/27/19 10:16 AM, Dafna Hirschfeld wrote:
On Tue, 2019-08-20 at 15:18 -0600, Shuah Khan wrote:
vimc uses Component API to split the driver into functional components.
The real hardware resembles a monolith structure than component and
component structure added a level of complexity making it
> -Original Message-
> From: Alex Williamson
> Sent: Tuesday, August 27, 2019 11:19 PM
> To: Parav Pandit
> Cc: Jiri Pirko ; kwankh...@nvidia.com;
> coh...@redhat.com; da...@davemloft.net; k...@vger.kernel.org; linux-
> ker...@vger.kernel.org; net...@vger.kernel.org
> Subject: Re:
On Tue, 27 Aug 2019 at 21:05, Mark Brown wrote:
>
> On Mon, Aug 26, 2019 at 04:10:51PM +0300, Vladimir Oltean wrote:
>
> > I noticed you skipped applying this patch, and I'm not sure that Shawn
> > will review it/take it.
> > Do you have a better suggestion how I can achieve putting the DSPI
> >
On Mon, Aug 26, 2019 at 04:10:51PM +0300, Vladimir Oltean wrote:
> I noticed you skipped applying this patch, and I'm not sure that Shawn
> will review it/take it.
> Do you have a better suggestion how I can achieve putting the DSPI
> driver in poll mode for this board? A Kconfig option maybe?
On Mon, Aug 26, 2019 at 06:19:53AM +, Ashish Kumar wrote:
> For Patch-2, I intended to use this in
> arm64/boot/dts/freescale/fsl-ls1088a.dtsi (please see below), since both
> ls1088 and ls2080 has same QSPI controller.
> So I had introduced new compatible
> +
Hi Al,
On Tue, Aug 27, 2019 at 7:46 PM Al Viro wrote:
> On Tue, Aug 27, 2019 at 07:29:52PM +0200, Geert Uytterhoeven wrote:
> > On Tue, Aug 27, 2019 at 4:17 PM David Laight
> > wrote:
> > > From: Geert Uytterhoeven
> > > > Sent: 19 August 2019 18:15
> > > ...
> > > > > I think a cast to
On Tue, Aug 27, 2019 at 10:46:42AM -0700, Linus Torvalds wrote:
> No hurry, and I don't care deeply when this goes in. It looks safe and
> harmless, so any time as far as I'm concerned - whatever is most
> convenient for people.
>
> This is more of a "let's protect against any future issues" than
In some case C1% will be wrong value, when platform doesn't have MSR for
C1 residency.
For example:
CoreCPU CPU%c1
- - 100.00
0 0 100.00
0 2 100.00
1 1 100.00
1 3 100.00
But adding Busy% will fix this
CoreCPU Busy%
On 2019-08-23 11:35, kgu...@codeaurora.org wrote:
On 2019-08-22 00:12, Vinod Koul wrote:
Add the regulators found in the mtp platform. This platform consists
of
pmic PM8150, PM8150L and PM8009.
Signed-off-by: Vinod Koul
Reviewed-by: Niklas Cassel
---
arch/arm64/boot/dts/qcom/sm8150-mtp.dts
Previously KUnit assumed that printk would always be present, which is
not a valid assumption to make. Fix that by ifdefing out functions which
directly depend on printk core functions similar to what dev_printk
does.
Reported-by: Randy Dunlap
Link:
On Wed, Aug 28, 2019 at 01:36:30AM +0900, Seunghun Han wrote:
> I got your point. Is there any problem if some regions which don't
> need to be handled in NVS area are saved and restored? If there is a
> problem, how about adding code for ignoring the regions in NVS area to
> the nvs.c file like
On Tue, 27 Aug 2019 13:11:17 +
Parav Pandit wrote:
> Hi Alex, Cornelia,
>
> > -Original Message-
> > From: kvm-ow...@vger.kernel.org On Behalf
> > Of Parav Pandit
> > Sent: Tuesday, August 27, 2019 2:11 AM
> > To: alex.william...@redhat.com; Jiri Pirko ;
> > kwankh...@nvidia.com;
On Tue, Aug 27, 2019 at 10:40 AM Borislav Petkov wrote:
>
> Do you want it this weekend, after some smoke testing on boxes or should
> I leave it a couple of weeks in tip until the merge window opens, and
> then queue it for 5.4 for longer exposure in linux-next?
No hurry, and I don't care
2019-08-15 12:03+0800, Wanpeng Li:
> From: Wanpeng Li
>
> Even if for realtime CPUs, cache line bounces, frequency scaling, presence
> of higher-priority RT tasks, etc can still cause different response. These
> interferences should be considered and periodically revaluate whether
> or not
On Tue, Aug 27, 2019 at 07:29:52PM +0200, Geert Uytterhoeven wrote:
> Hi David,
>
> On Tue, Aug 27, 2019 at 4:17 PM David Laight wrote:
> > From: Geert Uytterhoeven
> > > Sent: 19 August 2019 18:15
> > ...
> > > > I think a cast to unsigned long is rather more common.
> > > >
> > > > uintptr_t
On Tue, Aug 27, 2019 at 09:55:08AM -0700, Linus Torvalds wrote:
> Side note: I'd suggest
>
> if (WARN_ON_ONCE(!changed))
> pr_emerg("RDRAND gives funky smelling output, might
> consider not using it by booting with \"nordrand\"");
>
> instead.
Done, final result with a
On Tue 27-08-19 19:06:18, Greg KH wrote:
> On Tue, Aug 27, 2019 at 04:10:16PM +0200, Michal Hocko wrote:
> > On Sat 24-08-19 23:23:07, Thomas Backlund wrote:
> > > Den 24-08-2019 kl. 22:57, skrev Andrew Morton:
> > > > On Sat, 17 Aug 2019 19:15:23 + Roman Gushchin wrote:
> > > >
> > > > > >
Le 27/08/2019 à 19:29, Segher Boessenkool a écrit :
On Tue, Aug 27, 2019 at 10:48:24PM +1000, Nicholas Piggin wrote:
Christophe Leroy's on August 27, 2019 6:13 pm:
+#define wrtee(val) asm volatile("wrtee %0" : : "r" (val) : "memory")
+#define wrteei(val)asm volatile("wrteei %0" : :
On Tue, 2019-08-27 at 12:35 +0200, Pablo Neira Ayuso wrote:
> On Wed, Aug 21, 2019 at 11:15:06AM -0300, Leonardo Bras wrote:
> > If IPv6 is disabled on boot (ipv6.disable=1), but nft_fib_inet ends up
> > dealing with a IPv6 package, it causes a kernel panic in
> > fib6_node_lookup_1(), crashing in
lkdtm/bugs.c:94:2: error: format '%d' expects argument of type 'int', but
argument 2 has type 'long unsigned int' [-Werror=format=]
pr_info("Calling function with %d frame size to depth %d ...\n",
^
THREAD_SIZE is defined as a unsigned long, cast CONFIG_FRAME_WARN to
unsigned long as well.
From: Kuppuswamy Sathyanarayanan
This patchset adds support for following features:
1. Error Disconnect Recover (EDR) support.
2. _OSC based negotiation support for DPC.
You can find EDR spec in the following link.
https://members.pcisig.com/wg/PCI-SIG/document/12614
Changes since v7:
*
From: Kuppuswamy Sathyanarayanan
As per PCI firmware specification r3.2 Downstream Port Containment
Related Enhancements ECN, OS is responsible for clearing the AER
registers in EDR mode. So clear AER registers in dpc_process_error()
function.
Signed-off-by: Kuppuswamy Sathyanarayanan
From: Kuppuswamy Sathyanarayanan
With Error Disconnect Recover (EDR) support, we need to support
processing DPC event either from DPC IRQ or ACPI EDR event. So create
a wrapper function dpc_process_error() and move common error handling
code in to it. It will be used to process the DPC event in
On 8/27/19 8:21 PM, Joe Perches wrote:
> On Tue, 2019-08-27 at 19:55 +0300, Denis Efremov wrote:
>> IS_ERR, IS_ERR_OR_NULL, IS_ERR_VALUE already contain unlikely optimization
>> internally. Thus, there is no point in calling these functions under
>> likely/unlikely.
>>
>> This check is based on
From: Kuppuswamy Sathyanarayanan
As per PCI firmware specification r3.2 Downstream Port Containment
Related Enhancements ECN, sec 4.5.1, OS must implement following steps
to enable/use EDR feature.
1. OS can use bit 7 of _OSC Control Field to negotiate control over
Downstream Port Containment
From: Kuppuswamy Sathyanarayanan
Currently, in native mode, DPC driver is configured to trigger DPC only
for FATAL errors and hence it only supports port recovery for FATAL
errors. But with Error Disconnect Recover (EDR) support, DPC
configuration is done by firmware, and hence we should expect
From: Kuppuswamy Sathyanarayanan
As per ACPI specification r6.3, sec 5.6.6, when firmware owns Downstream
Port Containment (DPC), its expected to use the "Error Disconnect
Recover" (EDR) notification to alert OSPM of a DPC event and if OS
supports EDR, its expected to handle the software state
From: Kuppuswamy Sathyanarayanan
Commit bdb5ac85777d ("PCI/ERR: Handle fatal error recovery") uses
reset_link() to recover from fatal errors. But, if the reset is
successful there is no need to continue the rest of the error recovery
checks. Also, during fatal error recovery, if the initial
From: Kuppuswamy Sathyanarayanan
As per PCI firmware specification r3.2 Downstream Port Containment
Related Enhancements ECN, sec 4.5.1, table 4-6, Error Disconnect
Recover (EDR) support allows OS to handle error recovery and
clearing Error Registers even in FF mode. So remove FF mode checks in
From: Kuppuswamy Sathyanarayanan
As per ACPI specification v6.3, sec 5.6.6, Error Disconnect Recover
(EDR) notification used by firmware to let OS know about the DPC event
and permit OS to perform error recovery when processing the EDR
notification. Also, as per PCI firmware specification r3.2
Hi David,
On Tue, Aug 27, 2019 at 4:17 PM David Laight wrote:
> From: Geert Uytterhoeven
> > Sent: 19 August 2019 18:15
> ...
> > > I think a cast to unsigned long is rather more common.
> > >
> > > uintptr_t is used ~1300 times in the kernel.
> > > I believe a cast to unsigned long is much more
On Tue, Aug 27, 2019 at 10:48:24PM +1000, Nicholas Piggin wrote:
> Christophe Leroy's on August 27, 2019 6:13 pm:
> > +#define wrtee(val) asm volatile("wrtee %0" : : "r" (val) : "memory")
> > +#define wrteei(val)asm volatile("wrteei %0" : : "i" (val) :
> > "memory")
>
> Can you implement
On Tue, Aug 27, 2019 at 09:48:48AM +0200, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 5.2.11 release.
> There are 162 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me
On Wed, 21 Aug 2019 15:25:20 +0200, Martin Kepplinger wrote:
> Signed-off-by: Martin Kepplinger
> ---
> Documentation/devicetree/bindings/iio/imu/st_lsm6dsx.txt | 1 +
> 1 file changed, 1 insertion(+)
>
Reviewed-by: Rob Herring
Thomas and I seem to have become the "unofficial" maintainers for these
files and questions about SPDX things. So let's make it official.
Reported-by: "Darrick J. Wong"
Cc: Thomas Gleixner
Signed-off-by: Greg Kroah-Hartman
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -9234,6 +9234,17 @@ F:
On Tue, Aug 27, 2019 at 09:49:39AM +0200, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.19.69 release.
> There are 98 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me
On Tue, Aug 27, 2019 at 09:50:05AM +0200, Greg Kroah-Hartman wrote:
> This is the start of the stable review cycle for the 4.14.141 release.
> There are 62 patches in this series, all will be posted as a response
> to this one. If anyone has any issues with these being applied, please
> let me
On Tue, Aug 27, 2019 at 07:54:25PM +0300, Ivan Mikhaylov wrote:
> Set WDT_CLEAR_TIMEOUT_AND_BOOT_CODE_SELECTION into WDT_CLEAR_TIMEOUT_STATUS
> to clear out boot code source and re-enable access to the primary SPI flash
> chip while booted via wdt2 from the alternate chip.
>
> AST2400 datasheet
On Wed, 21 Aug 2019 15:06:52 +0800, Rahul Tanwar wrote:
> Intel Lightning Mountain(LGM) reuses Lantiq ASC serial controller IP.
> Update the dt bindings to support LGM as well.
>
> Signed-off-by: Rahul Tanwar
> ---
> .../devicetree/bindings/serial/lantiq,asc.yaml | 35
>
On Wed, 21 Aug 2019 15:06:51 +0800, Rahul Tanwar wrote:
> Convert the existing DT binding document for Lantiq SoC ASC serial controller
> from txt format to YAML format.
>
> Signed-off-by: Rahul Tanwar
> ---
> .../devicetree/bindings/serial/lantiq,asc.yaml | 55
> ++
>
On Tue, 2019-08-27 at 19:55 +0300, Denis Efremov wrote:
> IS_ERR, IS_ERR_OR_NULL, IS_ERR_VALUE already contain unlikely optimization
> internally. Thus, there is no point in calling these functions under
> likely/unlikely.
>
> This check is based on the coccinelle rule developed by Enrico Weigelt
On Tue, Aug 27, 2019 at 09:33:11AM -0700, Dave Hansen wrote:
> The point was that there are 5 files in the code that need to be changed
> if you change NCAPINTS:
>
> 1. arch/x86/include/asm/required-features.h
> 2. arch/x86/include/asm/disabled-features.h
> 3.
On Wed, Aug 21, 2019 at 08:26:24AM +0530, Manivannan Sadhasivam wrote:
> Add devicetree YAML binding for Actions Semi Owl SoC's SD/MMC/SDIO
> controller.
>
> Signed-off-by: Manivannan Sadhasivam
> ---
> .../devicetree/bindings/mmc/owl-mmc.yaml | 62 +++
> 1 file changed, 62
On Wed, Aug 21, 2019 at 4:11 AM Sibi Sankar wrote:
>
> Add bindings for Operating State Manager (OSM) L3 interconnect provider
> on SDM845 SoCs.
>
> Signed-off-by: Sibi Sankar
> ---
> .../bindings/interconnect/qcom,osm-l3.yaml| 56 +++
>
On Tue, Aug 27, 2019 at 09:54:17PM +0530, Vidya Sagar wrote:
> On 8/27/2019 9:17 PM, Andrew Murray wrote:
> > On Mon, Aug 26, 2019 at 01:01:43PM +0530, Vidya Sagar wrote:
> > > Add support to get regulator information of 3.3V and 12V supplies of a
> > > PCIe
> > > slot from the respective
On 8/27/19 3:43 AM, Michal Hocko wrote:
If there are no objection to the patch I will post it as a standalong
one.
On Mon 26-08-19 12:55:21, Michal Hocko wrote:
From 59d128214a62bf2d83c2a2a9cde887b4817275e7 Mon Sep 17 00:00:00 2001
From: Michal Hocko
Date: Mon, 26 Aug 2019 12:43:15 +0200
On Tue, Aug 27, 2019 at 9:04 AM Vitaly Kuznetsov wrote:
>
> If kvm_intel is loaded with nested=0 parameter an attempt to perform
> KVM_GET_SUPPORTED_HV_CPUID results in OOPS as nested_get_evmcs_version hook
> in kvm_x86_ops is NULL (we assign it in nested_vmx_hardware_setup() and
> this only
On Tue, 20 Aug 2019 16:11:40 +0200, Michal Simek wrote:
> Using optional "label" property is adding an option to user to use better
> name for device identification.
>
> Signed-off-by: Michal Simek
> ---
>
> Documentation/devicetree/bindings/hwmon/ina2xx.txt | 2 ++
> 1 file changed, 2
On 8/27/19 5:59 AM, Kirill A. Shutemov wrote:
On Tue, Aug 27, 2019 at 03:17:39PM +0300, Kirill A. Shutemov wrote:
On Tue, Aug 27, 2019 at 02:09:23PM +0200, Michal Hocko wrote:
On Tue 27-08-19 14:01:56, Vlastimil Babka wrote:
On 8/27/19 1:02 PM, Kirill A. Shutemov wrote:
On Tue, Aug 27,
On Tue, Aug 27, 2019 at 04:10:16PM +0200, Michal Hocko wrote:
> On Sat 24-08-19 23:23:07, Thomas Backlund wrote:
> > Den 24-08-2019 kl. 22:57, skrev Andrew Morton:
> > > On Sat, 17 Aug 2019 19:15:23 + Roman Gushchin wrote:
> > >
> > > > > > Fixes: 766a4c19d880 ("mm/memcontrol.c: keep local
On Tue, Aug 27, 2019 at 06:07:04PM +0200, Daniel Mack wrote:
> Hi Greg,
>
> On 15/8/2019 11:28 PM, Daniel Mack wrote:
> > When probed via DT, the uio_pdrv_genirq driver currently uses the name
> > of the node and exposes that as name of the UIO device to userspace.
> >
> > This doesn't work for
On Tue, 20 Aug 2019 11:46:24 +0200, Jerome Brunet wrote:
> SM1 SoC family adds two new audio FIFOs with the related arb reset lines
>
> Signed-off-by: Jerome Brunet
> ---
> .../devicetree/bindings/reset/amlogic,meson-axg-audio-arb.txt | 3 ++-
>
Hi Oleg,
On 8/27/19 3:00 PM, Oleg Nesterov wrote:
[..]
> But to remind, there is another problem with in_ia32_syscall() && uprobes.
>
> get_unmapped_area() paths use in_ia32_syscall() and this is wrong in case
> when the caller is xol_add_vma(), in this case TS_COMPAT won't be set.>
> Usually
On Tue, Aug 27, 2019 at 10:08:30AM -0500, Josh Poimboeuf wrote:
> On Mon, Aug 26, 2019 at 04:38:29PM -0700, Nathan Chancellor wrote:
> > Looks like that comes from tune_qsfp, which gets inlined into
> > tune_serdes but I am far from an objtool expert so I am not
> > really sure what kind of issues
at 23:25, Takashi Iwai wrote:
On Tue, 27 Aug 2019 15:47:55 +0200,
Kai-Heng Feng wrote:
A driver may want to know the existence of _PR3, to choose different
runtime suspend behavior. A user will be add in next patch.
This is mostly the same as nouveau_pr3_present().
Then it'd be nice to
On Tue, 20 Aug 2019 07:28:43 +, "Z.q. Hou" wrote:
> From: Hou Zhiqiang
>
> The num-lanes is not a mandatory property, e.g. on FSL
> Layerscape SoCs, the PCIe link training is completed
> automatically base on the selected SerDes protocol, it
> doesn't need the num-lanes to set-up the link
Unlike standard powerpc, Powerpc 8xx doesn't have SPRN_DABR, but
it has a breakpoint support based on a set of comparators which
allow more flexibility.
Commit 4ad8622dc548 ("powerpc/8xx: Implement hw_breakpoint")
implemented breakpoints by emulating the DABR behaviour. It did
this by setting one
Most 8xx registers have specific names, so just include
reg_8xx.h all the time in reg.h in order to have them defined
even when CONFIG_PPC_8xx is not selected. This will avoid
the need for #ifdefs in C code.
Guard SPRN_ICTRL in an #ifdef CONFIG_PPC_8xx as this register
has same name but different
On Tue, Aug 27, 2019 at 9:04 AM Vitaly Kuznetsov wrote:
>
> Since commit 5158917c7b019 ("KVM: x86: nVMX: Allow nested_enable_evmcs to
> be NULL") the code in x86.c is prepared to see nested_enable_evmcs being
> NULL and in VMX case it actually is when nesting is disabled. Remove the
> unneeded
Hi João,
On 8/12/19 6:57 PM, Benjamin Tissoires wrote:
> Hi João,
>
> On Thu, Aug 8, 2019 at 10:35 PM João Moreno wrote:
>>
>> Hi Benjamin,
>>
>> On Mon, 8 Jul 2019 at 22:35, João Moreno wrote:
>>>
>>> Hi Benjamin,
>>>
>>> No worries, also pretty busy over here. Didn't mean to press.
>>>
>>>
Hi Shuah,
Thank you for the patch.
On Tue, Aug 20, 2019 at 03:18:41PM -0600, Shuah Khan wrote:
> vimc uses Component API to split the driver into functional components.
> The real hardware resembles a monolith structure than component and
> component structure added a level of complexity making
On Mon, Aug 26, 2019 at 5:53 AM Borislav Petkov wrote:
>
> + if (!changed) {
> + pr_emerg(
> +"RDRAND gives funky smelling output, might consider not using it by booting
> with \"nordrand\"");
> + WARN_ON_ONCE(1);
> + }
Side note: I'd suggest
if
IS_ERR, IS_ERR_OR_NULL, IS_ERR_VALUE already contain unlikely optimization
internally. Thus, there is no point in calling these functions under
likely/unlikely.
This check is based on the coccinelle rule developed by Enrico Weigelt
Adds wdt2 section with 'alt-boot' option into dts for vesnin.
Signed-off-by: Ivan Mikhaylov
---
arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts
b/arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts
index
Set WDT_CLEAR_TIMEOUT_AND_BOOT_CODE_SELECTION into WDT_CLEAR_TIMEOUT_STATUS
to clear out boot code source and re-enable access to the primary SPI flash
chip while booted via wdt2 from the alternate chip.
AST2400 datasheet says:
"In the 2nd flash booting mode, all the address mapping to CS0# would
On Tue, Aug 27, 2019 at 9:04 AM Vitaly Kuznetsov wrote:
>
> It was discovered that after commit 65efa61dc0d5 ("selftests: kvm: provide
> common function to enable eVMCS") hyperv_cpuid selftest is failing on AMD.
> The reason is that the commit changed _vcpu_ioctl() to vcpu_ioctl() in the
> test
Adds secondary SPI flash chip into dts for vesnin.
Signed-off-by: Ivan Mikhaylov
---
arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts
b/arch/arm/boot/dts/aspeed-bmc-opp-vesnin.dts
index
The option for the ast2400/2500 to get access to CS0 at runtime.
Signed-off-by: Ivan Mikhaylov
---
.../ABI/testing/sysfs-class-watchdog | 34 +++
1 file changed, 34 insertions(+)
diff --git a/Documentation/ABI/testing/sysfs-class-watchdog
ASPEED SoCs support dual-boot feature for SPI Flash.
When strapped appropriately, the SoC starts wdt2 (/dev/watchdog1)
and if within a minute it is not disabled, it goes off and reboots
the SoC from an alternate SPI Flash chip by changing CS0 controls
to actually drive CS1 line.
When booted from
Jacek
OK finally getting back to this.
On 7/29/19 3:45 PM, Jacek Anaszewski wrote:
Hi Dan,
Thank you for the v4.
I have a bunch of comments below. Please take a look.
On 7/25/19 8:28 PM, Dan Murphy wrote:
Add a documentation of LED Multicolor LED class specific
sysfs attributes.
On Mon, 19 Aug 2019 13:53:06 +0200, Krzysztof Wilczynski wrote:
> Fix misspelled words in include/linux/pci.h, drivers/pci/Kconfig,
> and in the documentation for Freescale i.MX6 and Marvell Armada 7K/8K
> PCIe interfaces. No functional change intended.
>
> Related commit 96291d565550 ("PCI: Fix
On Mon, 19 Aug 2019 17:21:40 +0800, Mars Cheng wrote:
> From: mtk01761
>
> Add MT6779 clock dt-bindings, include topckgen, apmixedsys,
> infracfg, and subsystem clocks.
>
> Signed-off-by: mtk01761
> ---
> include/dt-bindings/clock/mt6779-clk.h | 436
>
> 1
On Mon, 19 Aug 2019 17:21:39 +0800, Mars Cheng wrote:
> From: mtk01761
>
> This patch adds the binding documentation for
> apmixedsys, audiosys, camsys, imgsys, ipesys,
> infracfg, mfgcfg, mmsys, topckgen, vdecsys,
> and vencsys for Mediatek MT6779.
>
> Signed-off-by: mtk01761
> ---
>
On Tue, 27 Aug 2019 15:35:10 +0200
Cornelia Huck wrote:
> On Tue, 27 Aug 2019 11:57:07 +
> Parav Pandit wrote:
>
> > > -Original Message-
> > > From: Cornelia Huck
> > > Sent: Tuesday, August 27, 2019 5:11 PM
> > > To: Parav Pandit
> > > Cc: alex.william...@redhat.com; Jiri Pirko
On Mon, 19 Aug 2019 17:21:34 +0800, Mars Cheng wrote:
> Add binding documentation of mediatek,sysirq for mt6779 SoC.
>
> Signed-off-by: Mars Cheng
> ---
> .../interrupt-controller/mediatek,sysirq.txt |1 +
> 1 file changed, 1 insertion(+)
>
Reviewed-by: Rob Herring
On Sun, 18 Aug 2019 15:56:02 +0200, Frank Wunderlich wrote:
> From: Josef Friedl
>
> add missing devicetree-binding document for mt6397 rtc
> in later patch driver is extended with mt6323 chip
>
> Suggested-By: Alexandre Belloni
> Signed-off-by: Josef Friedl
> Signed-off-by: Frank Wunderlich
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