[patch V4 part 3 20/29] x86/entry: Provide IDTENTRY_ERRORCODE

From: Thomas Gleixner Same as IDTENTRY but the C entry point has an error code argument. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/idtentry.h | 46 1 file changed, 46 insertions(+) --- a/arch/x86/include/asm/idtentry.h +++

[patch V4 part 3 22/29] x86/entry: Convert Segment not present exception to IDTENTRY

From: Thomas Gleixner Convert #NP to IDTENTRY_ERRORCODE: - Implement the C entry point with DEFINE_IDTENTRY - Emit the ASM stub with DECLARE_IDTENTRY - Remove the ASM idtentry in 64bit - Remove the open coded ASM entry code in 32bit - Fixup the XEN/PV code - Remove the old prototyoes

[patch V4 part 3 13/29] x86/traps: Prepare for using DEFINE_IDTENTRY

From: Thomas Gleixner Prepare for using IDTENTRY to define the C exception/trap entry points. It would be possible to glue this into the existing macro maze, but it's simpler and better to read at the end to just make them distinct. Provide a trivial inline helper to read the trap address. The

[patch V4 part 3 09/29] x86/entry/32: Provide macro to emit IDT entry stubs

From: Thomas Gleixner 32 and 64 bit have unnecessary different ways to populate the exception entry code. Provide a idtentry macro which allows to consolidate all of that. Signed-off-by: Thomas Gleixner Reviewed-by: Alexandre Chartre --- V3: Remove the INVD bug asm. Can be done in C (Brian)

Re: [net-next PATCH v3 4/5] net: phy: Introduce fwnode_get_phy_id()

On Tue, May 5, 2020 at 4:29 PM Calvin Johnson wrote: > > Extract phy_id from compatible string. This will be used by > fwnode_mdiobus_register_phy() to create phy device using the > phy_id. > +int fwnode_get_phy_id(struct fwnode_handle *fwnode, u32 *phy_id) > +{ > + const char *cp; > +

[patch V4 part 3 11/29] rcu: Provide rcu_irq_exit_preempt()

Interrupts and exceptions invoke rcu_irq_enter() on entry and need to invoke rcu_irq_exit() before they either return to the interrupted code or invoke the scheduler due to preemption. The general assumption is that RCU idle code has to have preemption disabled so that a return from interrupt

[patch V4 part 3 21/29] x86/entry: Convert Invalid TSS exception to IDTENTRY

From: Thomas Gleixner Convert #TS to IDTENTRY_ERRORCODE: - Implement the C entry point with DEFINE_IDTENTRY - Emit the ASM stub with DECLARE_IDTENTRY - Remove the ASM idtentry in 64bit - Remove the open coded ASM entry code in 32bit - Fixup the XEN/PV code - Remove the old prototyoes

[patch V4 part 3 24/29] x86/entry: Convert General protection exception to IDTENTRY

From: Thomas Gleixner Convert #GP to IDTENTRY_ERRORCODE: - Implement the C entry point with DEFINE_IDTENTRY - Emit the ASM stub with DECLARE_IDTENTRY - Remove the ASM idtentry in 64bit - Remove the open coded ASM entry code in 32bit - Fixup the XEN/PV code - Remove the old prototyoes

[patch V4 part 3 23/29] x86/entry: Convert Stack segment exception to IDTENTRY

From: Thomas Gleixner Convert #SS to IDTENTRY_ERRORCODE: - Implement the C entry point with DEFINE_IDTENTRY - Emit the ASM stub with DECLARE_IDTENTRY - Remove the ASM idtentry in 64bit - Remove the open coded ASM entry code in 32bit - Fixup the XEN/PV code - Remove the old prototyoes

[patch V4 part 4 17/24] x86/entry/64: Remove error code clearing from #DB and #MCE ASM stub

The C entry points do not expect an error code. Signed-off-by: Thomas Gleixner --- arch/x86/entry/entry_64.S |1 - 1 file changed, 1 deletion(-) --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -643,7 +643,6 @@ SYM_CODE_START(\asmsym) .endif movq

[patch V4 part 4 20/24] x86/traps: Restructure #DB handling

Now that there are separate entry points, move the kernel/user_mode specifc checks into the entry functions so the common handling code does not need the extra mode checks. Make the code more readable while at it. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/traps.c | 69

[patch V4 part 4 13/24] x86/entry: Convert NMI to IDTENTRY_NMI

Convert #NMI to IDTENTRY_NMI: - Implement the C entry point with DEFINE_IDTENTRY_NMI - Fixup the XEN/PV code - Remove the old prototyoes No functional change. Signed-off-by: Thomas Gleixner --- arch/x86/entry/entry_32.S |8 arch/x86/entry/entry_64.S | 15

Re: [PATCH] ARM: use ARM unwinder for gcov

On Tue, May 05, 2020 at 04:11:56PM +0200, Arnd Bergmann wrote: > Using gcov on ARM fails when the frame pointer unwinder is used: > > arm-linux-gnueabi-ld: kernel/softirq.o:(.ARM.exidx+0x120): undefined > reference to `__aeabi_unwind_cpp_pr0' > arm-linux-gnueabi-ld:

[PATCH] amdgpu: fix integer overflow on 32-bit architectures

Multiplying 10 by four overruns a 'long' variable, as clang points out: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:4160:53: error: overflow in expression; result is -294967296 with type 'long' [-Werror,-Winteger-overflow] expires = ktime_get_mono_fast_ns() + NSEC_PER_SEC

[patch V4 part 4 12/24] x86/idtentry: Provide IDTENTRY_XEN for XEN/PV

XEN/PV has special wrappers for NMI and DB exceptions. They redirect these exceptions through regular IDTENTRY points. Provide the necessary IDTENTRY macros to make this work Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/idtentry.h | 16 1 file changed, 16

[patch V4 part 5 00/31] x86/entry: Entry/exception code rework,

#PF/interrupts/system vectors Folks! This is the fifth part of the rework series. Part 4 can be found here: https://lore.kernel.org/r/20200505134926.578885...@linutronix.de The series has a total of 138 patches and is split into 5 parts. The base for this 5th series is:

[PATCH] xenbus: avoid stack overflow warning

The __xenbus_map_ring() function has two large arrays, 'map' and 'unmap' on its stack. When clang decides to inline it into its caller, xenbus_map_ring_valloc_hvm(), the total stack usage exceeds the warning limit for stack size on 32-bit architectures. drivers/xen/xenbus/xenbus_client.c:592:12:

[patch V4 part 4 10/24] x86/entry: Convert Machine Check to IDTENTRY_IST

Convert #MC to IDTENTRY_MCE: - Implement the C entry points with DEFINE_IDTENTRY_MCE - Emit the ASM stub with DECLARE_IDTENTRY_MCE - Remove the ASM idtentry in 64bit - Remove the open coded ASM entry code in 32bit - Fixup the XEN/PV code - Remove the old prototyoes - Remove the error

[patch V4 part 4 16/24] x86/entry: Convert Debug exception to IDTENTRY_DB

Convert #DB to IDTENTRY_ERRORCODE: - Implement the C entry point with DEFINE_IDTENTRY_DB - Emit the ASM stub with DECLARE_IDTENTRY - Remove the ASM idtentry in 64bit - Remove the open coded ASM entry code in 32bit - Fixup the XEN/PV code - Remove the old prototyoes No functional

Re: [PATCH RFC 1/6] Revert "KVM: async_pf: Fix #DF due to inject "Page not Present" and "Page Ready" exceptions simultaneously"

On Wed, Apr 29, 2020 at 11:36:29AM +0200, Vitaly Kuznetsov wrote: > Commit 9a6e7c39810e (""KVM: async_pf: Fix #DF due to inject "Page not > Present" and "Page Ready" exceptions simultaneously") added a protection > against 'page ready' notification coming before 'page not ready' is > delivered.

[patch V4 part 4 01/24] x86/int3: Ensure that poke_int3_handler() is not traced

From: Thomas Gleixner In order to ensure poke_int3_handler() is completely self contained -- this is called while modifying other text, imagine the fun of hitting another INT3 -- ensure that everything it uses is not traced. The primary means here is to force inlining; bsearch() is notrace

[patch V4 part 4 11/24] x86/mce: Use untraced rd/wrmsr in the MCE offline/crash check

mce_check_crashing_cpu() is called right at the entry of the MCE handler. It uses mce_rdmsr() and mce_wrmsr() which are wrappers around rdmsr() and wrmsr() to handle the MCE error injection mechanism, which is pointless in this context, i.e. when the MCE hits an offline CPU or the system is

[patch V4 part 4 22/24] x86/mce: Address objtools noinstr complaints

Mark the relevant functions noinstr, use the plain non-instrumented MSR accessors. The only odd part is the instr_begin()/end() pair around the indirect machine_check_vector() call as objtool can't figure that out. The possible invoked functions are annotated correctly. Signed-off-by: Thomas

[PATCH] leds: lm355x: avoid enum conversion warning

clang points out that doing arithmetic between diffent enums is usually a mistake: drivers/leds/leds-lm355x.c:167:28: warning: bitwise operation between different enumeration types ('enum lm355x_tx2' and 'enum lm355x_ntc') [-Wenum-enum-conversion] reg_val = pdata->pin_tx2 |

[patch V4 part 4 09/24] x86/mce: Move nmi_enter/exit() into the entry point

There is no reason to have nmi_enter/exit() in the actual MCE handlers. Move it to the entry point. This also covers the until now uncovered initial handler which only prints. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/cpu/mce/core.c| 26 +-

[patch V4 part 4 06/24] x86/entry: Convert INT3 exception to IDTENTRY_RAW

Convert #BP to IDTENTRY_RAW: - Implement the C entry point with DEFINE_IDTENTRY_RAW - Invoke idtentry_enter/exit() from the function body - Emit the ASM stub with DECLARE_IDTENTRY_RAW - Remove the ASM idtentry in 64bit - Remove the open coded ASM entry code in 32bit - Fixup the XEN/PV

[patch V4 part 4 03/24] lib/bsearch: Provide __always_inline variant

From: Peter Zijlstra For code that needs the ultimate performance (it can inline the @cmp function too) or simply needs to avoid calling external functions for whatever reason, provide an __always_inline variant of bsearch(). Signed-off-by: Peter Zijlstra (Intel) Signed-off-by: Thomas Gleixner

[patch V4 part 4 05/24] x86/entry: Provide IDTENTRY_RAW

Some exception handlers need to do extra work before any of the entry helpers are invoked. Provide IDTENTRY_RAW for this. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/idtentry.h | 31 +++ 1 file changed, 31 insertions(+) ---

[patch V4 part 4 02/24] x86/int3: Avoid atomic instrumentation

From: Peter Zijlstra Use arch_atomic_*() and READ_ONCE_NOCHECK() to ensure nothing untoward creeps in and ruins things. That is; this is the INT3 text poke handler, strictly limit the code that runs in it, lest it inadvertenly hits yet another INT3. Reported-by: Thomas Gleixner Signed-off-by:

[patch V4 part 5 08/31] x86/entry: Switch page fault exception to IDTENTRY_RAW

Convert page fault exceptions to IDTENTRY_RAW: - Implement the C entry point with DEFINE_IDTENTRY_RAW - Add the CR2 read into the exception handler - Add the idtentry_enter/exit_cond_rcu() invocations in in the regular page fault handler and use the regular idtentry_enter/exit() for

[patch V4 part 5 06/31] x86/entry/64: Simplify idtentry_body

All C functions which do not have an error code have been converted to the new IDTENTRY interface which does not expect an error code in the arguments. Spare the XORL. Signed-off-by: Thomas Gleixner --- arch/x86/entry/entry_64.S |2 -- 1 file changed, 2 deletions(-) ---

[patch V4 part 5 09/31] x86/entry: Remove the transition leftovers

Now that all exceptions are converted over the sane flag is not longer needed. Also the vector argument of idtentry_body on 64 bit is pointless now. Signed-off-by: Thomas Gleixner --- arch/x86/entry/entry_32.S |3 +-- arch/x86/entry/entry_64.S | 26 --

[patch V4 part 5 05/31] x86/entry: Switch XEN/PV hypercall entry to IDTENTRY

Convert the XEN/PV hypercall to IDTENTRY: - Emit the ASM stub with DECLARE_IDTENTRY - Remove the ASM idtentry in 64bit - Remove the open coded ASM entry code in 32bit - Remove the old prototypes The handler stubs need to stay in ASM code as it needs corner case handling and adjustment of

[patch V4 part 4 24/24] x86/entry: Convert double fault exception to IDTENTRY_DF

Convert #DF to IDTENTRY_DF - Implement the C entry point with DEFINE_IDTENTRY_DF - Emit the ASM stub with DECLARE_IDTENTRY_DF on 64bit - Remove the ASM idtentry in 64bit - Adjust the 32bit shim code - Fixup the XEN/PV code - Remove the old prototyoes No functional change.

[patch V4 part 5 03/31] x86/entry/64: Move softirq stack switch to C

Use the new C code helpers to move do_softirq_own_stack() out of ASM code. Mark the switching function noinstr as this is really not a good place for being instrumented. Signed-off-by: Thomas Gleixner --- arch/x86/entry/entry_64.S | 13 - arch/x86/kernel/irq_64.c | 12

[patch V4 part 5 13/31] x86/irq: Convey vector as argument and not in ptregs

Device interrupts which go through do_IRQ() or the spurious interrupt handler have their separate entry code on 64 bit for no good reason. Both 32 and 64 bit transport the vector number through ORIG_[RE]AX in pt_regs. Further the vector number is forced to fit into an u8 and is complemented and

Re: [RFC PATCH] ima: verify mprotect change is consistent with mmap policy

Hi Jann, On Tue, 2020-05-05 at 02:15 +0200, Jann Horn wrote: > On Mon, May 4, 2020 at 11:18 PM Mimi Zohar wrote: > > Files can be mmap'ed read/write and later changed to execute to circumvent > > IMA's mmap appraise policy rules. Due to locking issues (mmap semaphore > > would be taken prior to

[patch V4 part 5 15/31] x86/entry: Add IRQENTRY_IRQ macro

Provide a seperate IDTENTRY macro for device interrupts. Similar to IDTENTRY_ERRORCODE with the addition of invoking irq_enter/exit_rcu() and providing the errorcode as a 'u8' argument to the C function, which truncates the sign extended vector number. Signed-off-by: Thomas Gleixner ---

[patch V4 part 5 31/31] x86/entry: Remove the TRACE_IRQS cruft

No more users. Signed-off-by: Thomas Gleixner --- arch/x86/entry/entry_64.S | 13 - arch/x86/entry/thunk_64.S |9 + arch/x86/include/asm/irqflags.h | 10 -- 3 files changed, 1 insertion(+), 31 deletions(-) --- a/arch/x86/entry/entry_64.S +++

[patch V4 part 5 27/31] x86/entry: Make enter_from_user_mode() static

The ASM users are gone. All callers are local. Signed-off-by: Thomas Gleixner --- arch/x86/entry/common.c |2 +- 1 file changed, 1 insertion(+), 1 deletion(-) --- a/arch/x86/entry/common.c +++ b/arch/x86/entry/common.c @@ -54,7 +54,7 @@ * 2) Invoke context tracking if enabled to

[patch V4 part 5 24/31] x86/entry: Convert reschedule interrupt to IDTENTRY_RAW

The scheduler IPI does not need the full interrupt entry handling logic when the entry is from kernel mode. Even if tracing is enabled the only requirement is that RCU is watching and preempt_count has the hardirq bit on. The NOHZ tick state does not have to be adjusted. If the tick is not

Re: [PATCH] kcsan: fix section mismatch for __write_once_size/blacklisted_initcalls

On Tue, 5 May 2020 at 16:11, Arnd Bergmann wrote: > > Moving __write_once_size out of line causes a section mismatch warning > with clang in one instance: > > WARNING: modpost: vmlinux.o(.text+0x8dc): Section mismatch in reference from > the function __write_once_size() to the variable >

[patch V4 part 5 25/31] x86/entry: Remove the apic/BUILD interrupt leftovers

Remove all the code which was there to emit the system vector stubs. All users are gone. Move the now unused GET_CR2_INTO macro muck to head_64.S where the last user is. Fixup the eye hurting comment there while at it. Signed-off-by: Thomas Gleixner --- arch/x86/entry/calling.h | 20

[patch V4 part 5 21/31] x86/entry: Convert KVM vectors to IDTENTRY_SYSVEC

From: Thomas Gleixner Convert KVM specific system vectors to IDTENTRY_SYSVEC - Implement the C entry point with DEFINE_IDTENTRY_SYSVEC - Emit the ASM stub with DECLARE_IDTENTRY_SYSVEC - Remove the ASM idtentries in 64bit - Remove the BUILD_INTERRUPT entries in 32bit - Remove the old

[patch V4 part 5 26/31] x86/entry/64: Remove IRQ stack switching ASM

Signed-off-by: Thomas Gleixner --- arch/x86/entry/entry_64.S | 96 -- 1 file changed, 96 deletions(-) --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -371,102 +371,6 @@ SYM_CODE_END(ret_from_fork) #endif .endm -/* - * Enters

[patch V4 part 5 23/31] x86/entry: Convert XEN hypercall vector to IDTENTRY_SYSVEC

From: Thomas Gleixner Convert the last oldstyle defined vector to IDTENTRY_SYSVEC - Implement the C entry point with DEFINE_IDTENTRY_SYSVEC - Emit the ASM stub with DECLARE_IDTENTRY_SYSVEC - Remove the ASM idtentries in 64bit - Remove the BUILD_INTERRUPT entries in 32bit - Remove the

[patch V4 part 5 28/31] x86/entry/32: Remove redundant irq disable code

From: Thomas Gleixner All exceptions/interrupts return with interrupts disabled now. No point in doing this in ASM again. Signed-off-by: Thomas Gleixner --- arch/x86/entry/entry_32.S | 76 -- 1 file changed, 76 deletions(-) ---

[patch V4 part 5 30/31] x86/entry: Move paranoid irq tracing out of ASM code

Signed-off-by: Thomas Gleixner --- arch/x86/entry/entry_64.S | 13 - arch/x86/kernel/nmi.c | 11 +++ 2 files changed, 7 insertions(+), 17 deletions(-) --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -16,7 +16,6 @@ * * Some macro usage: * -

[patch V4 part 5 12/31] x86/entry/32: Remove common_exception

No more users. Signed-off-by: Thomas Gleixner --- arch/x86/entry/entry_32.S | 21 - 1 file changed, 21 deletions(-) --- a/arch/x86/entry/entry_32.S +++ b/arch/x86/entry/entry_32.S @@ -1394,27 +1394,6 @@ BUILD_INTERRUPT3(hv_stimer0_callback_vec #endif /* CONFIG_HYPERV

[patch V4 part 5 02/31] x86/entry: Provide helpers for execute on irqstack

Device interrupt handlers and system vector handlers are executed on the interrupt stack. The stack switch happens in the low level assembly entry code. This conflicts with the efforts to consolidate the exit code in C to ensure correctness vs. RCU and tracing. As there is no way to move #DB away

[patch V4 part 5 18/31] x86/entry: Convert APIC interrupts to IDTENTRY_SYSVEC

Convert APIC interrupts to IDTENTRY_SYSVEC - Implement the C entry point with DEFINE_IDTENTRY_SYSVEC - Emit the ASM stub with DECLARE_IDTENTRY_SYSVEC - Remove the ASM idtentries in 64bit - Remove the BUILD_INTERRUPT entries in 32bit - Remove the old prototypes No functional change.

[patch V4 part 5 29/31] x86/entry/64: Remove TRACE_IRQS_*_DEBUG

From: Peter Zijlstra Since INT3/#BP no longer runs on an IST, this workaround is no longer required. Tested by running lockdep+ftrace as described in the initial commit: 5963e317b1e9 ("ftrace/x86: Do not change stacks in DEBUG when calling lockdep") Signed-off-by: Peter Zijlstra (Intel)

[patch V4 part 5 14/31] x86/irq/64: Provide handle_irq()

To consolidate the interrupt entry/exit code vs. the other exceptions provide handle_irq() (similar to 32bit) to move the interrupt stack switching to C code. That allows to consolidate the entry exit handling by reusing the idtentry machinery both in ASM and C. Signed-off-by: Thomas Gleixner

[patch V4 part 5 16/31] x86/entry: Use idtentry for interrupts

Replace the extra interrupt handling code and reuse the existing idtentry machinery. This moves the irq stack switching on 64 bit from ASM to C code; 32bit already does the stack switching in C. Signed-off-by: Thomas Gleixner --- arch/x86/entry/entry_32.S | 31

[patch V4 part 5 19/31] x86/entry: Convert SMP system vectors to IDTENTRY_SYSVEC

From: Thomas Gleixner Convert SMP system vectors to IDTENTRY_SYSVEC - Implement the C entry point with DEFINE_IDTENTRY_SYSVEC - Emit the ASM stub with DECLARE_IDTENTRY_SYSVEC - Remove the ASM idtentries in 64bit - Remove the BUILD_INTERRUPT entries in 32bit - Remove the old prototypes

[patch V4 part 5 17/31] x86/entry: Provide IDTENTRY_SYSVEC

Provide a IDTENTRY variant for system vectors to consolidate the different mechanisms to emit the ASM stubs for 32 an 64 bit. On 64bit this also moves the stack switching from ASM to C code. 32bit will excute the system vectors w/o stack switching as before. As some of the system vector handlers

Re: [PATCH] amdgpu: fix integer overflow on 32-bit architectures

Am 05.05.20 um 16:15 schrieb Arnd Bergmann: Multiplying 10 by four overruns a 'long' variable, as clang points out: drivers/gpu/drm/amd/amdgpu/amdgpu_device.c:4160:53: error: overflow in expression; result is -294967296 with type 'long' [-Werror,-Winteger-overflow]

[patch V4 part 5 20/31] x86/entry: Convert various system vectors

From: Thomas Gleixner Convert various system vectors to IDTENTRY_SYSVEC - Implement the C entry point with DEFINE_IDTENTRY_SYSVEC - Emit the ASM stub with DECLARE_IDTENTRY_SYSVEC - Remove the ASM idtentries in 64bit - Remove the BUILD_INTERRUPT entries in 32bit - Remove the old

[patch V4 part 4 19/24] x86/entry: Implement user mode C entry points for #DB and #MCE

The MCE entry point uses the same mechanism as the IST entry point for now. For #DB split the inner workings and just keep the ist_enter/exit magic in the IST variant. Fixup the ASM code to emit the proper noist_##cfunc call. Signed-off-by: Thomas Gleixner --- arch/x86/entry/entry_64.S |

[patch V4 part 5 11/31] x86/entry/64: Remove error_exit

No more users. Signed-off-by: Thomas Gleixner --- arch/x86/entry/entry_64.S |9 - 1 file changed, 9 deletions(-) --- a/arch/x86/entry/entry_64.S +++ b/arch/x86/entry/entry_64.S @@ -1319,15 +1319,6 @@ SYM_CODE_START_LOCAL(error_entry) jmp

[patch V4 part 4 21/24] x86/traps: Address objtool noinstr complaints in #DB

The functions invoked from handle_debug() can be instrumented. Tell objtool about it. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/traps.c | 14 ++ 1 file changed, 10 insertions(+), 4 deletions(-) --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c @@ -762,14

[patch V4 part 4 23/24] x86/entry: Provide IDTENTRY_DF

Provide a separate macro for #DF as this needs to emit paranoid only code and has also a special ASM stub in 32bit. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/idtentry.h | 99 1 file changed, 99 insertions(+) ---

[patch V4 part 5 22/31] x86/entry: Convert various hypervisor vectors to IDTENTRY_SYSVEC

From: Thomas Gleixner Convert various hypervisor vectors to IDTENTRY_SYSVEC - Implement the C entry point with DEFINE_IDTENTRY_SYSVEC - Emit the ASM stub with DECLARE_IDTENTRY_SYSVEC - Remove the ASM idtentries in 64bit - Remove the BUILD_INTERRUPT entries in 32bit - Remove the old

[patch V4 part 5 01/31] genirq: Provide irq_enter/exit_rcu()

irq_enter()/exit() include the RCU handling. To properly separate the RCU handling provide variants which contain only the non-RCU related functionality. Signed-off-by: Thomas Gleixner --- include/linux/hardirq.h | 13 +++-- kernel/softirq.c| 35

[patch V4 part 5 10/31] x86/entry: Change exit path of xen_failsafe_callback

xen_failsafe_callback is invoked from XEN for two cases: 1. Fault while reloading DS, ES, FS or GS 2. Fault while executing IRET #1 retries the IRET after XEN has fixed up the segments. #2 injects a #GP which kills the task For #1 there is no reason to go through the full exception return

[patch V4 part 5 07/31] x86/entry: Provide idtentry_entry/exit_cond_rcu()

The pagefault handler cannot use the regular idtentry_enter() because on that invokes rcu_irq_enter() the pagefault was caused in the kernel. Not a problem per se, but kernel side page faults can schedule which is not possible without invoking rcu_irq_exit(). Adding rcu_irq_exit() and a matching

[patch V4 part 5 04/31] x86/entry: Split idtentry_enter/exit()

Split the implementation of idtentry_enter/exit() out into inline functions so that variaants of idtentry_enter/exit() can be implemented without duplicating code. Signed-off-by: Thomas Gleixner --- arch/x86/entry/common.c | 37 + 1 file changed, 21

[patch V4 part 4 18/24] x86/entry: Provide IDTRENTRY_NOIST variants for #DB and #MC

Provide NOIST entry point macros which allows to implement NOIST variants of the C entry points. These are invoked when #DB or #MC enter from user space. This allows explicit handling of the difference between user mode and kernel mode entry later. Signed-off-by: Thomas Gleixner ---

[patch V4 part 3 28/29] x86/entry: Convert SIMD coprocessor error exception to IDTENTRY

From: Thomas Gleixner Convert #XF to IDTENTRY_ERRORCODE: - Implement the C entry point with DEFINE_IDTENTRY - Emit the ASM stub with DECLARE_IDTENTRY - Handle INVD_BUG in C - Remove the ASM idtentry in 64bit - Remove the open coded ASM entry code in 32bit - Fixup the XEN/PV code -

[patch V4 part 4 07/24] x86/traps: Split int3 handler up

For code simplicity split up the int3 handler into a kernel and user part which makes the code flow simpler to understand. Signed-off-by: Peter Zijlstra (Intel) Signed-off-by: Thomas Gleixner --- arch/x86/kernel/traps.c | 67 +++- 1 file changed,

[patch V4 part 4 04/24] x86/int3: Inline bsearch()

From: Peter Zijlstra Avoid calling out to bsearch() by inlining it, for normal kernel configs this was the last external call and poke_int3_handler() is now fully self sufficient -- no calls to external code. Signed-off-by: Peter Zijlstra (Intel) Signed-off-by: Thomas Gleixner ---

[patch V4 part 4 08/24] x86/entry: Provide IDTENTRY_IST

Same as IDTENTRY but for exceptions which run on Interrupt STacks (IST) on 64bit. For 32bit this maps to IDTENTRY. There are 3 variants which will be used: IDTENTRY_MCE IDTENTRY_DB IDTENTRY_NMI These map to IDTENTRY_IST, but only the MCE and DB variants are emitting ASM code as

[patch V4 part 3 25/29] x86/entry: Convert Spurious interrupt bug exception to IDTENTRY

From: Thomas Gleixner Convert #SPURIOUS to IDTENTRY_ERRORCODE: - Implement the C entry point with DEFINE_IDTENTRY - Emit the ASM stub with DECLARE_IDTENTRY - Remove the ASM idtentry in 64bit - Remove the open coded ASM entry code in 32bit - Fixup the XEN/PV code - Remove the old

Re: [PATCH] KVM: x86: fix DR6 delivery for emulated hardware breakpoint

On Tue, May 05, 2020 at 07:34:49AM -0400, Paolo Bonzini wrote: > Go through kvm_queue_exception_p so that the payload is correctly delivered > through the exit qualification, and add a kvm_update_dr6 call to > kvm_deliver_exception_payload that is needed on AMD. > > Signed-off-by: Paolo Bonzini

[patch V4 part 4 14/24] x86/nmi: Protect NMI entry against instrumentation

Mark all functions in the fragile code parts noinstr or force inlining so they can't be instrumented. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/desc.h |8 arch/x86/kernel/cpu/common.c |6 ++ arch/x86/kernel/nmi.c| 10 ++ 3 files changed, 12

[patch V4 part 3 27/29] x86/entry: Convert Alignment check exception to IDTENTRY

From: Thomas Gleixner Convert #AC to IDTENTRY_ERRORCODE: - Implement the C entry point with DEFINE_IDTENTRY - Emit the ASM stub with DECLARE_IDTENTRY - Remove the ASM idtentry in 64bit - Remove the open coded ASM entry code in 32bit - Fixup the XEN/PV code - Remove the old prototyoes

[patch V4 part 3 18/29] x86/entry: Convert Device not available exception to IDTENTRY

From: Thomas Gleixner Convert #NM to IDTENTRY: - Implement the C entry point with DEFINE_IDTENTRY - Emit the ASM stub with DECLARE_IDTENTRY - Remove the ASM idtentry in 64bit - Remove the open coded ASM entry code in 32bit - Fixup the XEN/PV code - Remove the old prototyoes -

[patch V4 part 3 17/29] x86/entry: Convert Invalid Opcode exception to IDTENTRY

From: Thomas Gleixner Convert #UD to IDTENTRY: - Implement the C entry point with DEFINE_IDTENTRY - Emit the ASM stub with DECLARE_IDTENTRY - Remove the ASM idtentry in 64bit - Remove the open coded ASM entry code in 32bit - Fixup the XEN/PV code - Fixup the FOOF bug call in fault.c

[patch V4 part 3 29/29] x86/entry/32: Convert IRET exception to IDTENTRY_SW

From: Thomas Gleixner Convert the IRET exception handler to IDTENTRY_SW. This is slightly different than the conversions of hardware exceptions as the IRET exception is invoked via an exception table when IRET faults. So it just uses the IDTENTRY_SW mechanism for consistency. It does not emit

[patch V4 part 3 14/29] x86/entry: Convert Divide Error to IDTENTRY

From: Thomas Gleixner Convert #DE to IDTENTRY: - Implement the C entry point with DEFINE_IDTENTRY - Emit the ASM stub with DECLARE_IDTENTRY - Remove the ASM idtentry in 64bit - Remove the open coded ASM entry code in 32bit - Fixup the XEN/PV code No functional change. Signed-off-by:

[patch V4 part 4 15/24] x86/db: Split out dr6/7 handling

From: Peter Zijlstra DR6/7 should be handled before nmi_enter() is invoked and restore after nmi_exit() to minimize the exposure. Split it out into helper inlines and bring it into the correct order. Signed-off-by: Peter Zijlstra Signed-off-by: Thomas Gleixner ---

Re: [PATCH] kcsan: Add test suite

On Tue, May 05, 2020 at 03:01:45PM +0200, Marco Elver wrote: > On Tue, 5 May 2020 at 07:00, David Gow wrote: > > > > On Mon, Apr 27, 2020 at 11:23 PM 'Marco Elver' via kasan-dev > > wrote: > > > > > > On Mon, 27 Apr 2020 at 16:35, Marco Elver wrote: > > > > > > > > This adds KCSAN test focusing

Re: [PATCH v2] fs: jfs: fix a possible data race in metapage_writepage()

> This data race is found by our concurrency fuzzer. * How do you think about to replace the word “is” by “was”? * Is this analysis tool publicly available? … > --- > fs/jfs/jfs_metapage.c | 11 +-- I suggest to omit the triple dashes before this information. Regards, Markus

[patch V4 part 3 26/29] x86/entry: Convert Coprocessor error exception to IDTENTRY

From: Thomas Gleixner Convert #MF to IDTENTRY_ERRORCODE: - Implement the C entry point with DEFINE_IDTENTRY - Emit the ASM stub with DECLARE_IDTENTRY - Remove the ASM idtentry in 64bit - Remove the open coded ASM entry code in 32bit - Fixup the XEN/PV code - Remove the old prototyoes

[patch V4 part 4 00/24] x86/entry: Entry/exception code rework, nasty exceptions

Folks, This is the forth part of the rework series. Part 3 can be found here: https://lore.kernel.org/r/20200505134354.774943...@linutronix.de The series has a total of 138 patches and is split into 5 parts. The base for this 4th series is:

[PATCH] usb: dwc3: select USB_ROLE_SWITCH

Calling into the role switch API requires that these functions are loaded, if they are in a loadable module and dwc3 itself is built-in, this produces a link error: drivers/usb/dwc3/drd.o: In function `dwc3_usb_role_switch_get': drd.c:(.text+0x26): undefined reference to

[patch V4 part 3 03/29] x86/entry: Disable interrupts for native_load_gs_index() in C code

There is absolutely no point in doing this in ASM code. Move it to C. Signed-off-by: Thomas Gleixner --- arch/x86/entry/entry_64.S| 19 +++ arch/x86/include/asm/special_insns.h | 14 -- 2 files changed, 19 insertions(+), 14 deletions(-) ---

[patch V4 part 3 07/29] x86/entry: Distangle idtentry

From: Thomas Gleixner idtentry is a completely unreadable maze. Split it into distinct idtentry variants which only contain the minimal code: - idtentry for regular exceptions - idtentry_mce_debug for #MCE and #DB - idtentry_df for #DF The generated binary code is equivalent.

[patch V4 part 2 11/18] x86/entry/64: Mark ___preempt_schedule_notrace() thunk noinstr

Code calling this from noinstr sections, e.g. entry code, has interrupts disabled, so the actual call into the scheduler code does not happen. The objtool section check complains nevertheless, so mark the call "safe". Signed-off-by: Thomas Gleixner --- arch/x86/entry/thunk_64.S | 18

[patch V4 part 2 16/18] context_tracking: Make guest_enter/exit() .noinstr ready

Force inlining of the helpers and mark the instrumentable parts accordingly. Signed-off-by: Thomas Gleixner Cc: Paolo Bonzini --- include/linux/context_tracking.h | 21 - 1 file changed, 16 insertions(+), 5 deletions(-) --- a/include/linux/context_tracking.h +++

[patch V4 part 3 02/29] x86/traps: Mark sync_regs() noinstr

Replace the notrace and NOKPROBE annotations with noinstr. Signed-off-by: Thomas Gleixner --- arch/x86/kernel/traps.c |3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) --- a/arch/x86/kernel/traps.c +++ b/arch/x86/kernel/traps.c @@ -639,14 +639,13 @@ NOKPROBE_SYMBOL(do_int3); * to

[patch V4 part 2 18/18] x86/kvm/svm: Move guest enter/exit into .noinstr.text

Move the functions which are inside the RCU off region into the non-instrumentable text section. Signed-off-by: Thomas Gleixner Cc: Paolo Bonzini Cc: Sean Christopherson --- arch/x86/kvm/svm/svm.c | 102 - arch/x86/kvm/svm/vmenter.S |2 2

[patch V4 part 3 00/29] x86/entry: Entry/exception code rework, simple exceptions

Folks, This is the third part of the rework series. Part 2 can be found here: https://lore.kernel.org/r/20200505134112.272268...@linutronix.de The series has a total of 138 patches and is split into 5 parts. The base for this 3rd series is:

[patch V4 part 2 14/18] x86/kvm/vmx: Add hardirq tracing to guest enter/exit

Add hardirq tracing to guest enter/exit functions in the same way as it is done in the user mode enter/exit code. Signed-off-by: Thomas Gleixner Cc: Paolo Bonzini Cc: Sean Christopherson --- arch/x86/kvm/vmx/vmx.c | 25 +++-- 1 file changed, 23 insertions(+), 2

[patch V4 part 3 12/29] x86/entry/common: Provide idtentry_enter/exit()

Provide functions which handle the low level entry and exit similiar to enter/exit from user mode. Signed-off-by: Thomas Gleixner --- arch/x86/entry/common.c | 89 arch/x86/include/asm/idtentry.h |3 + 2 files changed, 92 insertions(+) ---

[patch V4 part 3 04/29] x86/traps: Make interrupt enable/disable symmetric in C code

Traps enable interrupts conditionally but rely on the ASM return code to disable them again. That results in redundant interrupt disable and trace calls. Make the trap handlers disable interrupts before returning to avoid that, which allows simplification of the ASM entry code. Originally-by:

[patch V4 part 2 09/18] x86/speculation/mds: Mark mds_user_clear_cpu_buffers() __always_inline

Prevent the compiler from uninlining and creating traceable/probable functions as this is invoked _after_ context tracking switched to CONTEXT_USER and rcu idle. Signed-off-by: Thomas Gleixner --- arch/x86/include/asm/nospec-branch.h |4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)

[patch V4 part 3 06/29] x86/entry/64: Reorder idtentries

From: Thomas Gleixner Move them all together so verifying the cleanup patches for binary equivalence will be easier. Signed-off-by: Thomas Gleixner Reviewed-by: Alexandre Chartre Acked-by: Andy Lutomirski --- arch/x86/entry/entry_64.S | 36 +--- 1 file

[patch V4 part 2 17/18] x86/kvm/vmx: Move guest enter/exit into .noinstr.text

Move the functions which are inside the RCU off region into the non-instrumentable text section. Signed-off-by: Thomas Gleixner Cc: Paolo Bonzini Cc: Sean Christopherson --- arch/x86/include/asm/hardirq.h |4 - arch/x86/include/asm/kvm_host.h |8 +++ arch/x86/kvm/vmx/ops.h |

[patch V4 part 2 15/18] x86/kvm/svm: Handle hardirqs proper on guest enter/exit

Add hardirq tracing to guest enter/exit functions in the same way as it is done in the user mode enter/exit code. Signed-off-by: Thomas Gleixner Cc: Paolo Bonzini Cc: Sean Christopherson --- arch/x86/kvm/svm/svm.c | 30 +- 1 file changed, 25 insertions(+), 5

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