On Mon, May 11, 2020 at 10:38:04AM -0500, Rob Herring wrote:
> On Fri, 8 May 2020 02:07:03 +0300, Serge Semin wrote:
> > There is a single register provided by the SoC system controller,
> > which can be used to tune the L2-cache RAM up. It only provides a way
> > to change the L2-RAM access
On Mon, 2020-05-11 at 12:33 -0700, Linus Torvalds wrote:
> I wonder if you could just have three different file descriptors:
>
> - the "current token file descriptor"
> - a /dev/null file descriptor
> - the jobserver pipe file descriptor. This is left blocking.
If I'm understanding your
PMCG node can have zero ID mapping if its overflow interrupt
is wire based. The code to parse PMCG node can not assume it will
have a single ID mapping.
Signed-off-by: Tuan Phan
---
drivers/acpi/arm64/iort.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git
On 5/7/20 8:07 PM, Anshuman Khandual wrote:
> There are multiple similar definitions for arch_clear_hugepage_flags() on
> various platforms. Lets just add it's generic fallback definition for
> platforms that do not override. This help reduce code duplication.
>
> Cc: Russell King
> Cc: Catalin
From: Bhupesh Sharma
Date: Mon, 11 May 2020 15:41:40 +0530
...
> Since kdump kernel(s) run under severe memory constraint with the
> basic idea being to save the crashdump vmcore reliably when the primary
> kernel panics/hangs, large memory allocations done by a network driver
> can cause the
From: Luo bin
Date: Mon, 11 May 2020 05:58:57 +
> add set_link_ksettings implementation and improve the implementation
> of get_link_ksettings
>
> Signed-off-by: Luo bin
Applied, thank you.
On May 11, 2020 4:56:43 PM GMT-03:00, "Gustavo A. R. Silva"
wrote:
>The current codebase makes use of the zero-length array language
>extension to the C90 standard, but the preferred mechanism to declare
>variable-length types such as these ones is a flexible array
>member[1][2],
>introduced
As described in the previous patch, the signal return fast path directly
restores user states from the user buffer. Once that succeeds, restore
supervisor states (but only when they are not yet restored).
For the slow path, save supervisor states to preserve them across context
switches, and
On Mon, 11 May 2020 08:07:51 +0200
Sven Schnelle wrote:
> Thanks for noticing, looks like i missed them.
>
> Acked-by: Sven Schnelle
As this is s390 specific, will it be going through the s390 repo?
-- Steve
On Mon, May 11, 2020 at 12:34 PM Brian Gerst wrote:
>
> On Mon, May 11, 2020 at 2:46 PM Nick Desaulniers
> wrote:
> >
> > On Mon, May 11, 2020 at 11:09 AM Brian Gerst wrote:
> > > This looks like the same issue that we just discussed for bitops.h.
> > > Add the "b" operand size modifier to
The signal return code is responsible for taking an XSAVE buffer present
in user memory and loading it into the hardware registers. This
operation only affects user XSAVE state and never affects supervisor state.
The fast path through this code simply points XRSTOR directly at the
user buffer.
Hello again,
On Mon, May 11, 2020 at 09:59:31PM +0200, Uwe Kleine-König wrote:
> On 5/9/20 3:58 AM, Lu Baolu wrote:
> > Hi Uwe,
> >
> > Have you tried commenting out intel_disable_iommus() in
> > intel_iommu_shutdowan()?
> >
> > diff --git a/drivers/iommu/intel-iommu.c
Ashok,
"Raj, Ashok" writes:
> On Fri, May 08, 2020 at 06:49:15PM +0200, Thomas Gleixner wrote:
>> "Raj, Ashok" writes:
>> > With legacy MSI we can have these races and kernel is trying to do the
>> > song and dance, but we see this happening even when IR is turned on.
>> > Which is perplexing.
On Mon, 11 May 2020 19:10:08 +0530 Charan Teja Reddy
wrote:
> Updating the zone watermarks by any means, like extra_free_kbytes,
> min_free_kbytes, water_mark_scale_factor e.t.c, when watermark_boost is
> set will result into the higher low and high watermarks than the user
> asks. This can be
The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to declare
variable-length types such as these ones is a flexible array member[1][2],
introduced in C99:
struct foo {
int stuff;
struct boo array[];
};
By
On Tue, Apr 28, 2020 at 05:16:33PM +0200, Joerg Roedel wrote:
> @@ -63,3 +175,45 @@ void __init do_vc_no_ghcb(struct pt_regs *regs, unsigned
> long exit_code)
> while (true)
> asm volatile("hlt\n");
> }
> +
> +static enum es_result vc_insn_string_read(struct es_em_ctxt *ctxt,
On 5/11/20 4:20 AM, Samuel Zou wrote:
Fix the following sparse warning:
drivers/staging/media/tegra-video/tegra210.c:589:33: warning: symbol
'tegra210_video_formats' was not declared.
The tegra210_video_formats has only call site within tegra210.c
It should be static
Fixes: 423d10a99b30
On Fri, May 08, 2020 at 02:12:42PM +0300, Andy Shevchenko wrote:
> On Fri, May 08, 2020 at 01:53:00PM +0300, Serge Semin wrote:
> > This array property is used to indicate the maximum burst transaction
> > length supported by each DMA channel.
>
> > + snps,max-burst-len:
> > +$ref:
The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to declare
variable-length types such as these ones is a flexible array member[1][2],
introduced in C99:
struct foo {
int stuff;
struct boo array[];
};
By
On Mon, 2020-05-11 at 13:01 -0700, Linus Torvalds wrote:
> On Mon, May 11, 2020 at 12:52 PM Nick Desaulniers
> wrote:
> >
> > Interesting approach. Researching __builtin_choose_expr, it looks
> > like it was cited as prior art for C11's _Generic keyword.
>
> Well, the thing that made me think
On Mon, May 11, 2020 at 06:24:55PM +, Luis Chamberlain wrote:
> On Sat, May 09, 2020 at 09:57:37AM -0400, Rafael Aquini wrote:
> > +Trigger Kdump on add_taint()
> > +
> > +
> > +The kernel parameter, panic_on_taint, calls panic() from within
> > add_taint(),
> >
Hi Arnd,
On 11/05/2020 15:43, Arnd Bergmann wrote:
On Mon, May 11, 2020 at 1:11 PM Grygorii Strashko
wrote:
Hi Arnd,
On 09/05/2020 01:17, Arnd Bergmann wrote:
On Fri, May 8, 2020 at 12:01 PM Grygorii Strashko
wrote:
+static int __init k3_chipinfo_init(void)
+{
+ struct
On 5/9/20 3:58 AM, Lu Baolu wrote:
> Hi Uwe,
>
> Have you tried commenting out intel_disable_iommus() in
> intel_iommu_shutdowan()?
>
> diff --git a/drivers/iommu/intel-iommu.c b/drivers/iommu/intel-iommu.c
> index 0182cff2c7ac..532e62600f95 100644
> --- a/drivers/iommu/intel-iommu.c
> +++
syzbot has bisected this bug to:
commit 0cb7498f234e4e7d75187a8cae6c7c2053f2488a
Author: Ahmed Abdelsalam
Date: Mon May 4 14:42:11 2020 +
seg6: fix SRH processing to comply with RFC8754
bisection log: https://syzkaller.appspot.com/x/bisect.txt?x=1154da8410
start commit:
On Mon, May 11, 2020 at 12:52 PM Nick Desaulniers
wrote:
>
> Interesting approach. Researching __builtin_choose_expr, it looks
> like it was cited as prior art for C11's _Generic keyword.
Well, the thing that made me think that __builtin_choose_expr() would
work is that unlike the switch
Hello Lenny,
On 5/11/20 3:43 PM, Lenny Szubowicz wrote:
> I suspect that you have TPM 2.x functionality enabled in the BIOS/firmware.
Indeed.
> Unless you are actually using the TPM, try setting it to TPM 1.2 mode.
> I've seen an incompatiblity on other Lenovo laptops between using the
> IOMMU,
On 5/11/20 4:56 PM, Ardelean, Alexandru wrote:
On Mon, 2020-05-11 at 15:58 +0200, Lars-Peter Clausen wrote:
[External]
On 5/11/20 3:24 PM, Ardelean, Alexandru wrote:
On Mon, 2020-05-11 at 13:03 +, Ardelean, Alexandru wrote:
[External]
On Mon, 2020-05-11 at 12:37 +0200, Lars-Peter
This describes the bindings for a controller that generates master and bit
clocks for the I2S interface.
Signed-off-by: Lubomir Rintel
---
.../clock/marvell,mmp2-audio-clock.yaml | 73 +++
.../dt-bindings/clock/marvell,mmp2-audio.h| 8 ++
2 files changed, 81
This is a driver for a block that generates master and bit clocks for
the I2S interface. It's separate from the PMUs that generate clocks for
the peripherals.
Signed-off-by: Lubomir Rintel
---
drivers/clk/Kconfig | 6 +
drivers/clk/mmp/Makefile| 1 +
drivers/clk/mmp/clk-audio.c
On Mon, 2020-05-11 at 12:31 -0700, Elliot Berman wrote:
> On 5/11/2020 11:54 AM, Joe Perches wrote> Change-Id: probably isn't necessary.
>
> Thanks for the catch
>
> > Is there a separate mechanism possible to avoid bloating the
> > otherwise unused content?
>
> This struct is being used in
Hi,
please consider applying this patch set. It contains a driver for the
audio clock generator on Marvell MMP2 along with the DT bindings.
Currently the I2S driver (mmp2-sspa) doesn't have support for DT and is
not able to get clocks from this driver. The patch set to address that
will be sent
On Mon, May 11, 2020 at 07:32:05PM +, Christian Herber wrote:
> On May 11, 2020 4:33:53 PM Andrew Lunn wrote:
> >
> > Are the classes part of the Open Alliance specification? Ideally we
> > want to report something standardized, not something proprietary to
> > NXP.
> >
> >Andrew
>
>
On Mon, May 11, 2020 at 11:24 AM Linus Torvalds
wrote:
>
> On Mon, May 11, 2020 at 11:12 AM Linus Torvalds
> wrote:
> >
> > Would using "__builtin_choose_expr()" be able to avoid this whole issue?
>
> We actually have a fair amount of "pick expression based on size", so
> with a few helper
The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to declare
variable-length types such as these ones is a flexible array member[1][2],
introduced in C99:
struct foo {
int stuff;
struct boo array[];
};
By
On Mon, May 11, 2020 at 11:09:24AM -0500, Rob Herring wrote:
> On Sun, May 10, 2020 at 12:50:08PM +0300, Serge Semin wrote:
> > Modern device tree bindings are supposed to be created as YAML-files
> > in accordance with dt-schema. This commit replaces Synopsys DW I2C
> > legacy bare text bindings
On Mon, 11 May 2020, Al Cooper wrote:
> Add a new EHCI driver for Broadcom STB SoC's. A new EHCI driver
> was created instead of adding support to the existing ehci platform
> driver because of the code required to work around bugs in the EHCI
> controller. The primary workaround is for a bug
On Sun, 10 May 2020 17:59:27 +0800
Lai Jiangshan wrote:
> Hello
>
> I think adding a small number of instructions to preempt_schedule_irq()
> is sufficient to create the needed protected region between the start
> of a function and the trampoline body.
>
> preempt_schedule_irq() {
> + if
Hi,
On Sat, Apr 18, 2020 at 09:19:36PM +0100, Dmitry Safonov wrote:
> Currently, the log-level of show_stack() depends on a platform
> realization. It creates situations where the headers are printed with
> lower log level or higher than the stacktrace (depending on
> a platform or user).
>
>
ch.
applies cleanly on next-20200511
MAINTAINERS | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Acked-by: Sowjanya Komatineni
Hi Krzysztof,
On 2020-05-11 3:08 a.m., Krzysztof Kozlowski wrote:
> On Fri, May 08, 2020 at 06:34:33PM -0700, Jonathan Bakker wrote:
>> Some variants of the samsung tty driver can pick which clock
>> to use for their baud rate generation. In the DT conversion,
>> a default clock was selected to
Add the build system changes needed to get the Broadcom STB XHCI,
EHCI and OHCI functionality working. The OHCI support does not
require anything unique to Broadcom so the standard ohci-platform
driver is being used. Also update MAINTAINERS.
Signed-off-by: Al Cooper
Reviewed-by: Florian Fainelli
Add a new EHCI driver for Broadcom STB SoC's. A new EHCI driver
was created instead of adding support to the existing ehci platform
driver because of the code required to work around bugs in the EHCI
controller. The primary workaround is for a bug where the Core
violates the SOF interval between
Add support for Broadcom STB SoC's to the xhci platform driver
Signed-off-by: Al Cooper
Acked-by: Mathias Nyman
Reviewed-by: Florian Fainelli
---
drivers/usb/host/xhci-plat.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/drivers/usb/host/xhci-plat.c
v9 - Fix minor typos in patch description for ehci driver.
- In ehci-brcm.c, use ehci_err() instead of dev_err().
- In ehci-brcm.c, handle zero returned from platform_get_irq()
by returning -EINVAL for 0 or actual return value for < 0.
v8 - The previous v7 had the wrong version of
Some BRCMSTB USB chips have an XHCI, EHCI and OHCI controller
on the same port where XHCI handles 3.0 devices, EHCI handles 2.0
devices and OHCI handles <2.0 devices. Currently the Makefile
has XHCI linking at the bottom which will result in the XHIC driver
initalizing after the EHCI and OHCI
Quoting Sibi Sankar (2020-05-11 10:55:32)
> The modem remote processor has two access paths to DDR. One path is
> directly connected to DDR and another path goes through an SMMU. The
> SMMU path is configured to be a direct mapping because it's used by
> various peripherals in the modem subsystem.
Add DT bindings for Broadcom STB USB EHCI and XHCI drivers.
NOTE: The OHCI driver is not included because it uses the generic
platform driver.
Signed-off-by: Al Cooper
Reviewed-by: Rob Herring
Reviewed-by: Florian Fainelli
---
.../bindings/usb/brcm,bcm7445-ehci.yaml | 59
> On May 11, 2020, at 12:14 PM, Joerg Roedel wrote:
>
> On Mon, May 11, 2020 at 08:36:31AM -0700, Andy Lutomirski wrote:
>> What if we make 32-bit PTI depend on PAE?
>
> It already does, PTI support for legacy paging had to be removed because
> there were memory corruption problems with THP.
On Thu, May 07, 2020 at 03:06:04PM -0700, Ian Rogers wrote:
> When the event is passed as list, the default events should be listed as
> per 'perf mem record -e list'. Previous behavior is:
>
> $ perf c2c record -e list
> failed: event 'list' not found, use '-e list' to get list of available
On Mon, May 11, 2020 at 2:46 PM Nick Desaulniers
wrote:
>
> On Mon, May 11, 2020 at 11:09 AM Brian Gerst wrote:
> > This looks like the same issue that we just discussed for bitops.h.
> > Add the "b" operand size modifier to force it to use the 8-bit
> > register names (and probably also needs
On Mon, May 11, 2020 at 10:59 AM Paul Smith wrote:
>
> As with all single-threaded applications, though, the problem is the
> difficulty (in a portable way) of handling both signals and wait*(2)
> reliably...
I do wonder if GNU make isn't making it worse for itself by blocking SIGCHLD.
I wonder
On Mon, May 11, 2020 at 04:58:53PM +0300, Andy Shevchenko wrote:
> On Mon, May 11, 2020 at 4:48 PM Serge Semin
> wrote:
> >
> > On Mon, May 11, 2020 at 12:58:13PM +0100, Mark Brown wrote:
> > > On Mon, May 11, 2020 at 05:10:16AM +0300, Serge Semin wrote:
> > >
> > > > Alas linearizing the SPI
On 5/11/2020 11:54 AM, Joe Perches wrote> Change-Id: probably isn't necessary.
Thanks for the catch
>
> Is there a separate mechanism possible to avoid bloating the
> otherwise unused content?
This struct is being used in lib/dynamic_debug.c but compiler doesn't know
about this usage when
On May 11, 2020 4:33:53 PM Andrew Lunn wrote:
>
> Are the classes part of the Open Alliance specification? Ideally we
> want to report something standardized, not something proprietary to
> NXP.
>
>Andrew
Hi Andrew,
Such mechanisms are standardized and supported by pretty much all
On Mon 11 May 10:55 PDT 2020, Sibi Sankar wrote:
> The modem remote processor has two access paths to DDR. One path is
> directly connected to DDR and another path goes through an SMMU. The
> SMMU path is configured to be a direct mapping because it's used by
> various peripherals in the modem
ts/get_maintainer.pl --self-test=patterns complains:
warning: no file matches F: drivers/staging/media/tegra/
Adjust the file entry in TEGRA VIDEO DRIVER to the correct path.
Signed-off-by: Lukas Bulwahn
---
Sowjanya, please ack this minor patch.
applies cleanly on next-20200511
MAINTA
On Wed, Apr 22, 2020 at 03:22:39PM -0700, Prashant Malani wrote:
> Add properties for mode, orientation and USB data role switches for
> Type C connectors. When available, these will allow the Type C connector
> class port driver to configure the various switches according to USB PD
> information
On Tue 21 Apr 07:32 PDT 2020, Sibi Sankar wrote:
> Add TCSR node and update MSS node to support MSA based Modem boot on
> SC7180 SoCs.
>
Reviewed-by: Bjorn Andersson
> Signed-off-by: Sibi Sankar
> ---
>
> V2:
> * use memory-region to reference mba/mpss regions [Bjorn]
> * overload the
On Tue 21 Apr 07:32 PDT 2020, Sibi Sankar wrote:
> This patch adds Q6V5 MSS PAS remoteproc node for SC7180 SoCs.
>
Reviewed-by: Bjorn Andersson
> Signed-off-by: Sibi Sankar
> ---
> arch/arm64/boot/dts/qcom/sc7180.dtsi | 36
> 1 file changed, 36 insertions(+)
>
On Sat, May 02, 2020 at 04:26:49PM +0200, Wolfram Sang wrote:
> The 'pengutronix' address is defunct for years. Use the proper contact
> address.
>
> Signed-off-by: Wolfram Sang
Applied to for-current, thanks!
signature.asc
Description: PGP signature
On Thu, 7 May 2020 at 22:36, Phil Auld wrote:
>
> sched/fair: Fix enqueue_task_fair warning some more
>
> The recent patch, fe61468b2cb (sched/fair: Fix enqueue_task_fair warning)
> did not fully resolve the issues with the rq->tmp_alone_branch !=
> >leaf_cfs_rq_list warning in enqueue_task_fair.
For the I2S fractional clocks, there are more bits that need to be set
for the clock to run. Their actual meaning is unknown.
Signed-off-by: Lubomir Rintel
---
drivers/clk/mmp/clk-frac.c | 3 +++
drivers/clk/mmp/clk.h | 1 +
2 files changed, 4 insertions(+)
diff --git
This clocks the Audio block.
Signed-off-by: Lubomir Rintel
Acked-by: Rob Herring
---
Changes since v1:
- Rob's ack
include/dt-bindings/clock/marvell,mmp2.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/clock/marvell,mmp2.h
b/include/dt-bindings/clock/marvell,mmp2.h
A trivial change to keep the sorting sane. The APBC registers are happier
when they are grouped together, instead of mixed with the APMU ones.
Signed-off-by: Lubomir Rintel
---
drivers/clk/mmp/clk-of-mmp2.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git
This is a trivial rename for a routine that registers more clock sources
than the PLLs -- there's also a XO.
Signed-off-by: Lubomir Rintel
---
drivers/clk/mmp/clk-of-mmp2.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/clk/mmp/clk-of-mmp2.c
On MMP2 the audio and GPU blocks are on separate power islands. On MMP3
the camera block's power is also controlled separately.
Add the numbers that we could use to refer to the power domains for
respective power islands from the device tree.
Signed-off-by: Lubomir Rintel
Acked-by: Rob Herring
This clocks the Audio block.
Signed-off-by: Lubomir Rintel
---
drivers/clk/mmp/clk-of-mmp2.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/clk/mmp/clk-of-mmp2.c b/drivers/clk/mmp/clk-of-mmp2.c
index dcdff06a698a..c686c16fca82 100644
--- a/drivers/clk/mmp/clk-of-mmp2.c
+++
Apart from the clocks and resets, the PMU hardware also controls power
to peripherals that are on separate power islands. On MMP2, that's the
GC860 GPU and the SSPA audio interface, while on MMP3 also the camera
interface is on a separate island, along with the pair of GC2000 and GC300
GPUs and
A pair of fractional clock sources for PLLs and gates.
Signed-off-by: Lubomir Rintel
---
drivers/clk/mmp/clk-of-mmp2.c | 46 +++
1 file changed, 46 insertions(+)
diff --git a/drivers/clk/mmp/clk-of-mmp2.c b/drivers/clk/mmp/clk-of-mmp2.c
index
There are two of these on a MMP2.
Signed-off-by: Lubomir Rintel
Acked-by: Rob Herring
---
Changes since v1:
- Rob's ack
include/dt-bindings/clock/marvell,mmp2.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/dt-bindings/clock/marvell,mmp2.h
While calculating the output rate of a fractional divider clock, the
value is divided and multipled by 1, discarding the least
significant digits -- presumably to fit the intermediate value within 32
bits.
The precision we're losing is, however, not insignificant for things like
I2S clock.
Hi,
please consider applying this patch set for 5.8.
The goal is to add support for various clocks used by the GPUs and Audio
subsystem MMP2 and MMP3-based machines.
Probably the most significant part is that this adds support for runtime
PM domains which is managed by the same PMU hardware as
On 5/11/2020 8:07 AM, Bartosz Golaszewski wrote:
> From: Bartosz Golaszewski
>
> This adds the driver for the MediaTek Ethernet MAC used on the MT8* SoC
> family. For now we only support full-duplex.
>
> Signed-off-by: Bartosz Golaszewski
> ---
[snip]
> +static int
Hi,
This new patch series brings some improvements and add new tests:
Use smaller userspace structures (attributes) to save space, and check
at built time that every attribute don't contain hole and are 8-bits
aligned.
Allow enforcement of empty ruleset, which enables deny-all policies
(useful
enqueue_task_fair() jumps to enqueue_throttle when cfs_rq_of(se) is
throttled, which means that se can't be NULL and we can skip the test.
Signed-off-by: Vincent Guittot
---
kernel/sched/fair.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/sched/fair.c
Thanks to the Landlock objects and ruleset, it is possible to identify
inodes according to a process's domain. To enable an unprivileged
process to express a file hierarchy, it first needs to open a directory
(or a file) and pass this file descriptor to the kernel through
landlock(2). When
On Mon, 11 May 2020 at 17:13, Tao Zhou wrote:
>
> Hi Vincent,
>
> On Mon, May 11, 2020 at 10:36:43AM +0200, Vincent Guittot wrote:
> > Hi Tao,
> >
> > On Fri, 8 May 2020 at 18:58, Tao Zhou wrote:
> > >
> > > On Fri, May 08, 2020 at 05:27:44PM +0200, Vincent Guittot wrote:
> > > > On Fri, 8 May
Wire up the landlock() system call for all architectures.
Signed-off-by: Mickaël Salaün
Cc: Arnd Bergmann
Cc: James Morris
Cc: Jann Horn
Cc: Kees Cook
Cc: Serge E. Hallyn
---
Changes since v14:
* Add all architectures.
Changes since v13:
* New implementation.
---
A process credentials point to a Landlock domain, which is underneath
implemented with a ruleset. In the following commits, this domain is
used to check and enforce the ptrace and filesystem security policies.
A domain is inherited from a parent to its child the same way a thread
inherits a
Using ptrace(2) and related debug features on a target process can lead
to a privilege escalation. Indeed, ptrace(2) can be used by an attacker
to impersonate another task and to remain undetected while performing
malicious activities. Thanks to ptrace_may_access(), various part of
the kernel
This system call, inspired from seccomp(2) and bpf(2), is designed to be
used by unprivileged processes to sandbox themselves. It has the same
usage restrictions as seccomp(2): the caller must have the no_new_privs
attribute set or have CAP_SYS_ADMIN in the current user namespace.
Here are the
Test landlock syscall, ptrace hooks semantic and filesystem
access-control.
Test coverage for security/landlock/ is 93.6% of lines. The code not
covered only deals with internal kernel errors (e.g. memory allocation)
and race conditions.
Signed-off-by: Mickaël Salaün
Reviewed-by: Vincent
This documentation can be built with the Sphinx framework.
Signed-off-by: Mickaël Salaün
Reviewed-by: Vincent Dagonneau
Cc: James Morris
Cc: Jann Horn
Cc: Kees Cook
Cc: Serge E. Hallyn
---
Changes since v15:
* Add current limitations.
Changes since v14:
* Fix spelling (contributed by
Add a basic sandbox tool to launch a command which can only access a
whitelist of file hierarchies in a read-only or read-write way.
Signed-off-by: Mickaël Salaün
Cc: James Morris
Cc: Jann Horn
Cc: Kees Cook
Cc: Serge E. Hallyn
---
Changes since v16:
* Switch syscall attribute pointer and
On Sat, 9 May 2020 18:01:51 -0700
Shannon Nelson wrote:
> If the driver is able to detect that the device firmware has come back
> alive, through user intervention or whatever, should there be a way to
> "untaint" the kernel? Or would you expect it to remain tainted?
The only way to untaint
A Landlock object enables to identify a kernel object (e.g. an inode).
A Landlock rule is a set of access rights allowed on an object. Rules
are grouped in rulesets that may be tied to a set of processes (i.e.
subjects) to enforce a scoped access-control (i.e. a domain).
Because Landlock's goal
A Landlock ruleset is mainly a red-black tree with Landlock rules as
nodes. This enables quick update and lookup to match a requested access
e.g., to a file. A ruleset is usable through a dedicated file
descriptor (cf. following commit implementing the syscall) which enables
a process to create
On Mon, 4 May 2020 14:55:50 +0200
Hans de Goede wrote:
> On ACPI based systems the CPLM3218 ACPI device node describing the
> CM3218[1] sensor typically will have some extra tables with register
> init values for initializing the sensor and calibration info.
>
> This is based on a newer
A 5-level paging capable machine can have memory above 46-bit in the
physical address space. This memory is only addressable in the 5-level
paging mode: we don't have enough virtual address space to create direct
mapping for such memory in the 4-level paging mode.
Currently, we fail boot
On Wed, May 06, 2020 at 05:17:57PM +0200, Vitaly Kuznetsov wrote:
[..]
> >
> > So either we need a way to report errors back while doing synchrounous
> > page faults or we can't fall back to synchorounous page faults while
> > async page faults are enabled.
> >
> > While we are reworking async
On Sun, 10 May 2020 09:06:03 +0800
Changbin Du wrote:
> Sometimes it is useful to preserve batches of configs when making
> localmodconfig. For example, I usually don't want any usb and fs
> modules to be disabled. Now we can do it by:
>
> $ make LMC_KEEP="drivers/usb:fs" localmodconfig
>
>
Sebastian
On 5/11/20 10:30 AM, Sebastian Reichel wrote:
Hi,
On Mon, May 11, 2020 at 09:55:11AM -0500, Dan Murphy wrote:
On 5/11/20 9:57 AM, Sebastian Reichel wrote:
On Mon, May 11, 2020 at 09:29:59AM -0500, Dan Murphy wrote:
On 5/11/20 9:32 AM, Sebastian Reichel wrote:
On Mon, May 11, 2020
On Mon, May 11, 2020 at 08:36:31AM -0700, Andy Lutomirski wrote:
> What if we make 32-bit PTI depend on PAE?
It already does, PTI support for legacy paging had to be removed because
there were memory corruption problems with THP. The reason was that huge
PTEs in the user-space area were mapped in
Although not exactly identical, unthrottle_cfs_rq() and enqueue_task_fair()
are quite close and follow the same sequence for enqueuing an entity in the
cfs hierarchy. Modify unthrottle_cfs_rq() to use the same pattern as
enqueue_task_fair(). This fixes a problem already faced with the latter and
On Wed, 22 Apr 2020 23:18:36 +0900, Masahiro Yamada wrote:
> arch/arm/boot/dts/uniphier-ref-daughter.dtsi has
>
> compatible = "microchip,24lc128", "atmel,24c128";
>
> and 'make ARCH=arm dtbs_check' warns this:
>
> eeprom@50: compatible: ['microchip,24lc128', 'atmel,24c128'] is not valid
>
On Wed, Apr 22, 2020 at 11:38:14AM +0530, Krishna Manikandan wrote:
> MSM Mobile Display Subsytem (MDSS) encapsulates sub-blocks
> like DPU display controller, DSI etc. Add YAML schema
> for the device tree bindings for the same.
>
> Signed-off-by: Krishna Manikandan
>
> Changes in v2:
>
The 'intel-speed-select -f json perf-profile get-lock-status' command
outputs the package, die, and cpu data as separate fields.
ex)
"package-0": {
"die-0": {
"cpu-0": {
Commit 74062363f855 ("tools/power/x86/intel-speed-select: Avoid duplicate
Package strings for json") prettied
On 5/11/20 9:33 AM, Eric W. Biederman wrote:
> What I do see is that interp_data is just a parameter that is smuggled
> into the call of search binary handler. And the next binary handler
> needs to be binfmt_elf for it to make much sense, as only binfmt_elf
> (and binfmt_elf_fdpic) deals with
Hi Thomas,
On Fri, May 08, 2020 at 06:49:15PM +0200, Thomas Gleixner wrote:
> Ashok,
>
> "Raj, Ashok" writes:
> > With legacy MSI we can have these races and kernel is trying to do the
> > song and dance, but we see this happening even when IR is turned on.
> > Which is perplexing. I think
On Mon, May 11, 2020 at 1:13 AM Andreas Schwab wrote:
>
> On Mai 09 2020, Linus Torvalds wrote:
>
> > glibc depending on kernel version is WRONG. It's bogus. You can't do
> > feature detection based on kernel version, it's fundamentally broken.
> >
> > So I really would prefer to see glibc fixed
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