Dear Alexander,
Thank you very much for the patch.
Am 31.05.20 um 09:22 schrieb Alexander Monakov:
Adding Shuah Khan to Cc: I've noticed you've seen this issue on Ryzen 2400GE;
can you have a look at the patch? Would be nice to know if it fixes the
problem for you too.
On Fri, 29 May
On Tue, 2020-05-26 at 08:51 +0200, Greg KH wrote:
>
> And get them to sign off on it too, showing they agree with the design
> decisions here :)
Isn't it generally frowned upon to publish a patch with internal sign-
off's on it already ? Or do you mean for us to publicly sign off once
we have
Hi Linus:
API:
- Introduce crypto_shash_tfm_digest() and use it wherever possible.
- Fix use-after-free and race in crypto_spawn_alg.
- Add support for parallel and batch requests to crypto_engine.
Algorithms:
- Update jitter RNG for SP800-90B compliance.
- Always use jitter RNG as seed in
On Sun, 2020-05-31 at 12:09 +0100, Marc Zyngier wrote:
>
>
> > Not great indeed. But this is not, as far as I can tell, a GIC
> > driver problem.
> >
> > The semantic of activate/deactivate (which maps to started/shutdown
> > in the IRQ code) is that the HW resources for a given interrupt are
>
Hi Jassi,
Thanks for your comment
On Sat, 2020-05-30 at 15:34 -0500, Jassi Brar wrote:
> On Thu, May 28, 2020 at 12:05 PM Dennis YC Hsieh
> wrote:
> >
> > This patch support gce on mt6779 platform.
> >
> > Change since v5:
> > - spearate address shift code in client helper and mailbox
On Tue, May 26, 2020 at 05:16:52PM +0300, amirmi...@gmail.com wrote:
> From: Amir Mizinski
>
> Incorrect implementation of send message was detected. We polled only
> TPM_STS.stsValid bit and then we single-checked the TPM_STS.expect bit
> value.
> TPM_STS.expected bit should be checked at the
On 5/29/20 8:39 AM, Paolo Bonzini wrote:
According to the AMD manual, the effect of turning off EFER.SVME while a
guest is running is undefined. We make it leave guest mode immediately,
similar to the effect of clearing the VMX bit in MSR_IA32_FEAT_CTL.
I see that svm_set_efer() is called
Plese, write the short summary as
tpm: Make read{16, 32}() and write32() in tpm_tis_phy_ops optional
On Tue, May 26, 2020 at 05:16:51PM +0300, amirmi...@gmail.com wrote:
> From: Amir Mizinski
>
> Only tpm_tis can use memory-mapped I/O, which is truly mapped into
> the kernel's memory space.
Hi Dan & Zhou,
On 2020/5/28 20:37, Dan Carpenter wrote:
> Originally this code rejected any read less than 256 bytes. There
> is no need for this artificial limit.
>
> Also I have changed the snprintf() functions to scnprintf(). The
> difference is that snprintf() returns the number of bytes
From: Peng Fan
Add ethernet alias, so bootloader code can use this to find the
primary ethernet device, and set the MAC address.
Signed-off-by: Peng Fan
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 2 ++
1 file changed, 2 insertions(+)
diff --git
From: Peng Fan
The devices could be enumerated properly with aliases.
Signed-off-by: Peng Fan
---
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
b/arch/arm64/boot/dts/freescale/imx8qxp.dtsi
index
From: Peng Fan
Add lsio mu alias for all lsio MUs that could communicate with SCU,
imx_scu_enable_general_irq_channel will parse the alias to get
the mu resource id, if using other MU, not MU1, the `mu_resource_id`
is not what we expect, so add alias to fix this issue.
Signed-off-by: Peng Fan
From: Peng Fan
Minor patchset to fix and update alias for i.MX8QXP
Peng Fan (3):
arm64: dts: imx8qxp: add alias for lsio MU
arm64: dts: imx8qxp: add i2c aliases
arm64: dts: imx8qxp: Add ethernet alias
arch/arm64/boot/dts/freescale/imx8qxp.dtsi | 10 ++
1 file changed, 10
On Wed, May 06, 2020 at 03:10:14PM +0530, Sumit Garg wrote:
> Current trusted keys framework is tightly coupled to use TPM device as
> an underlying implementation which makes it difficult for implementations
> like Trusted Execution Environment (TEE) etc. to provide trusked keys
> support in case
Hi Jia-Ju,
Thank you for the patch! Yet something to improve:
[auto build test ERROR on input/next]
[also build test ERROR on v5.7 next-20200529]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to
Hi Linus,
Please pull hwmon updates for Linux v5.8 from signed tag:
git://git.kernel.org/pub/scm/linux/kernel/git/groeck/linux-staging.git
hwmon-for-v5.8
Thanks,
Guenter
--
The following changes since commit b9bbe6ed63b2b9f2c9ee5cbd0f2c946a2723f4ce:
Linux 5.7-rc6 (2020-05-17
On Wed, May 06, 2020 at 03:10:14PM +0530, Sumit Garg wrote:
> Current trusted keys framework is tightly coupled to use TPM device as
> an underlying implementation which makes it difficult for implementations
> like Trusted Execution Environment (TEE) etc. to provide trusked keys
> support in case
> On May 31, 2020, at 4:50 PM, Brendan Shanks wrote:
>
>
>> On May 31, 2020, at 11:57 AM, Andy Lutomirski wrote:
>>
>> Using SECCOMP_RET_USER_NOTIF is likely to be considerably more
>> expensive than my scheme. On a non-PTI system, my approach will add a
>> few tens of ns to each
My Dear in the lord
My name is Mrs. Mina A. Brunel I am a Norway Citizen who is living in Burkina
Faso, I am married to Mr. Brunel Patrice, a politician who owns a small gold
company in Burkina Faso; He died of Leprosy and Radesyge, in the year February
2010, During his lifetime he
On Fri, May 29, 2020 at 11:26:59AM +0300, Maxim Uvarov wrote:
> Some drivers (like ftpm) can operate only after tee-supplicant
> runs because of tee-supplicant provides things like storage
> services. This patch splits probe of non tee-supplicant dependable
> drivers to the early stage, and after
On Thu, May 28, 2020 at 03:19:30PM -0700, Douglas Anderson wrote:
> During flow control we are just reading from the TPM, yet our spi_xfer
> has the tx_buf and rx_buf both non-NULL which means we're requesting a
> full duplex transfer.
>
> SPI is always somewhat of a full duplex protocol anyway
On 2020-05-31 10:51, Souptick Joarder wrote:
In 2019, we introduced pin_user_pages*() and now we are converting
get_user_pages*() to the new API as appropriate. [1] & [2] could
be referred for more information.
When pin_user_pages() returns numbers of partially mapped pages,
those pages were
Intel Software Guard eXtensions (SGX) is a set of CPU instructions that
can be used by applications to set aside private regions of code and
data. The code outside the SGX hosted software entity is disallowed to
access the memory inside the enclave enforced by the CPU. We call these
entities as
add support to change TX/RX queue number with ethtool -L ethx combined
Signed-off-by: Luo bin
---
.../net/ethernet/huawei/hinic/hinic_ethtool.c | 40 +++
.../net/ethernet/huawei/hinic/hinic_main.c| 2 +-
drivers/net/ethernet/huawei/hinic/hinic_tx.c | 5 +++
3 files
> -Original Message-
> From: Alim Akhtar
> Sent: 28 May 2020 06:47
> To: r...@kernel.org
> Cc: devicet...@vger.kernel.org; linux-s...@vger.kernel.org; k...@kernel.org;
> avri.alt...@wdc.com; martin.peter...@oracle.com;
> kwmad@samsung.com; stanley@mediatek.com;
>
There is a limited amount of EPC available. Therefore, some of it must be
copied to the regular memory, and only subset kept in the SGX reserved
memory. While kernel cannot directly access enclave memory, SGX provides a
set of ENCLS leaf functions to perform reclaiming.
This commits implements a
> -Original Message-
> From: Krzysztof Kozlowski
> Sent: 29 May 2020 13:36
> To: Alim Akhtar
> Cc: r...@kernel.org; devicet...@vger.kernel.org; linux-s...@vger.kernel.org;
> avri.alt...@wdc.com; martin.peter...@oracle.com;
> kwmad@samsung.com; stanley@mediatek.com;
>
Remove 'NBD_MAGIC' as it is not used since commit 5ea8d10802ec ("nbd:
separate out the config information").
Signed-off-by: Dongli Zhang
---
drivers/block/nbd.c | 2 --
1 file changed, 2 deletions(-)
diff --git a/drivers/block/nbd.c b/drivers/block/nbd.c
index 74c1363702f5..83435ce141a8 100644
This is just cleanup without functional change.
Thank you very much!
Dongli Zhang
A lot of drivers append the module parameter and its description following
the corresponding variables (e.g., 'g_submit_queues' in null or
'admin_timeout' in nvme).
This patch would do the same for 'nbds_max' and 'max_part' in nbd driver.
This makes it much more friendly to cscope when reading
On Fri, May 29, 2020 at 6:35 PM Mark Brown wrote:
>
> On Fri, May 29, 2020 at 05:04:36PM +0900, Steve Lee wrote:
> > On Thu, May 28, 2020 at 8:54 PM Mark Brown wrote:
>
> > > > Reported-by: kbuild test robot
>
> > > Don't think the lkp bot asked for this driver! :P
>
> > Thanks, I will send
Add the maintainer information for the SGX subsystem.
Cc: Thomas Gleixner
Cc: Borislav Petkov
Signed-off-by: Jarkko Sakkinen
---
MAINTAINERS | 11 +++
1 file changed, 11 insertions(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 091ec22c1a23..cdebc57f9901 100644
--- a/MAINTAINERS
+++
Document the Intel SGX kernel architecture. The fine-grained micro
architecture details can be looked up from Intel SDM Volume 3D.
Cc: linux-...@vger.kernel.org
Acked-by: Randy Dunlap
Co-developed-by: Sean Christopherson
Signed-off-by: Sean Christopherson
Signed-off-by: Jarkko Sakkinen
---
Add a selftest for SGX. It is a trivial test where a simple enclave
copies one 64-bit word of memory between two memory locations.
Cc: linux-kselft...@vger.kernel.org
Signed-off-by: Jarkko Sakkinen
---
tools/testing/selftests/Makefile | 1 +
tools/testing/selftests/sgx/.gitignore
From: Sean Christopherson
Add helper function to sanitize error code to prepare for vDSO exception
fixup, which will expose the error code to userspace and runs before
set_signal_archinfo(), i.e. suppresses the signal when fixup is successful.
Acked-by: Jethro Beekman
Signed-off-by: Sean
From: Sean Christopherson
The basic concept and implementation is very similar to the kernel's
exception fixup mechanism. The key differences are that the kernel
handler is hardcoded and the fixup entry addresses are relative to
the overall table as opposed to individual entries.
Hardcoding
From: Sean Christopherson
An SGX runtime must be aware of the exceptions, which happen inside an
enclave. Introduce a vDSO call that wraps EENTER/ERESUME cycle and returns
the CPU exception back to the caller exactly when it happens.
Kernel fixups the exception information to RDI, RSI and RDX.
From: Sean Christopherson
vDSO functions can now leverage an exception fixup mechanism similar to
kernel exception fixup. For vDSO exception fixup, the initial user is
Intel's Software Guard Extensions (SGX), which will wrap the low-level
transitions to/from the enclave, i.e. EENTER and ERESUME
Add VMA callbacks for ptrace() that can be used with debug enclaves.
With debug enclaves data can be read and write the memory word at a time
by using ENCLS(EDBGRD) and ENCLS(EDBGWR) leaf instructions.
Acked-by: Jethro Beekman
Signed-off-by: Jarkko Sakkinen
---
arch/x86/kernel/cpu/sgx/encl.c |
From: Sean Christopherson
Add vm_ops()->may_mprotect() to check additional constraints.
SGX uses this callback to add two constraints:
1. Verify that the address range does not have holes: for each page
address, there is an actual enclave page created.
2. Mapped permissions do not surpass
In order to provide a mechanism for devilering provisoning rights:
1. Add a new device file /dev/sgx/provision that works as a token for
allowing an enclave to have the provisioning privileges.
2. Add a new ioctl called SGX_IOC_ENCLAVE_SET_ATTRIBUTE that accepts the
following data
ENCLS is a ring 0 instruction, which contains a set of leaf functions for
managing an enclave. Enclaves are measured and signed software entities,
which are protected by asserting the outside memory accesses and memory
encryption.
Add a two-layer macro system along with an encoding scheme to
Add __sgx_alloc_epc_page(), which iterates through EPC sections and borrows
a page structure that is not used by anyone else. When a page is no longer
needed it must be released with sgx_free_epc_page(). This function
implicitly calls ENCLS[EREMOVE], which will return the page to the
uninitialized
From: Sean Christopherson
Configure SGX as part of feature control MSR initialization and update
the associated X86_FEATURE flags accordingly. Because the kernel will
require the LE hash MSRs to be writable when running native enclaves,
disable X86_FEATURE_SGX (and all derivatives) if SGX
Define the SGX microarchitectural data structures used by various SGX
opcodes. This is not an exhaustive representation of all SGX data
structures but only those needed by the kernel.
The data structures are described in:
Intel SDM: 37.6 INTEL® SGX DATA STRUCTURES OVERVIEW
Acked-by: Jethro
Add kernel parameter to disable Intel SGX kernel support.
Tested-by: Sean Christopherson
Reviewed-by: Sean Christopherson
Signed-off-by: Jarkko Sakkinen
---
Documentation/admin-guide/kernel-parameters.txt | 2 ++
arch/x86/kernel/cpu/feat_ctl.c | 9 +
2 files changed,
From: Sean Christopherson
Enumerate Enclave Page Cache (EPC) sections via CPUID and add the data
structures necessary to track EPC pages so that they can be easily borrowed
for different uses.
Embed section index to the first eight bits of the EPC page descriptor.
Existing client hardware
From: Sean Christopherson
Add X86_FEATURE_SGX_LC, which informs whether or not the CPU supports SGX
Launch Control.
Add MSR_IA32_SGXLEPUBKEYHASH{0, 1, 2, 3}, which when combined contain a
SHA256 hash of a 3072-bit RSA public key. SGX backed software packages, so
called enclaves, are always
From: Sean Christopherson
Add X86_FEATURE_SGX from CPUID.(EAX=7, ECX=1), which informs whether the
CPU has SGX.
Add X86_FEATURE_SGX1 and X86_FEATURE_SGX2 from CPUID.(EAX=12H, ECX=0),
which describe the level of SGX support available [1].
Add IA32_FEATURE_CONTROL_SGX_ENABLE. BIOS can use this
Intel(R) SGX is a set of CPU instructions that can be used by applications
to set aside private regions of code and data. The code outside the enclave
is disallowed to access the memory inside the enclave by the CPU access
control.
There is a new hardware unit in the processor called Memory
From: Sean Christopherson
Include SGX bit to the PF error codes and throw SIGSEGV with PF_SGX when
a #PF with SGX set happens.
CPU throws a #PF with the SGX bit in the event of Enclave Page Cache Map
(EPCM) conflict. The EPCM is a CPU-internal table, which describes the
properties for a enclave
Hi Rob,
On 5/28/2020 3:36 AM, Kishon Vijay Abraham I wrote:
> Hi Rob,
>
> On 5/27/2020 10:07 PM, Rob Herring wrote:
>> On Wed, May 27, 2020 at 4:49 AM Kishon Vijay Abraham I wrote:
>>>
>>> Hi Rob,
>>>
>>> On 5/26/2020 8:42 PM, Rob Herring wrote:
On Sun, May 24, 2020 at 9:30 PM Kishon Vijay
Hi Shiju,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on pci/next]
[also build test WARNING on linus/master v5.7-rc7]
[cannot apply to pm/linux-next next-20200529]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the
Recently, I switched over from swap-file to zramswap.
When reading the Documentation/vm/zswap.rst file I fell over this typo.
The parameter is called accept_threshold_percent not accept_threhsold_percent
in /sys/module/zswap/parameters/ directory.
Fixes: 45190f01dd402 ("mm/zswap.c: add
WARNING: Symbolic permissions 'S_IRUGO' are not preferred. Consider using octal
permissions '0444'.
+ .attr = __ATTR(_name, S_IRUGO, _show_function, NULL), \
warning detected by checkpatch.pl
Signed-off-by: Rodolfo C. Villordo
---
drivers/staging/gasket/gasket_sysfs.h |
After an NFS page has been written it is considered "unstable" until a
COMMIT request succeeds. If the COMMIT fails, the page will be
re-written.
These "unstable" pages are currently accounted as "reclaimable", either
in WB_RECLAIMABLE, or in NR_UNSTABLE_NFS which is included in a
'reclaimable'
PF_LESS_THROTTLE exists for loop-back nfsd (and a similar need in the
loop block driver and callers of prctl(PR_SET_IO_FLUSHER)), where a
daemon needs to write to one bdi (the final bdi) in order to free up
writes queued to another bdi (the client bdi).
The daemon sets PF_LESS_THROTTLE and gets
Current Intel SVM is designed by setting the pgd_t of the processor page
table to FLPTR field of the PASID entry. The first level translation only
supports 4 and 5 level paging structures, hence it's infeasible for the
IOMMU to share a processor's page table when it's running in 32-bit mode.
Let's
When using first-level translation for IOVA, currently the U/S bit in the
page table is cleared which implies DMA requests with user privilege are
blocked. As the result, following error messages might be observed when
passing through a device to user level:
DMAR: DRHD: handling fault status reg
Hi Andrew,
could you please queue these two patches (following).
I think they have sufficient review and no remaining complaints.
Thanks,
NeilBrown
signature.asc
Description: PGP signature
Hi Joerg,
This encloses two fixes for v5.8.
- Make Intel SVM code 64-bit only
- Set U/S bit to make IOVA over first level compatible with 2nd level
translations.
Best regards,
baolu
Lu Baolu (2):
iommu/vt-d: Make Intel SVM code 64-bit only
iommu/vt-d: Set U/S bit in first level page table
So we had a fairly calm last week, with nothing really screaming
"let's delay one more rc". Knock wood - let's hope we don't have
anything silly lurking this time, like the last-minute wifi regression
we had in 5.6..
But embarrassing regressions last time notwithstanding, it all looks
fine. And
a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url:
https://github.com/0day-ci/linux/commits/Richard-Guy-Briggs/audit-log-nftables-configuration-change-events/20200531
On Mon, Jun 1, 2020 at 4:07 AM Rikard Falkeborn
wrote:
>
> + Emil who was working on a patch for this
>
> On Sun, May 31, 2020 at 02:00:45PM +0300, Andy Shevchenko wrote:
> > On Sun, May 31, 2020 at 4:11 AM Syed Nayyar Waris
> > wrote:
> > > On Sat, May 30, 2020 at 2:50 PM Andy Shevchenko
> > >
On Mon, Jun 01, 2020 at 12:00:16AM +0300, Vladimir Oltean wrote:
> On Sun, 31 May 2020 at 03:19, Russell King - ARM Linux admin
> wrote:
> >
> > On Sun, May 31, 2020 at 12:43:15AM +0300, Vladimir Oltean wrote:
> > > From: Vladimir Oltean
> > >
> > > In kernel 4.19 (and probably earlier too)
Hi,
First of all, thanks a lot for all your patch. And thanks Emil for your
feedback.
I have a suggestion here:
Emil:
Could you give me your Acked-by or maybe Reviewed-by for the writeback
series? With that, I can finally apply the series.
Sidong:
Secondly, after applying the writeback series,
On Sun, 31 May 2020, Geert Uytterhoeven wrote:
> Hi Finn,
>
> On Sun, May 31, 2020 at 1:20 AM Finn Thain wrote:
> > The adb_driver.autopoll method is needed during ADB bus scan and device
> > address assignment. Implement this method so that the IOP's list of
> > device addresses can be
Marc,
> On May 31, 2020, at 6:10 AM, Marc Zyngier wrote:
>> Not great indeed. But this is not, as far as I can tell, a GIC
>> driver problem.
>>
>> The semantic of activate/deactivate (which maps to started/shutdown
>> in the IRQ code) is that the HW resources for a given interrupt are
>> only
On Sun, May 31, 2020 at 7:29 AM Namhyung Kim wrote:
>
> Hi Ian,
>
> On Sat, May 30, 2020 at 7:53 AM Ian Rogers wrote:
> >
> > This is currently working due to extra include paths in the build.
> >
> > Before:
> > $ cd tools/perf/arch/arm64/util
> > $ ls -la ../../util/unwind-libdw.h
> > ls:
On Sun, May 31, 2020 at 9:22 AM Jiri Olsa wrote:
>
> Jin Yao reported the issue (and posted first versions of this change)
> with groups being defined over events with different cpu mask.
>
> This causes assert aborts in get_group_fd, like:
>
> # perf stat -M "C2_Pkg_Residency" -a -- sleep 1
>
On Sun, 31 May 2020, Geert Uytterhoeven wrote:
> Hi Finn,
>
> On Sun, May 31, 2020 at 1:16 AM Finn Thain wrote:
>
> > This patch series has several bug fixes for the IOP driver and some
> > improvements to the debug level log messages.
>
> Thanks for your series!
>
Thanks for your review
On 2020-05-29 6:32 a.m., Christoph Hellwig wrote:
> On Thu, May 28, 2020 at 11:43:13AM -0700, Linus Torvalds wrote:
>> On Wed, May 27, 2020 at 10:41 PM Christoph Hellwig wrote:
>>>
>>> -ssize_t __kernel_write(struct file *file, const void *buf, size_t count,
>>> loff_t *pos)
>>> +ssize_t
This code was using get_user_pages*(), and all of the callers so far
were in a "Case 2" scenario (DMA/RDMA), using the categorization
from [1]. That means that it's time to convert the get_user_pages*() +
put_page() calls to pin_user_pages*() + unpin_user_pages() calls.
There is some helpful
Introduce pin_user_pages_locked(), which is nearly identical to
get_user_pages_locked() except that it sets FOLL_PIN and rejects
FOLL_GET.
As with other pairs of get_user_pages*() and pin_user_pages() API calls,
it's prudent to assert that FOLL_PIN is *not* set in the
get_user_pages*() call, so
Hi,
Changes since v1:
* added an assert-and-return to the corresponding
get_user_pages_locked() call, to keep out any externally set FOLL_PIN flag,
thanks to Souptick Joarder's review for spotting that.
* Added Acked-by and Reviewed by tags from David and Pakaj
John Hubbard (2):
mm/gup:
tree: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git x86/entry
head: 5980d208e5ef28455e9e8b08f6250b443a2f0893
commit: 5980d208e5ef28455e9e8b08f6250b443a2f0893 [19/19] x86/idt: Consolidate
idt functionality
config: i386-randconfig-c001-20200529 (attached as .config)
compiler:
> On May 31, 2020, at 11:57 AM, Andy Lutomirski wrote:
>
> Using SECCOMP_RET_USER_NOTIF is likely to be considerably more
> expensive than my scheme. On a non-PTI system, my approach will add a
> few tens of ns to each syscall. On a PTI system, it will be worse.
> But using any kind of
Recently, I switched over from swap-file to zramswap.
When reading the Documentation/vm/zswap.rst file I fell over this typo.
The parameter is called accept_threshold_percent not accept_threhsold_percent
in /sys/module/zswap/parameters/ directory.
Fixes: 45190f01dd402 ("mm/zswap.c: add
Hi Shiju,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on pci/next]
[also build test WARNING on linus/master v5.7-rc7]
[cannot apply to pm/linux-next linux/master next-20200529]
[if your patch is applied to the wrong git tree, please drop us a note to help
On Fri, May 29, 2020 at 11:28:56AM -0700, Dave Hansen wrote:
> On 5/14/20 5:43 PM, Jarkko Sakkinen wrote:
> > From: Sean Christopherson
> >
> > Add vm_ops()->may_mprotect() to check additional constrains set by a
> > subsystem for a mprotect() call.
>
> This changelog needs some more detail
On 5/29/20 8:39 AM, Paolo Bonzini wrote:
There is only one GIF flag for the whole processor, so make sure it is not
clobbered
when switching to L2 (in which case we also have to include the
V_GIF_ENABLE_MASK,
lest we confuse enable_gif/disable_gif/gif_set). When going back, L1 could in
Some secure elements like NXP's SE050 sit on I2C buses. For OP-TEE to
control this type of cryptographic devices it needs coordinated access
to the bus, so collisions and RUNTIME_PM dont get in the way.
This trampoline driver allow OP-TEE to access them.
Signed-off-by: Jorge Ramirez-Ortiz
---
Introduce pin_user_pages_unlocked(), which is nearly identical to the
get_user_pages_unlocked() that it wraps, except that it sets FOLL_PIN
and rejects FOLL_GET.
As with other pairs of get_user_pages*() and pin_user_pages() API calls,
it's prudent to assert that FOLL_PIN is *not* set in the
This code was using get_user_pages*(), in a "Case 2" scenario
(DMA/RDMA), using the categorization from [1]. That means that it's
time to convert the get_user_pages*() + put_page() calls to
pin_user_pages*() + unpin_user_pages() calls.
There is some helpful background in [2]: basically, this is a
Hi,
Here is a v2 that includes a small change that follows from Souptick's
review of another very similar patchset (that added
pin_user_pages_locked()) [1].
This applies on top of today's linux.git (5.7-rc7+).
Changes since v1: added an assert-and-return to the corresponding
+ Emil who was working on a patch for this
On Sun, May 31, 2020 at 02:00:45PM +0300, Andy Shevchenko wrote:
> On Sun, May 31, 2020 at 4:11 AM Syed Nayyar Waris
> wrote:
> > On Sat, May 30, 2020 at 2:50 PM Andy Shevchenko
> > wrote:
> > > On Sat, May 30, 2020 at 11:45 AM Syed Nayyar Waris
> >
(adding Dan Carpenter)
On Sun, 2020-05-31 at 23:00 +0200, Christophe JAILLET wrote:
> 'swsusp_header_init()' is only called via 'core_initcall'.
> It can be marked as __init to save a few bytes of memory.
Hey Dan
smatch has a full function calling tree right?
Can smatch find unmarked functions
On 2020-05-31 14:11, Andy Shevchenko wrote:
...
JFYI, we have history.git starting from v0.01.
OK, thanks for that note. According to that history.git [1],
then: drivers/video/pvr2fb.c had get_user_pages_fast() support added to
pvr2fb_write() back in 2004, but only for CONFIG_SH_DMA, as
On 2020.05.31 12:29 Srinivas Pandruvada wrote:
> On Sun, 2020-05-31 at 11:59 -0700, Srinivas Pandruvada wrote:
>> On Sun, 2020-05-31 at 11:06 -0700, Doug Smythies wrote:
>> > Hi Srinivas,
>> >
>> > Thanks you for your quick reply.
>> >
>> > On 2020.05.31 09:54 Srinivas Pandruvada wrote
>> > > On
On Wed, May 27, 2020 at 12:10:21AM +, Wu, Hao wrote:
> > -Original Message-
> > From: John Hubbard
> > Sent: Tuesday, May 26, 2020 6:18 AM
> > To: LKML
> > Cc: John Hubbard ; Xu, Yilun ;
> > Wu, Hao ; Moritz Fischer ; linux-
> > f...@vger.kernel.org
> > Subject: [PATCH v3] fpga: dfl:
On Sat, 30 May 2020 at 19:42, Dinghao Liu wrote:
>
> When gk20a_clk_ctor() returns an error code, pointer "clk"
> should be released. It's the same when gm20b_clk_new()
> returns from elsewhere following this call.
This shouldn't be necessary. If a subdev constructor fails, and
returns a
Working on the OpenRISC glibc port I found that sometimes clone was
working strange. That the tls data argument sent in r7 was always
wrong. Further investigation revealed that the arguments were getting
clobbered in the entry code. This patch removes the code that writes to
the argument
Hi!
> [ Upstream commit c9cb9e381985bbbe8acd2695bbe6bd24bf06b81c ]
>
> Before this patch, function gfs2_quota_unlock checked if quotas are
> turned off, and if so, it branched to label out, which called
> gfs2_quota_unhold. With the new system of gfs2_qa_get and put, we
> no longer want to call
Hi!
> From: Roman Mashak
>
> [ Upstream commit b15e62631c5f19fea9895f7632dae9c1b27fe0cd ]
>
> When a new action is installed, firstuse field of 'tcf_t' is explicitly set
> to 0. Value of zero means "new action, not yet used"; as a packet hits the
> action, 'firstuse' is stamped with the
On Mon, 1 Jun 2020 at 00:05, Andy Shevchenko wrote:
>
>
>
> On Sunday, May 31, 2020, Vladimir Oltean wrote:
>>
>> From: Vladimir Oltean
>>
>> Sometimes debugging a device is easiest using devmem on its register
>> map, and that can be seen with /proc/iomem. But some device drivers have
>> many
On 2020-05-31 13:58, Sam Ravnborg wrote:
...
Thanks, patches are now applied to drm-misc-next.
They will hit -next soon, but you will have to wait
until next (not the upcoming) merge window before they hit
mainline linux.
Sam
Great! That will work out just fine.
thanks,
--
John
/linux.git clk-next
config: openrisc-randconfig-r021-20200531 (attached as .config)
compiler: or1k-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
On Sun, May 31, 2020 at 11:57 AM Andy Lutomirski wrote:
>
>
> What if there was a special filter type that ran a BPF program on each
> syscall, and the program was allowed to access user memory to make its
> decisions, e.g. to look at some list of memory addresses. But this
> would explicitly
'swsusp_header_init()' is only called via 'core_initcall'.
It can be marked as __init to save a few bytes of memory.
Signed-off-by: Christophe JAILLET
---
kernel/power/swap.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/power/swap.c b/kernel/power/swap.c
index
Hi Colin/Greg.
On Thu, May 21, 2020 at 02:50:38PM +0100, Colin King wrote:
> From: Colin Ian King
>
> Currently HSD20_IPS is defined as "true" and will always result in a
> non-zero result even if it is defined as "false" because it is an array
> and that will never be zero. Fix this by
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