Hi,
On 6/10/20 8:28 PM, Dmitry Torokhov wrote:
On Wed, Jun 10, 2020 at 12:38:30PM +0200, Rafael J. Wysocki wrote:
On Wed, Jun 10, 2020 at 11:50 AM Hans de Goede wrote:
Hi All,
On 6/8/20 1:22 PM, Andrzej Pietrasiewicz wrote:
This is a quick respin of v3, with just two small changes, please
Hi Linus
Please pull the arch/nios2 update for v5.8-rc1.
Regards
Ley Foon
The following changes since commit 3d77e6a8804abcc0504c904bd6e5cdf3a5cf8162:
Linux 5.7 (2020-05-31 16:49:15 -0700)
are available in the git repository at:
On Thu, 2020-05-28 at 16:10 +0200, Matthias Brugger wrote:
>
> On 28/05/2020 11:57, EastL wrote:
> > This patch add dma mask for capability.
> >
> > Change-Id: I31f4622f9541d769702029532e5f5f185815dda2
>
> No Change-Id in the commit message please.
>
> > Signed-off-by: EastL
> > ---
> >
On Thu, 2020-05-28 at 15:39 +0200, Matthias Brugger wrote:
>
> On 28/05/2020 11:57, EastL wrote:
> > This patch fixes mediatek-cqdma compatible to common.
> >
> > Signed-off-by: EastL
> > ---
> > drivers/dma/mediatek/mtk-cqdma.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
>
Hi Giovanni,
I test the regression, it still existed in v5.7. Do you have time
to take a look at this? Thanks.
=
kernel test robot found the following issue
and Kalle Valo forwarded it to Linux wireless.
drivers/net/wireless/mediatek/mt76/pci.c:8:6:
warning: no previous prototype for 'mt76_pci_disable_aspm'
Fix this by adding the missing include of mt76.h as Kalle
suggested.
Signed-off-by: Markus Theil
On Fri, Jun 12, 2020 at 03:37:51PM +0800, Shengjiu Wang wrote:
> With EDMA, there is two dma channels can be used for dev_to_dev,
> one is from ASRC, one is from another peripheral (ESAI or SAI).
>
> If we select the dma channel of ASRC, there is an issue for ideal
> ratio case, the speed of copy
On Fri, Jun 12, 2020 at 03:37:50PM +0800, Shengjiu Wang wrote:
> The dma channel has been requested by Back-End cpu dai driver already.
> If fsl_asrc_dma requests dma chan with same dma:tx symlink, then
> there will be below warning with SDMA.
>
> [ 48.174236] fsl-esai-dai 2024000.esai: Cannot
Use kobj_to_dev() API instead of container_of().
Signed-off-by: Wang Qing
---
drivers/gpio/gpiolib-sysfs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
mode change 100644 => 100755 drivers/gpio/gpiolib-sysfs.c
diff --git a/drivers/gpio/gpiolib-sysfs.c b/drivers/gpio/gpiolib-sysfs.c
On Fri, Jun 12, 2020 at 09:38:15AM +0200, Krzysztof Kozlowski wrote:
> On Fri, Jun 12, 2020 at 07:51:14AM +0200, Oleksij Rempel wrote:
> > Hi Krzysztof,
> >
> > thank you for your patch.
> >
> > On Wed, Jun 10, 2020 at 03:46:42PM +0200, Krzysztof Kozlowski wrote:
> > > If interrupt comes early
On Fri, Jun 12, 2020 at 03:37:49PM +0800, Shengjiu Wang wrote:
> In DPCM case, Front-End needs to get the dma chan which has
> been requested by Back-End and reuse it.
>
> Signed-off-by: Shengjiu Wang
Reviewed-by: Nicolin Chen
On Fri, Jun 12, 2020 at 1:27 AM Paul Moore wrote:
> On Thu, Jun 11, 2020 at 6:41 PM Tom Rix wrote:
> > On 6/11/20 3:30 PM, Paul Moore wrote:
> > > On Thu, Jun 11, 2020 at 4:48 PM wrote:
> > >> From: Tom Rix
> > >>
> > >> Clang static analysis reports this double free error
> > >>
> > >>
pt., 12 cze 2020 o 06:51 Kent Gibson napisał(a):
>
> Replace file comment carried over from gpiolib.c with one more
> appropriate for gpiolib-cdev.c.
>
> Signed-off-by: Kent Gibson
> ---
> drivers/gpio/gpiolib-cdev.c | 7 +++
> 1 file changed, 3 insertions(+), 4 deletions(-)
>
> diff --git
On Fri, Jun 12, 2020 at 03:37:48PM +0800, Shengjiu Wang wrote:
> snd_soc_lookup_component_nolocked can be used for the DPCM case
> that Front-End needs to get the unused platform component but
> added by Back-End cpu dai driver.
>
> If the component is gotten, then we can get the dma chan created
Hi,
I test the regression, it still existed in v5.7. If you have any fix
for it, please send it to me, I can verify it. Thanks.
=
pt., 12 cze 2020 o 06:51 Kent Gibson napisał(a):
>
> Fix -Wmissing-prototypes warnings by including module's header.
>
> Fixes: f6d984418ffd (gpiolib: split character device into gpiolib-cdev)
> Reported-by: kernel test robot
> Signed-off-by: Kent Gibson
> ---
> drivers/gpio/gpiolib-cdev.c | 1
Patch 1: avoids register write to unavailable SFLASHC_BURST_CFG register
Patch 2: set BAM mode only if not set by bootloader
[V4]
* Addressed more review comments from Miquel
* Removed arch...@codeaurora.org from the senders list as it is bouncing
[V3]
* Addressed review comments from Miquel
SFLASHC_BURST_CFG is only available on older ipq nand platforms, this
register has been removed when the NAND controller is moved as part of qpic
controller.
Avoid writing this register on devices which are based on qpic NAND
controller.
Fixes: dce84760 (mtd: nand: qcom: Support for IPQ8074 QPIC
BAM is DMA controller on QCOM ipq platforms, BAM mode on NAND driver
is set by writing BAM_MODE_EN bit on NAND_CTRL register.
NAND_CTRL is an operational register and in BAM mode operational
registers are read only.
So, before enabling BAM mode by writing the NAND_CTRL register, check
if BAM
On 2020년 06월 12일 16:40, Minchan Kim wrote:
> On Fri, Jun 12, 2020 at 04:03:41PM +0900, Jaewon Kim wrote:
>>
>> On 2020년 06월 12일 15:55, Minchan Kim wrote:
>>> On Thu, Jun 11, 2020 at 05:54:12PM +0900, Jaewon Kim wrote:
On 2020년 06월 10일 10:21, Minchan Kim wrote:
> Hi Jaewon,
>
>
months ago
config: microblaze-randconfig-r002-20200612 (attached as .config)
compiler: microblaze-linux-gcc (GCC) 9.3.0
reproduce (this is a W=1 build):
wget
https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
~/bin/make.cross
chmod +x ~/bin/make.cross
Jiri Slaby writes:
> The tlv passed to iwl_dbg_tlv_alloc_trigger comes from a loaded firmware
> file. The memory can be marked as read-only as firmware could be
> shared. In anyway, writing to this memory is not expected. So,
> iwl_dbg_tlv_alloc_trigger can crash now:
>
> BUG: unable to handle
ult
> date: 8 months ago
> config: microblaze-randconfig-r023-20200612 (attached as .config)
> compiler: microblaze-linux-gcc (GCC) 9.3.0
> reproduce (this is a W=1 build):
> wget
> https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O
> ~/bin
On Thu, Jun 11, 2020 at 03:57:50PM +0800, Wang Hai wrote:
> Commit a84d01647989 ("mld: fix memory leak in mld_del_delrec()") fixed
> the memory leak of MLD, but missing the ipv6_mc_destroy_dev() path, in
> which mca_sources are leaked after ma_put().
>
> Using ip6_mc_clear_src() to take care of
On Thu, Jun 11, 2020 at 10:48 PM wrote:
[...]
> diff --git a/security/selinux/ss/conditional.c
> b/security/selinux/ss/conditional.c
> index da94a1b4bfda..d0d6668709f0 100644
> --- a/security/selinux/ss/conditional.c
> +++ b/security/selinux/ss/conditional.c
> @@ -392,26 +392,21 @@ static int
The dma channel has been requested by Back-End cpu dai driver already.
If fsl_asrc_dma requests dma chan with same dma:tx symlink, then
there will be below warning with SDMA.
[ 48.174236] fsl-esai-dai 2024000.esai: Cannot create DMA dma:tx symlink
So if we can reuse the dma channel of
In DPCM case, Front-End needs to get the dma chan which has
been requested by Back-End and reuse it.
Signed-off-by: Shengjiu Wang
---
include/sound/dmaengine_pcm.h | 11 +++
sound/soc/soc-generic-dmaengine-pcm.c | 12
2 files changed, 11 insertions(+), 12
> From: linux-hyperv-ow...@vger.kernel.org
> On Behalf Of Andy Lutomirski
> Sent: Tuesday, April 7, 2020 2:01 PM
> To: Christoph Hellwig
> Cc: vkuznets ; x...@kernel.org;
> linux-hyp...@vger.kernel.org; linux-kernel@vger.kernel.org; KY Srinivasan
> ; Stephen Hemminger ;
> Andy Lutomirski ; Peter
snd_soc_lookup_component_nolocked can be used for the DPCM case
that Front-End needs to get the unused platform component but
added by Back-End cpu dai driver.
If the component is gotten, then we can get the dma chan created
by Back-End component and reused it in Front-End.
Signed-off-by:
Reuse the dma channel if available in Back-End
Shengjiu Wang (4):
ASoC: soc-card: export snd_soc_lookup_component_nolocked
ASoC: dmaengine_pcm: export soc_component_to_pcm
ASoC: fsl_asrc_dma: Reuse the dma channel if available in Back-End
ASoC: fsl_asrc_dma: Fix data copying speed issue
git
> master
> head: b791d1bdf9212d944d749a5c7ff6febdba241771
> commit: 26ad340e582d3d5958ed8456a1911d79cfb567b4 can: kvaser_pciefd: Add
> driver for Kvaser PCIEcan devices
> date: 11 months ago
> config: m68k-randconfig-s032-20200612 (attached as .config)
> compiler: m6
With EDMA, there is two dma channels can be used for dev_to_dev,
one is from ASRC, one is from another peripheral (ESAI or SAI).
If we select the dma channel of ASRC, there is an issue for ideal
ratio case, the speed of copy data is faster than sample
frequency, because ASRC output data is very
Let's support debugging function to show exporter
detail information. The exporter don't need to manage
the lists for debugging because all dmabuf list are
managed on dmabuf framework.
That supports to walk the dmabuf list and show the
detailed information for exporter by passed function
We cannot get FP and PC when the task is running on another CPU,
task->thread.cpu_context is the last time the task was switched out,
we can use smp call to print backtrace itself.
Signed-off-by: Wang Qing
---
arch/arm64/kernel/traps.c | 11 +++
1 file changed, 11 insertions(+)
mode
On Fri, Jun 12, 2020 at 04:03:41PM +0900, Jaewon Kim wrote:
>
>
> On 2020년 06월 12일 15:55, Minchan Kim wrote:
> > On Thu, Jun 11, 2020 at 05:54:12PM +0900, Jaewon Kim wrote:
> >>
> >> On 2020년 06월 10일 10:21, Minchan Kim wrote:
> >>> Hi Jaewon,
> >>>
> >>> On Tue, Jun 09, 2020 at 06:51:28PM +0900,
> From: Jacob Pan
> Sent: Friday, June 12, 2020 8:27 AM
>
> On Thu, 11 Jun 2020 14:40:47 -0600
> Alex Williamson wrote:
>
> > On Thu, 11 Jun 2020 12:52:05 -0700
> > Jacob Pan wrote:
> >
> > > Hi Alex,
> > >
> > > On Thu, 11 Jun 2020 09:47:41 -0600
> > > Alex Williamson wrote:
> > >
> > > >
On Fri, Jun 12, 2020 at 07:51:14AM +0200, Oleksij Rempel wrote:
> Hi Krzysztof,
>
> thank you for your patch.
>
> On Wed, Jun 10, 2020 at 03:46:42PM +0200, Krzysztof Kozlowski wrote:
> > If interrupt comes early (could be triggered with CONFIG_DEBUG_SHIRQ),
> > the i2c_imx_isr() will access
The tlv passed to iwl_dbg_tlv_alloc_trigger comes from a loaded firmware
file. The memory can be marked as read-only as firmware could be
shared. In anyway, writing to this memory is not expected. So,
iwl_dbg_tlv_alloc_trigger can crash now:
BUG: unable to handle page fault for address:
Hi Miquèl,
> El 12 jun 2020, a las 9:33, Miquel Raynal
> escribió:
>
> Hi Álvaro,
>
> Álvaro Fernández Rojas wrote on Fri, 12 Jun 2020
> 09:30:27 +0200:
>
>> Hi Miquèl,
>>
>>> El 12 jun 2020, a las 9:02, Miquel Raynal
>>> escribió:
>>>
>>> Hi Álvaro,
>>>
>>> Álvaro Fernández Rojas
> Function msm_gpu_crashstate_capture maybe called for several
> times, and then the state->bos is a potential memleak. Also
> the state->pos maybe alloc failed, but now without any handle.
> This change is to fix some potential memleak and add error
> handle when alloc failed.
I suggest to
Instead of trying to parse CFE version string, which is customized by some
vendors, let's just check that "CFE1" was passed on argument 3.
Signed-off-by: Álvaro Fernández Rojas
Signed-off-by: Jonas Gorski
---
v3: keep COMPILE_TEST compatibility by adding a new function that only checks
Hi Álvaro,
Álvaro Fernández Rojas wrote on Fri, 12 Jun 2020
09:30:27 +0200:
> Hi Miquèl,
>
> > El 12 jun 2020, a las 9:02, Miquel Raynal
> > escribió:
> >
> > Hi Álvaro,
> >
> > Álvaro Fernández Rojas wrote on Thu, 11 Jun 2020
> > 18:14:20 +0200:
> >
> >> Hi Florian,
> >>
> >>> El
Hi Miquèl,
> El 12 jun 2020, a las 9:02, Miquel Raynal
> escribió:
>
> Hi Álvaro,
>
> Álvaro Fernández Rojas wrote on Thu, 11 Jun 2020
> 18:14:20 +0200:
>
>> Hi Florian,
>>
>>> El 11 jun 2020, a las 17:42, Florian Fainelli
>>> escribió:
>>>
>>>
>>>
>>> On 6/11/2020 8:16 AM, Álvaro
exti hardware point of view, there is no specific action on set_affinity.
So the affinity must be forwarded to parent if there is a
descendent irqchips, otherwise just return IRQ_SET_MASK_OK_DONE.
Signed-off-by: Ludovic Barre
---
drivers/irqchip/irq-stm32-exti.c | 2 +-
1 file changed, 1
Garry Filakhtov 于2020年6月12日周五 上午8:38写道：
>
> Good time of the day,
>
> Hope you all are staying safe during these challenging times.
>
> I have been struggling with KVM guest freezes after the upgrade from
> 4.19 LTS to 5.4 LTS.
>
> Searching through the internet lead me to
>
Hi Sivaprakash,
Sivaprakash Murugesan wrote on Fri, 12 Jun
2020 12:19:49 +0530:
> BAM is DMA controller on QCOM ipq platforms, BAM mode on NAND driver
> is set by writing BAM_MODE_EN bit on NAND_CTRL register.
>
> NAND_CTRL is an operational register and in BAM mode operational
> registers are
From: Michael Krummsdorf
Add support for the CDTech Electronics displays S070PWS19HP-FC21
(7.0" WSVGA) and S070SWV29HG-DC44 (7.0" WVGA) to panel-simple.
Signed-off-by: Michael Krummsdorf
Signed-off-by: Matthias Schiffer
---
v2:
- removed vrefresh
- added connector_type
Add the CDTech Electronics displays S070PWS19HP-FC21 (7.0" WSVGA) and
S070SWV29HG-DC44 (7.0" WVGA) to the panel-simple compatible list.
Signed-off-by: Matthias Schiffer
---
v2: no changes
.../devicetree/bindings/display/panel/panel-simple.yaml | 4
1 file changed, 4 insertions(+)
From: Matthias Schiffer
This adds a few panels TQ-Systems uses with various starterkit
mainboards. Device trees actually using these panels will be added with
a later submission.
Matthias Schiffer (2):
dt-bindings: display: simple: add CDTech S070PWS19HP-FC21 and
S070SWV29HG-DC44
From: Max Merchel
Add support for the Tianma Micro-electronics TM070JVHG33 7.0" WXGA display
to panel-simple.
Signed-off-by: Max Merchel
Signed-off-by: Matthias Schiffer
---
v2:
- added connector_type
- fixed bus_format
drivers/gpu/drm/panel/panel-simple.c | 15 +++
1 file
Add the Tianma Micro-electronics TM070JVHG33 7.0" WXGA display to the
panel-simple compatible list.
Signed-off-by: Matthias Schiffer
---
v2: no changes
.../devicetree/bindings/display/panel/panel-simple.yaml | 2 ++
1 file changed, 2 insertions(+)
diff --git
Hi Sivaprakash,
Sivaprakash Murugesan wrote on Fri, 12 Jun
2020 12:19:48 +0530:
> SFLASHC_BURST_CFG is only available on older ipq nand platforms, this
> register has been removed when the NAND controller is moved as part of qpic
> controller.
>
> avoid register writes to this register on
From: Guo Ren
From: Guo Ren
Current cpufeature.c doesn't support detecting V-extension, because
"rv64" also contain a 'v' letter and we need to skip it.
Signed-off-by: Guo Ren
Reviewed-by: Anup Patel
---
arch/riscv/include/uapi/asm/hwcap.h | 1 +
arch/riscv/kernel/cpufeature.c | 4
From: Guo Ren
This patch adds a new config option which could enable assembler's
vector feature.
Signed-off-by: Guo Ren
---
arch/riscv/Kconfig | 9 +
arch/riscv/Makefile | 1 +
2 files changed, 10 insertions(+)
diff --git a/arch/riscv/Kconfig b/arch/riscv/Kconfig
index
This patch adds ptrace support for riscv vector. The vector registers will
be saved in datap pointer of __riscv_v_state. This pointer will be set
right after the __riscv_v_state data structure then it will be put in ubuf
for ptrace system call to get or set. It will check if the datap got from
From: Guo Ren
From: Guo Ren
Use "subst fd" in Makefile is a hack way and it's not convenient
to add new ISA feature. Just separate them into riscv-march-cflags
and riscv-march-aflags.
Signed-off-by: Guo Ren
---
arch/riscv/Makefile | 18 --
1 file changed, 12 insertions(+), 6
Use kobj_to_dev() API instead of container_of().
Signed-off-by: Wang Qing
---
drivers/block/virtio_blk.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
mode change 100644 => 100755 drivers/block/virtio_blk.c
diff --git a/drivers/block/virtio_blk.c b/drivers/block/virtio_blk.c
index
From: Guo Ren
From: Guo Ren
The name of __switch_to_aux is not clear and rename it with the
determine function: __switch_to_fpu. Next we could add other regs'
switch.
Signed-off-by: Guo Ren
Reviewed-by: Anup Patel
---
arch/riscv/include/asm/switch_to.h | 6 +++---
1 file changed, 3
Follow the riscv vector spec to add new csr numbers.
[guo...@linux.alibaba.com: first porting for new vector related csr]
Signed-off-by: Greentime Hu
Signed-off-by: Guo Ren
Acked-by: Guo Ren
---
arch/riscv/include/asm/csr.h | 16 ++--
1 file changed, 14 insertions(+), 2
Add vector state context struct in struct thread and asm-offsets.c
definitions.
The vector registers will be saved in datap pointer of __riscv_v_state. It
will be dynamically allocated in kernel space. It will be put right after
the __riscv_v_state data structure in user space.
This patch adds sigcontext save/restore for vector. The vector registers
will be saved in datap pointer. The datap pointer will be allocaed
dynamically when the task needs in kernel space. The datap pointer will
be set right after the __riscv_v_state data structure to save all the
vector registers
This patch uses regset_size() instead of using regset->n and regset->size
directly. In this case, it will call the get_size() ported by arch
dynamically to support dynamic regset size case.
Signed-off-by: Greentime Hu
Acked-by: Oleg Nesterov
---
kernel/ptrace.c | 2 +-
1 file changed, 1
From: Vincent Chen
The vector register belongs to the signal context. They need to be stored
and restored as entering and leaving the signal handler. According to the
V-extension specification, the maximum length of the vector registers can
be 2^(XLEN-1). Hence, if userspace refers to the
From: Guo Ren
Reset vector registers at boot-time and disable vector instructions
execution for kernel mode.
[greentime...@sifive.com: add comments]
Signed-off-by: Greentime Hu
Signed-off-by: Guo Ren
---
arch/riscv/kernel/entry.S | 6 ++---
arch/riscv/kernel/head.S | 49
This patch adds task switch support for vector. It supports lazy
save and restore mechanism. It also supports all lengths of vlen.
[guo...@linux.alibaba.com: First available porting to support vector
context switching]
[nick.kni...@sifive.com: Rewrite vector.S to support dynamic vlen, xlen and
This patch is used to detect vector support status of CPU and use
riscv_vsize to save the size of all the vector registers. It assumes
all harts has the same capabilities in SMP system.
[guo...@linux.alibaba.com: add has_vector checking]
Signed-off-by: Greentime Hu
Signed-off-by: Guo Ren
---
This patchset is based on Guo Ren's v3 patchset to add dynamic vlen vector
support for all different kinds of vector length in riscv. To make this
happened we defined a new __riscv_v_state in sigcontext to save the vector
related registers. In kernel space, the datap pointer in __riscv_v_state
Hi Kamal,
Kamal Dasu wrote on Thu, 11 Jun 2020 12:04:29
-0400:
> On Thu, Jun 11, 2020 at 3:27 AM Miquel Raynal
> wrote:
> >
> > Hi Kamal,
> >
> > Kamal Dasu wrote on Thu, 11 Jun 2020 01:44:54
> > -0400:
> >
> > > Implemented ECC correctable and uncorrectable error handling for EDU
> >
>
Hi Xing
On Fri, 12 Jun 2020 at 08:36, Xing Zhengjun
wrote:
>
> Hi Vincent,
>
>We test the regression still existed in v5.7, do you have time to
> look at it? Thanks.
I'm going to have a look
Vincent
>
>
>
On Fri, 2020-06-12 at 08:40 +0200, SeongJae Park wrote:
> On Thu, 11 Jun 2020 03:43:32 -0700 Joe Perches wrote:
> > On Thu, 2020-06-11 at 10:32 +0200, Jiri Slaby wrote:
> > > On 11. 06. 20, 10:30, SeongJae Park wrote:
> > > > For example, as it seems at least you and I agree on the f-word to hug
Use kobj_to_dev() API instead of container_of().
Signed-off-by: Wang Qing
---
drivers/power/supply/power_supply_sysfs.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
mode change 100644 => 100755 drivers/power/supply/power_supply_sysfs.c
diff --git
On 2020년 06월 12일 15:55, Minchan Kim wrote:
> On Thu, Jun 11, 2020 at 05:54:12PM +0900, Jaewon Kim wrote:
>>
>> On 2020년 06월 10일 10:21, Minchan Kim wrote:
>>> Hi Jaewon,
>>>
>>> On Tue, Jun 09, 2020 at 06:51:28PM +0900, Jaewon Kim wrote:
zone_watermark_fast was introduced by commit
Use kobj_to_dev() API instead of container_of().
Signed-off-by: Wang Qing
---
drivers/watchdog/watchdog_dev.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
mode change 100644 => 100755 drivers/watchdog/watchdog_dev.c
diff --git a/drivers/watchdog/watchdog_dev.c
Hi Álvaro,
Álvaro Fernández Rojas wrote on Thu, 11 Jun 2020
18:14:20 +0200:
> Hi Florian,
>
> > El 11 jun 2020, a las 17:42, Florian Fainelli
> > escribió:
> >
> >
> >
> > On 6/11/2020 8:16 AM, Álvaro Fernández Rojas wrote:
> >> Hi Miquel,
> >>
> >>> El 11 jun 2020, a las 9:55,
On Fri, Jun 12, 2020 at 07:55:26AM +0800, Boqun Feng wrote:
> Hi Peter and Waiman,
>
> On Thu, Jun 11, 2020 at 12:09:59PM -0400, Waiman Long wrote:
> > On 6/11/20 10:22 AM, Peter Zijlstra wrote:
> > > On Thu, Jun 11, 2020 at 09:51:29AM -0400, Waiman Long wrote:
> > >
> > > > There was an old
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: b791d1bdf9212d944d749a5c7ff6febdba241771
commit: f37f05503575c59020dacd36e999f4e8b3dbc115 mt76: mt76x2e: disable
pcie_aspm by default
date: 8 months ago
config: microblaze-randconfig-r023-20200612
The header file linux/uio.h includes crypto/hash.h which pulls in
most of the Crypto API. Since linux/uio.h is used throughout the
kernel this means that every tiny bit of change to the Crypto API
causes the entire kernel to get rebuilt.
This patch fixes this by moving it into lib/iov_iter.c
On Thu, Jun 11, 2020 at 04:49:37PM -0700, Kees Cook wrote:
> I think I prefer the last one.
Here's where I am with things:
https://git.kernel.org/pub/scm/linux/kernel/git/kees/linux.git/log/?h=devel/seccomp/addfd/v3.3
If we can agree on the ioctl numbering solution, I can actually send the
On Thu, Jun 11, 2020 at 05:54:12PM +0900, Jaewon Kim wrote:
>
>
> On 2020년 06월 10일 10:21, Minchan Kim wrote:
> > Hi Jaewon,
> >
> > On Tue, Jun 09, 2020 at 06:51:28PM +0900, Jaewon Kim wrote:
> >> zone_watermark_fast was introduced by commit 48ee5f3696f6 ("mm,
> >> page_alloc: shortcut watermark
Patch 1: avoids register write to unavailable SFLASHC_BURST_CFG register
Patch 2: set BAM mode only if not set by bootloader
[V3]
* Addressed review comments from Miquel
[V2]
* As per review comments from Miquèl split the original patch into two
addressing independent issues.
Sivaprakash
BAM is DMA controller on QCOM ipq platforms, BAM mode on NAND driver
is set by writing BAM_MODE_EN bit on NAND_CTRL register.
NAND_CTRL is an operational register and in BAM mode operational
registers are read only.
So, before writing into NAND_CTRL register check if BAM mode is already
enabled
On Sun, Jun 07, 2020 at 03:20:26PM +0200, Stephan Müller wrote:
> The Jitter RNG is unconditionally allocated as a seed source follwoing
> the patch 97f2650e5040. Thus, the instance must always be deallocated.
>
> Reported-by: syzbot+2e635807decef724a...@syzkaller.appspotmail.com
> Fixes:
SFLASHC_BURST_CFG is only available on older ipq nand platforms, this
register has been removed when the NAND controller is moved as part of qpic
controller.
avoid register writes to this register on devices which are based on qpic
NAND controllers.
Fixes: a0637834 (mtd: nand: qcom: support for
>-Original Message-
>From: Christophe Leroy
>Sent: 2020年6月12日 13:15
>To: lkp ; Christophe Leroy
>Cc: kbuild-...@lists.01.org; linux-kernel@vger.kernel.org; Michael Ellerman
>
>Subject: Re: arch/powerpc/kexec/core.c:246:29: sparse: sparse: incorrect type
>in
>assignment (different base
On Thu, May 28, 2020 at 03:21:04PM +0800, Dinghao Liu wrote:
> pm_runtime_get_sync() increments the runtime PM usage counter even
> the call returns an error code. Thus a pairing decrement is needed
> on the error handling path to keep the counter balanced.
>
> Signed-off-by: Dinghao Liu
> ---
>
ago
config: i386-randconfig-r011-20200612 (attached as .config)
compiler: gcc-4.9 (Ubuntu 4.9.3-13ubuntu2) 4.9.3
reproduce (this is a W=1 build):
git checkout 5699ad0aaf1091824f22492a708478912c38c7d2
# save the attached .config to linux build tree
make W=1 ARCH=i386
If you
On Thu, Jun 04, 2020 at 04:40:13AM +0200, Heinrich Schuchardt wrote:
> %s/suppying/supplying/
>
> Signed-off-by: Heinrich Schuchardt
> ---
> drivers/crypto/caam/Kconfig | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
Patch applied. Thanks.
--
Email: Herbert Xu
Home Page:
On Thu, Jun 04, 2020 at 12:39:47PM +0200, Heinrich Schuchardt wrote:
> Fix CAAM related typos.
>
> Signed-off-by: Heinrich Schuchardt
> ---
> v2:
> fix additional typos as indicated by Horia
> replaces https://lkml.org/lkml/2020/6/3/1129
> ---
> drivers/crypto/caam/Kconfig | 2 +-
>
On Thu, Jun 11, 2020 at 01:47:38PM -0600, Rob Herring wrote:
> There's no need to specify 'maxItems' with the same value as the number
> of entries in 'items'. A meta-schema update will catch future cases.
>
> Cc: Stephen Boyd
> Cc: Shawn Guo
> Cc: Sascha Hauer
> Cc: Thierry Reding
> Cc:
On Thu, Jun 11, 2020 at 11:17:14PM -0700, Kees Cook wrote:
> On Thu, Jun 11, 2020 at 09:51:50PM -0700, Nathan Chancellor wrote:
> > When running a kernel with Clang's Control Flow Integrity implemented,
> > there is a violation that happens when accessing
> > /sys/firmware/acpi/pm_profile:
> >
>
wanghai (M) wrote on Fri, Jun 12, 2020:
> You are right, I got a syzkaller bug.
>
> "p9_read_work+0x7c3/0xd90" points to list_del(>rreq->req_list);
>
> [ 62.733598] kasan: CONFIG_KASAN_INLINE enabled
> [ 62.734484] kasan: GPF could be caused by NULL-ptr deref or user memory
> access
> [
On Thu, 11 Jun 2020 20:36:40 -0400
Gaurav Singh wrote:
> Replace malloc/memset with calloc
>
> Fixes: 0fca931a6f21 ("samples/bpf: program demonstrating access to
> xdp_rxq_info")
> Signed-off-by: Gaurav Singh
Above is the correct use of Fixes + Signed-off-by.
Now you need to update/improve
On Thu, 11 Jun 2020 03:43:32 -0700 Joe Perches wrote:
> On Thu, 2020-06-11 at 10:32 +0200, Jiri Slaby wrote:
> > On 11. 06. 20, 10:30, SeongJae Park wrote:
> > > For example, as it seems at least you and I agree on the f-word to hug
> > > replacement, we could add ``fuck||hug`` in the
Hi Abhishek,
> This patch series is refactoring the btmrvl driver to add better support
> for controlling remote wakeup during suspend. Previously, the hci device
> was getting created as /sys/devices/virtual/bluetooth/hci0 and there
> wasn't a way to control wakeup for the device from userspace.
Hi Vincent,
We test the regression still existed in v5.7, do you have time to
look at it? Thanks.
=
tbox_group/testcase/rootfs/kconfig/compiler/runtime/nr_task/debug-setup/test/cpufreq_governor/ucode:
Good time of the day,
Hope you all are staying safe during these challenging times.
I have been struggling with KVM guest freezes after the upgrade from
4.19 LTS to 5.4 LTS.
Searching through the internet lead me to
From: Fan Guo
If ib_dma_mapping_error() returns non-zero value, ib_mad_post_receive_mads
will jump out of loops and return -ENOMEM without freeing mad_priv. We fix
this memory-leak problem by freeing mad_priv in this case.
Fixes: 2c34e68f4261 ("IB/mad: Check and handle potential DMA mapping
-randconfig-r016-20200612 (attached as .config)
compiler: gcc-6 (Debian 6.3.0-18+deb9u1) 6.3.0 20170516
reproduce (this is a W=1 build):
git checkout ca07eda33e01eafa7a26ec06974f7eacee6a89c8
# save the attached .config to linux build tree
make W=1 ARCH=i386
If you fix
Signed-off-by: kernel test robot
---
inode.c |2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/fs/hugetlbfs/inode.c b/fs/hugetlbfs/inode.c
index 5c0c50a88c84b..98d044be8a5cf 100644
--- a/fs/hugetlbfs/inode.c
+++ b/fs/hugetlbfs/inode.c
@@ -41,7 +41,7 @@
static const
The current timeout is too low for some of the workloads and we see false
errors as a result.
Signed-off-by: Oded Gabbay
---
drivers/misc/habanalabs/gaudi/gaudi.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/misc/habanalabs/gaudi/gaudi.c
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