As we are about to add support for sysreg access to ETM4.4+ components,
make sure that we read the registers only on the host CPU.
Cc: Mathieu Poirier
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
---
.../coresight/coresight-etm4x-sysfs.c | 23 ---
1 file changed, 10
Convert the CoreSight CLAIM set/clear, LOCK/UNLOCK operations to
use the coresight device access abstraction.
Mostly a mechanical change.
Cc: Mathieu Poirier
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
---
drivers/hwtracing/coresight/coresight-catu.c | 14 ++--
Document the bindings for ETMv4.4 and later with only system register
access.
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Cc: Mathieu Poirier
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
---
Documentation/devicetree/bindings/arm/coresight.txt | 6 +-
1 file changed, 5 insertions(+),
Define the fields of the DEVARCH register for identifying
a component as an ETMv4.x unit.
Cc: Mathieu Poirier
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
---
drivers/hwtracing/coresight/coresight-etm4x.c | 4 ++--
drivers/hwtracing/coresight/coresight-etm4x.h | 16
2
TPIU driver access the device before the coresight device
is registered. In other words, before the drvdata->csdev
is valid. Thus, we need to make sure that the csdev_access
is valid for both the invocations. Switch to using the
csdev_access directly instead of relying on availability
of
ETMv4.4 architecture defines the system instructions for accessing
ETM via register accesses. Add basic support for accessing a given
register via system instructions.
Cc: Mathieu Poirier
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
---
drivers/hwtracing/coresight/coresight-etm4x.c | 39 ++
We are about to introduce support for sysreg access to ETMv4.4+
component. Since there are generic routines that access the
registers (e.g, CS_LOCK/UNLOCK , claim/disclaim operations, timeout)
and in order to preserve the logic of these operations at a single place
we introduce an abstraction
Skip cpu save/restore before the coresight device is registered.
Cc: Mathieu Poirier
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
---
drivers/hwtracing/coresight/coresight-etm4x.c | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git
Add support for etms without memory mapped access.
Cc: Mathieu Poirier
Cc: Mike Leach
Signed-off-by: Suzuki K Poulose
---
drivers/hwtracing/coresight/coresight-etm4x.c | 21 +++
1 file changed, 21 insertions(+)
diff --git a/drivers/hwtracing/coresight/coresight-etm4x.c
CoreSight ETMv4.4 introduced system instructions for accessing
the ETM. This also implies that they may not be on the amba bus.
Right now all the CoreSight components are accessed via memory
map. Also, we have some common routines in coresight generic
code driver (e.g, CS_LOCK, claim/disclaim),
Remove a coding style error. It makes code more readable.
Signed-off-by: Muhammad Usama Anjum
---
drivers/staging/octeon/ethernet-defines.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/staging/octeon/ethernet-defines.h
Hi Zhou,
Le mer. 22 juil. 2020 à 14:33, 周琰杰 (Zhou Yanjie)
a écrit :
Add support for probing the phy-jz4770 driver on the JZ4780 SoC,
the X1000 SoC and the X1830 SoC from Ingenic.
Tested-by: 周正 (Zhou Zheng)
Co-developed-by: 漆鹏振 (Qi Pengzhen)
Signed-off-by: 漆鹏振 (Qi Pengzhen)
Signed-off-by:
On Tue, Jul 21, 2020 at 01:56:35PM -0700, Bjorn Andersson wrote:
> On Tue 21 Jul 12:16 PDT 2020, Siddharth Gupta wrote:
> > On 7/15/2020 2:51 PM, Mathieu Poirier wrote:
> > > On Wed, Jul 15, 2020 at 02:18:39PM -0600, Mathieu Poirier wrote:
> > > > On Tue, Jul 07, 2020 at 12:07:49PM -0700,
v10->v11:
Fix typos.
周琰杰 (Zhou Yanjie) (2):
dt-bindings: timer: Add Ingenic X1000 OST bindings.
clocksource: Ingenic: Add support for the Ingenic X1000 OST.
.../devicetree/bindings/timer/ingenic,sysost.yaml | 63 +++
drivers/clocksource/Kconfig| 12 +-
Add the OST bindings for the X1000 SoC from Ingenic.
Tested-by: 周正 (Zhou Zheng)
Signed-off-by: 周琰杰 (Zhou Yanjie)
Reviewed-by: Paul Cercueil
Reviewed-by: Rob Herring
---
Notes:
v1->v2:
No change.
v2->v3:
Fix wrong parameters in "clocks".
v3->v4:
1.Rename
X1000 and SoCs after X1000 (such as X1500 and X1830) had a separate
OST, it no longer belongs to TCU. This driver will register both a
clocksource and a sched_clock to the system.
Tested-by: 周正 (Zhou Zheng)
Co-developed-by: 漆鹏振 (Qi Pengzhen)
Signed-off-by: 漆鹏振 (Qi Pengzhen)
Signed-off-by: 周琰杰
From: KP Singh
Refactor the functionality in bpf_sk_storage.c so that concept of
storage linked to kernel objects can be extended to other objects like
inode, task_struct etc.
Each new local storage will still be a separate map and provide its own
set of helpers. This allows for future object
From: KP Singh
inode_local_storage:
* Hook to the file_open and inode_unlink LSM hooks.
* Create and unlink a temporary file.
* Store some information in the inode's bpf_local_storage during
file_open.
* Verify that this information exists when the file is unlinked.
sk_local_storage:
* Hook
From: KP Singh
A purely mechanical change:
bpf_sk_storage.c = bpf_sk_storage.c + bpf_local_storage.c
bpf_sk_storage.h = bpf_sk_storage.h + bpf_local_storage.h
Signed-off-by: KP Singh
---
include/linux/bpf_local_storage.h | 165 +
include/net/bpf_sk_storage.h |
On Wed, Jul 22, 2020 at 8:50 AM Willem de Bruijn
wrote:
>
> > TBH, I don't what is the preferred way to handle it. Perhaps DaveM or
> > Alexei/Daniel can say what would make their life easiest?
>
> Good point.
>
> With the above, there still remains a merge conflict, of course. But
> then we can
From: KP Singh
Adds support for both bpf_{sk, inode}_storage_{get, delete} to be used
in LSM programs. These helpers are not used for tracing programs
(currently) as their usage is tied to the life-cycle of the object and
should only be used where the owning object won't be freed (when the
From: KP Singh
Similar to bpf_local_storage for sockets, add local storage for inodes.
The life-cycle of storage is managed with the life-cycle of the inode.
i.e. the storage is destroyed along with the owning inode.
The BPF LSM allocates an __rcu pointer to the bpf_local_storage in the
From: KP Singh
Provide the a ability to define local storage caches on a per-object
type basis. The caches and caching indices for different objects should
not be inter-mixed as suggested in:
https://lore.kernel.org/bpf/20200630193441.kdwnkestulg5e...@kafai-mbp.dhcp.thefacebook.com/
From: KP Singh
# v4 -> v5
- Split non-functional changes into separate commits.
- Updated the cache macros to be simpler.
- Fixed some bugs noticed by Martin.
- Updated the userspace map functions to use an fd for lookups, updates
and deletes.
- Rebase.
# v3 -> v4
- Fixed a missing include
From: KP Singh
A purely mechanical change to split the renaming from the actual
generalization.
Flags/consts:
SK_STORAGE_CREATE_FLAG_MASK BPF_LOCAL_STORAGE_CREATE_FLAG_MASK
BPF_SK_STORAGE_CACHE_SIZE BPF_LOCAL_STORAGE_CACHE_SIZE
MAX_VALUE_SIZE
On Wed, Jul 22, 2020 at 6:30 PM Laurent Pinchart
wrote:
>
> Hi Dafna and Tomasz,
>
> On Wed, Jul 22, 2020 at 03:24:59PM +, Tomasz Figa wrote:
> > On Sat, Jul 11, 2020 at 01:04:31PM +0200, Dafna Hirschfeld wrote:
> > > On 16.08.19 02:13, Laurent Pinchart wrote:
> > > > On Tue, Jul 30, 2019 at
On Wed, Jul 22, 2020 at 12:56 AM Christoph Hellwig wrote:
>
> On Mon, Jul 20, 2020 at 01:47:56PM -0700, Alexei Starovoitov wrote:
> > > a kernel pointer. This is something that works for most common sockopts
> > > (and is something that the ePBF support relies on), but unfortunately
> > > in
Sean Christopherson writes:
> Use the shadow_root_level from the current MMU as the root level for the
> PGD, i.e. for VMX's EPTP. This eliminates the weird dependency between
> VMX and the MMU where both must independently calculate the same root
> level for things to work correctly.
On Wed, 2020-07-22 at 18:09 +0200, Jernej Škrabec wrote:
> Hi!
>
> Dne sreda, 15. julij 2020 ob 22:22:29 CEST je Ezequiel Garcia napisal(a):
> > As discussed recently, the current interface for the
> > Decoded Picture Buffer is not enough to properly
> > support field coding.
> >
> > This commit
On Wed, Jul 22, 2020 at 4:01 AM Georgi Djakov wrote:
>
> The bootloaders often do some initial configuration of the interconnects
> in the system and we want to keep this configuration until all consumers
> have probed and expressed their bandwidth needs. This is because we don't
> want to change
From: Sasi Kumar
Multiple connects/disconnects can cause a crash on the second
disconnect. The driver had a problem where it would try to send
endpoint commands after it was disconnected which is not allowed
by the hardware. The fix is to only allow the endpoint commands
when the endpoint is
Version v1.0.40 of the Android host ADB software increased maximum
transfer sizes from 256K to 1M. Since the STB ADB gadget driver
requests only 16K at a time, the BDC driver ran out of buffer
descriptors (BDs) if the queuing happens faster than the incoming
16K transfers. This issue is fixed by
From: Florian Fainelli
The BDC clock is optional and we may get an -EPROBE_DEFER error code
which would not be propagated correctly, fix this by using
devm_clk_get_optional().
Signed-off-by: Florian Fainelli
Signed-off-by: Al Cooper
---
drivers/usb/gadget/udc/bdc/bdc_core.c | 8 +++-
1
From: Danesh Petigara
GISB bus error kernel panics have been observed during S2 transition
tests on the 7271t platform. The errors are a result of the BDC
interrupt handler trying to access BDC register space after the
system's suspend callbacks have completed.
Adding a suspend hook to the BDC
Remove "brcm,bdc-v0.16" because it was never used on any system.
Add "brcm,bdc-udc-v2" which exists for any STB system with BDC.
Signed-off-by: Al Cooper
Acked-by: Florian Fainelli
---
Documentation/devicetree/bindings/usb/brcm,bdc.txt | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
v3 - s/there/their/ in commit message in patch 2/7 as suggested
by Sergei Shtylyov.
v2 - Fix Signed-off-by issues, remove internal bug reference.
Fix binding document to match driver.
Updates and fixes to the Broadcom USB BDC driver.
Al Cooper (4):
dt-bindings: usb: bdc: Update
On Android systems, After temporarily putting device to S2 by
short pressing the power button on the remote, the display turns
off. Then press the power button to turn the display back up. Adb
devices would show the devices is offline. It needs a physical
disconnect of the usb cable or power cycle
Add compatible string for some newer boards that only have this
as their match sting. Remove unused compatible string "brcm,bdc-v0.16".
Signed-off-by: Al Cooper
Acked-by: Florian Fainelli
---
drivers/usb/gadget/udc/bdc/bdc_core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff
From: Colin Ian King
The variable rc is being initialized with a value that is
never read and it is being updated later with a new value. The
initialization is redundant and can be removed.
Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian King
---
drivers/acpi/apei/hest.c | 2 +-
Sean Christopherson writes:
> Refactor the shadow NPT role calculation into a separate helper to
> better differentiate it from the non-nested shadow MMU, e.g. the NPT
> variant is never direct and derives its root level from the TDP level.
>
> Signed-off-by: Sean Christopherson
> ---
>
On Wed, Jul 22, 2020 at 09:43:56AM -0700, Jaegeuk Kim wrote:
> On 07/19, Greg KH wrote:
> > On Sun, Jul 19, 2020 at 02:44:08PM +0900, Daeho Jeong wrote:
> > > From: Daeho Jeong
> > >
> > > Added a symbolic link directory pointing to its device name
> > > directory using the volume name of the
On 7/21/2020 9:25 AM, Jason Gunthorpe wrote:
On Tue, Jul 21, 2020 at 09:02:41AM -0700, Dave Jiang wrote:
From: Megha Dey
The dev-msi interrupts are to be allocated/freed only for custom devices,
not standard PCI-MSIX devices.
These interrupts are device-defined and they are distinct from
Hi Dan,
On 7/21/2020 9:21 AM, Jason Gunthorpe wrote:
On Tue, Jul 21, 2020 at 09:02:35AM -0700, Dave Jiang wrote:
From: Megha Dey
When DEV_MSI is enabled, the dev_msi_default_domain is updated to the
base DEV-MSI irq domain. If interrupt remapping is enabled, we create
a new IR-DEV-MSI irq
Hi, Alexander,
On 7/22/20 7:37 PM, Alexander Sverdlin wrote:
> EXTERNAL EMAIL: Do not click links or open attachments unless you know the
> content is safe
>
> Hello Luis,
>
> thank you for the patch!
>
> On 11/06/2020 00:46, Luis Alberto Herrera wrote:
>> This change reverts aba3a882a178:
在 2020/7/23 上午12:49, Daniel Lezcano 写道:
On 22/07/2020 18:47, Zhou Yanjie wrote:
Hello Daniel,
在 2020/7/21 下午8:53, Daniel Lezcano 写道:
On 20/07/2020 19:31, 周琰杰 (Zhou Yanjie) wrote:
v9->v10:
Fix errors which case "make dt_binding_check" failed.
周琰杰 (Zhou Yanjie) (2):
dt-bindings: timer:
Sean Christopherson writes:
> Move the initialization of shadow NPT MMU's shadow_root_level into
> kvm_init_shadow_npt_mmu() and explicitly set the level in the shadow NPT
> MMU's role to be the TDP level. This ensures the role and MMU levels
> are synchronized and also initialized before
On 7/21/20 7:04 PM, Josh Poimboeuf wrote:
On Tue, Jul 21, 2020 at 12:14:06PM -0400, Joe Lawrence wrote:
Compiler optimizations can have serious implications on livepatching.
Create a document that outlines common optimization patterns and safe
ways to livepatch them.
Signed-off-by: Joe
On 7/22/2020 8:51 AM, Ray Jui wrote:
>
> On 7/22/2020 3:41 AM, Wolfram Sang wrote:
>>
+ synchronize_irq(iproc_i2c->irq);
>>>
>>> If one takes a look at the I2C slave ISR routine, there are places where
>>> IRQ can be re-enabled in the ISR itself. What happens after we mask all
>>> slave
I am using a custom, optimized and stripped down version, OVMF build.
Do you think it is because of the OVMF or grub?
In my case, there are 2 places where the CPUID is called: the first
one is to decide if long mode is supported, along with few other
features like SSE support and the second one
On Wed, Jul 22, 2020 at 01:14:21PM +, David Laight wrote:
> From: Catalin Marinas
> > Sent: 22 July 2020 12:37
> > On Sun, Jul 19, 2020 at 12:34:11PM -0700, Linus Torvalds wrote:
> > > On Sun, Jul 19, 2020 at 12:28 PM Linus Torvalds
> > > wrote:
> > > > I think we should try to get rid of the
Hi Jason,
On 7/21/2020 9:13 AM, Jason Gunthorpe wrote:
On Tue, Jul 21, 2020 at 09:02:28AM -0700, Dave Jiang wrote:
From: Megha Dey
Add support for the creation of a new DEV_MSI irq domain. It creates a
new irq chip associated with the DEV_MSI domain and adds the necessary
domain operations
> On Jul 22, 2020, at 8:40 AM, Peter Zijlstra wrote:
>
> On Tue, Jul 21, 2020 at 10:40:19PM +, Song Liu wrote:
>
>> We only need to block precise_ip >= 2. precise_ip == 1 is OK.
>
> Uuuh, how? Anything PEBS would have the same problem. Sure, precise_ip
> == 1 will not correct the IP,
On 22/07/2020 18:47, Zhou Yanjie wrote:
> Hello Daniel,
>
> 在 2020/7/21 下午8:53, Daniel Lezcano 写道:
>> On 20/07/2020 19:31, 周琰杰 (Zhou Yanjie) wrote:
>>> v9->v10:
>>> Fix errors which case "make dt_binding_check" failed.
>>>
>>> 周琰杰 (Zhou Yanjie) (2):
>>> dt-bindings: timer: Add Ingenic X1000
Hello Daniel,
在 2020/7/21 下午8:53, Daniel Lezcano 写道:
On 20/07/2020 19:31, 周琰杰 (Zhou Yanjie) wrote:
v9->v10:
Fix errors which case "make dt_binding_check" failed.
周琰杰 (Zhou Yanjie) (2):
dt-bindings: timer: Add Ingenic X1000 OST bindings.
clocksource: Ingenic: Add support for the Ingenic
Hi Pavel,
Am Mittwoch, den 22.07.2020, 16:04 +0200 schrieb Pavel Machek:
> > This patch adds support for "default-state" devicetree property, which
> > allows to defer pwm init to first use of led.
> >
> > This allows to configure the PWM early in bootloader to let the LED
> > blink until an
With all nVHE per-CPU variables being part of the hyp per-CPU region,
mapping them individual is not necessary any longer. They are mapped to hyp
as part of the overall per-CPU region.
Signed-off-by: David Brazdil
---
arch/arm64/include/asm/kvm_mmu.h | 25 +++--
this_cpu_ptr is meant for use in kernel proper because it selects between
TPIDR_EL1/2 based on nVHE/VHE. __hyp_this_cpu_ptr was used in hyp to always
select TPIDR_EL2. Unify all users behind this_cpu_ptr and friends by
selecting _EL2 register under __KVM_NVHE_HYPERVISOR__.
Under
Hyp keeps track of which cores require SSBD callback by accessing a
kernel-proper global variable. Create an nVHE symbol of the same name
and copy the value from kernel proper to nVHE at KVM init time.
Done in preparation for separating percpu memory owned by kernel
proper and nVHE.
Add hyp percpu section to linker script and rename the corresponding ELF
sections of hyp/nvhe object files. This moves all nVHE-specific percpu
variables to the new hyp percpu section.
Allocate sufficient amount of memory for all percpu hyp regions at global KVM
init time, and create
Defining a per-CPU variable in hyp/nvhe will result in its name being prefixed
with __kvm_nvhe_. Add helpers for declaring these variables in kernel proper
and accessing them with this_cpu_ptr and per_cpu_ptr.
Signed-off-by: David Brazdil
---
arch/arm64/include/asm/kvm_asm.h | 25
Host CPU context is stored in a global per-cpu variable `kvm_host_data`.
In preparation for introducing independent per-CPU region for nVHE hyp,
create two separate instances of `kvm_host_data`, one for VHE and one
for nVHE.
Signed-off-by: David Brazdil
---
arch/arm64/include/asm/kvm_host.h | 2
In preparation for unmapping hyp pages from host stage-2, allocate/free hyp
stack using new helpers which automatically mark the pages reserved.
Signed-off-by: David Brazdil
---
arch/arm64/kvm/arm.c | 49 ++--
1 file changed, 47 insertions(+), 2
The hyp_adr/ldr_this_cpu helpers were introduced for use in hyp code because
they always needed to use TPIDR_EL2 for base, while adr/ldr_this_cpu from
kernel proper would select between TPIDR_EL2 and _EL1 based on VHE/nVHE.
Simplify this now that the nVHE hyp mode case can be handled using the
Introduce '.hyp.data..percpu' as part of ongoing effort to make nVHE
hyp code self-contained and independent of the rest of the kernel.
The series builds on top of the "Split off nVHE hyp code" series which
used objcopy to rename '.text' to '.hyp.text' and prefix all ELF
symbols with '__kvm_nvhe'
Modify generic linker script macros to generate section/symbol names for
percpu area using overridable macros. No functional changes.
This will allow arm64 linker script to define a second KVM-specific percpu
data section using the generic PERCPU_SECTION macro.
Signed-off-by: David Brazdil
---
On 07/19, Greg KH wrote:
> On Sun, Jul 19, 2020 at 02:44:08PM +0900, Daeho Jeong wrote:
> > From: Daeho Jeong
> >
> > Added a symbolic link directory pointing to its device name
> > directory using the volume name of the partition in sysfs.
> > (i.e., /sys/fs/f2fs/vol_#x -> /sys/fs/f2fs/sda1)
>
Add the RNG bindings for the JZ4780 SoC and
the X1000 SoC from Ingenic.
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
.../devicetree/bindings/rng/ingenic,rng.yaml | 36 ++
1 file changed, 36 insertions(+)
create mode 100644
On Mon, Jul 20, 2020 at 2:25 AM syzbot
wrote:
>
> syzbot has found a reproducer for the following issue on:
>
> HEAD commit:14525656 compiler.h: reinstate missing KMSAN_INIT
> git tree: https://github.com/google/kmsan.git master
> console output:
1.Add the RNG bindings for the JZ4780 SoC and the X1000 SoC
from Ingenic.
2.Add JZ4780 SoC and X1000 SoC random number generator driver,
based on PrasannaKumar Muralidharan's JZ4780 RNG driver.
周琰杰 (Zhou Yanjie) (2):
dt-bindings: RNG: Add Ingenic RNG bindings.
crypto: Ingenic: Add
Add JZ4780 SoC and X1000 SoC random number generator driver,
based on PrasannaKumar Muralidharan's JZ4780 RNG driver.
Tested-by: 周正 (Zhou Zheng)
Tested-by: Mathieu Malaterre
Suggested-by: Jeffrey Walton
Signed-off-by: PrasannaKumar Muralidharan
Signed-off-by: 周琰杰 (Zhou Yanjie)
---
Pavel
On 7/21/20 4:11 PM, Pavel Machek wrote:
Hi!
Add multicolor framework support for the lp55xx family.
Acked-by: Pavel Machek
Acked-by: Jacek Anaszewski
Signed-off-by: Dan Murphy
Applied 4,5,6 and 8,9.
config LEDS_LP55XX_COMMON
tristate "Common Driver for TI/National
Hi!
On 22/07/2020 17:18, tudor.amba...@microchip.com wrote:
[...]
After spi_nor_write_disable() return code checks were introduced in the
spi-nor front end intel-spi backend stopped to work because WRDI was never
supported and always failed.
Just pretend it was
On Fri, Jul 17, 2020 at 01:30:03PM -0400, Steven Rostedt wrote:
> On Fri, 17 Jul 2020 16:33:38 +0200
> gregory.herr...@oracle.com wrote:
> > From: Gregory Herrero
> > Currently, if a section has a relocation to '_mcount' symbol, a new
> > __mcount_loc entry will be added whatever the relocation
Hello Luis,
thank you for the patch!
On 11/06/2020 00:46, Luis Alberto Herrera wrote:
> This change reverts aba3a882a178: "mtd: spi-nor: intel: provide a range
> for poll_timout". That change introduces a performance regression when
> reading sequentially from flash. Logging calls to
On 7/22/20 6:16 AM, Stephen Rothwell wrote:
> Hi all,
>
> Changes since 20200721:
>
on i386:
when CONFIG_SYSCTL is not set/enabled:
ERROR: modpost: "sysctl_vals" [drivers/net/vrf.ko] undefined!
--
~Randy
Reported-by: Randy Dunlap
On Wed, Jul 22, 2020 at 11:53 AM syzbot
wrote:
>
> Hello,
>
> syzbot found the following issue on:
Sorry for the noise. This is a false report caused by incorrect
copy_to_user() instrumentation after KMSAN rebase.
Should be fixed now.
#syz invalid
> HEAD commit:14525656 compiler.h:
Hi Dafna and Tomasz,
On Wed, Jul 22, 2020 at 03:24:59PM +, Tomasz Figa wrote:
> On Sat, Jul 11, 2020 at 01:04:31PM +0200, Dafna Hirschfeld wrote:
> > On 16.08.19 02:13, Laurent Pinchart wrote:
> > > On Tue, Jul 30, 2019 at 03:42:47PM -0300, Helen Koike wrote:
>
> [snip]
>
> > > > +static void
On Tue, Jul 21, 2020 at 11:27 PM Christoph Hellwig wrote:
>
> There is no point in trying to call bdev_read_page if SWP_SYNCHRONOUS_IO
> is not set, as the device won't support it.
>
> Signed-off-by: Christoph Hellwig
> ---
> mm/page_io.c | 18 ++
> 1 file changed, 10
Hi Heiko,
Am 22.07.20 um 16:37 schrieb Heiko Stübner:
Hi,
Am Mittwoch, 22. Juli 2020, 16:31:37 CEST schrieb Alex Bee:
Since the loopbacktest clock is not exported and is not touched in the
driver, it needs the CLK_IGNORE_UNUSED flag in order to get the emac
working.
could you please add it
On Fri, Jul 17, 2020 at 12:21 AM wrote:
>
> From: Ira Weiny
>
> The PKRS MSR is not managed by XSAVE. It is already preserved through a
> context switch but this support leaves exception handling code open to
> memory accesses which the interrupted process has allowed.
>
> Close this hole by
On Tue, 21 Jul 2020 19:25:14 +0200 Andrew Lunn wrote:
> On Tue, Jul 21, 2020 at 10:44:19PM +0530, Rakesh Pillai wrote:
> > NAPI gets scheduled on the CPU core which got the
> > interrupt. The linux scheduler cannot move it to a
> > different core, even if the CPU on which NAPI is running
> > is
Since the loopbacktest clock is not exported and is not touched in the
driver, it has to be added to rk3188_critical_clocks to be protected from
being disabled and in order to get the emac working.
Signed-off-by: Alex Bee
---
Changes in v2:
- add sclk_mac_lbtest to rk3188_critical_clocks
From: Al Viro > Sent: 22 July 2020 16:55
> To: David Laight
> Cc: Linus Torvalds ;
> linux-kernel@vger.kernel.org; linux-
> a...@vger.kernel.org
> Subject: Re: [PATCH 04/18] csum_and_copy_..._user(): pass 0x instead
> of 0 as initial sum
>
> On Wed, Jul 22, 2020 at 03:22:45PM +,
On Wed, Jul 22, 2020 at 1:55 AM Arnd Bergmann wrote:
>
> Adding Roman Gushchin to Cc, he touched that code recently.
>
> Naresh, if nobody has any immediate ideas, you could double-check by
> reverting these commits:
>
> e0b8d00b7561 mm: memcg/percpu: per-memcg percpu memory statistics
>
On Thu, Jul 16, 2020 at 04:39:14PM +0200, Mickaël Salaün wrote:
>
> On 15/07/2020 22:37, Kees Cook wrote:
> > On Tue, Jul 14, 2020 at 08:16:36PM +0200, Mickaël Salaün wrote:
> >> @@ -2849,7 +2855,7 @@ static int may_open(const struct path *path, int
> >> acc_mode, int flag)
> >>case S_IFLNK:
On 7/22/20 1:49 AM, Baoquan He wrote:
> On 07/20/20 at 05:38pm, Mike Kravetz wrote:
>>> + if (count != h->max_huge_pages) {
>>> + char buf[32];
>>> +
>>> + string_get_size(huge_page_size(h), 1, STRING_UNITS_2, buf, 32);
>>> + pr_warn("HugeTLB: %s %lu of page size %s
On 7/21/2020 7:30 PM, Guenter Roeck wrote:
Since commit 317aeb83c92b ("scsi: lpfc: Add blk_io_poll support for
latency improvment"), the lpfc driver depends on CPUFREQ. Without it,
builds fail with
drivers/scsi/lpfc/lpfc_sli.c: In function 'lpfc_init_idle_stat_hb':
tree/branch: https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git
timers/urgent
branch HEAD: b4a25fb0e62990df467451744b22e0e24960a5e6 Merge tag
'timers-v5.8-rc7' of https://git.linaro.org/people/daniel.lezcano/linux into
timers/urgent
elapsed time: 1210m
configs tested: 119
configs
As syzkaller detected, wlan-ng driver does not do sanity check of
endpoints in prism2sta_probe_usb(), add check for xfer direction and type
Reported-and-tested-by: syzbot+c2a1fa67c02faa0de...@syzkaller.appspotmail.com
Link: https://syzkaller.appspot.com/bug?extid=c2a1fa67c02faa0de723
Hi!
Dne sreda, 15. julij 2020 ob 22:22:29 CEST je Ezequiel Garcia napisal(a):
> As discussed recently, the current interface for the
> Decoded Picture Buffer is not enough to properly
> support field coding.
>
> This commit introduces enough semantics to support
> frame and field coding, and to
Checks on `addr_len` and `usax->sax25_ndigis` are insufficient.
ax25_sendmsg() can go out of bounds when `usax->sax25_ndigis` equals to 7
or 8. Fix it.
It is safe to remove `usax->sax25_ndigis > AX25_MAX_DIGIS`, since
`addr_len` is guaranteed to be less than or equal to
`sizeof(struct
On Wed, Jul 22, 2020 at 07:39:55AM -0700, Kees Cook wrote:
> On Wed, Jul 22, 2020 at 11:27:30AM +0200, Miroslav Benes wrote:
> > Let me CC live-patching ML, because from a quick glance this is something
> > which could impact live patching code. At least it invalidates assumptions
> > which
Hi!
Dne sreda, 15. julij 2020 ob 22:22:26 CEST je Ezequiel Garcia napisal(a):
> The prediction weight parameters are only required under
> certain conditions, which depend on slice header parameters.
>
> The slice header syntax specifies that the prediction
> weight table is present if:
>
>
On Fri, Jul 17, 2020 at 09:46:24AM +0200, Dafna Hirschfeld wrote:
> Hi,
>
>
> On 11.07.20 13:04, Dafna Hirschfeld wrote:
> > Hi Laurent,
> >
> > On 16.08.19 02:13, Laurent Pinchart wrote:
> > > Hello Helen,
> > >
> > > Thank you for the patch.
> > >
> > > On Tue, Jul 30, 2019 at 03:42:47PM
On 22/07/2020 16:44, Colin King wrote:
From: Colin Ian King
The variable res is being initialized with a value that is
never read and it is being updated later with a new value. The
initialization is redundant and can be removed.
Addresses-Coverity: ("Unused value")
Signed-off-by: Colin Ian
Move the bindings out of drivers/staging and place them in
Documentation/devicetree/bindings instead.
Also, add DT nodes for RK3399 and verify with make ARCH=arm64 dtbs_check
and make ARCH=arm64 dt_binding_check.
Tested by verifying images streamed from Scarlet Chromebook
Changes in v5:
- Drop
Extend current infrastructure to store chain page size in a struct
and use it in all functions instead of fixed QED_CHAIN_PAGE_SIZE.
Its value remains the default one, but can be overridden in
qed_chain_init_params before chain allocation.
Signed-off-by: Alexander Lobakin
Signed-off-by: Igor
Correct the indentation of net_device_ops declarations for fancier look.
Signed-off-by: Alexander Lobakin
Signed-off-by: Igor Russkikh
Signed-off-by: Michal Kalderon
---
drivers/net/ethernet/qlogic/qede/qede_main.c | 122 +--
1 file changed, 61 insertions(+), 61 deletions(-)
The Rockchip ISP bindings was moved out of staging.
Update MAINTAINERS file with the new path.
Fields sorted according to output of
./scripts/parse-maintainers.pl --input=MAINTAINERS --output=MAINTAINERS
--order
Signed-off-by: Helen Koike
---
V3:
- Add line:
L:
From: Shunqian Zheng
RK3399 has two ISPs, but only isp0 was tested.
Add isp0 node in rk3399 dtsi
Verified with:
make ARCH=arm64 dtbs_check
DT_SCHEMA_FILES=Documentation/devicetree/bindings/media/rockchip-isp1.yaml
Signed-off-by: Shunqian Zheng
Signed-off-by: Jacob Chen
Signed-off-by: Helen
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