Add support for single link SGMII/QSGMII configuration.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 89 +++
1 file changed, 89 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
Add support for PHY APB reset and make it optional.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
b/drivers/phy/cadence/phy-cadence-torrent.c
index
Add PCIe + USB Unique SSC multilink configuration sequences.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 216 ++
1 file changed, 216 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
Cadence Torrent PHY is a multiprotocol PHY supporting different multilink
PHY configurations including DisplayPort, PCIe, USB, SGMII, QSGMII etc.
This patch series extends functionality of Torrent PHY driver to support
following configurations:
- Single link PCIe configuration
- PCIe +
Add USB + SGMII/QSGMII multilink configuration sequences.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 254 ++
1 file changed, 254 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
For multilink configuration, deassert PHY and link reset after PHY
registers are configured in probe and only check link status in
power_on callback.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 28 +--
1 file changed, 21 insertions(+), 7
Add support for single link USB configuration.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 260 +-
1 file changed, 259 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
Check if cmn_ready is set after both PLL0 and PLL1 are locked.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 31 ++-
1 file changed, 30 insertions(+), 1 deletion(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
Add support to configure link_cmn_vals and xcvr_diag_vals in case of single
link PHY configuration.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 44 +++
1 file changed, 44 insertions(+)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
Add definition for QSGMII phy type.
Signed-off-by: Swapnil Jakhade
---
include/dt-bindings/phy/phy.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/phy/phy.h b/include/dt-bindings/phy/phy.h
index 36e8c241cf48..887a31b250a8 100644
--- a/include/dt-bindings/phy/phy.h
+++
Add single link PCIe register sequences in Torrent PHY driver.
Also, add support for getting SSC type from DT.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 296 +++---
1 file changed, 266 insertions(+), 30 deletions(-)
diff --git
On Fri, Aug 07, 2020 at 12:35PM +0200, Jürgen Groß wrote:
> On 07.08.20 11:50, Marco Elver wrote:
> > On Fri, Aug 07, 2020 at 11:24AM +0200, Jürgen Groß wrote:
> > > On 07.08.20 11:01, Marco Elver wrote:
> > > > On Thu, 6 Aug 2020 at 18:06, Marco Elver wrote:
> > > > > On Thu, 6 Aug 2020 at
Hi Niklas,
On Fri, Aug 7, 2020 at 1:27 PM Niklas Söderlund
wrote:
> On 2020-08-06 13:47:58 +0200, Geert Uytterhoeven wrote:
> > On Thu, Aug 6, 2020 at 1:17 PM Lad, Prabhakar
> > wrote:
> > > On Wed, Aug 5, 2020 at 12:19 PM Geert Uytterhoeven
> > > wrote:
> > > > On Thu, Jul 16, 2020 at 7:20
On Thu, Aug 06, 2020 at 08:20:35PM +0200, Krzysztof Kozlowski wrote:
> From: Arnd Bergmann
>
> The plat-samsung directory and mach-s5pv210 can be build
> completely independently, so split the two Kconfig symbols
> CONFIG_PLAT_SAMSUNG and CONFIG_ARCH_S5PV210.
Acked-by: Mark Brown
On Thu, Aug 06, 2020 at 08:20:37PM +0200, Krzysztof Kozlowski wrote:
> From: Arnd Bergmann
>
> The file is mostly specific to the driver, the few bits that
> are actually used by the platform code get moved to mach/map.h
> instead.
Acked-by: Mark Brown
signature.asc
Description: PGP
On 8/7/20 12:46 PM, pet...@infradead.org wrote:
> On Fri, Aug 07, 2020 at 11:56:04AM +0200, Juri Lelli wrote:
>> Starting deadline server for lower priority classes right away when
>> first task is enqueued might break guarantees, as tasks belonging to
>> intermediate priority classes could be
From: Madhuparna Bhowmik
In rdc321x_wdt_probe(), rdc321x_wdt_device.queue is initialized
after misc_register(), hence if ioctl is called before its
initialization which can call rdc321x_wdt_start() function,
it will see an uninitialized value of rdc321x_wdt_device.queue,
hence initialize it
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 86cfccb66937dd6cbf26ed619958b9e587e6a115
commit: 48ba02b2e2b1a1c80718e93fefe99c8319597c4a usb: gadget: add udc driver
for max3420
date: 5 months ago
config: parisc-randconfig-m031-20200807 (attached
Hi Geert, Lad,
On 2020-08-06 13:47:58 +0200, Geert Uytterhoeven wrote:
> Hi Prabhakar,
>
> On Thu, Aug 6, 2020 at 1:17 PM Lad, Prabhakar
> wrote:
> > On Wed, Aug 5, 2020 at 12:19 PM Geert Uytterhoeven
> > wrote:
> > > On Thu, Jul 16, 2020 at 7:20 PM Lad Prabhakar
> > > wrote:
> > > > Add VIN
Hi Mark,
>>If you are seeing issues with the current stack size, can you please
>>explain that in more detail? Where are you seeing problems? Which
>>configuration options do you have selected?
>>
We checked on our system with netflix and youtube 4K videos running
max stack consumption was 7
On 16.04.20 16:46, Sven Van Asbroeck wrote:
Hello folks,
> My situation is this: I have hardware which consists of several modules.
> Knowledge about the type and location of these modules is located in an
> on-board eeprom.
I've got a somewhat similar use cases, but not necessarily on
On 07/08/2020 14:13, hongbo.w...@nxp.com wrote:
> From: "hongbo.wang"
>
> the following command will be supported:
>
> Set bridge's vlan protocol:
> ip link set br0 type bridge vlan_protocol 802.1ad
> Add VLAN:
> ip link add link swp1 name swp1.100 type vlan protocol 802.1ad id 100
>
- Original Message -
>
> - Original Message -
> > Hi!
> > As much as it's worth the changes looks good to me.
> >
> > @Jan: I guess that we can as well fix this in LTP first then we can try
> > to get the kernel version fixed...
>
> Fine by me, I'll give it couple more
On Wed, Aug 05, 2020 at 09:43:42AM -0400, Michael S. Tsirkin wrote:
> Since gpu is a modern-only device,
> tag config space fields as having little endian-ness.
>
> Signed-off-by: Michael S. Tsirkin
> Reviewed-by: Cornelia Huck
Reviewed-by: Gerd Hoffmann
On Wed, Aug 05, 2020 at 09:44:48AM -0400, Michael S. Tsirkin wrote:
> Virtgpu is modern-only. Use LE accessors for config space.
>
> Signed-off-by: Michael S. Tsirkin
Reviewed-by: Gerd Hoffmann
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 86cfccb66937dd6cbf26ed619958b9e587e6a115
commit: 80591e61a0f7e88deaada69844e4a31280c4a38f kbuild: tell sparse about the
$ARCH
date: 9 months ago
config: s390-randconfig-s031-20200807 (attached as .config
On Fri, Aug 07, 2020 at 10:16:08AM +0800, Gene Chen wrote:
> Mark Brown 於 2020年8月6日 週四 下午8:13寫道：
> > You really also need to write a much clearer changelog, I would be hard
> > pressed to tell from the changelog that this was moving things to the
> > regmap core rather than shuffling regmaps
On Fri, 7 Aug 2020 at 12:29, Andy Shevchenko wrote:
>
> On Fri, Aug 7, 2020 at 12:21 PM Crt Mori wrote:
>
> Oh yeah, you are right, there will be some comments :-)
>
Told ya. No matter how many times I go through it, I always find
something. I will prepare v3 with fixes, except for some
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 86cfccb66937dd6cbf26ed619958b9e587e6a115
commit: 670d0a4b10704667765f7d18f7592993d02783aa sparse: use identifiers to
define address spaces
date: 7 weeks ago
config: arm-randconfig-s031-20200807 (attached
What's wrong with something like this?
AFAICT there's no reason to actually try and add IRQ tracing here, it's
just a hand full of instructions at the most.
---
diff --git a/arch/powerpc/include/asm/hw_irq.h
b/arch/powerpc/include/asm/hw_irq.h
index 3a0db7b0b46e..6be22c1838e2 100644
---
From: "hongbo.wang"
1. the patch 0001* is for setting single port into 802.1AD(QinQ) mode,
before this patch, the function dsa_slave_vlan_rx_add_vid didn't pass
the parameter "proto" to next port level, so switch's port can't get
parameter "proto"
after applying this patch, the following
From: "hongbo.wang"
This feature can be test in the following case:
Customer <-> swp0 <-> swp1 <-> ISP
Customer will send and receive packets with single VLAN tag(CTAG),
ISP will send and receive packets with double VLAN tag(STAG and CTAG).
This refers to "4.3.3 Provider Bridges
From: "hongbo.wang"
the following command will be supported:
Set bridge's vlan protocol:
ip link set br0 type bridge vlan_protocol 802.1ad
Add VLAN:
ip link add link swp1 name swp1.100 type vlan protocol 802.1ad id 100
Delete VLAN:
ip link del link swp1 name swp1.100
Signed-off-by:
Hello folks,
here's the first version of my "srvfs" implementation - a synthentic
filesystem which allows a process to "publish" an open file descriptor
into the file system, so other processes can continue from there, with
whatever state the fd is already in.
This is a concept from Plan9. The
On Thu, Aug 06, 2020 at 05:49:04PM -0700, Guenter Roeck wrote:
> Use arch_get_random_seed_long_early() instead of arm64 specific functions
> to solve the problem. As a side effect of this change, the code no longer
> bypasses ARCH_RANDOM, which I consider desirable (after all, ARCH_RANDOM
> was
On Thu, Aug 06, 2020 at 07:09:16PM -0700, John Stultz wrote:
> On Thu, Aug 6, 2020 at 6:52 AM Thierry Reding
> wrote:
> >
> > On Wed, Apr 22, 2020 at 08:32:43PM +, John Stultz wrote:
> > > This patch addresses a regression in 5.7-rc1+
> > >
> > > In commit c8c43cee29f6 ("driver core: Fix
> >
qemu 5.0 introduces a new qxl hardware revision 5. Unlike revision 4
(and below) the device doesn't switch back into vga compatibility mode
when someone touches the vga ports. So we don't have to reserve the
vga ports any more to avoid that happening.
Signed-off-by: Gerd Hoffmann
---
The parameters in tmp2 commands are outdated, people are not able to
create trusted key by the example commands.
This patch updates the paramerters of tpm2 commands, they are verified
by tpm2-tools-4.1 with Linux v5.8 kernel.
Signed-off-by: Coly Li
Cc: Stefan Berger
Cc: Dan Williams
Cc: Mimi
When going through a disable/enable cycle without changing the
framebuffer the optimization added by commit 3954ff10e06e ("drm/virtio:
skip set_scanout if framebuffer didn't change") causes the screen stay
blank. Add a bool to force an update to fix that.
Cc: 1882...@bugs.launchpad.net
Fixes:
On 19/07/2020 06:01, Sameer Pujar wrote:
> This patch adds few AHUB modules for Tegra210, Tegra186 and Tegra194.
> Bindings for following modules are added.
> * AHUB added as a child node under ACONNECT
> * AHUB includes many HW accelerators and below components are added
>as its children.
On Fri, Aug 07, 2020 at 11:56:04AM +0200, Juri Lelli wrote:
> Starting deadline server for lower priority classes right away when
> first task is enqueued might break guarantees, as tasks belonging to
> intermediate priority classes could be uselessly preempted. E.g., a well
> behaving (non hog)
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 86cfccb66937dd6cbf26ed619958b9e587e6a115
commit: 7733f6c32e36ff9d7adadf40001039bf219b1cbe usb: cdns3: Add Cadence USB3
DRD Driver
date: 11 months ago
config: parisc-randconfig-m031-20200807 (attached
On 19/07/2020 06:01, Sameer Pujar wrote:
> These devices are required for audio sub system and current patch
> ensures probe path of these devices gets tested. Later sound card
> support would be added which can use these devices at runtime.
>
> Signed-off-by: Sameer Pujar
> ---
>
On 07.08.20 11:50, Marco Elver wrote:
On Fri, Aug 07, 2020 at 11:24AM +0200, Jürgen Groß wrote:
On 07.08.20 11:01, Marco Elver wrote:
On Thu, 6 Aug 2020 at 18:06, Marco Elver wrote:
On Thu, 6 Aug 2020 at 15:17, Marco Elver wrote:
On Thu, Aug 06, 2020 at 01:32PM +0200, pet...@infradead.org
syzbot is reporting hung task at pipe_release() [1], for for_each_bvec() from
iterate_bvec() from iterate_all_kinds() from iov_iter_alignment() from
ext4_unaligned_io() from ext4_dio_write_iter() from ext4_file_write_iter() from
call_write_iter() from do_iter_readv_writev() from do_iter_write()
On Fri, Aug 7, 2020 at 12:21 PM Crt Mori wrote:
Oh yeah, you are right, there will be some comments :-)
> For some time market wants medical grade accuracy in medical range,
the market
> while still retaining the declared accuracy outside of the medical range
> within the same sensor. That is
This series adds some features for UniPhier PCIe host controller.
- Add support for PME and AER invoked by MSI interrupt
- Add iATU register view support for PCIe version >= 4.80
- Add an error message when failing to get phy driver
This adds a new function called by MSI handler in DesignWare
This patch adds misc interrupt handler to detect and invoke PME/AER event.
In UniPhier PCIe controller, PME/AER signals are assigned to the same
signal as MSI by the internal logic. These signals should be detected by
the internal register, however, DWC MSI handler can't handle these signals.
This gets iATU register area from reg property. In Synopsys DWC version
4.80 or later, since iATU register area is separated from core register
area, this area is necessary to get from DT independently.
Signed-off-by: Kunihiko Hayashi
---
drivers/pci/controller/dwc/pcie-uniphier.c | 5 +
1
Add pcie_port_service_get_irq() that returns the virtual IRQ number
for specified portdrv service.
Cc: Lorenzo Pieralisi
Signed-off-by: Kunihiko Hayashi
---
drivers/pci/pcie/portdrv.h | 1 +
drivers/pci/pcie/portdrv_core.c | 16
2 files changed, 17 insertions(+)
diff
In the dt-bindings, "atu" reg-names is required to get the register space
for iATU in Synopsys DWC version 4.80 or later.
Signed-off-by: Kunihiko Hayashi
Acked-by: Rob Herring
---
Documentation/devicetree/bindings/pci/uniphier-pcie.txt | 1 +
1 file changed, 1 insertion(+)
diff --git
Even if phy driver doesn't probe, the error message can't be distinguished
from other errors. This displays error message caused by the phy driver
explicitly.
Signed-off-by: Kunihiko Hayashi
---
drivers/pci/controller/dwc/pcie-uniphier.c | 8 ++--
1 file changed, 6 insertions(+), 2
This adds msi_host_isr() callback function support to describe
SoC-dependent service triggered by MSI.
For example, when AER interrupt is triggered by MSI, the callback function
reads SoC-dependent registers and detects that the interrupt is from AER,
and invoke AER interrupts related to MSI.
Hi Michael,
On Fri, Aug 07, 2020 at 09:55:19AM +0200, Michael Walle wrote:
> Am 2020-08-07 09:45, schrieb Uwe Kleine-König:
> > On Fri, Aug 07, 2020 at 09:28:31AM +0200, Michael Walle wrote:
> > > Am 2020-08-06 10:40, schrieb Uwe Kleine-König:
> > > > On Mon, Aug 03, 2020 at 11:35:52AM +0200,
On Fri, Aug 07, 2020 at 12:02:59PM +0200, Jürgen Groß wrote:
> On 07.08.20 11:39, pet...@infradead.org wrote:
> > On Fri, Aug 07, 2020 at 10:38:23AM +0200, Juergen Gross wrote:
> >
> > > -# else
> > > - const unsigned char cpu_iret[1];
> > > -# endif
> > > };
> > > static const struct
Update the comment for file's directory and function name changed.
Fixes: facd04a904ff ("powerpc: convert to copy_thread_tls")
Fixes: 14cf11af6cf6 ("powerpc: Merge enough to start building in arch/powerpc.")
Signed-off-by: chenzefeng
---
arch/powerpc/kernel/entry_32.S | 4 ++--
1 file changed,
Hi Guenter,
On Thu, Aug 06, 2020 at 05:49:04PM -0700, Guenter Roeck wrote:
> Commit 585524081ecd ("random: random.h should include archrandom.h, not
> the other way around") tries to fix a problem with recursive inclusion
> of linux/random.h and arch/archrandom.h for arm64. Unfortunately, this
>
Mark Brown 於 2020年8月6日 週四 下午8:13寫道：
>
> On Thu, Aug 06, 2020 at 11:30:56AM +0800, Gene Chen wrote:
> > Mark Brown 於 2020年8月6日 週四 上午12:10寫道：
>
> > > It's not clear why this isn't just done in the device regmap, there's
> > > exactly one user?
>
> > because I use one regmap to access 4 I2C
Use of_device_get_match_data() to get driver data instead of boilerplate
code.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 13 +
1 file changed, 5 insertions(+), 8 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
Torrent PHY can be used in different multi-link multi-protocol
configurations including protocols other than DisplayPort also,
such as PCIe, USB, SGMII, QSGMII etc. Update the bindings to have
support for these configurations.
Signed-off-by: Swapnil Jakhade
---
Cadence Torrent PHY is a multiprotocol PHY supporting different multilink
PHY configurations including DisplayPort, PCIe, USB, SGMII, QSGMII etc.
Existing Torrent PHY driver supports only DisplayPort. This patch series
prepares Torrent PHY driver so that different multilink configurations can
be
Added separate functions for regmap initialization of torrent PHY
generic registers and DP specific registers.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 99 +++
1 file changed, 66 insertions(+), 33 deletions(-)
diff --git
Use devm_platform_ioremap_resource() to get register addresses instead of
boilerplate code.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 8 ++--
1 file changed, 2 insertions(+), 6 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
Add checking if total number of lanes for all subnodes is not greater than
number of lanes supported by PHY.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 19 +++
1 file changed, 15 insertions(+), 4 deletions(-)
diff --git
On 2020/07/15 19:04, Kunihiko Hayashi wrote:
Hi Lorenzo,
On 2020/07/14 22:27, Lorenzo Pieralisi wrote:
On Thu, Jun 18, 2020 at 05:38:09PM +0900, Kunihiko Hayashi wrote:
The misc interrupts consisting of PME, AER, and Link event, is handled
by INTx handler, however, these interrupts should be
Add binding to specify Spread Spectrum Clocking mode used.
Signed-off-by: Swapnil Jakhade
---
.../bindings/phy/phy-cadence-torrent.yaml | 9 +
include/dt-bindings/phy/phy-cadence-torrent.h | 13 +
2 files changed, 22 insertions(+)
create mode 100644
Enable support for multiple subnodes in torrent PHY to
include multi-link combinations.
Signed-off-by: Swapnil Jakhade
---
drivers/phy/cadence/phy-cadence-torrent.c | 15 ---
1 file changed, 15 deletions(-)
diff --git a/drivers/phy/cadence/phy-cadence-torrent.c
On Fri, Aug 07, 2020 at 10:40:13AM +0200, Joerg Roedel wrote:
> From: Joerg Roedel
>
> The code for preallocate_vmalloc_pages() was written under the
> assumption that the p4d_offset() and pud_offset() functions will perform
> present checks before dereferencing the parent entries.
>
> This
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 86cfccb66937dd6cbf26ed619958b9e587e6a115
commit: 05559f10ed797b79f7fa47313682c48919a2b111 usb: chipidea: add role switch
class support
date: 12 months ago
config: parisc-randconfig-m031-20200807 (attached
Current board declarations are a mess. Let's put some order and make them
follow the same structure. Also board declarations tabs.
Switch to SPDX license identifier.
Signed-off-by: Álvaro Fernández Rojas
---
v2: switch to SPDX license identifier.
arch/mips/bcm63xx/boards/board_bcm963xx.c |
On Fri, Aug 07, 2020 at 08:58:09AM +0200, David Hildenbrand wrote:
> On 07.08.20 06:32, Andrew Morton wrote:
> > On Fri, 3 Jul 2020 18:28:23 +0530 Srikar Dronamraju
> > wrote:
> >
> >>> The memory hotplug changes that somehow because you can hotremove numa
> >>> nodes and therefore make the
There's no EHCI controller on BCM6348.
Signed-off-by: Álvaro Fernández Rojas
---
v2: no changes.
arch/mips/bcm63xx/boards/board_bcm963xx.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c
b/arch/mips/bcm63xx/boards/board_bcm963xx.c
index
There are 3 duplicated new lines, let's remove them.
Signed-off-by: Álvaro Fernández Rojas
---
v2: no changes.
arch/mips/bcm63xx/boards/board_bcm963xx.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c
b/arch/mips/bcm63xx/boards/board_bcm963xx.c
EHCI and OHCI share the same USB ports. Therefore, if the board has OHCI
it should also have EHCI.
Signed-off-by: Álvaro Fernández Rojas
---
v2: no changes.
arch/mips/bcm63xx/boards/board_bcm963xx.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/mips/bcm63xx/boards/board_bcm963xx.c
Theses patches improve BCM63xx board declarations and source code.
v2: switch to SPDX license identifier.
Álvaro Fernández Rojas (4):
MIPS: BCM63xx: remove duplicated new lines
MIPS: BCM63xx: remove EHCI from BCM6348 boards
MIPS: BCM63xx: enable EHCI for DWV-S0 board
MIPS: BCM63xx:
Greetings dear,
I am Mrs. Maddalena Nicholaus, a Finnish citizen and 85 years old with
grief. I am looking for your help due to my medical situation here in
London. My medical condition is not in good shape and I will need your
assistance to grant my last wish over the inheritance of my Late
On 07.08.20 11:39, pet...@infradead.org wrote:
On Fri, Aug 07, 2020 at 10:38:23AM +0200, Juergen Gross wrote:
-# else
- const unsigned char cpu_iret[1];
-# endif
};
static const struct patch_xxl patch_data_xxl = {
@@ -42,7 +38,6 @@ static const struct patch_xxl patch_data_xxl
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 86cfccb66937dd6cbf26ed619958b9e587e6a115
commit: 2c5ebd001d4f0c64a2dfda94eb1d9b31a8863c8d mptcp: refactor token container
date: 6 weeks ago
config: sh-randconfig-s031-20200807 (attached as .config
Starting deadline server for lower priority classes right away when
first task is enqueued might break guarantees, as tasks belonging to
intermediate priority classes could be uselessly preempted. E.g., a well
behaving (non hog) FIFO task can be preempted by NORMAL tasks even if
there are still
Beyond that, though, I feel like the rules are stupid because I've seen
more than a couple commit messages which were contorted to avoid
imperative. My own standard for commit messages is that 1) Is the
problem explained, especially what it looks like to user space? 2) Is
it clear what the
Hey Joerg,
On Thu, Aug 6, 2020 at 9:23 PM Joerg Roedel wrote:
> Jason, can you share more details about the test setup which triggers
> this? Like the .config and the machine setup, ideally a qemu
> command-line, and how to reproduce it on that setup.
make -C
On Fri, Aug 7, 2020 at 10:40 AM Joerg Roedel wrote:
>
> From: Joerg Roedel
>
> The code for preallocate_vmalloc_pages() was written under the
> assumption that the p4d_offset() and pud_offset() functions will perform
> present checks before dereferencing the parent entries.
>
> This assumption
From: Peter Zijlstra
In preparation of introducing !task sched_dl_entity; move the
bandwidth accounting into {en.de}queue_dl_entity().
Signed-off-by: Peter Zijlstra (Intel)
---
kernel/sched/deadline.c | 128 ++--
kernel/sched/sched.h| 6 ++
2 files
On 04.08.20 11:39, Martin Kepplinger wrote:
> On 30.07.20 17:10, Alan Stern wrote:
>> On Thu, Jul 30, 2020 at 10:52:14AM +0200, Martin Kepplinger wrote:
>>> Maybe I should just start a new discussion with a patch, but the below
>>> is what makes sense to me (when I understand you correctly) and
From: Peter Zijlstra
Use deadline servers to service fair tasks.
This patch adds a fair_server deadline entity which acts as a container
for fair entities and can be used to fix starvation when higher priority
(wrt fair) tasks are monopolizing CPU(s).
Signed-off-by: Peter Zijlstra (Intel)
---
From: Peter Zijlstra
Low priority tasks (e.g., SCHED_OTHER) can suffer starvation if tasks
with higher priority (e.g., SCHED_FIFO) monopolize CPU(s).
RT Throttling has been introduced a while ago as a (mostly debug)
countermeasure one can utilize to reserve some CPU time for low priority
tasks
From: Peter Zijlstra
Create a single function that initializes a sched_dl_entity.
Signed-off-by: Peter Zijlstra (Intel)
---
kernel/sched/core.c | 5 +
kernel/sched/deadline.c | 22 +++---
kernel/sched/sched.h| 5 +
3 files changed, 17 insertions(+), 15
Hi,
This is RFC v2 of Peter's SCHED_DEADLINE server infrastructure
implementation [1].
SCHED_DEADLINE servers can help fixing starvation issues of low priority
tasks (e.g., SCHED_OTHER) when higher priority tasks monopolize CPU
cycles. Today we have RT Throttling; DEADLINE servers should be able
From: Peter Zijlstra
All classes use sched_entity::exec_start to track runtime and have
copies of the exact same code around to compute runtime.
Collapse all that.
Signed-off-by: Peter Zijlstra (Intel)
---
include/linux/sched.h| 2 +-
kernel/sched/deadline.c | 17 +++---
Takashi Iwai ti...@suse.de写道：
> On Fri, 07 Aug 2020 09:12:27 +0200,
> Dinghao Liu wrote:
> >
> > When snd_usb_mixer_add_control() fails, elem needs to be
> > freed just like when snd_ctl_new1() fails. However, current
> > code is returning directly and ends up leaking memory.
>
> No, this
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: 86cfccb66937dd6cbf26ed619958b9e587e6a115
commit: 05933aac7b11911955de307a329dc2a7a14b7bd0 ia64: remove now unused
machvec indirections
date: 12 months ago
config: ia64-randconfig-s031-20200807 (attached
RockPI 4B has AP6256 Wifi/BT, so enable them in 4B dts
instead of enable in common dtsi.
Signed-off-by: Jagan Teki
---
Changes for v4, v3:
- none
Changes for v2:
- update commit message
- add radxa,rockpi4b
arch/arm64/boot/dts/rockchip/Makefile | 1 +
ROCKPi 4 has 3 variants of hardware platforms called
RockPI 4A, 4B, and 4C.
- ROCKPi 4A has no Wif/BT.
- ROCKPi 4B has AP6256 Wifi/BT, PoE.
- ROCKPi 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled
GPIO pin change compared to 4B, 4C
So move common nodes, properties into dtsi file and
On Fri, Aug 07, 2020 at 09:18:57AM +, Johnson CH Chen (陳昭勳) wrote:
> > > + if (info->modem_control & UART_MCR_RTS)
> > > + nd->cmd_buffer[6] = 1;
> > > + else
> > > + nd->cmd_buffer[6] = 0;
> > > +
> > > + if (termio->c_cflag & CRTSCTS) {
> > > + nd->cmd_buffer[7] = 1;
ROCKPi 4 has 3 variants of hardware platforms called
ROCKPi 4A, 4B, and 4C.
- ROCKPi 4A has no Wif/BT.
- ROCKPi 4B has AP6256 Wifi/BT, PoE.
- ROCKPi 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled
GPIO pin change compared to 4B, 4C
So, update the existing ROCKPi 4 binding to support
Rock PI 4C has AP6256 Wifi/BT, PoE, miniDP, USB Host enabled
GPIO pin change compared to 4B, 4C.
So, add or enable difference nodes/properties in 4C dts
by including common dtsi.
Signed-off-by: Jagan Teki
---
Changes for v4, v3:
- none
Changes for v2:
- update commit message
- add
Al Viro wrote:
>On Thu, Aug 06, 2020 at 12:59:16PM +0100, Al Viro wrote:
>> On Thu, Aug 06, 2020 at 07:53:16PM +0800, linmiaohe wrote:
>> > From: Miaohe Lin
>> >
>> > We should fput() file iff FDPUT_FPUT is set. So we should set
>> > fput_needed accordingly.
>> >
>> > Fixes: 00e188ef6a7e
Willem de Bruijn wrote:
>On Thu, Aug 6, 2020 at 1:48 PM linmiaohe wrote:
>>
>> From: Miaohe Lin
>>
>> We could be trapped in deadloop when we try to copy userspace skb
>> frags buffers to kernel with a cloned skb:
>
>> Catch this unexpected case and return -EINVAL in skb_orphan_frags()
>>
在 2020/8/7 下午5:38, Álvaro Fernández Rojas 写道:
Current board declarations are a mess. Let's put some order and make them
follow the same structure.
Also remove board declarations tabs and double whitespace in the header.
Signed-off-by: Álvaro Fernández Rojas
---
Fix typo: "notifiter" --> "notifier"
"overriden" --> "overridden"
Signed-off-by: Youling Tang
---
kernel/debug/debug_core.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/kernel/debug/debug_core.c b/kernel/debug/debug_core.c
index b16dbc1..30a 100644
---
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