On Mon, Aug 10, 2020 at 2:57 PM Peter Xu wrote:
>
> Yeah, that's why I totally agree we need to do enforced COW even for a read
> gup
> as long as the page can be further referenced (GET|PIN). However frankly
> speaking I didn't follow the rest on what's wrong with "Userfaultfd-wp should
> not
On Fri, Aug 7, 2020 at 1:46 AM Chenyi Qiang wrote:
>
> PKS(Protection Keys for Supervisor Pages) is a feature that extends the
> Protection Key architecture to support thread-specific permission
> restrictions on supervisor pages.
>
> A new PKS MSR(PKRS) is defined in kernel to support PKS, which
Hi, Neal:
Neal Liu 於 2020年8月10日 週一 上午11:43寫道：
>
> Hi Chun-Kuang,
>
> On Fri, 2020-08-07 at 23:52 +0800, Chun-Kuang Hu wrote:
> > Hi, Neal:
> >
> > Neal Liu 於 2020年8月7日 週五 上午10:34寫道：
> > >
> > > MediaTek bus fabric provides TrustZone security support and data
> > > protection to prevent slaves
On Mon, Aug 10, 2020 at 04:11:43PM +0800, Shengjiu Wang wrote:
> On some platform(.e.g. i.MX8QM MEK), the "extal" clock is different
> with the mclk of codec, then the clock rate is also different.
> So it is better to get clock rate of "extal" rate by clk_get_rate,
> don't reuse the clock rate of
Hi Bean,
On Mon, 2020-08-10 at 17:41 +0200, Bean Huo wrote:
> On Thu, 2020-08-06 at 18:07 +0800, Can Guo wrote:
> > Hi Bean,
> >
> > On 2020-08-06 17:50, Bean Huo wrote:
> > > >
> > > > Please check Stanley's recent change to ufshcd_abort, you may
> > > > want to rebase your change on his and
On 8/10/20 9:21 AM, Greg Kroah-Hartman wrote:
This is the start of the stable review cycle for the 4.19.139 release.
There are 48 patches in this series, all will be posted as a response
to this one. If anyone has any issues with these being applied, please
let me know.
Responses should be
On Fri, Aug 07, 2020 at 05:14:42PM +0800, Shengjiu Wang wrote:
> Regmap initialization may return -EPROBE_DEFER for clock
> may not be ready, so check -EPROBE_DEFER error type before
> start another Regmap initialization.
>
> Signed-off-by: Shengjiu Wang
Acked-by: Nicolin Chen
On 8/10/20 9:20 AM, Greg Kroah-Hartman wrote:
This is the start of the stable review cycle for the 5.4.58 release.
There are 67 patches in this series, all will be posted as a response
to this one. If anyone has any issues with these being applied, please
let me know.
Responses should be made
On Thu, Aug 6, 2020 at 7:55 AM Nathaniel McCallum wrote:
>
> In a past revision of this patch, I had requested a void *misc
> parameter that could be passed through vdso_sgx_enter_enclave_t into
> sgx_enclave_exit_handler_t. This request encountered some push back
> and I dropped the issue.
On 8/10/20 9:20 AM, Greg Kroah-Hartman wrote:
This is the start of the stable review cycle for the 5.7.15 release.
There are 79 patches in this series, all will be posted as a response
to this one. If anyone has any issues with these being applied, please
let me know.
Responses should be made
On Mon, Aug 10, 2020 at 01:28:46PM -0700, Mike Kravetz wrote:
>On 8/7/20 7:28 AM, Wei Yang wrote:
>> On Fri, Aug 07, 2020 at 08:49:51PM +0800, Baoquan He wrote:
>>> On 08/07/20 at 05:12pm, Wei Yang wrote:
list_first_entry() may not return NULL even when the list is empty.
Let's make
On Tue, Aug 11, 2020 at 12:43:52AM +0200, Mickaël Salaün wrote:
> Hooking on open is a simple design that enables processes to check files
> they intend to open, before they open them.
Which is a good thing, because...?
> From an API point of view,
> this series extends openat2(2) with one
On 8/10/20 9:18 AM, Greg Kroah-Hartman wrote:
This is the start of the stable review cycle for the 5.8.1 release.
There are 38 patches in this series, all will be posted as a response
to this one. If anyone has any issues with these being applied, please
let me know.
Responses should be made
On 8/10/20 4:56 PM, Dave Chinner wrote:
> On Wed, Jun 24, 2020 at 10:44:21AM -0600, Jens Axboe wrote:
>> On 6/24/20 10:41 AM, Matthew Wilcox wrote:
>>> On Wed, Jun 24, 2020 at 09:35:19AM -0600, Jens Axboe wrote:
On 6/24/20 9:00 AM, Jens Axboe wrote:
> On 6/23/20 7:46 PM, Matthew Wilcox
On Tue, Aug 11, 2020 at 12:43 AM Mickaël Salaün wrote:
> On 10/08/2020 22:21, Al Viro wrote:
> > On Mon, Aug 10, 2020 at 10:11:53PM +0200, Mickaël Salaün wrote:
> >> It seems that there is no more complains nor questions. Do you want me
> >> to send another series to fix the order of the S-o-b in
On 8/7/20 2:12 AM, Wei Yang wrote:
> set_hugetlb_cgroup_[rsvd] just manipulate page local data, which is not
> necessary to be protected by hugetlb_lock.
>
> Let's take this out.
>
> Signed-off-by: Wei Yang
Thanks!
Reviewed-by: Mike Kravetz
--
Mike Kravetz
On 8/10/20 2:30 PM, Sandeep Singh wrote:
> From: Sandeep Singh
>
> AMD SFH uses HID over PCIe bus.SFH fw is part of MP2 processor
> (MP2 which is an ARM® Cortex-M4 core based co-processor to x86) and
> it runs on MP2 where in driver resides on X86. This part of module
> will communicate with MP2
On 8/9/20 9:51 AM, William Breathitt Gray wrote:
On Tue, Jul 28, 2020 at 07:20:03PM -0500, David Lechner wrote:
On 7/21/20 2:35 PM, William Breathitt Gray wrote:
This patch introduces a character device interface for the Counter
subsystem. Device data is exposed through standard character
Use kernel standard do {} while (0) logging macros
Miscellanea:
o Use ..., ##__VA_ARGS__
o Indent and align
o Add __printf(2, 3) to lpfc_dbg_print function declaration
Signed-off-by: Joe Perches
---
drivers/scsi/lpfc/lpfc_logmsg.h | 85 +++--
1 file changed, 48
The logging macros are pretty heavyweight and can be consolidated
to reduce overall object size.
Joe Perches (2):
scsi: lpfc: Neaten logging macro #defines
scsi: lpfc: Add logging functions to reduce object size
drivers/scsi/lpfc/Makefile | 2 +-
drivers/scsi/lpfc/lpfc.h |
Make functions from logging macros.
Reduces overall object size ~14% (120KB) (x86-64, defconfig, with LPFC)
$ size -t drivers/scsi/lpfc/built-in.a.old
88855289102900 900362 dbd0a (TOTALS)
$ size -t drivers/scsi/lpfc/built-in.a.new
76675789102900 778567 be147 (TOTALS)
On 8/7/20 2:12 AM, Wei Yang wrote:
> Function dequeue_huge_page_node_exact() iterates the free list and
> return the first non-isolated one.
>
> Instead of break and check the loop variant, we could return in the loop
> directly. This could reduce some redundant check.
>
> Signed-off-by: Wei
On Tue, 11 Aug 2020 at 04:46, Dave Airlie wrote:
>
> On Mon, 10 Aug 2020 at 22:23, Christoph Hellwig wrote:
> >
> > On Thu, Aug 06, 2020 at 11:07:02AM +1000, Dave Airlie wrote:
> > > nouveau:
> > > - add CRC support
> > > - start using NVIDIA published class header files
> >
> > Where does Nvdia
On Wed, Jun 24, 2020 at 10:44:21AM -0600, Jens Axboe wrote:
> On 6/24/20 10:41 AM, Matthew Wilcox wrote:
> > On Wed, Jun 24, 2020 at 09:35:19AM -0600, Jens Axboe wrote:
> >> On 6/24/20 9:00 AM, Jens Axboe wrote:
> >>> On 6/23/20 7:46 PM, Matthew Wilcox wrote:
> I'd be quite happy to add a
On Fri, Aug 07, 2020 at 04:31:59PM -0700, Gurbir Arora wrote:
> Each remoteproc might have different requirements for coredumps and might
> want to choose the type of dumps it wants to collect. This change allows
> remoteproc drivers to specify their own custom dump function to be executed
> in
CPMAC ETHERNET DRIVER
M: Florian Fainelli
diff --git a/drivers/counter/104-quad-8.c b/drivers/counter/104-quad-8.c
index 78766b6ec271..0f20920073d6 100644
--- a/drivers/counter/104-quad-8.c
+++ b/drivers/counter/104-quad-8.c
@@ -621,7 +621,7 @@ static const struct iio_chan_spec
On 11/08/2020 00:28, Al Viro wrote:
> On Mon, Aug 10, 2020 at 10:09:09PM +, David Laight wrote:
>>> On Mon, Aug 10, 2020 at 10:11:53PM +0200, Mickaël Salaün wrote:
It seems that there is no more complains nor questions. Do you want me
to send another series to fix the order of the
On Mon, Aug 10, 2020 at 06:38:35PM -0400, Liang, Kan wrote:
> On 8/10/2020 5:47 PM, Dave Hansen wrote:
> > It's probably best if we very carefully define up front what is getting
> > reported here. For instance, I believe we already have some fun cases
> > with huge tmpfs where a compound page
On Mon, Aug 10, 2020 at 06:37:08PM -0400, Liang, Kan wrote:
>
>
> On 8/10/2020 5:41 PM, Peter Zijlstra wrote:
> > On Mon, Aug 10, 2020 at 02:24:23PM -0700, Kan Liang wrote:
> > > From: Stephane Eranian
> > >
> > > When studying code layout, it is useful to capture the page size of the
> > >
On 10/08/2020 22:21, Al Viro wrote:
> On Mon, Aug 10, 2020 at 10:11:53PM +0200, Mickaël Salaün wrote:
>> It seems that there is no more complains nor questions. Do you want me
>> to send another series to fix the order of the S-o-b in patch 7?
>
> There is a major question regarding the API
On Fri, Jul 31, 2020 at 09:48:50AM +0200, Arnaud Pouliquen wrote:
> Complete the virtio_rpmsg_channel structure description to fix a
> compilation warning with W=1 option:
>
> drivers/rpmsg/virtio_rpmsg_bus.c:95: warning: Cannot understand
> * @vrp: the remote processor this channel belongs to
>
On 8/10/2020 5:47 PM, Dave Hansen wrote:
On 8/10/20 2:24 PM, Kan Liang wrote:
+static u64 __perf_get_page_size(struct mm_struct *mm, unsigned long addr)
+{
+ struct page *page;
+ pgd_t *pgd;
+ p4d_t *p4d;
+ pud_t *pud;
+ pmd_t *pmd;
+ pte_t *pte;
+
+
On 8/10/2020 5:41 PM, Peter Zijlstra wrote:
On Mon, Aug 10, 2020 at 02:24:23PM -0700, Kan Liang wrote:
From: Stephane Eranian
When studying code layout, it is useful to capture the page size of the
sampled code address.
Add a new sample type for code page size.
The new sample type
On 8/10/2020 5:40 PM, Peter Zijlstra wrote:
On Mon, Aug 10, 2020 at 02:24:22PM -0700, Kan Liang wrote:
The new sample type, PERF_SAMPLE_DATA_PAGE_SIZE, requires the virtual
address. Update the data->addr if the sample type is set.
The large PEBS is disabled with the sample type, because
On Fri, Aug 7, 2020 at 8:57 AM Alexander Graf wrote:
>
> It's not desireable to have all MSRs always handled by KVM kernel space. Some
> MSRs would be useful to handle in user space to either emulate behavior (like
> uCode updates) or differentiate whether they are valid based on the CPU model.
>
On 8/10/2020 5:39 PM, Peter Zijlstra wrote:
On Mon, Aug 10, 2020 at 02:24:21PM -0700, Kan Liang wrote:
Current perf can report both virtual addresses and physical addresses,
but not the page size. Without the page size information of the utilized
page, users cannot decide whether to
On Thu, Aug 6, 2020 at 3:39 PM Nathan Huckleberry wrote:
>
> Mostly looks good to me. Just a minor nit.
>
> On Thu, Jul 30, 2020 at 3:51 PM Nick Desaulniers
> wrote:
> >
> > If the value of the link register is not correct (tail call from asm
> > that didn't set it, stack corruption, memory no
On Thu, Aug 6, 2020 at 3:39 PM Nathan Huckleberry wrote:
>
> The style cleanup looks great. I just have one extra thing that
> can probably be thrown into this patch.
>
> On Thu, Jul 30, 2020 at 3:51 PM Nick Desaulniers
> wrote:
> >
> > Removes the 1004 label; it was neither a control flow
On Mon, Aug 10, 2020 at 10:09:09PM +, David Laight wrote:
> > On Mon, Aug 10, 2020 at 10:11:53PM +0200, Mickaël Salaün wrote:
> > > It seems that there is no more complains nor questions. Do you want me
> > > to send another series to fix the order of the S-o-b in patch 7?
> >
> > There is a
Set the qcom,adreno-smmu compatible string for the GPU SMMU to enable
split pagetables and per-instance pagetables for drm/msm.
Signed-off-by: Jordan Crouse
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git
Use the aperture settings from the IOMMU domain to set up the virtual
address range for the GPU. This allows us to transparently deal with
IOMMU side features (like split pagetables).
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 13 +++--
Add support for using per-instance pagetables if all the dependencies are
available.
Signed-off-by: Jordan Crouse
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 70 +++
drivers/gpu/drm/msm/adreno/a6xx_gpu.h | 1 +
drivers/gpu/drm/msm/msm_ringbuffer.h | 1 +
3 files
Each submitqueue is attached to a context. Add a pointer to the
context to the submitqueue at create time and refcount it so
that it stays around through the life of the queue.
GPU submissions can access the active context via the submitqueue
instead of requiring it to be passed around from
Add a special implementation for the SMMU attached to most Adreno GPU
target triggered from the qcom,adreno-smmu compatible string.
The new Adreno SMMU implementation will enable split pagetables
(TTBR1) for the domain attached to the GPU device (SID 0) and
hard code it context bank 0 so the GPU
Enable TTBR1 for a context bank if IO_PGTABLE_QUIRK_ARM_TTBR1 is selected
by the io-pgtable configuration.
Signed-off-by: Jordan Crouse
---
drivers/iommu/arm/arm-smmu/arm-smmu.c | 21 -
drivers/iommu/arm/arm-smmu/arm-smmu.h | 25 +++--
2 files changed,
Add a new implementation hook to allow the implementation specific code
to tweek the context bank configuration just before it gets written.
The first user will be the Adreno GPU implementation to turn on
SCTLR.HUPCF to ensure that a page fault doesn't terminating pending
transactions. Doing so
Do a bit of prep work to add the upcoming adreno-smmu implementation.
Add an hook to allow the implementation to choose which context banks
to allocate. Then, add domain_attr_get / domain_attr_set hooks to allow
for implementation specific domain attributes.
Move some of the common structs to
Add domain attribute DOMAIN_ATTR_PGTABLE_CFG. This will be used by
arm-smmu to share the current pagetable configuration with the
leaf driver and to allow the leaf driver to set up a new pagetable
configuration under certain circumstances.
Signed-off-by: Jordan Crouse
---
include/linux/iommu.h
Add support for allocating private address space instances. Targets that
support per-context pagetables should implement their own function to
allocate private address spaces.
The default will return a pointer to the global address space.
Signed-off-by: Jordan Crouse
---
Add support to create a io-pgtable for use by targets that support
per-instance pagetables. In order to support per-instance pagetables the
GPU SMMU device needs to have the qcom,adreno-smmu compatible string and
split pagetables enabled.
Signed-off-by: Jordan Crouse
---
Construct the io-pgtable config before calling the implementation specific
init_context function and pass it so the implementation specific function
can get a chance to change it before the io-pgtable is created.
Signed-off-by: Jordan Crouse
---
drivers/iommu/arm/arm-smmu/arm-smmu-impl.c | 3
This series adds an Adreno SMMU implementation to arm-smmu to allow GPU hardware
pagetable switching.
The Adreno GPU has built in capabilities to switch the TTBR0 pagetable during
runtime to allow each individual instance or application to have its own
pagetable. In order to take advantage of
Every Qcom Adreno GPU has an embedded SMMU for its own use. These
devices depend on unique features such as split pagetables,
different stall/halt requirements and other settings. Identify them
with a compatible string so that they can be identified in the
arm-smmu implementation specific code.
On 8/7/20 2:12 AM, Wei Yang wrote:
> The page allocated from buddy is not on any list, so just use list_add()
> is enough.
>
> Signed-off-by: Wei Yang
Thanks!
Reviewed-by: Mike Kravetz
--
Mike Kravetz
On Thu, Aug 06, 2020 at 10:55:43AM -0400, Nathaniel McCallum wrote:
> In a past revision of this patch, I had requested a void *misc
> parameter that could be passed through vdso_sgx_enter_enclave_t into
> sgx_enclave_exit_handler_t. This request encountered some push back
> and I dropped the
On Fri, Aug 07, 2020 at 03:55:21PM -0400, Vivek Goyal wrote:
> We need some kind of locking mechanism here. Normal file systems like
> ext4 and xfs seems to take their own semaphore to protect agains
> truncate while fault is going on.
>
> We have additional requirement to protect against fuse
On Wed, 1 Jul 2020 11:45:54 +0200, Jerome Brunet wrote:
> This patchset adds the support for the TDM loopback and audio on the jack
> output using the internal codec.
>
> Jerome Brunet (2):
> arm64: dts: meson: odroid-n2: enable audio loopback
> arm64: dts: meson: odroid-n2: add jack audio
On Mon, 3 Aug 2020 16:21:58 +0200, Jerome Brunet wrote:
> The vim3 sound card definition should be same all the vim3 variants
> Move the definition to the appropriate device tree file.
Applied, thanks!
[1/1] arm64: dts: meson: vim3: make sound card common to all variants
(no commit info)
On Mon, 3 Aug 2020 16:18:50 +0200, Jerome Brunet wrote:
> The LEDs on the vim3 are active when the gpio is high, not low.
Applied, thanks!
[1/1] arm64: dts: meson: vim3: correct led polarity
(no commit info)
Best regards,
--
Kevin Hilman
> On Mon, Aug 10, 2020 at 10:11:53PM +0200, Mickaël Salaün wrote:
> > It seems that there is no more complains nor questions. Do you want me
> > to send another series to fix the order of the S-o-b in patch 7?
>
> There is a major question regarding the API design and the choice of
> hooking that
do_ip_vs_set_ctl() is referencing uninitialized stack value when `len` is
zero. Fix it.
Reported-and-tested-by: syzbot+23b5f9e7caf61d9a3...@syzkaller.appspotmail.com
Link:
https://syzkaller.appspot.com/bug?id=46ebfb92a8a812621a001ef04d90dfa459520fe2
Signed-off-by: Peilin Ye
---
On Fri, Aug 07, 2020 at 03:55:19PM -0400, Vivek Goyal wrote:
> This patch implements basic DAX support. mmap() is not implemented
> yet and will come in later patches. This patch looks into implemeting
> read/write.
> +static int iomap_begin_setup_new_mapping(struct inode *inode, loff_t
Hi Stephen, Reviewers,
I wanted to gently follow up on the review of this patch.
Thanks,
Amit
> -Original Message-
> From: Amit Sunil Dhamne
> Sent: Monday, August 3, 2020 11:44 PM
> To: mturque...@baylibre.com; m.tret...@pengutronix.de;
> sb...@kernel.org; Michal Simek ;
>
Client devices should use the APIs provided to allocate and free
the MHI controller structure. This will help ensure that the
structure is zero-initialized and there are no false positives
with respect to reading any values such as the serial number or
the OEM PK hash.
Signed-off-by: Bhaumik
Use counters to track MHI device state transitions such as those
to M0, M2, or M3 states. This can help in better debug, allowing
the user to see the number of transitions to a certain MHI state
when queried using debugfs entries or via other mechanisms.
Signed-off-by: Bhaumik Bhatt
Reviewed-by:
Device hardware specific information such as serial number and the OEM
PK hash can be read using BHI and saved on host to identify the
endpoint.
Signed-off-by: Bhaumik Bhatt
Reviewed-by: Jeffrey Hugo
Reviewed-by: Manivannan Sadhasivam
---
drivers/bus/mhi/core/boot.c | 17 -
Introduce a helper function to determine whether the device is in a
powered ON state and resides in one of the active MHI states. This will
allow for some use cases where access can be pre-determined.
Signed-off-by: Bhaumik Bhatt
Reviewed-by: Jeffrey Hugo
Reviewed-by: Manivannan Sadhasivam
---
It is possible that the host may be suspending or suspended and may
not allow an outgoing device wake assert immediately if a client has
requested for it. Ensure that the host wakes up and allows for it so
the client does not have to wait for an external trigger or an
outgoing packet to be queued
Autonomous low power mode support requires the MHI host to resume from
multiple places and post a wakeup source to exit system suspend. This
needs to be done in a non-blocking manner. Introduce a helper API to
trigger the host resume for data transfers and other non-blocking use
cases while
Add the missing check to abort suspends if a client driver has pending
outgoing packets to send to the device. This allows better utilization
of the MHI bus wherein clients on the host are not left waiting for
longer suspend or resume cycles to finish for data transfers.
Signed-off-by: Bhaumik
An MHI device is not necessarily associated with only channels as we can
have one associated with the controller itself. Hence, the chan_name
field within the mhi_device structure should instead be replaced with a
generic name to accurately reflect any type of MHI device.
Signed-off-by: Bhaumik
Introduce debugfs entries to show state, register, channel, device,
and event rings information. Allow the host to dump registers,
issue device wake, and change the MHI timeout to help in debug.
Signed-off-by: Bhaumik Bhatt
---
drivers/bus/mhi/Kconfig | 8 +
mhi_ctrl_ev_task() in the internal header file occurred twice.
Remove one of the occurrences for clean-up.
Signed-off-by: Bhaumik Bhatt
Reviewed-by: Manivannan Sadhasivam
---
drivers/bus/mhi/core/internal.h | 1 -
1 file changed, 1 deletion(-)
diff --git a/drivers/bus/mhi/core/internal.h
Save hardware information from BHI.
Allow reading and modifying some MHI variables for debug, test, and
informational purposes using debugfs.
Read values for device specific hardware information to be used by OEMs in
factory testing such as serial number and PK hash using sysfs.
This set of
Introduce sysfs entries to enable userspace clients the ability to read
the serial number and the OEM PK Hash values obtained from BHI. OEMs
need to read these device-specific hardware information values through
userspace for factory testing purposes and cannot be exposed via degbufs
as it may
On 8/7/20 2:12 AM, Wei Yang wrote:
> Before proper processing, huge_pte_alloc() would be called
> un-conditionally. It is not necessary to do this when ptep is NULL.
Worse, that extra call is a bug. I believe Andrew pulled this patch into
his queue. It still could use a review.
On Thu, Aug 6, 2020 at 5:47 PM Babu Moger wrote:
>
> The following intercept bit has been added to support VMEXIT
> for INVPCID instruction:
> CodeNameCause
> A2h VMEXIT_INVPCID INVPCID instruction
>
> The following bit has been added to the VMCB layout control area
> to
On Mon, Aug 10, 2020 at 01:51:49PM -0700, Linus Torvalds wrote:
> On Mon, Aug 10, 2020 at 12:15 PM Peter Xu wrote:
> >
> > My previous understanding was that although COW is always safe, we should
> > still
> > avoid it when unnecessary because it's still expensive. Currently we will
> > do
>
This makes sure that simple SCM_RIGHTS fd passing works as expected, to
avoid any future regressions. This is mostly code from Michael Kerrisk's
examples on how to set up and perform fd passing with SCM_RIGHTS. Add
a test script and wire it up to the selftests.
Signed-off-by: Kees Cook
---
FYI,
On 8/10/20 2:24 PM, Kan Liang wrote:
> +static u64 __perf_get_page_size(struct mm_struct *mm, unsigned long addr)
> +{
> + struct page *page;
> + pgd_t *pgd;
> + p4d_t *p4d;
> + pud_t *pud;
> + pmd_t *pmd;
> + pte_t *pte;
> +
> + pgd = pgd_offset(mm, addr);
> + if
tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
master
head: fc80c51fd4b23ec007e88d4c688f2cac1b8648e7
commit: d857e167963f2faf75727764497b51c942ffe2fc drm: Shrink drm_display_mode
timings
date: 3 months ago
config: arc-randconfig-r003-20200810 (attached as .config
On 8/7/20 2:12 AM, Wei Yang wrote:
> There are only two cases of function add_reservation_in_range()
>
> * count file_region and return the number in regions_needed
> * do the real list operation without counting
>
> This means it is not necessary to have two parameters to classify these
Thomas Gleixner writes:
> The infrastructure itself is not more than a thin wrapper around the
> existing msi domain infrastructure and might even share code with
> platform-msi.
And the annoying fact that you need XEN support which opens another can
of worms...
On Mon, Aug 10, 2020 at 09:32:57PM +, Uriel Guajardo wrote:
> +static inline void kunit_check_locking_bugs(struct kunit *test,
> + unsigned long saved_preempt_count)
> +{
> + preempt_count_set(saved_preempt_count);
> +#ifdef CONFIG_TRACE_IRQFLAGS
> +
On Mon, Aug 10, 2020 at 02:24:23PM -0700, Kan Liang wrote:
> From: Stephane Eranian
>
> When studying code layout, it is useful to capture the page size of the
> sampled code address.
>
> Add a new sample type for code page size.
> The new sample type requires collecting the ip. The code page
On Mon, Aug 10, 2020 at 02:24:22PM -0700, Kan Liang wrote:
> The new sample type, PERF_SAMPLE_DATA_PAGE_SIZE, requires the virtual
> address. Update the data->addr if the sample type is set.
>
> The large PEBS is disabled with the sample type, because perf doesn't
> support munmap tracking yet.
On Mon, Aug 10, 2020 at 02:24:21PM -0700, Kan Liang wrote:
> Current perf can report both virtual addresses and physical addresses,
> but not the page size. Without the page size information of the utilized
> page, users cannot decide whether to promote/demote large pages to
> optimize memory
> -Original Message-
> From: Horia Geantă
> Sent: Monday, August 10, 2020 4:34 PM
> To: Herbert Xu ; Van Leeuwen, Pascal
>
> Cc: Andrei Botila (OSS) ; David S. Miller
> ; linux-cry...@vger.kernel.org; linux-
> arm-ker...@lists.infradead.org; linux-kernel@vger.kernel.org;
>
On Mon, Aug 10, 2020 at 02:24:21PM -0700, Kan Liang wrote:
> Current perf can report both virtual addresses and physical addresses,
> but not the page size. Without the page size information of the utilized
> page, users cannot decide whether to promote/demote large pages to
> optimize memory
From: Uriel Guajardo
KUnit tests will now fail if lockdep detects an error during a test
case.
The idea comes from how lib/locking-selftest [1] checks for lock errors: we
first if lock debugging is turned on. If not, an error must have
occurred, so we fail the test and restart lockdep for the
From: Sandeep Singh
Add Maintainers for AMD SFH(SENSOR FUSION HUB) Solution and work flow
document.
Signed-off-by: Nehal Shah
Signed-off-by: Sandeep Singh
---
Documentation/hid/amd-sfh-hid.rst | 153 ++
MAINTAINERS | 8 ++
2 files changed,
From: Sandeep Singh
AMD SFH(Sensor Fusion Hub) is HID based driver.SFH FW is part of MP2
processor (MP2 which is an ARM® Cortex-M4 core based co-processor to
x86)
and it runs on MP2 where in driver resides on X86.The driver
functionalities are divided into three parts:-
1: amd-mp2-pcie:- This
From: Sandeep Singh
This part of module will define the data into HID reports. Get data from
PCIe layer and populate that data into reports. HID core communication
between devices and HID core is mostly done via HID reports.
Signed-off-by: Nehal Shah
Signed-off-by: Sandeep Singh
---
From: Sandeep Singh
This part of module will provide the interaction between HID framework
and client layer.This module will registered client layer with
HID framework.
Signed-off-by: Nehal Shah
Signed-off-by: Sandeep Singh
---
drivers/hid/amd-sfh-hid/amdsfh_hid.c| 175 ++
From: Sandeep Singh
AMD SFH uses HID over PCIe bus.SFH fw is part of MP2 processor
(MP2 which is an ARM® Cortex-M4 core based co-processor to x86) and
it runs on MP2 where in driver resides on X86. This part of module
will communicate with MP2 Firmware and provide that data into DRAM
The Bitwise-Shift operator (1U << ) is used in the enum
perf_output_field, which has already reached its capacity (32 items).
If more items are added, a compile error will be triggered.
Change the U to ULL, which extend the capacity to 64 items.
The enum perf_output_field is only used to
To get the changes in:
("perf/core: Add PERF_SAMPLE_DATA_PAGE_SIZE")
("perf/core: Add support for PERF_SAMPLE_CODE_PAGE_SIZE")
This silences this perf tools build warning:
Warning: Kernel ABI header at 'tools/include/uapi/linux/perf_event.h'
differs from latest version at
The new sample type, PERF_SAMPLE_DATA_PAGE_SIZE, requires the virtual
address. Update the data->addr if the sample type is set.
The large PEBS is disabled with the sample type, because perf doesn't
support munmap tracking yet. The PEBS buffer for large PEBS cannot be
flushed for each munmap.
From: Stephane Eranian
When studying code layout, it is useful to capture the page size of the
sampled code address.
Add a new sample type for code page size.
The new sample type requires collecting the ip. The code page size can
be calculated from the IRQ-safe perf_get_page_size().
Only the
Display the data page size if it is available.
Can be configured by the user, for example:
perf script --fields comm,event,phys_addr,data_page_size
dtlb mem-loads:uP:3fec82ea8 4K
dtlb mem-loads:uP:3fec82e90 4K
dtlb mem-loads:uP:
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