On 16-09-20, 16:11, Stephen Boyd wrote:
> This patch series is based on v12 of the msm DP driver submission[1]
> plus a compliance patch[2]. In the v5 patch series review I suggested
> that the DP PHY and PLL be split out of the drm driver and moved to the
> qmp phy driver. This patch series does
Le 28/09/2020 à 01:44, Jarkko Sakkinen a écrit :
On Fri, Sep 25, 2020 at 09:00:18AM -0300, Jason Gunthorpe wrote:
On Fri, Sep 25, 2020 at 01:29:20PM +0300, Jarkko Sakkinen wrote:
On Fri, Sep 25, 2020 at 09:00:56AM +0200, Ard Biesheuvel wrote:
On Fri, 25 Sep 2020 at 07:56, Jarkko Sakkinen
Hi Greg,
We have a leak fix for TI driver, please consider for v5.9
The following changes since commit ad7a7acaedcf45071c822b6c983f9c1e084041c9:
phy: omap-usb2-phy: disable PHY charger detect (2020-08-31 14:30:59 +0530)
are available in the Git repository at:
Hi,
Are there any issues or concerns about this patch?
Thank you,
Suravee
On 9/22/20 3:44 PM, Suravee Suthikulpanit wrote:
The struct vcpu_svm.ir_list and ir_list_lock are being accessed even when
AVIC is not enabled, while current code only initialize the list and
the lock only when AVIC is
There are two chip pins named TXDLY and RXDLY which actually adds the 2ns
delays to TXC and RXC for TXD/RXD latching. These two pins can config via
4.7k-ohm resistor to 3.3V hw setting, but also config via software setting
(extension page 0xa4 register 0x1c bit13 12 and 11).
The configuration
Hi Marcel,
> On September 27, 2020 20:05, Marcel Holtmann wrote:
>
> Hi Alex,
>
> > When someone attacks the service provider, it creates connection,
> > authenticates. Then it requests key size of one byte and it identifies
> > the key with brute force methods.
> >
> >
Hi Prasad,
On 2020-09-28 06:04, Prasad Sodagudi wrote:
Qualcomm team have tried to upstreaming the register trace buffer(RTB)
use case earlier - [1]
with pstore approach. In that discussion, there was suggestion to use
the ftrace events for
tracking the register reads and writes. In this patch,
On Sun Sep 27 2020, Yangbo Lu wrote:
> Added the missing stub function for ptp_get_msgtype().
>
> Reported-by: Randy Dunlap
> Fixes: 036c508ba95e ("ptp: Add generic ptp message type function")
> Signed-off-by: Yangbo Lu
Oh, my bad. Thanks for fixing it.
Thanks,
Kurt
signature.asc
On Mon, Sep 28, 2020 at 1:32 PM Chen-Yu Tsai wrote:
>
> On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
> >
> > From: Jernej Skrabec
> >
> > Add the I2S node used by the HDMI and a simple-soundcard to
> > link audio between HDMI and I2S.
> >
> > Note that the HDMI codec requires an
On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
>
> Now that HDMI sound node is available in the SoC dtsi.
> Enable it for this board.
>
> Signed-off-by: Clément Péron
Acked-by: Chen-Yu Tsai
On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
>
> From: Jernej Skrabec
>
> Add the I2S node used by the HDMI and a simple-soundcard to
> link audio between HDMI and I2S.
>
> Note that the HDMI codec requires an inverted frame clock and
> a fixed I2S width. As there is no such option for
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Add initial device tree support for the Qualcomm IPQ5018 SoC and
MP03.1-C2 board.
Signed-off-by: Varadarajan Narayanan
---
Documentation/devicetree/bindings/arm/qcom.yaml | 7 +
arch/arm64/boot/dts/qcom/Makefile | 1 +
arch/arm64/boot/dts/qcom/ipq5018-mp03.1-c2.dts | 30
This patch adds support for the global clock controller found on
the IPQ5018 based devices.
Signed-off-by: Varadarajan Narayanan
---
.../devicetree/bindings/clock/qcom,gcc.yaml| 3 +
include/dt-bindings/clock/qcom,gcc-ipq5018.h | 183 +
On Mon, Sep 28, 2020 at 11:50:30AM +0800, Shuo A Liu wrote:
> > > + write_lock_bh(_vm_list_lock);
> > > + list_add(>list, _vm_list);
> > > + write_unlock_bh(_vm_list_lock);
> >
> > Why are the _bh() variants being used here?
> >
> > You are only accessing this list from userspace context in this
On Fri, Aug 21, 2020 at 8:10 AM syzbot
wrote:
>
> Hello,
>
> syzbot found the following issue on:
>
> HEAD commit:4b6c093e Merge tag 'block-5.9-2020-08-14' of git://git.ker..
> git tree: upstream
> console output: https://syzkaller.appspot.com/x/log.txt?x=179f99f690
> kernel config:
On Mon, Sep 28, 2020 at 12:10:07PM +0800, Shuo A Liu wrote:
> > You just raced with userspace and lost. If you want to add attribute
> > files to a device, use the default attribute group list, and it will be
> > managed properly for you by the driver core.
> >
> > Huge hint, if a driver every
f30_data in rmi_device_platform_data could be also referenced by RMI
function 3A, so rename it and the structure name to avoid confusion.
Signed-off-by: Vincent Huang
Reviewed-by: Hans de Goede
Tested-by: Hans de Goede
---
drivers/hid/hid-rmi.c | 2 +-
RMI4 F3A supports the touchpad GPIO function, it's designed to
support more GPIOs and used on newer touchpads. This patch adds
support of the touchpad buttons.
Signed-off-by: Vincent Huang
Reviewed-by: Hans de Goede
Tested-by: Hans de Goede
---
drivers/input/rmi4/Kconfig | 8 ++
RMI4 F3A supports the touchpad GPIO function, it's designed to support
more GPIOs and used on newer touchpads. The patches add support of
touchpad buttons and rename f30_data to avoid confusion.
Changes in v2:
- Combined patch 1 and 2 of v1 to fix bisectability.
Vincent Huang (2):
Input:
On Sun, Sep 27, 2020 at 05:34:50PM -0700, Prasad Sodagudi wrote:
> +config TRACE_RW
> + bool "Register read/write tracing"
> + select TRACING
> + default n
n is always the default, no need to list it.
And you only did this for one arch, yet you made a generic kernel config
option, is
Enables clk & pinctrl related configs
Signed-off-by: Varadarajan Narayanan
---
arch/arm64/configs/defconfig | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 6d04b95..ca25f79 100644
--- a/arch/arm64/configs/defconfig
+++
On Sun, Sep 27, 2020 at 05:34:50PM -0700, Prasad Sodagudi wrote:
> Add register read/write operations tracing support.
> ftrace events helps trace register read and write
> location details of memory mapped IO registers. Also
> add _no_log variants the writel_relaxed/readl_relaed
> APIs to avoid
On Sun, Sep 27, 2020 at 4:57 PM Borislav Petkov wrote:
>
> On Sat, Sep 19, 2020 at 01:32:14AM -0700, syzbot wrote:
> > Hello,
> >
> > syzbot found the following issue on:
> >
> > HEAD commit:92ab97ad Merge tag 'sh-for-5.9-part2' of git://git.libc.or..
> > git tree: upstream
> > console
Add programming sequence support for managing the Stromer
PLLs.
Signed-off-by: Varadarajan Narayanan
---
drivers/clk/qcom/clk-alpha-pll.c | 156 ++-
drivers/clk/qcom/clk-alpha-pll.h | 5 ++
2 files changed, 160 insertions(+), 1 deletion(-)
diff --git
Add device tree binding Documentation details for ipq5018
pinctrl driver.
Signed-off-by: Varadarajan Narayanan
---
.../bindings/pinctrl/qcom,ipq5018-pinctrl.yaml | 143 +
1 file changed, 143 insertions(+)
create mode 100644
This adds the pinctrl definitions for the TLMM of IPQ5018.
Signed-off-by: Varadarajan Narayanan
---
drivers/pinctrl/qcom/Kconfig | 10 +
drivers/pinctrl/qcom/Makefile | 1 +
drivers/pinctrl/qcom/pinctrl-ipq5018.c | 903 +
3 files changed,
The IPQ5018 is Qualcomm's 802.11ax SoC for Routers,
Gateways and Access Points.
This series adds minimal board boot support for ipq5018-mp03.1-c2 board.
Varadarajan Narayanan (7):
clk: qcom: clk-alpha-pll: Add support for Stromer PLLs
dt-bindings: arm64: ipq5018: Add binding descriptions for
Add support for the global clock controller found on IPQ5018
based devices.
Signed-off-by: Varadarajan Narayanan
---
drivers/clk/qcom/Kconfig |8 +
drivers/clk/qcom/Makefile |1 +
drivers/clk/qcom/gcc-ipq5018.c | 3833
On Mon, Sep 28, 2020 at 2:24 AM Tetsuo Handa
wrote:
>
> On 2020/09/16 21:14, Dmitry Vyukov wrote:
> > On Wed, Sep 16, 2020 at 1:51 PM wrote:
> >>
> >> On Wed, Sep 16, 2020 at 01:28:19PM +0200, Dmitry Vyukov wrote:
> >>> On Fri, Sep 4, 2020 at 6:05 PM Tetsuo Handa
> >>> wrote:
>
>
On Fri, Sep 25, 2020 at 02:42:56PM +1000, Herbert Xu wrote:
> Resend with proper subject.
>
> ---8<---
> The struct flowi must never be interpreted by itself as its size
> depends on the address family. Therefore it must always be grouped
> with its original family value.
>
> In this
It is incorrect to use irq_enabled flag for run_measurement check, as
irq_enabled is NOT always equal to thermal mode, when temperature is
higher than passive point, an alarm irq will be pending, and irq_enabled
flag will be set to false while thermal mode is still enabled, then the
following
On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
>
> From: Jernej Skrabec
>
> H6 I2S is very similar to H3, except that it supports up to 16 channels
> and thus few registers have fields on different position.
>
> Signed-off-by: Jernej Skrabec
> Signed-off-by: Marcus Cooper
>
On Mon, Sep 28, 2020 at 12:37 PM Chen-Yu Tsai wrote:
>
> On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
> >
> > We are actually using a complex formula to just return a bunch of
> > simple values. Also this formula is wrong for sun4i when calling
BTW, it is entirely possible that the
On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
>
> As slots and slot_width can be overwritter in case set_tdm() is
> called. Avoid to have this logic in set_chan_cfg().
It doesn't seem that set_tdm_slot() would get called concurrently
with hw_params(), at least not for the simple-card
Sathyanarayanan，
-Original Message-
From: Kuppuswamy, Sathyanarayanan
Sent: Monday, September 28, 2020 2:59 AM
To: Zhao, Haifeng ; bhelg...@google.com;
ooh...@gmail.com; rus...@russell.cc; lu...@wunner.de;
andriy.shevche...@linux.intel.com; stuart.w.ha...@gmail.com;
Hello. Just built kernel 5.9-rc7, and ran it for about 30 minutes.
Moved the mouse and saw it was jumping (pointer not moving smoothly).
Dmesg showed:
5409.255054] nouveau :02:00.0: DRM: base-0: timeout
[ 5411.380728] nouveau :02:00.0: DRM: base-0: timeout
[ 5413.430281] nouveau
These comet lake systems are not yet released, but have been validated
on pre-release hardware.
This is being submitted separately from released hardware in case of
a regression between pre-release and release hardware so this commit
can be reverted alone.
Signed-off-by: Mario Limonciello
---
S0ix for GBE flows are needed for allowing the system to get into deepest
power state, but these require coordination of components outside of
control of Linux kernel. For systems that have confirmed to coordinate
this properly, allow turning on the s0ix flows at load time or runtime.
Fixes:
commit e086ba2fccda ("e1000e: disable s0ix entry and exit flows for ME systems")
disabled s0ix flows for systems that have various incarnations of the
i219-LM ethernet controller. This was done because of some regressions
caused by an earlier
commit 632fbd5eb5b0e ("e1000e: fix S0ix flows for
On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
>
> From: Jernej Skrabec
>
> H6 I2S is very similar to that in H3, except it supports up to 16
> channels.
>
> Signed-off-by: Jernej Skrabec
> Signed-off-by: Marcus Cooper
> Signed-off-by: Clément Péron
> ---
> sound/soc/sunxi/sun4i-i2s.c
Dell's Comet Lake Latitude and Precision systems containing i219LM are
properly configured and should use the s0ix flows.
Signed-off-by: Mario Limonciello
---
drivers/net/ethernet/intel/Kconfig| 1 +
drivers/net/ethernet/intel/e1000e/param.c | 80 ++-
2 files
On Mon, Sep 28, 2020 at 3:29 AM Clément Péron wrote:
>
> We are actually using a complex formula to just return a bunch of
> simple values. Also this formula is wrong for sun4i when calling
> get_wss() the function return 4 instead of 3.
>
> Replace this with a simpler switch case.
>
> Also drop
An interrupt that is disabled/masked but set for wakeup still needs to
be able to wake up the system from sleep states like "suspend to RAM".
This change introduces IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND flag. If irqchip
have this flag set then irq PM will enable/unmask irqs that are marked
for wakeup
Set IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND flag to enable/unmask the
wakeirqs during suspend entry.
Acked-by: Linus Walleij
Reviewed-by: Stephen Boyd
Reviewed-by: Douglas Anderson
Signed-off-by: Maulik Shah
---
drivers/irqchip/qcom-pdc.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
Both IRQCHIP_SET_TYPE_MASKED and IRQCHIP_MASK_ON_SUSPEND flags are already
set for msmgpio's parent PDC irqchip but GPIO interrupts do not get masked
during suspend or during setting irq type since genirq checks irqchip flag
of msmgpio irqchip which forwards these calls to its parent PDC irqchip.
msmgpio irqchip was not using return value of irq_set_irq_wake() callback
since previously GIC-v3 irqchip neither had IRQCHIP_SKIP_SET_WAKE flag nor
it implemented .irq_set_wake callback. This lead to irq_set_irq_wake()
return error -ENXIO.
However from 'commit 4110b5cbb014 ("irqchip/gic-v3:
Kexec can directly boot into a new kernel without going to complete
reboot. This can leave the previous kernel's configuration for PDC
interrupts as is.
Clear previous kernel's configuration during init by setting interrupts
in enable bank to zero. The IRQs specified in qcom,pdc-ranges property
Changes in v6:
- Update commit message more descriptive in v5 patch 1
- Symmetrically enable/disable wakeirqs during suspend/resume in v5 patch 3
- Include Acked-by and Reviewed-by tags from v5 series
Changes in v5:
- Update commit subject in v4 patch 1
- Add more details to commit message in v4
Set IRQCHIP_ENABLE_WAKEUP_ON_SUSPEND flag to enable/unmask the
wakeirqs during suspend entry.
Acked-by: Linus Walleij
Reviewed-by: Stephen Boyd
Reviewed-by: Douglas Anderson
Signed-off-by: Maulik Shah
---
drivers/pinctrl/qcom/pinctrl-msm.c | 3 ++-
1 file changed, 2 insertions(+), 1
From: Loic Poulain
Start MHI device channels so that transfers can be performed.
The MHI stack does not auto-start channels anymore.
Signed-off-by: Loic Poulain
Reviewed-by: Manivannan Sadhasivam
Acked-by: David S. Miller
Signed-off-by: Manivannan Sadhasivam
---
net/qrtr/mhi.c | 5 +
1
From: Loic Poulain
There is really no point having an auto-start for channels.
This is confusing for the device drivers, some have to enable the
channels, others don't have... and waste resources (e.g. pre allocated
buffers) that may never be used.
This is really up to the MHI device(channel)
From: Loic Poulain
nr_irqs_req is unused in MHI stack.
Signed-off-by: Loic Poulain
Reviewed-by: Manivannan Sadhasivam
Signed-off-by: Manivannan Sadhasivam
---
drivers/bus/mhi/core/init.c | 3 ---
include/linux/mhi.h | 2 --
2 files changed, 5 deletions(-)
diff --git
The Kbuild rule to build MHI should use the append operator. This fixes
the below warning reported by Kbuild test bot.
WARNING: modpost: missing MODULE_LICENSE() in
drivers/bus/mhi/core/main.o
WARNING: modpost: missing MODULE_LICENSE() in drivers/bus/mhi/core/pm.o
WARNING: modpost: missing
From: Loic Poulain
This value was missing in the channel debugfs output.
Signed-off-by: Loic Poulain
Reviewed-by: Manivannan Sadhasivam
Signed-off-by: Manivannan Sadhasivam
---
drivers/bus/mhi/core/debugfs.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git
From: Hemant Kumar
MHI channel, event and controller config data needs to be
treated read only information. Add const qualifier to make
sure config information passed by MHI controller is not
modified by MHI core driver.
Suggested-by: Kalle Valo
Signed-off-by: Hemant Kumar
Reviewed-by:
From: Bhaumik Bhatt
Introduce sysfs entries to enable userspace clients the ability to read
the serial number and the OEM PK Hash values obtained from BHI. OEMs
need to read these device-specific hardware information values through
userspace for factory testing purposes and cannot be exposed via
From: Loic Poulain
There is no requirement for using a dedicated IRQ per event ring.
Some systems does not support multiple MSI vectors (e.g. intel
without CONFIG_IRQ_REMAP), In that case the MHI controller can
configure all the event rings to use the same interrupt (as fallback).
Allow this by
From: Bhaumik Bhatt
Introduce a helper function to determine whether the device is in a
powered ON state and resides in one of the active MHI states. This will
allow for some use cases where access can be pre-determined.
Signed-off-by: Bhaumik Bhatt
Reviewed-by: Jeffrey Hugo
Reviewed-by:
From: Bhaumik Bhatt
Introduce debugfs entries to show state, register, channel, device,
and event rings information. Allow the host to dump registers,
issue device wake, and change the MHI timeout to help in debug.
Signed-off-by: Bhaumik Bhatt
Reviewed-by: Manivannan Sadhasivam
Signed-off-by:
From: Clark Williams
rwlock.h should not be included directly. Instead linux/splinlock.h
should be included. Including it directly will break the RT build.
Also there is no point in including _types.h headers directly. There is
no benefit in including the type without the accessor.
Fixes:
From: Bhaumik Bhatt
Kconfig coding style mandates use of tabs for the configuration
definition and an additional two spaces for the help text. Make the
required changes to the MHI Kconfig adhering to those guidelines.
Signed-off-by: Bhaumik Bhatt
Reviewed-by: Manivannan Sadhasivam
Acked-by:
From: Bhaumik Bhatt
Device hardware specific information such as serial number and the OEM
PK hash can be read using BHI and saved on host to identify the
endpoint.
Signed-off-by: Bhaumik Bhatt
Reviewed-by: Jeffrey Hugo
Reviewed-by: Manivannan Sadhasivam
Signed-off-by: Manivannan Sadhasivam
From: Bhaumik Bhatt
Use counters to track MHI device state transitions such as those
to M0, M2, or M3 states. This can help in better debug, allowing
the user to see the number of transitions to a certain MHI state
when queried using debugfs entries or via other mechanisms.
Signed-off-by:
From: Bhaumik Bhatt
It is possible that the host may be suspending or suspended and may
not allow an outgoing device wake assert immediately if a client has
requested for it. Ensure that the host wakes up and allows for it so
the client does not have to wait for an external trigger or an
From: Bhaumik Bhatt
Client devices should use the APIs provided to allocate and free
the MHI controller structure. This will help ensure that the
structure is zero-initialized and there are no false positives
with respect to reading any values such as the serial number or
the OEM PK hash.
From: Bhaumik Bhatt
An MHI device is not necessarily associated with only channels as we can
have one associated with the controller itself. Hence, the chan_name
field within the mhi_device structure should instead be replaced with a
generic name to accurately reflect any type of MHI device.
From: Bhaumik Bhatt
Add the missing check to abort suspends if a client driver has pending
outgoing packets to send to the device. This allows better utilization
of the MHI bus wherein clients on the host are not left waiting for
longer suspend or resume cycles to finish for data transfers.
From: Bhaumik Bhatt
mhi_ctrl_ev_task() in the internal header file occurred twice.
Remove one of the occurrences for clean-up.
Signed-off-by: Bhaumik Bhatt
Reviewed-by: Manivannan Sadhasivam
Signed-off-by: Manivannan Sadhasivam
---
drivers/bus/mhi/core/internal.h | 1 -
1 file changed, 1
From: Bhaumik Bhatt
Autonomous low power mode support requires the MHI host to resume from
multiple places and post a wakeup source to exit system suspend. This
needs to be done in a non-blocking manner. Introduce a helper API to
trigger the host resume for data transfers and other non-blocking
From: Randy Dunlap
Drop doubled word "table" in kernel-doc.
Fix syntax for the kernel-doc notation for struct image_info.
Note that the bhi_vec field is private and not part of the kernel-doc.
Drop doubled word "device" in a comment.
Signed-off-by: Randy Dunlap
Cc: Manivannan Sadhasivam
Cc:
Hi Greg,
Here is the MHI series for v5.10 cycle. Most of the patches are cleanups
in the MHI stack. Notable changes are below:
* Saving the client device hardware information obtained through the BHI
protocol. This information will be exposed through sysfs to make use in
the userland
Hi Greg,
On Sun 27.Sep'20 at 12:44:14 +0200, Greg Kroah-Hartman wrote:
On Tue, Sep 22, 2020 at 07:43:11PM +0800, shuo.a@intel.com wrote:
From: Shuo Liu
ACRN supports partition mode to achieve real-time requirements. In
partition mode, a CPU core can be dedicated to a vCPU of User VM. The
When we see 'can't recover (no error_detected callback)' on console,
Maybe the reason is io state is not changed by calling
pci_dev_set_io_state(), that is confused. fix it.
Signed-off-by: Ethan Zhao
Tested-by: Wen Jin
Tested-by: Shanshan Zhang
---
Chagnes:
V2: no change.
V3: no change.
V4:
When root port has DPC capability and it is enabled, then triggered by
errors, DPC DLLSC and PDC interrupts will be sent to DPC driver, pciehp
driver at the same time.
That will cause following result:
1. Link and device are recovered by hardware DPC and software DPC driver,
device
isn't
Once root port DPC capability is enabled and triggered, at the beginning
of DPC is triggered, the DPC status bits are set by hardware and then
sends DPC/DLLSC/PDC interrupts to OS DPC and pciehp drivers, it will
take the port and software DPC interrupt handler 10ms to 50ms (test data
on ICS(Ice
This simple patch set fixed some serious security issues found when DPC
error injection and NVMe SSD hotplug brute force test were doing -- race
condition between DPC handler and pciehp, AER interrupt handlers, caused
system hang and system with DPC feature couldn't recover to normal
working state
When uncorrectable error happens, AER driver and DPC driver interrupt
handlers likely call
pcie_do_recovery()
->pci_walk_bus()
->report_frozen_detected()
with pci_channel_io_frozen the same time.
If pci_dev_set_io_state() return true even if the original state is
During DPC error injection test we found there is race condition between
pciehp and DPC driver, NULL pointer reference caused panic as following
# setpci -s 64:02.0 0x196.w=000a
// 64:02.0 is rootport has DPC capability
# setpci -s 65:00.0 0x04.w=0544
// 65:00.0 is NVMe SSD populated in
Hello Krzysztof,
Am 26.09.2020 um 18:28 schrieb Krzysztof Kozlowski:
Document binding for an unknown entity Aristainetos with few boards
mainlined.
Cc: Heiko Schocher
Signed-off-by: Krzysztof Kozlowski
---
I tried to Google but except the patches from Heiko Schocher, I could
not find any
On Sun, Sep 27, 2020 at 01:06:03PM -0700, James Bottomley wrote:
> On Tue, 2019-11-26 at 08:17 -0500, Stefan Berger wrote:
> > From: Stefan Berger
> >
> > Revert the patch that was turning the TPM on before probing for IRQs.
> >
> > Fixes: 5b359c7c4372 ("tpm_tis_core: Turn on the TPM before
Hi all,
After merging the drm tree, today's linux-next build (x86_64 allmodconfig)
failed like this:
drivers/gpu/drm/ingenic/ingenic-drm-drv.c: In function 'ingenic_drm_sync_data':
drivers/gpu/drm/ingenic/ingenic-drm-drv.c:478:4: error: implicit declaration of
function 'dma_cache_sync'; did you
On Sun, Sep 27, 2020 at 12:23:10PM +0200, Greg KH wrote:
> On Sun, Sep 27, 2020 at 09:06:48AM +0530, Manivannan Sadhasivam wrote:
> > For exposing the addresses of read/write pointers and doorbell register,
> > let's use the correct format specifiers. This fixes the following issues
> > generated
On Sun, Sep 27, 2020 at 12:17:34PM +0200, Greg KH wrote:
> On Sun, Sep 27, 2020 at 09:06:52AM +0530, Manivannan Sadhasivam wrote:
> > From: Hemant Kumar
> >
> > Currently this macro is defined in internal MHI header as
> > a TRE length mask. Moving it to external header allows MHI
> > client
On Sun, Sep 27, 2020 at 12:22:33PM +0200, Greg KH wrote:
> On Mon, Sep 21, 2020 at 09:38:15PM +0530, Manivannan Sadhasivam wrote:
> > The Kbuild rule to build MHI should use the append operator. This fixes
> > the below warning reported by Kbuild test bot.
> >
> > WARNING: modpost: missing
On Sun, Sep 27, 2020 at 12:26:59PM +0200, Greg KH wrote:
> On Mon, Sep 21, 2020 at 09:38:12PM +0530, Manivannan Sadhasivam wrote:
> > From: Bhaumik Bhatt
> >
> > Introduce sysfs entries to enable userspace clients the ability to read
> > the serial number and the OEM PK Hash values obtained from
On Sun, Sep 27, 2020 at 08:13:42PM -0400, Joel Fernandes wrote:
> On Thu, Sep 24, 2020 at 12:04:10PM +0530, Neeraj Upadhyay wrote:
> > Clarify the "x" in rcuox/N naming in RCU_NOCB_CPU config
> > description.
> >
>
> Reviewed-by: Joel Fernandes (Google)
Thank you, I will apply your Reviewed-by
On Sun 27.Sep'20 at 12:53:14 +0200, Greg Kroah-Hartman wrote:
On Sun, Sep 27, 2020 at 12:51:52PM +0200, Greg Kroah-Hartman wrote:
On Tue, Sep 22, 2020 at 07:42:58PM +0800, shuo.a@intel.com wrote:
> From: Shuo Liu
>
> The Service VM communicates with the hypervisor via conventional
>
On 09/25/2020 03:19 PM, Oscar Salvador wrote:
> On Fri, Sep 25, 2020 at 02:42:29PM +0530, Anshuman Khandual wrote:
>> Add following new vmstat events which will track HugeTLB page migration.
>>
>> 1. HUGETLB_MIGRATION_SUCCESS
>> 2. HUGETLB_MIGRATION_FAILURE
>>
>> It follows the existing
In the error case, where a power domain cannot be powered on
successfully at boot time (in mtk_register_power_domains),
pm_genpd_init would still be called with is_off=false, and the
system would later try to disable the power domain again, triggering
warnings as disabled clocks are disabled again
On Sun 27.Sep'20 at 12:49:43 +0200, Greg Kroah-Hartman wrote:
On Tue, Sep 22, 2020 at 07:42:56PM +0800, shuo.a@intel.com wrote:
From: Shuo Liu
The ACRN Hypervisor builds an I/O request when a trapped I/O access
happens in User VM. Then, ACRN Hypervisor issues an upcall by sending
a
On 14:56 Sun 27 Sep 2020, Linus Torvalds wrote:
So we finally have all the issues I know about sorted out - the fix
for the VM issue I mentioned in the rc6 announcement is here, as is
the fix for the slab corruption issue that was separately discussed,
along with another silly page locking bug
As per bandwidth table video driver is voting with average bandwidth
for "video-mem" and "cpu-cfg" paths as peak bandwidth is zero
in bandwidth table.
Fixes: 7482a983d ("media: venus: redesign clocks and pm domains control")
Signed-off-by: Mansur Alisha Shaik
Reviewed-by: Stephen Boyd
---
The intention of this patchset is to correct clock enable and disable
order and vote for venus-ebi and cpucfg paths with average bandwidth
instad of peak bandwidth since with current implementation we are seeing
clock related warning during XO-SD and suspend device while video playback
---
As per current implementation, video driver is unvoting "videom-mem" path
for last video session during vdec_session_release().
While video playback when we try to suspend device, we see video clock
warnings since votes are already removed during vdec_session_release().
corrected this by putting
Currently video driver is voting after clk enable and un voting
before clk disable. This is incorrect, video driver should vote
before clk enable and unvote after clk disable.
Corrected this by changing the order of clk enable and clk disable.
Fixes: 07f8f22a33a9e ("media: venus: core: remove
Currently video driver is voting for venus0-ebi path during buffer
processing with an average bandwidth of all the instances and
unvoting during session release.
While video streaming when we try to do XO-SD using the command
"echo mem > /sys/power/state command" , device is not entering
to
On 9/28/20 5:51 AM, Dmitry Osipenko wrote:
> It's safe to enable the ACTMON clock at any time during driver probing,
> even if we don't know the state of hardware, because it's used only for
> collecting and processing stats, and interrupt is kept disabled. This
> allows us to slightly improve
在 2020/9/28 上午10:24, 王擎 写道:
> 在 2020/9/25 下午3:22, Wang Qing 写道:
>> Translate Documentation/filesystems/btrfs.rst into Chinese.
>>
>> Signed-off-by: Wang Qing
>> ---
>> .../translations/zh_CN/filesystems/btrfs.rst | 37
>> ++
>>
Outputting client,virtual,dst addresses info when tcp state changes,
which makes the connection debug more clear
Signed-off-by: longguang.yue
---
net/netfilter/ipvs/ip_vs_proto_tcp.c | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
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