On 28 October 2015 at 19:28, Leonid Yegoshin wrote:
> On 10/28/2015 12:04 PM, Alex Smith wrote:
>>
>> On 28 October 2015 at 18:57, Leonid Yegoshin
>> wrote:
>>>
>>>
>> As I've explained the VDSO will only use the CP0 counter in the same
>> sit
On 28 October 2015 at 18:57, Leonid Yegoshin wrote:
> On 10/28/2015 11:30 AM, Alex Smith wrote:
>>
>> On 28 October 2015 at 18:21, Leonid Yegoshin
>> wrote:
>>>
>>>
>>>
>>> 1) I don't see that in code - there is no check that
On 28 October 2015 at 18:21, Leonid Yegoshin wrote:
>
> On 10/28/2015 03:20 AM, Alex Smith wrote:
>>
>> On 27 October 2015 at 20:46, Leonid Yegoshin
>> wrote:
>>>
>>> I believe, until this issue is fixed the R4K only CPU should be excluded
>>>
On 27 October 2015 at 20:46, Leonid Yegoshin wrote:
> I doesn't work in this way - a standard CP0_counter synchronization code
> takes up to hundred milliseconds to complete with running some loop cycles
> on two CPUs. It is clearly seen in Malta FPGA board.
>
> Non-standard (one way sync, write
On 28 October 2015 at 18:21, Leonid Yegoshin <leonid.yegos...@imgtec.com> wrote:
>
> On 10/28/2015 03:20 AM, Alex Smith wrote:
>>
>> On 27 October 2015 at 20:46, Leonid Yegoshin <leonid.yegos...@imgtec.com>
>> wrote:
>>>
>>> I believe, until t
On 28 October 2015 at 19:28, Leonid Yegoshin <leonid.yegos...@imgtec.com> wrote:
> On 10/28/2015 12:04 PM, Alex Smith wrote:
>>
>> On 28 October 2015 at 18:57, Leonid Yegoshin <leonid.yegos...@imgtec.com>
>> wrote:
>>>
>>>
>> As I've exp
On 28 October 2015 at 18:57, Leonid Yegoshin <leonid.yegos...@imgtec.com> wrote:
> On 10/28/2015 11:30 AM, Alex Smith wrote:
>>
>> On 28 October 2015 at 18:21, Leonid Yegoshin <leonid.yegos...@imgtec.com>
>> wrote:
>>>
>>>
>>>
>>
On 27 October 2015 at 20:46, Leonid Yegoshin wrote:
> I doesn't work in this way - a standard CP0_counter synchronization code
> takes up to hundred milliseconds to complete with running some loop cycles
> on two CPUs. It is clearly seen in Malta FPGA board.
>
>
Hi James,
On 15 October 2015 at 09:47, James Hogan wrote:
>> diff --git a/arch/mips/boot/dts/ingenic/ci20.dts
>> b/arch/mips/boot/dts/ingenic/ci20.dts
>> index 9fcb9e7..453f1d3 100644
>> --- a/arch/mips/boot/dts/ingenic/ci20.dts
>> +++ b/arch/mips/boot/dts/ingenic/ci20.dts
>> @@ -42,3 +42,57 @@
Hi James,
On 15 October 2015 at 09:47, James Hogan wrote:
>> diff --git a/arch/mips/boot/dts/ingenic/ci20.dts
>> b/arch/mips/boot/dts/ingenic/ci20.dts
>> index 9fcb9e7..453f1d3 100644
>> --- a/arch/mips/boot/dts/ingenic/ci20.dts
>> +++
mips/vdso/elf.S
> @@ -0,0 +1,68 @@
> +/*
> + * Copyright (C) 2015 Imagination Technologies
> + * Author: Alex Smith
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the
>
> --- /dev/null
> +++ b/arch/mips/vdso/elf.S
> @@ -0,0 +1,68 @@
> +/*
> + * Copyright (C) 2015 Imagination Technologies
> + * Author: Alex Smith <alex.sm...@imgtec.com>
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * u
Hi,
This series adds support for the BCH controller and NAND devices on
the Ingenic JZ4780 SoC.
Tested on the MIPS Creator Ci20 board. All dependencies are now in
mainline.
This version of the series is based on 4.3-rc1.
Review and feedback welcome.
Thanks,
Alex
Alex Smith (4):
mtd: nand
From: Alex Smith
Add DT bindings for NAND devices connected to the NEMC on JZ4780 SoCs,
as well as the hardware BCH controller, used by the jz4780_{nand,bch}
drivers.
Signed-off-by: Alex Smith
Cc: Zubair Lutfullah Kakakhel
Cc: David Woodhouse
Cc: Brian Norris
Cc: linux
From: Alex Smith
Add device tree nodes for the NEMC and BCH to the JZ4780 device tree,
and make use of them in the Ci20 device tree to add a node for the
board's NAND.
Note that since the pinctrl driver is not yet upstream, this includes
neither pin configuration nor busy/write-protect GPIO
From: Alex Smith
Add a driver for NAND devices connected to the NEMC on JZ4780 SoCs, as
well as the hardware BCH controller. DMA is not currently implemented.
While older 47xx SoCs also have a BCH controller, they are incompatible
with the one in the 4780 due to differing register/bit positions
From: Alex Smith
If nand_wait_ready() times out, this is silently ignored, and its
caller will then proceed to read from/write to the chip before it is
ready. This can potentially result in corruption with no indication as
to why.
While a 20ms timeout seems like it should be plenty enough
From: Alex Smith <alex.sm...@imgtec.com>
Add a driver for NAND devices connected to the NEMC on JZ4780 SoCs, as
well as the hardware BCH controller. DMA is not currently implemented.
While older 47xx SoCs also have a BCH controller, they are incompatible
with the one in the 4780 due to dif
From: Alex Smith <alex.sm...@imgtec.com>
Add device tree nodes for the NEMC and BCH to the JZ4780 device tree,
and make use of them in the Ci20 device tree to add a node for the
board's NAND.
Note that since the pinctrl driver is not yet upstream, this includes
neither pin configuration no
From: Alex Smith <alex.sm...@imgtec.com>
If nand_wait_ready() times out, this is silently ignored, and its
caller will then proceed to read from/write to the chip before it is
ready. This can potentially result in corruption with no indication as
to why.
While a 20ms timeout seems like it
From: Alex Smith <alex.sm...@imgtec.com>
Add DT bindings for NAND devices connected to the NEMC on JZ4780 SoCs,
as well as the hardware BCH controller, used by the jz4780_{nand,bch}
drivers.
Signed-off-by: Alex Smith <alex.sm...@imgtec.com>
Cc: Zubair Lutfullah Kakakhel &
Hi,
This series adds support for the BCH controller and NAND devices on
the Ingenic JZ4780 SoC.
Tested on the MIPS Creator Ci20 board. All dependencies are now in
mainline.
This version of the series is based on 4.3-rc1.
Review and feedback welcome.
Thanks,
Alex
Alex Smith (4):
mtd: nand
On 10 September 2015 at 00:49, Brian Norris wrote:
> + Niklas
>
> On Tue, Sep 08, 2015 at 10:10:50AM +0100, Alex Smith wrote:
>> If nand_wait_ready() times out, this is silently ignored, and its
>> caller will then proceed to read from/write to the chip before it is
>>
On 9 September 2015 at 15:24, Ezequiel Garcia
wrote:
> On 08 Sep 10:10 AM, Alex Smith wrote:
>> Add a driver for NAND devices connected to the NEMC on JZ4780 SoCs, as
>> well as the hardware BCH controller. DMA is not currently implemented.
>>
>> While older 47xx SoCs
On 9 September 2015 at 15:24, Ezequiel Garcia
<ezequ...@vanguardiasur.com.ar> wrote:
> On 08 Sep 10:10 AM, Alex Smith wrote:
>> Add a driver for NAND devices connected to the NEMC on JZ4780 SoCs, as
>> well as the hardware BCH controller. DMA is not currently implemented.
&
On 10 September 2015 at 00:49, Brian Norris <computersforpe...@gmail.com> wrote:
> + Niklas
>
> On Tue, Sep 08, 2015 at 10:10:50AM +0100, Alex Smith wrote:
>> If nand_wait_ready() times out, this is silently ignored, and its
>> caller will then proceed to read fr
meout does occur so that it is easier to
pinpoint any problems in future caused by the chip not becoming ready.
Signed-off-by: Alex Smith
Reviewed-by: Ezequiel Garcia
Cc: Zubair Lutfullah Kakakhel
Cc: David Woodhouse
Cc: Brian Norris
Cc: linux-...@lists.infradead.org
Cc: linux-kernel@vger.
Add DT bindings for NAND devices connected to the NEMC on JZ4780 SoCs,
as well as the hardware BCH controller, used by the jz4780_{nand,bch}
drivers.
Signed-off-by: Alex Smith
Cc: Zubair Lutfullah Kakakhel
Cc: David Woodhouse
Cc: Brian Norris
Cc: linux-...@lists.infradead.org
Cc: linux-kernel
implementing a common driver for them quite messy.
Signed-off-by: Alex Smith
Cc: Zubair Lutfullah Kakakhel
Cc: David Woodhouse
Cc: Brian Norris
Cc: linux-...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
v4 -> v5:
- Bump RB_DELAY up to be sufficient for the driver to work with
of the NAND relies on the boot loader to have left the pins
configured in a usable state, which should be the case when booted
from the NAND.
Signed-off-by: Alex Smith
Cc: Zubair Lutfullah Kakakhel
Cc: David Woodhouse
Cc: Brian Norris
Cc: linux-...@lists.infradead.org
Cc: devicet
Hi,
This series adds support for the BCH controller and NAND devices on
the Ingenic JZ4780 SoC.
Tested on the MIPS Creator Ci20 board. All dependencies are now in
mainline.
This version of the series is based on current mainline (pre 4.3-rc1).
Review and feedback welcome.
Thanks,
Alex
Alex
Hi,
This series adds support for the BCH controller and NAND devices on
the Ingenic JZ4780 SoC.
Tested on the MIPS Creator Ci20 board. All dependencies are now in
mainline.
This version of the series is based on current mainline (pre 4.3-rc1).
Review and feedback welcome.
Thanks,
Alex
Alex
implementing a common driver for them quite messy.
Signed-off-by: Alex Smith <alex.sm...@imgtec.com>
Cc: Zubair Lutfullah Kakakhel <zubair.kakak...@imgtec.com>
Cc: David Woodhouse <dw...@infradead.org>
Cc: Brian Norris <computersforpe...@gmail.com>
Cc: linux-...@lists.infrad
of the NAND relies on the boot loader to have left the pins
configured in a usable state, which should be the case when booted
from the NAND.
Signed-off-by: Alex Smith <alex.sm...@imgtec.com>
Cc: Zubair Lutfullah Kakakhel <zubair.kakak...@imgtec.com>
Cc: David Woodhouse <dw...@in
meout does occur so that it is easier to
pinpoint any problems in future caused by the chip not becoming ready.
Signed-off-by: Alex Smith <alex.sm...@imgtec.com>
Reviewed-by: Ezequiel Garcia <ezequ...@vanguardiasur.com.ar>
Cc: Zubair Lutfullah Kakakhel <zubair.kakak...@imgtec.com
Add DT bindings for NAND devices connected to the NEMC on JZ4780 SoCs,
as well as the hardware BCH controller, used by the jz4780_{nand,bch}
drivers.
Signed-off-by: Alex Smith <alex.sm...@imgtec.com>
Cc: Zubair Lutfullah Kakakhel <zubair.kakak...@imgtec.com>
Cc: David W
On 06/09/2015 21:38, Ezequiel Garcia wrote:
> On 27 Jul 02:50 PM, Alex Smith wrote:
>> Hi,
>>
>> This series adds support for the BCH controller and NAND devices on
>> the Ingenic JZ4780 SoC.
>>
>> Tested on the MIPS Creator Ci20 board. All dependenc
Hi,
On 06/09/2015 22:21, Ezequiel Garcia wrote:
> On 27 Jul 03:21 PM, Alex Smith wrote:
>> Add a driver for NAND devices connected to the NEMC on JZ4780 SoCs, as
>> well as the hardware BCH controller. DMA is not currently implemented.
>>
>> While older 47xx SoCs
Hi Ezequiel,
Thanks for reviewing the series.
On 06/09/2015 21:37, Ezequiel Garcia wrote:
> On 27 Jul 02:50 PM, Alex Smith wrote:
>> If nand_wait_ready() times out, this is silently ignored, and its
>> caller will then proceed to read from/write to the chip before it is
>
On 06/09/2015 21:38, Ezequiel Garcia wrote:
> On 27 Jul 02:50 PM, Alex Smith wrote:
>> Hi,
>>
>> This series adds support for the BCH controller and NAND devices on
>> the Ingenic JZ4780 SoC.
>>
>> Tested on the MIPS Creator Ci20 board. All dependenc
Hi,
On 06/09/2015 22:21, Ezequiel Garcia wrote:
> On 27 Jul 03:21 PM, Alex Smith wrote:
>> Add a driver for NAND devices connected to the NEMC on JZ4780 SoCs, as
>> well as the hardware BCH controller. DMA is not currently implemented.
>>
>> While older 47xx SoCs
Hi Ezequiel,
Thanks for reviewing the series.
On 06/09/2015 21:37, Ezequiel Garcia wrote:
> On 27 Jul 02:50 PM, Alex Smith wrote:
>> If nand_wait_ready() times out, this is silently ignored, and its
>> caller will then proceed to read from/write to the chip before it is
>
On 18/08/2015 13:39, Alex Smith wrote:
> On 27/07/2015 14:50, Alex Smith wrote:
>> Hi,
>>
>> This series adds support for the BCH controller and NAND devices on
>> the Ingenic JZ4780 SoC.
>>
>> Tested on the MIPS Creator Ci20 board. All dependencies are now
On 18/08/2015 13:39, Alex Smith wrote:
On 27/07/2015 14:50, Alex Smith wrote:
Hi,
This series adds support for the BCH controller and NAND devices on
the Ingenic JZ4780 SoC.
Tested on the MIPS Creator Ci20 board. All dependencies are now in
mainline so it should be possible to compile test
On 27/07/2015 14:50, Alex Smith wrote:
> Hi,
>
> This series adds support for the BCH controller and NAND devices on
> the Ingenic JZ4780 SoC.
>
> Tested on the MIPS Creator Ci20 board. All dependencies are now in
> mainline so it should be possible to compile test n
On 27/07/2015 14:50, Alex Smith wrote:
Hi,
This series adds support for the BCH controller and NAND devices on
the Ingenic JZ4780 SoC.
Tested on the MIPS Creator Ci20 board. All dependencies are now in
mainline so it should be possible to compile test now.
This version of the series
implementing a common driver for them quite messy.
Signed-off-by: Alex Smith
Cc: Zubair Lutfullah Kakakhel
Cc: David Woodhouse
Cc: Brian Norris
Cc: linux-...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
v3 -> v4:
- Rebase to 4.2-rc4
- Change ECC_HW_OOB_FIRST to ECC_HW, reading
an additional patch to fix an issue that was encountered in the
external Ci20 3.18 kernel branch.
Review and feedback welcome.
Thanks,
Alex
Alex Smith (3):
mtd: nand: increase ready wait timeout and report timeouts
dt-bindings: binding for jz4780-{nand,bch}
mtd: nand: jz4780: driver for NAND
Add DT bindings for NAND devices connected to the NEMC on JZ4780 SoCs,
as well as the hardware BCH controller, used by the jz4780_{nand,bch}
drivers.
Signed-off-by: Alex Smith
Cc: Zubair Lutfullah Kakakhel
Cc: David Woodhouse
Cc: Brian Norris
Cc: linux-...@lists.infradead.org
Cc: devicet
meout does occur so that it is easier to
pinpoint any problems in future caused by the chip not becoming ready.
Signed-off-by: Alex Smith
Cc: Zubair Lutfullah Kakakhel
Cc: David Woodhouse
Cc: Brian Norris
Cc: linux-...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
---
v3 -> v4:
- New
occur so that it is easier to
pinpoint any problems in future caused by the chip not becoming ready.
Signed-off-by: Alex Smith alex.sm...@imgtec.com
Cc: Zubair Lutfullah Kakakhel zubair.kakak...@imgtec.com
Cc: David Woodhouse dw...@infradead.org
Cc: Brian Norris computersforpe...@gmail.com
Cc: linux
Add DT bindings for NAND devices connected to the NEMC on JZ4780 SoCs,
as well as the hardware BCH controller, used by the jz4780_{nand,bch}
drivers.
Signed-off-by: Alex Smith alex.sm...@imgtec.com
Cc: Zubair Lutfullah Kakakhel zubair.kakak...@imgtec.com
Cc: David Woodhouse dw...@infradead.org
Cc
an additional patch to fix an issue that was encountered in the
external Ci20 3.18 kernel branch.
Review and feedback welcome.
Thanks,
Alex
Alex Smith (3):
mtd: nand: increase ready wait timeout and report timeouts
dt-bindings: binding for jz4780-{nand,bch}
mtd: nand: jz4780: driver for NAND
implementing a common driver for them quite messy.
Signed-off-by: Alex Smith alex.sm...@imgtec.com
Cc: Zubair Lutfullah Kakakhel zubair.kakak...@imgtec.com
Cc: David Woodhouse dw...@infradead.org
Cc: Brian Norris computersforpe...@gmail.com
Cc: linux-...@lists.infradead.org
Cc: linux-kernel
On 24/07/2015 07:30, Vinod Koul wrote:
On Fri, Jul 24, 2015 at 07:51:28AM +0200, Julia Lawall wrote:
Yes for dmaengine drivers I do ask this question which typically ends up in
driver invoking devm_irq_free() in driver's remove callback
IMHO don't think devm irq calls are very useful, they do
On 24/07/2015 07:30, Vinod Koul wrote:
On Fri, Jul 24, 2015 at 07:51:28AM +0200, Julia Lawall wrote:
Yes for dmaengine drivers I do ask this question which typically ends up in
driver invoking devm_irq_free() in driver's remove callback
IMHO don't think devm irq calls are very useful, they do
On 21/07/2015 05:15, Vinod Koul wrote:
On Mon, Jul 20, 2015 at 10:28:14AM +0200, Julia Lawall wrote:
On Mon, 20 Jul 2015, Alex Smith wrote:
On 19/07/2015 10:08, Julia Lawall wrote:
The file drivers/dma/dma-jz4780.c has a probe function that sets up irqs
using devm_request_irq. The probe
On 21/07/2015 05:15, Vinod Koul wrote:
On Mon, Jul 20, 2015 at 10:28:14AM +0200, Julia Lawall wrote:
On Mon, 20 Jul 2015, Alex Smith wrote:
On 19/07/2015 10:08, Julia Lawall wrote:
The file drivers/dma/dma-jz4780.c has a probe function that sets up irqs
using devm_request_irq. The probe
On 19/07/2015 10:08, Julia Lawall wrote:
The file drivers/dma/dma-jz4780.c has a probe function that sets up irqs
using devm_request_irq. The probe function then ends with:
err_unregister_dev:
dma_async_device_unregister(dd);
err_disable_clk:
On 19/07/2015 10:08, Julia Lawall wrote:
The file drivers/dma/dma-jz4780.c has a probe function that sets up irqs
using devm_request_irq. The probe function then ends with:
err_unregister_dev:
dma_async_device_unregister(dd);
err_disable_clk:
clk_disable_unprepare(jzdma-clk);
The cmdline_size field in setup_header is listed as read-only, and is
never read by the kernel. Therefore, there is no need for it to be set
by a boot loader implementing the EFI handover protocol, so remove it
from the list of fields required to be set by a boot loader.
Signed-off-by: Alex Smith
The cmdline_size field in setup_header is listed as read-only, and is
never read by the kernel. Therefore, there is no need for it to be set
by a boot loader implementing the EFI handover protocol, so remove it
from the list of fields required to be set by a boot loader.
Signed-off-by: Alex Smith
On 27 February 2015 at 09:20, Zubair Lutfullah Kakakhel
wrote:
> Hi Alex,
>
> On 26/02/15 20:04, Alex Smith wrote:
>> Hi Zubair,
>>
>> On 26 February 2015 at 12:43, Zubair Lutfullah Kakakhel
>> wrote:
>>> From: Alex Smith
>>>
>>> Ad
On 27 February 2015 at 09:20, Zubair Lutfullah Kakakhel
zubair.kakak...@imgtec.com wrote:
Hi Alex,
On 26/02/15 20:04, Alex Smith wrote:
Hi Zubair,
On 26 February 2015 at 12:43, Zubair Lutfullah Kakakhel
zubair.kakak...@imgtec.com wrote:
From: Alex Smith alex.sm...@imgtec.com
Add device
Hi Zubair,
On 26 February 2015 at 12:43, Zubair Lutfullah Kakakhel
wrote:
> From: Alex Smith
>
> Add device tree bindings for the DMA controller on JZ4780 SoCs, used by
> the dma-jz4780 driver.
>
> Signed-off-by: Alex Smith
> Signed-off-by: Zubair Lutfullah Kakakhe
Hi Zubair,
On 26 February 2015 at 12:43, Zubair Lutfullah Kakakhel
zubair.kakak...@imgtec.com wrote:
From: Alex Smith alex.sm...@imgtec.com
Add device tree bindings for the DMA controller on JZ4780 SoCs, used by
the dma-jz4780 driver.
Signed-off-by: Alex Smith alex.sm...@imgtec.com
Signed
.
Signed-off-by: Alex Smith
Cc: linux-kernel@vger.kernel.org
Cc: sta...@vger.kernel.org
---
scripts/recordmcount.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/scripts/recordmcount.h b/scripts/recordmcount.h
index 9d1421e63ff8..49b582a225b0 100644
--- a/scripts/recordmcount.h
.
Signed-off-by: Alex Smith alex.sm...@imgtec.com
Cc: linux-kernel@vger.kernel.org
Cc: sta...@vger.kernel.org
---
scripts/recordmcount.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/scripts/recordmcount.h b/scripts/recordmcount.h
index 9d1421e63ff8..49b582a225b0 100644
On 03/09/2007, Michal Piotrowski <[EMAIL PROTECTED]> wrote:
> Hi Alex,
>
> On 02/09/07, Alex Smith <[EMAIL PROTECTED]> wrote:
> > Hi,
> >
> > I found an old Philips Askey VC010 webcam and attempted to get it
> > working on Linux (latest git, x86_64).
&g
On 03/09/2007, Michal Piotrowski [EMAIL PROTECTED] wrote:
Hi Alex,
On 02/09/07, Alex Smith [EMAIL PROTECTED] wrote:
Hi,
I found an old Philips Askey VC010 webcam and attempted to get it
working on Linux (latest git, x86_64).
Is this a regression? Does 2.6.22 work fine?
Not sure, I
:
mplayer -cache 128 -tv
driver=v4l:width=640:height=480:outfmt=i420:device=/dev/video1 -vc
rawi420 -vo xv tv://
Thanks,
Alex
--
Alex Smith - http://www.alex-smith.me.uk
-
To unsubscribe from this list: send the line "unsubscribe linux-kernel" in
the body of a message to [EMAIL PROTE
:
mplayer -cache 128 -tv
driver=v4l:width=640:height=480:outfmt=i420:device=/dev/video1 -vc
rawi420 -vo xv tv://
Thanks,
Alex
--
Alex Smith - http://www.alex-smith.me.uk
-
To unsubscribe from this list: send the line unsubscribe linux-kernel in
the body of a message to [EMAIL PROTECTED]
More
On 04/08/07, tla <[EMAIL PROTECTED]> wrote:
> Hi,
>
> The following warnings (17) and section mismatch (1) were observed
> when compiling linux 2.6.23-rc2.
>
*snip*
> LD .tmp_vmlinux1
> KSYM.tmp_kallsyms1.S
> AS .tmp_kallsyms1.o
> LD .tmp_vmlinux2
> KSYM
On 04/08/07, tla [EMAIL PROTECTED] wrote:
Hi,
The following warnings (17) and section mismatch (1) were observed
when compiling linux 2.6.23-rc2.
*snip*
LD .tmp_vmlinux1
KSYM.tmp_kallsyms1.S
AS .tmp_kallsyms1.o
LD .tmp_vmlinux2
KSYM.tmp_kallsyms2.S
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