Re: [PATCH] arm64: dts: qcom: Clean up sc7180-trogdor voltage rails

}; > > @@ -491,21 +438,6 @@ pp1200_l3c: ldo3 { > regulator-initial-mode = ; > }; > > - ld_pp1800_esim_l4c: > - vddpx_5: > - pp1800_l4c: ldo4 { > - regulator-min-microvolt = <1648000>; > - regulator-max-microvolt = <3304000>; > - regulator-initial-mode = ; > - }; > - > - vddpx_6: > - pp1800_l5c: ldo5 { > - regulator-min-microvolt = <180>; > - regulator-max-microvolt = <180>; > - regulator-initial-mode = ; > - }; > - > vddpx_2: > ppvar_l6c: ldo6 { > regulator-min-microvolt = <180>; > -- > 2.29.2.576.ga3fc446d84-goog > Reviewed-by: Alexandru M Stan

Re: [PATCH] spi: spi-geni-qcom: Use the new method of gpio CS control

ctrl > setting. > > Cc: Akash Asthana > Cc: Bjorn Andersson > Reviewed-by: Douglas Anderson > Acked-by: Alexandru M Stan I meant this as a joke in chat. It doesn't really mean anything in any capacity. > Signed-off-by: Stephen Boyd > --- > drivers/spi/spi-geni-qcom.c

Re: [PATCH v3 3/3] backlight: pwm_bl: Fix interpolation

On Wed, Oct 28, 2020 at 8:12 AM Daniel Thompson wrote: > > On Wed, Oct 21, 2020 at 10:04:45PM -0700, Alexandru Stan wrote: > > The previous behavior was a little unexpected, its properties/problems: > > 1. It was designed to generate strictly increasing values (no repeats) > > 2. It had

Re: [PATCH v2 2/3] ARM: dts: rockchip: veyron: Remove 0 point from brightness-levels

On Wed, Oct 14, 2020 at 7:19 AM Daniel Thompson wrote: > > On Tue, Oct 13, 2020 at 01:01:02AM -0700, Alexandru Stan wrote: > > After the "PWM backlight interpolation adjustments" patches, the > > backlight interpolation works a little differently. The way these > > dts files were working before

Re: [PATCH 2/3] backlight: pwm_bl: Artificially add 0% during interpolation

On Fri, Sep 4, 2020 at 4:38 AM Daniel Thompson wrote: > > On Mon, Jul 20, 2020 at 09:25:21PM -0700, Alexandru Stan wrote: > > Some displays need the low end of the curve cropped in order to make > > them happy. In that case we still want to have the 0% point, even though > > anything between 0%

Re: [PATCH 0/3] PWM backlight interpolation adjustments

les changed, 42 insertions(+), 42 deletions(-) > > -- > 2.27.0 > Hello, Friendly ping. Let me know if you would like me to make any changes to my patches. Thanks, Alexandru M Stan

Re: [PATCH] ARM: dts: rockchip: add chosen node on veyron chromebooks

On Fri, Feb 15, 2019 at 3:09 PM Heiko Stübner wrote: > > Hi Enric, > > Am Freitag, 15. Februar 2019, 12:51:50 CET schrieb Enric Balletbo i Serra: > > In order to use earlycon, the stdout-path property needs to be set > > in the chosen node. > > > > Signed-off-by: Enric Balletbo i Serra > >

Re: [PATCH] mfd: cros ec: spi: Fix "in progress" error signaling

On Tue, Mar 27, 2018 at 3:49 AM, Enric Balletbo Serra wrote: > I think that accessing to the ec console should give the same result, right? Yep, even better. > > In such case here is: > > Veyron Minnie ( ASUS Chromebook Flip C100PA ) >

Re: [PATCH] mfd: cros ec: spi: Fix "in progress" error signaling

On Tue, Mar 27, 2018 at 3:49 AM, Enric Balletbo Serra wrote: > I think that accessing to the ec console should give the same result, right? Yep, even better. > > In such case here is: > > Veyron Minnie ( ASUS Chromebook Flip C100PA ) >

Re: [PATCH] mfd: cros ec: spi: Fix "in progress" error signaling

Hello Enric On Mon, Mar 26, 2018 at 9:48 AM, Enric Balletbo Serra wrote: > Dear all, > > Cc'ing some more chromium folks. > > 2017-11-29 13:11 GMT+01:00 Lee Jones : >> On Wed, 27 Sep 2017, Shawn Nematbakhsh wrote: >> >>> For host commands that take a

Re: [PATCH] mfd: cros ec: spi: Fix "in progress" error signaling

Hello Enric On Mon, Mar 26, 2018 at 9:48 AM, Enric Balletbo Serra wrote: > Dear all, > > Cc'ing some more chromium folks. > > 2017-11-29 13:11 GMT+01:00 Lee Jones : >> On Wed, 27 Sep 2017, Shawn Nematbakhsh wrote: >> >>> For host commands that take a long time to process, cros ec can return >>>

[PATCH 1/2] dt-bindings: analogix-dp: Add backlight-pwm-passthru

Documentation for the optional backlight-pwm-passthru property. Tells the EDP panel to folow the input pwm frequency instead of generating its own. Signed-off-by: Alexandru M Stan <ams...@chromium.org> --- Documentation/devicetree/bindings/display/bridge/analogix_dp.txt | 4 1 file c

[PATCH 1/2] dt-bindings: analogix-dp: Add backlight-pwm-passthru

Documentation for the optional backlight-pwm-passthru property. Tells the EDP panel to folow the input pwm frequency instead of generating its own. Signed-off-by: Alexandru M Stan --- Documentation/devicetree/bindings/display/bridge/analogix_dp.txt | 4 1 file changed, 4 insertions

[PATCH 2/2] drm/bridge: analogix: Enable EDP_BACKLIGHT_FREQ_PWM_PIN_PASSTHRU

Configure the DPCD registers for the backlight to respect the pwm frequency of the input. We sometimes don't want it to generate its own. Signed-off-by: Alexandru M Stan <ams...@chromium.org> --- drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 48 ++ drivers/g

[PATCH 2/2] drm/bridge: analogix: Enable EDP_BACKLIGHT_FREQ_PWM_PIN_PASSTHRU

Configure the DPCD registers for the backlight to respect the pwm frequency of the input. We sometimes don't want it to generate its own. Signed-off-by: Alexandru M Stan --- drivers/gpu/drm/bridge/analogix/analogix_dp_core.c | 48 ++ drivers/gpu/drm/bridge/analogix

[PATCH 0/2] Add backlight-pwm-passthru in analogix DP driver

s includes the optional dt binding to enable this fix (backlight-pwm-passthru) and the corresponding code in the analogix drm/bridge driver. Alexandru M Stan (2): dt-bindings: analogix-dp: Add backlight-pwm-passthru drm/bridge: analogix: Enable EDP_BACKLIGHT_FREQ_PWM_PIN_PASSTHRU .../bindin

[PATCH 0/2] Add backlight-pwm-passthru in analogix DP driver

s includes the optional dt binding to enable this fix (backlight-pwm-passthru) and the corresponding code in the analogix drm/bridge driver. Alexandru M Stan (2): dt-bindings: analogix-dp: Add backlight-pwm-passthru drm/bridge: analogix: Enable EDP_BACKLIGHT_FREQ_PWM_PIN_PASSTHRU .../bindin

[PATCH] usb: dwc2: Fix NULL qh in dwc2_queue_transaction

When a usb device disconnects in a certain way, dwc2_queue_transaction still gets called after dwc2_hcd_cleanup_channels. dwc2_hcd_cleanup_channels does "channel->qh = NULL;" but dwc2_queue_transaction still wants to dereference qh. This adds a check for a null qh. Signed-off-by

[PATCH 0/1] usb: dwc2: Fix NULL qh in dwc2_queue_transaction

checks in there). I also hope this opens up discussions on this issue. Alexandru M Stan (1): usb: dwc2: Fix NULL qh in dwc2_queue_transaction drivers/usb/dwc2/hcd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.6.0.rc0.131.gf624c3d -- To unsubscribe from this list: send th

[PATCH 0/1] usb: dwc2: Fix NULL qh in dwc2_queue_transaction

checks in there). I also hope this opens up discussions on this issue. Alexandru M Stan (1): usb: dwc2: Fix NULL qh in dwc2_queue_transaction drivers/usb/dwc2/hcd.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) -- 2.6.0.rc0.131.gf624c3d -- To unsubscribe from this list: send th

[PATCH] usb: dwc2: Fix NULL qh in dwc2_queue_transaction

When a usb device disconnects in a certain way, dwc2_queue_transaction still gets called after dwc2_hcd_cleanup_channels. dwc2_hcd_cleanup_channels does "channel->qh = NULL;" but dwc2_queue_transaction still wants to dereference qh. This adds a check for a null qh. Signed-off-by

[PATCH v2 1/2] ARM: dts: rockchip: pull up cts lines on rk3288

this patch merely restores them. This is similar to what we're already doing with the RX pin, so it should be safe. At worst it might be a slightly higher power usage (through ~50 kohms) when the cts is low. Suggested-by: Neil Hendin Signed-off-by: Alexandru M Stan --- Changes in v2: None arch

[PATCH v2 2/2] ARM: dts: rockchip: Remove specific cts pullup from veyron

With the previous patch ("rk3288: pull up cts lines") this is redundant, I sent that patch for the same reason this existed here, so the lines don't wiggle randomly when disconnected. Signed-off-by: Alexandru M Stan --- Changes in v2: - Restrict changes only to cts pin, leave rts

[PATCH v2 0/2] ARM: dts: rockchip: pull up cts lines

- CC people with the firefly board - New patch removing redundant pullup code from veyron - cover letter Alexandru M Stan (2): ARM: dts: rockchip: pull up cts lines on rk3288 ARM: dts: rockchip: Remove specific cts pullup from veyron arch/arm/boot/dts/rk3288-veyron.dtsi | 12 arch

[PATCH] ARM: dts: rk3288: pull up cts lines

this patch merely restores them. Suggested-by: Neil Hendin Signed-off-by: Alexandru M Stan --- arch/arm/boot/dts/rk3288.dtsi | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 906e938..a059367

[PATCH v2 2/2] ARM: dts: rockchip: Remove specific cts pullup from veyron

With the previous patch ("rk3288: pull up cts lines") this is redundant, I sent that patch for the same reason this existed here, so the lines don't wiggle randomly when disconnected. Signed-off-by: Alexandru M Stan <ams...@chromium.org> --- Changes in v2: - Restrict changes

[PATCH v2 0/2] ARM: dts: rockchip: pull up cts lines

- CC people with the firefly board - New patch removing redundant pullup code from veyron - cover letter Alexandru M Stan (2): ARM: dts: rockchip: pull up cts lines on rk3288 ARM: dts: rockchip: Remove specific cts pullup from veyron arch/arm/boot/dts/rk3288-veyron.dtsi | 12 arch

[PATCH v2 1/2] ARM: dts: rockchip: pull up cts lines on rk3288

this patch merely restores them. This is similar to what we're already doing with the RX pin, so it should be safe. At worst it might be a slightly higher power usage (through ~50 kohms) when the cts is low. Suggested-by: Neil Hendin <nhen...@chromium.org> Signed-off-by: Alexandru M Sta

[PATCH] ARM: dts: rk3288: pull up cts lines

this patch merely restores them. Suggested-by: Neil Hendin <nhen...@chromium.org> Signed-off-by: Alexandru M Stan <ams...@chromium.org> --- arch/arm/boot/dts/rk3288.dtsi | 16 1 file changed, 8 insertions(+), 8 deletions(-) diff --git a/arch/arm/boot/dts/rk3288.dts

[PATCH] ARM: dts: rockchip: disable gmac by default in rk3288.dtsi

This block should not be enabled by default or else if the kconfig is set, it will try to load/probe even if there's no phy connected. Signed-off-by: Alexandru M Stan --- arch/arm/boot/dts/rk3288.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm

[PATCH 0/1] ARM: dts: rockchip: disable gmac by default in rk3288.dtsi

ww.spinics.net/lists/arm-kernel/msg403629.html) to GPLv2/X11. Alexandru M Stan (1): ARM: dts: rockchip: disable gmac by default in rk3288.dtsi arch/arm/boot/dts/rk3288.dtsi | 1 + 1 file changed, 1 insertion(+) -- 2.2.0.rc0.207.ga3a616c -- To unsubscribe from this list: send the line "

[PATCH 0/1] ARM: dts: rockchip: disable gmac by default in rk3288.dtsi

-kernel/msg403629.html) to GPLv2/X11. Alexandru M Stan (1): ARM: dts: rockchip: disable gmac by default in rk3288.dtsi arch/arm/boot/dts/rk3288.dtsi | 1 + 1 file changed, 1 insertion(+) -- 2.2.0.rc0.207.ga3a616c -- To unsubscribe from this list: send the line unsubscribe linux-kernel

[PATCH] ARM: dts: rockchip: disable gmac by default in rk3288.dtsi

This block should not be enabled by default or else if the kconfig is set, it will try to load/probe even if there's no phy connected. Signed-off-by: Alexandru M Stan ams...@chromium.org --- arch/arm/boot/dts/rk3288.dtsi | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm/boot/dts

[PATCH v4 2/2] clk: rockchip: Add support for the mmc clock phases using the framework

are as big as 80 ps, so a finer division (smaller than 22.5) was not picked because the phase might not be monotonic anymore. Suggested-by: Heiko Stuebner Signed-off-by: Alexandru M Stan --- Changes in v4: - Changed set_phase to 22.5 increments, it seems better for tuning, better at splitting up big

[PATCH v4 0/2] Add support for the rockchip mmc clock phases using the framework

to just mmc_clock or mmc - added RK3288_MMC_CLKGEN_DIV instead of the magic number - added new paragraph to commit message Changes in v2: - fixed my cc/to list - removed dangling #DEFINE DEBUG Alexandru M Stan (2): clk: rockchip: add bindings for the mmc clocks clk: rockchip: Add support

[PATCH v4 1/2] clk: rockchip: add bindings for the mmc clocks

These clocks represent the physical clocks (including phases) and they will later be used for clock phase tuning. Suggested-by: Heiko Stuebner Signed-off-by: Alexandru M Stan --- Changes in v4: None Changes in v3: None Changes in v2: None include/dt-bindings/clock/rk3288-cru.h | 10

[PATCH v4 1/2] clk: rockchip: add bindings for the mmc clocks

These clocks represent the physical clocks (including phases) and they will later be used for clock phase tuning. Suggested-by: Heiko Stuebner he...@sntech.de Signed-off-by: Alexandru M Stan ams...@chromium.org --- Changes in v4: None Changes in v3: None Changes in v2: None include/dt-bindings

[PATCH v4 0/2] Add support for the rockchip mmc clock phases using the framework

to just mmc_clock or mmc - added RK3288_MMC_CLKGEN_DIV instead of the magic number - added new paragraph to commit message Changes in v2: - fixed my cc/to list - removed dangling #DEFINE DEBUG Alexandru M Stan (2): clk: rockchip: add bindings for the mmc clocks clk: rockchip: Add support

[PATCH v4 2/2] clk: rockchip: Add support for the mmc clock phases using the framework

are as big as 80 ps, so a finer division (smaller than 22.5) was not picked because the phase might not be monotonic anymore. Suggested-by: Heiko Stuebner he...@sntech.de Signed-off-by: Alexandru M Stan ams...@chromium.org --- Changes in v4: - Changed set_phase to 22.5 increments, it seems better

[PATCH v3 2/2] clk: rockchip: Add support for the mmc clock phases using the framework

-by: Alexandru M Stan --- Changes in v3: - renamed everything internal from phase to just mmc_clock or mmc - added RK3288_MMC_CLKGEN_DIV instead of the magic number - added new paragraph to commit message Changes in v2: - fixed my cc/to list - removed dangling #DEFINE DEBUG drivers/clk/rockchip

[PATCH v3 0/2] Add support for the rockchip mmc clock phases using the framework

- added new paragraph to commit message Changes in v2: - fixed my cc/to list - removed dangling #DEFINE DEBUG Alexandru M Stan (2): clk: rockchip: add bindings for the mmc clocks clk: rockchip: Add support for the mmc clock phases using the framework drivers/clk/rockchip/Makefile

[PATCH v3 1/2] clk: rockchip: add bindings for the mmc clocks

These clocks represent the physical clocks (including phases) and they will later be used for clock phase tuning. Suggested-by: Heiko Stuebner Signed-off-by: Alexandru M Stan --- Changes in v3: None Changes in v2: None include/dt-bindings/clock/rk3288-cru.h | 10 ++ 1 file changed, 10

[PATCH v3 0/2] Add support for the rockchip mmc clock phases using the framework

- added new paragraph to commit message Changes in v2: - fixed my cc/to list - removed dangling #DEFINE DEBUG Alexandru M Stan (2): clk: rockchip: add bindings for the mmc clocks clk: rockchip: Add support for the mmc clock phases using the framework drivers/clk/rockchip/Makefile

[PATCH v3 1/2] clk: rockchip: add bindings for the mmc clocks

These clocks represent the physical clocks (including phases) and they will later be used for clock phase tuning. Suggested-by: Heiko Stuebner he...@sntech.de Signed-off-by: Alexandru M Stan ams...@chromium.org --- Changes in v3: None Changes in v2: None include/dt-bindings/clock/rk3288-cru.h

[PATCH v3 2/2] clk: rockchip: Add support for the mmc clock phases using the framework

...@sntech.de Signed-off-by: Alexandru M Stan ams...@chromium.org --- Changes in v3: - renamed everything internal from phase to just mmc_clock or mmc - added RK3288_MMC_CLKGEN_DIV instead of the magic number - added new paragraph to commit message Changes in v2: - fixed my cc/to list - removed dangling

[PATCH v2 1/2] clk: rockchip: add bindings for the mmc clock phases

This will be used in a later patch for clock phase tuning. Suggested-by: Heiko Stuebner Signed-off-by: Alexandru M Stan --- Changes in v2: None include/dt-bindings/clock/rk3288-cru.h | 10 ++ 1 file changed, 10 insertions(+) diff --git a/include/dt-bindings/clock/rk3288-cru.h b

[PATCH v2 2/2] clk: rockchip: Add support for the mmc clock phases using the framework

) to generate a rough 45deg (which might be from 33deg to 66deg) setting. Suggested-by: Heiko Stuebner Signed-off-by: Alexandru M Stan --- Changes in v2: - fixed my cc/to list - removed dangling #DEFINE DEBUG drivers/clk/rockchip/Makefile| 1 + drivers/clk/rockchip/clk-mmc-phase.c | 149

[PATCH v2 0/2] Add support for the rockchip mmc clock phases using the framework

180 Next thing that will come is some dts changes that will make use of these new clocks, and eventually mmc code will be changed to tune with these clocks. Changes in v2: - fixed my cc/to list - removed dangling #DEFINE DEBUG Alexandru M Stan (2): clk: rockchip: add bindings for the mmc clock

[PATCH 2/2] clk: rockchip: Add support for the mmc clock phases using the framework

) to generate a rough 45deg (which might be from 33deg to 66deg) setting. Suggested-by: Heiko Stuebner Signed-off-by: Alexandru M Stan --- drivers/clk/rockchip/Makefile| 1 + drivers/clk/rockchip/clk-mmc-phase.c | 150 +++ drivers/clk/rockchip/clk-rk3288.c

[PATCH 1/2] clk: rockchip: add bindings for the mmc clock phases

This will be used in a later patch for clock phase tuning. Suggested-by: Heiko Stuebner Signed-off-by: Alexandru M Stan --- include/dt-bindings/clock/rk3288-cru.h | 10 ++ 1 file changed, 10 insertions(+) diff --git a/include/dt-bindings/clock/rk3288-cru.h b/include/dt-bindings/clock

[PATCH 0/2] For now all I have is the getter and setter for the phase, nothing that uses it

of these new clocks, and eventually mmc code will be changed to tune with these clocks. Alexandru M Stan (2): clk: rockchip: add bindings for the mmc clock phases clk: rockchip: Add support for the mmc clock phases using the framework drivers/clk/rockchip/Makefile | 1 + drivers/clk

[PATCH 0/2] For now all I have is the getter and setter for the phase, nothing that uses it

of these new clocks, and eventually mmc code will be changed to tune with these clocks. Alexandru M Stan (2): clk: rockchip: add bindings for the mmc clock phases clk: rockchip: Add support for the mmc clock phases using the framework drivers/clk/rockchip/Makefile | 1 + drivers/clk

[PATCH 1/2] clk: rockchip: add bindings for the mmc clock phases

This will be used in a later patch for clock phase tuning. Suggested-by: Heiko Stuebner he...@sntech.de Signed-off-by: Alexandru M Stan ams...@chromium.org --- include/dt-bindings/clock/rk3288-cru.h | 10 ++ 1 file changed, 10 insertions(+) diff --git a/include/dt-bindings/clock/rk3288

[PATCH 2/2] clk: rockchip: Add support for the mmc clock phases using the framework

) to generate a rough 45deg (which might be from 33deg to 66deg) setting. Suggested-by: Heiko Stuebner he...@sntech.de Signed-off-by: Alexandru M Stan ams...@chromium.org --- drivers/clk/rockchip/Makefile| 1 + drivers/clk/rockchip/clk-mmc-phase.c | 150

[PATCH v2 2/2] clk: rockchip: Add support for the mmc clock phases using the framework

) to generate a rough 45deg (which might be from 33deg to 66deg) setting. Suggested-by: Heiko Stuebner he...@sntech.de Signed-off-by: Alexandru M Stan ams...@chromium.org --- Changes in v2: - fixed my cc/to list - removed dangling #DEFINE DEBUG drivers/clk/rockchip/Makefile| 1 + drivers/clk

[PATCH v2 0/2] Add support for the rockchip mmc clock phases using the framework

180 Next thing that will come is some dts changes that will make use of these new clocks, and eventually mmc code will be changed to tune with these clocks. Changes in v2: - fixed my cc/to list - removed dangling #DEFINE DEBUG Alexandru M Stan (2): clk: rockchip: add bindings for the mmc clock

[PATCH v2 1/2] clk: rockchip: add bindings for the mmc clock phases

This will be used in a later patch for clock phase tuning. Suggested-by: Heiko Stuebner he...@sntech.de Signed-off-by: Alexandru M Stan ams...@chromium.org --- Changes in v2: None include/dt-bindings/clock/rk3288-cru.h | 10 ++ 1 file changed, 10 insertions(+) diff --git a/include/dt

[PATCH] i2c: rk3x: fix 0 length write transfers

-by: Alexandru M Stan --- drivers/i2c/busses/i2c-rk3x.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-rk3x.c b/drivers/i2c/busses/i2c-rk3x.c index b41d979..f486d0e 100644 --- a/drivers/i2c/busses/i2c-rk3x.c +++ b/drivers/i2c/busses/i2c-rk3x.c @@ -238,7 +238,7

[PATCH] i2c: rk3x: fix 0 length write transfers

...@chromium.org Signed-off-by: Alexandru M Stan ams...@chromium.org --- drivers/i2c/busses/i2c-rk3x.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/i2c/busses/i2c-rk3x.c b/drivers/i2c/busses/i2c-rk3x.c index b41d979..f486d0e 100644 --- a/drivers/i2c/busses/i2c-rk3x.c +++ b/drivers