Quoting Jason Xing (2024-04-10 14:54:51)
> Hi Antoine,
>
> On Wed, Apr 10, 2024 at 8:14 PM Antoine Tenart wrote:
> >
> > Quoting Jason Xing (2024-04-09 12:09:30)
> > > void(*send_reset)(const struct sock *sk,
> > > -
Quoting Jason Xing (2024-04-09 12:09:30)
> void(*send_reset)(const struct sock *sk,
> - struct sk_buff *skb);
> + struct sk_buff *skb,
> + int reason);
I get that 'int'
Quoting Matthew Wilcox (2021-03-22 10:05:36)
> On Mon, Mar 22, 2021 at 09:55:50AM +0100, Antoine Tenart wrote:
> > I only had a quick look at this, but I think the issue should be fixed
> > with:
> >
> > diff --git a/net/core/net-sysfs.c b/net/core/net-sysfs.c
> >
I only had a quick look at this, but I think the issue should be fixed
with:
diff --git a/net/core/net-sysfs.c b/net/core/net-sysfs.c
index e16d54aabd4c..3ae3c20eb64c 100644
--- a/net/core/net-sysfs.c
+++ b/net/core/net-sysfs.c
@@ -1378,7 +1378,7 @@ static ssize_t xps_queue_show(struct net_device
Quoting Bhaskar Chowdhury (2021-03-17 10:14:45)
>
> s/procesing/processing/
>
> Signed-off-by: Bhaskar Chowdhury
Acked-by: Antoine Tenart
Thanks,
Antoine
> ---
> drivers/crypto/inside-secure/safexcel.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
>
Hello,
Quoting Pan Bian (2021-01-21 16:11:26)
> Put parent device node parent_np if there is no enough memory.
>
> Fixes: aed6f3cadc86 ("reset: berlin: convert to a platform driver")
> Signed-off-by: Pan Bian
> ---
> drivers/reset/reset-berlin.c | 4 +++-
> 1 file changed, 3 insertions(+), 1
Quoting stef...@marvell.com (2020-12-17 18:45:06)
> From: Stefan Chulski
>
> Issue:
> Flow control frame used to pause GoP(MAC) was delivered to the CPU
> and created a load on the CPU. Since XOFF/XON frames are used only
> by MAC, these frames should be dropped inside MAC.
>
> Fix:
> According
Hi Stefan,
Quoting stef...@marvell.com (2020-12-17 18:23:11)
> From: Stefan Chulski
>
> Current PPPoE+IPv6 entry is jumping to 'next-hdr'
> field and not to 'DIP' field as done for IPv4.
>
> Fixes: db9d7d36eecc ("net: mvpp2: Split the PPv2 driver to a dedicated
> directory")
That's not the
netheless.
>
> Fixes: e6b78f2c3e14 ("irqchip: Add the Alpine MSIX interrupt controller")
> Cc: Tsahee Zidenberg
> Cc: Antoine Tenart
> Signed-off-by: Marc Zyngier
Reviewed-by: Antoine Tenart
Thanks,
Antoine
> ---
> drivers/irqchip/irq-alpine-msi.c | 3 +--
>
Hello Christian,
Quoting Christian Eggers (2020-11-22 09:26:36)
> Use recently introduced PTP_MSGTYPE_SYNC and PTP_MSGTYPE_DELAY_REQ
> defines instead of a driver internal enumeration.
>
> Signed-off-by: Christian Eggers
Reviewed-by: Antoine Tenart
Thanks!
Antoine
> Cc: Quent
_middle.cocci script")
> CC: Denis Efremov
> Reported-by: kernel test robot
> Signed-off-by: kernel test robot
> Signed-off-by: Julia Lawall
Reviewed-by: Antoine Tenart
Thanks!
Antoine
> ---
>
> v2: add netdev mailing list
>
> tree: https://git.kerne
the "Fixes:" tag
>
> Fixes: 1bbe0ecc2a1a ("net: phy: mscc: macsec initialization")
> Signed-off-by: Steen Hegelund
Reviewed-by: Antoine Tenart
Small comment: you can put the commit history after the --- so it
doesn't end-up in the commit log (except when it's relevant, wh
Hi Steen,
Quoting Steen Hegelund (2020-11-11 16:17:53)
> The MSCC PHYs selected for PTP and MACSec was not correct
>
> - PTP
> - Add VSC8572 and VSC8574
>
> - MACsec
> - Removed VSC8575
>
> The relevant datasheets can be found here:
> - VSC8572:
Hi Steen!
Either this is a fix and it would need a Fixes: tag in addition to the
Signed-off-by: one (you can have a look at the git history to see what
is the format); or the patch is not a fix and then it should have
[net-next] in its subject instead of [net].
Please have a look at the relevant
causing any
> issues.
>
> Addresses-Coverity: ("Sizeof not portable (SIZEOF_MISMATCH)")
> Fixes: 9744fec95f06 ("crypto: inside-secure - remove request list to improve
> performance")
> Signed-off-by: Colin Ian King
Acked-by: Antoine Tenart
Thanks!
Antoine
&
Use my kernel.org address instead of my bootlin.com one.
Signed-off-by: Antoine Tenart
---
.mailmap| 3 ++-
MAINTAINERS | 4 ++--
2 files changed, 4 insertions(+), 3 deletions(-)
diff --git a/.mailmap b/.mailmap
index a780211468e4..a11a8b9d1e43 100644
--- a/.mailmap
+++ b/.mailmap
@@ -41,7
Hello Denis,
Quoting Denis Efremov (2020-08-27 08:43:59)
> Use kfree_sensitive() instead of open-coding it.
>
> Signed-off-by: Denis Efremov
Acked-by: Antoine Tenart
Thanks!
Antoine
> ---
> drivers/crypto/inside-secure/safexcel_hash.c | 3 +--
> 1 file changed, 1 inserti
Hello Hanna, Arnd,
Quoting Hawa, Hanna (2020-07-23 12:20:02)
> On 7/23/2020 1:10 PM, Arnd Bergmann wrote:
> >
> > I just came across this old series and noticed we had never merged it.
> >
> > I don't know if the patches all still apply. Could you check and perhaps
> > resend to...@kernel.org
ernel test robot
Reported-by: Dan Carpenter
Signed-off-by: Antoine Tenart
---
drivers/net/phy/mscc/mscc_main.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/phy/mscc/mscc_main.c b/drivers/net/phy/mscc/mscc_main.c
index 2a7082983c09..cb4e15d6e2db 100644
--- a/drive
This patch improves the MSCC driver by using the provided
phy_lock_mdio_bus and phy_unlock_mdio_bus helpers instead of locking and
unlocking the MDIO bus lock directly. The patch is only cosmetic but
should improve maintenance and consistency.
Signed-off-by: Antoine Tenart
---
drivers/net/phy
.
Thanks!
Antoine
Antoine Tenart (8):
net: phy: mscc: macsec: fix sparse warnings
net: phy: mscc: fix a possible double unlock
net: phy: mscc: ptp: fix a smatch error
net: phy: mscc: ptp: fix a typo in a comment
net: phy: mscc: do not access the MDIO bus lock directly
net: phy: mscc: restore
to standard. But that is dangerous and any modification
to those functions would introduce bugs. This patch fixes this, to
improve maintenance, by restoring the base page to 'standard' once
'GPIO' accesses are completed.
Signed-off-by: Antoine Tenart
---
drivers/net/phy/mscc/mscc_main.c | 9
In the middle of vsc8584_config_init and vsc8514_config_init, the page
is set to 'standard'. This is the default value, and the page isn't set
to another value before. Those pages configuration can be safely
removed.
Signed-off-by: Antoine Tenart
---
drivers/net/phy/mscc/mscc_main.c | 7
to integer
mscc_macsec.c:608:34: warning: cast from restricted sci_t
mscc_macsec.c:610:34: warning: restricted sci_t degrades to integer
Signed-off-by: Antoine Tenart
---
drivers/net/phy/mscc/mscc_macsec.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/drivers/net
All PHY read and write return values are checked for errors in
vsc8514_config_init and vsc8584_config_init, except for one. Fix this.
Signed-off-by: Antoine Tenart
---
drivers/net/phy/mscc/mscc_main.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/drivers/net
This patch fixes a typo in a comment, s/Ths/This/. The patch is cosmetic
only.
Signed-off-by: Antoine Tenart
---
drivers/net/phy/mscc/mscc_ptp.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/phy/mscc/mscc_ptp.c b/drivers/net/phy/mscc/mscc_ptp.c
index
in vsc85xx_ts_write_csr: using the
"PROCESSOR" block by default.
Reported-by: kernel test robot
Reported-by: Dan Carpenter
Signed-off-by: Antoine Tenart
---
drivers/net/phy/mscc/mscc_ptp.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/phy/mscc/mscc_ptp.c b/drivers/net/phy/mscc/
Hello Richard,
Quoting Richard Cochran (2020-06-25 15:22:26)
> On Tue, Jun 23, 2020 at 04:30:12PM +0200, Antoine Tenart wrote:
> > @@ -978,9 +1483,32 @@ static int __vsc8584_init_ptp(struct phy_device
> > *phydev)
> >
> > vsc85xx_ts_eth_cmp1_sig(phyde
led thanks to helpers in the PTP code (and locks).
We also need the MDIO bus lock while performing a single read or write
to the 1588 registers as the read/write are composed of multiple MDIO
transactions (and we don't want other threads updating the page).
Co-developed-by: Antoine Tenart
A new optional property can be used to reference the load/save GPIO,
used for PTP hardware clock (PHC) operations. This patch documents it in
the binding documentation.
Signed-off-by: Antoine Tenart
---
Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt | 3 +++
1 file changed, 3
sharing the initialization of locks or resources
retrieval.
Signed-off-by: Antoine Tenart
Reviewed-by: Andrew Lunn
---
include/linux/phy.h | 18 +++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/include/linux/phy.h b/include/linux/phy.h
index 9248dd2ce4ca
From: Quentin Schulz
This patch adds a define for the 0x8000 magic value used to perform
enable/disable actions on the "token ring clock". The patch is only
cosmetic.
Signed-off-by: Quentin Schulz
Signed-off-by: Antoine Tenart
Reviewed-by: Andrew Lunn
---
drivers/net/phy/m
All headers in the MSCC PHY driver have been copied and pasted from the
original mscc.c file. However the information is not necessarily
correct, as in the MACsec support. Fix this.
Signed-off-by: Antoine Tenart
Reviewed-by: Andrew Lunn
---
drivers/net/phy/mscc/mscc_fc_buffer.h | 2 +-
drivers
This patch takes in account the use of the 1588 block in the MACsec
initialization, as a conditional configuration has to be done (when the
1588 block is used).
Signed-off-by: Antoine Tenart
---
drivers/net/phy/mscc/mscc_macsec.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff
From: Quentin Schulz
This patch adds a description of the load/save GPIN pin, used in the
VSC8584 PHY for timestamping operations. The related pinctrl description
is also added.
Signed-off-by: Quentin Schulz
Signed-off-by: Antoine Tenart
---
arch/mips/boot/dts/mscc/ocelot_pcb120.dts | 12
, so the granularity of the lock protecting it has to be
different from the ones protecting the 1588 registers (the VSC8584 PHY
has 2 1588 blocks, and a single load/save pin).
Co-developed-by: Quentin Schulz
Signed-off-by: Quentin Schulz
Signed-off-by: Antoine Tenart
---
drivers/net/phy/mscc
ompilation issue on x86 reported by Jakub.
Antoine Tenart (5):
net: phy: add support for a common probe between shared PHYs
net: phy: mscc: fix copyright and author information in MACsec
net: phy: mscc: take into account the 1588 block in MACsec init
net: phy: mscc: timestamping and PHC su
Hi Quentin,
Quoting Quentin Schulz (2020-06-21 19:35:20)
> On 2020-06-19 14:22, Antoine Tenart wrote:
> [...]
> > @@ -999,9 +1553,35 @@ int vsc8584_ptp_probe(struct phy_device *phydev)
> > if (!vsc8531->ptp)
> > return -ENOMEM;
> >
Hi Quentin,
Quoting Quentin Schulz (2020-06-21 18:57:14)
>
> Feels weird to review my own patches a year later having written them,
> almost nostalgic :)
:)
> On 2020-06-19 14:22, Antoine Tenart wrote:
> [...]
> > @@ -373,6 +374,21 @@ struct vsc8531_private {
> >
Hi Quentin,
Quoting Quentin Schulz (2020-06-21 17:38:42)
> On 2020-06-19 14:22, Antoine Tenart wrote:
> > This patch takes in account the use of the 1588 block in the MACsec
> > initialization, as a conditional configuration has to be done (when the
> > 1588 block is used)
Hi Andrew,
Quoting Andrew Lunn (2020-06-20 17:21:42)
> > + /* Retrieve the shared load/save GPIO. Request it as non exclusive as
> > + * the same GPIO can be requested by all the PHYs of the same package.
> > + * Ths GPIO must be used with the phc_lock taken (the lock is shared
> >
Hi Andrew,
Quoting Andrew Lunn (2020-06-20 17:40:08)
> On Fri, Jun 19, 2020 at 02:22:58PM +0200, Antoine Tenart wrote:
> > To get and set the PHC time, a GPIO has to be used and changes are only
> > retrieved or committed when on a rising edge. The same GPIO is shared by
&
Hello Richard,
Quoting Richard Cochran (2020-06-20 17:00:45)
> On Fri, Jun 19, 2020 at 02:22:58PM +0200, Antoine Tenart wrote:
>
> > +static void vsc85xx_dequeue_skb(struct vsc85xx_ptp *ptp)
> > +{
> > + struct skb_shared_hwtstamps shhwtstamps;
> > +
Hi Andrew,
Quoting Andrew Lunn (2020-06-20 17:10:01)
> On Fri, Jun 19, 2020 at 02:22:57PM +0200, Antoine Tenart wrote:
> > From: Quentin Schulz
> >
> > This patch adds the first parts of the 1588 support in the MSCC PHY,
> > with registers definition and th
Hello Andrew,
Quoting Andrew Lunn (2020-06-20 16:52:52)
> On Fri, Jun 19, 2020 at 02:22:55PM +0200, Antoine Tenart wrote:
> > From: Quentin Schulz
> >
> > This patch adds a define for the 0x8000 magic value used to perform
> > enable/disable actions on the "toke
This patch takes in account the use of the 1588 block in the MACsec
initialization, as a conditional configuration has to be done (when the
1588 block is used).
Signed-off-by: Antoine Tenart
---
drivers/net/phy/mscc/mscc_macsec.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff
sue on x86 reported by Jakub.
Antoine Tenart (5):
net: phy: add support for a common probe between shared PHYs
net: phy: mscc: fix copyright and author information in MACsec
net: phy: mscc: take into account the 1588 block in MACsec init
net: phy: mscc: timestamping and PHC support
dt-bin
From: Quentin Schulz
This patch adds a define for the 0x8000 magic value used to perform
enable/disable actions on the "token ring clock". The patch is only
cosmetic.
Signed-off-by: Quentin Schulz
Signed-off-by: Antoine Tenart
---
drivers/net/phy/mscc/mscc.h | 1 +
drivers/ne
A new optional property can be used to reference the load/save GPIO,
used for PTP hardware clock (PHC) operations. This patch documents it in
the binding documentation.
Signed-off-by: Antoine Tenart
---
Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt | 3 +++
1 file changed, 3
From: Quentin Schulz
This patch adds a description of the load/save GPIN pin, used in the
VSC8584 PHY for timestamping operations. The related pinctrl description
is also added.
Signed-off-by: Quentin Schulz
Signed-off-by: Antoine Tenart
---
arch/mips/boot/dts/mscc/ocelot_pcb120.dts | 12
sharing the initialization of locks or resources
retrieval.
Signed-off-by: Antoine Tenart
---
include/linux/phy.h | 18 +++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/include/linux/phy.h b/include/linux/phy.h
index 8c05d0fb5c00..058219b6441f 100644
--- a/include
led thanks to helpers in the PTP code (and locks).
We also need the MDIO bus lock while performing a single read or write
to the 1588 registers as the read/write are composed of multiple MDIO
transactions (and we don't want other threads updating the page).
Co-developed-by: Antoine Tenart
, so the granularity of the lock protecting it has to be
different from the ones protecting the 1588 registers (the VSC8584 PHY
has 2 1588 blocks, and a single load/save pin).
Co-developed-by: Quentin Schulz
Signed-off-by: Quentin Schulz
Signed-off-by: Antoine Tenart
---
drivers/net/phy/mscc
All headers in the MSCC PHY driver have been copied and pasted from the
original mscc.c file. However the information is not necessarily
correct, as in the MACsec support. Fix this.
Signed-off-by: Antoine Tenart
---
drivers/net/phy/mscc/mscc_fc_buffer.h | 2 +-
drivers/net/phy/mscc/mscc_mac.h
Hello Jakub,
Quoting Jakub Kicinski (2020-06-17 18:32:17)
> On Wed, 17 Jun 2020 15:31:25 +0200 Antoine Tenart wrote:
> > This patch adds support for PHC and timestamping operations for the MSCC
> > PHY. PTP 1-step and 2-step modes are supported, over Ethernet and UDP.
> >
Hello Jakub,
Quoting Jakub Kicinski (2020-06-17 18:32:58)
> On Wed, 17 Jun 2020 15:31:24 +0200 Antoine Tenart wrote:
> > +/* Two PHYs share the same 1588 processor and it's to be entirely
> > configured
> > + * through the base PHY of this processor.
> > + */
>
A new optional property can be used to reference the load/save GPIO,
used for PTP hardware clock (PHC) operations. This patch documents it in
the binding documentation.
Signed-off-by: Antoine Tenart
---
Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt | 3 +++
1 file changed, 3
sharing the initialization of locks or resources
retrieval.
Signed-off-by: Antoine Tenart
---
include/linux/phy.h | 18 +++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/include/linux/phy.h b/include/linux/phy.h
index 8c05d0fb5c00..058219b6441f 100644
--- a/include
, so the granularity of the lock protecting it has to be
different from the ones protecting the 1588 registers (the VSC8584 PHY
has 2 1588 blocks, and a single load/save pin).
Co-developed-by: Quentin Schulz
Signed-off-by: Quentin Schulz
Signed-off-by: Antoine Tenart
---
drivers/net/phy/mscc
led thanks to helpers in the PTP code (and locks).
We also need the MDIO bus lock while performing a single read or write
to the 1588 registers as the read/write are composed of multiple MDIO
transactions (and we don't want other threads updating the page).
Co-developed-by: Antoine Tenart
From: Quentin Schulz
This patch adds a define for the 0x8000 magic value used to perform
enable/disable actions on the "token ring clock". The patch is only
cosmetic.
Signed-off-by: Quentin Schulz
Signed-off-by: Antoine Tenart
---
drivers/net/phy/mscc/mscc.h | 1 +
drivers/ne
From: Quentin Schulz
This patch adds a description of the load/save GPIN pin, used in the
VSC8584 PHY for timestamping operations. The related pinctrl description
is also added.
Signed-off-by: Quentin Schulz
Signed-off-by: Antoine Tenart
---
arch/mips/boot/dts/mscc/ocelot_pcb120.dts | 12
All headers in the MSCC PHY driver have been copied and pasted from the
original mscc.c file. However the information is not necessarily
correct, as in the MACsec support. Fix this.
Signed-off-by: Antoine Tenart
---
drivers/net/phy/mscc/mscc_fc_buffer.h | 2 +-
drivers/net/phy/mscc/mscc_mac.h
This patch takes in account the use of the 1588 block in the MACsec
initialization, as a conditional configuration has to be done (when the
1588 block is used).
Signed-off-by: Antoine Tenart
---
drivers/net/phy/mscc/mscc_macsec.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff
- Removed checks in rxtstamp/txtstamp as skb cannot be NULL here.
- Reworked get_ptp_header_rx/get_ptp_header.
- Reworked the locking logic between the PHC and timestamping
operations.
- Fixed a compilation issue on x86 reported by Jakub.
Antoine Tenart (5):
net: phy: add support for a co
on those ports. This patch fixes it.
Fixes: deb04e9c0ff2 ("net: phy: mscc: use phy_package_shared")
Signed-off-by: Antoine Tenart
---
drivers/net/phy/mscc/mscc_main.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/phy/mscc/mscc_main.c b/drivers/ne
enko
Reviewed-by: Antoine Tenart
Thanks,
Antoine
> ---
> drivers/crypto/inside-secure/safexcel.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/crypto/inside-secure/safexcel.c
> b/drivers/crypto/inside-secure/safexcel.c
> index 2cb53fbae841.
e PHY read and write helpers in the driver were modified. In
particular, the base address retrieval logic was moved from the
config_init to the probe. But the vsc8574_probe was forgotten. This
patch fixes it.
Fixes: deb04e9c0ff2 ("net: phy: mscc: use phy_package_shared")
Signed-off-by: Antoin
Hello Richard,
Quoting Richard Cochran (2020-05-28 16:34:40)
> On Wed, May 27, 2020 at 06:41:56PM +0200, Antoine Tenart wrote:
>
> > +static struct vsc85xx_ptphdr *get_ptp_header(struct sk_buff *skb)
> > +{
> > + struct ethhdr *ethhdr = eth_hdr(skb);
> > +
Hello Jakub,
Quoting Jakub Kicinski (2020-05-27 19:35:13)
>
> This doesn't build on my system :S
I'll have a look at this and fix it for v2.
Thanks for reporting it!
Antoine
>
> In file included from ../drivers/net/phy/mscc/mscc_ptp.c:18:
> ../include/linux/unaligned/be_byteshift.h:41:19:
A new optional property can be used to reference the load/save GPIO,
used for PTP hardware clock (PHC) operations. This patch documents it in
the binding documentation.
Signed-off-by: Antoine Tenart
---
Documentation/devicetree/bindings/net/mscc-phy-vsc8531.txt | 3 +++
1 file changed, 3
, so the granularity of the lock protecting it has to be
different from the ones protecting the 1588 registers (the VSC8584 PHY
has 2 1588 blocks, and a single load/save pin).
Co-developed-by: Quentin Schulz
Signed-off-by: Quentin Schulz
Signed-off-by: Antoine Tenart
---
drivers/net/phy/mscc
This patch takes in account the use of the 1588 block in the MACsec
initialization, as a conditional configuration has to be done (when the
1588 block is used).
Signed-off-by: Antoine Tenart
---
drivers/net/phy/mscc/mscc_macsec.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff
From: Quentin Schulz
This patch adds a define for the 0x8000 magic value used to perform
enable/disable actions on the "token ring clock". The patch is only
cosmetic.
Signed-off-by: Quentin Schulz
Signed-off-by: Antoine Tenart
---
drivers/net/phy/mscc/mscc.h | 1 +
drivers/ne
led thanks to helpers in the PTP code (and locks).
We also need the MDIO bus lock while performing a single read or write
to the 1588 registers as the read/write are composed of multiple MDIO
transactions (and we don't want other threads updating the page).
Co-developed-by: Antoine Tenart
From: Quentin Schulz
This patch adds a description of the load/save GPIN pin, used in the
VSC8584 PHY for timestamping operations. The related pinctrl description
is also added.
Signed-off-by: Quentin Schulz
Signed-off-by: Antoine Tenart
---
arch/mips/boot/dts/mscc/ocelot_pcb120.dts | 12
sharing the initialization of locks or resources
retrieval.
Signed-off-by: Antoine Tenart
---
include/linux/phy.h | 18 +++---
1 file changed, 15 insertions(+), 3 deletions(-)
diff --git a/include/linux/phy.h b/include/linux/phy.h
index 8c05d0fb5c00..058219b6441f 100644
--- a/include
All headers in the MSCC PHY driver have been copied and pasted from the
original mscc.c file. However the information is not necessarily
correct, as in the MACsec support. Fix this.
Signed-off-by: Antoine Tenart
---
drivers/net/phy/mscc/mscc_fc_buffer.h | 2 +-
drivers/net/phy/mscc/mscc_mac.h
e required hardware description for device trees,
to be able to use the load/save GPIO pin on the PCB120 board.
To use this on a PCB120 board, two other series are needed and have
already been sent upstream (one is merged). There are no dependency
between all those series.
Thanks!
Antoine
Antoine
Hi Andrew,
Quoting Andrew Lunn (2020-05-26 19:01:00)
> On Tue, May 26, 2020 at 06:22:52PM +0200, Antoine Tenart wrote:
> >
> > This series aims at reducing the waiting time between MDIO transactions
> > when using the MSCC MIIM MDIO controller.
>
> There are a cou
readl_poll_timeout already returns -ETIMEDOUT if the condition isn't
satisfied, there's no need to check again the condition after calling
it. Remove the redundant timeout check.
Signed-off-by: Antoine Tenart
---
drivers/net/phy/mdio-mscc-miim.c | 8 ++--
1 file changed, 2 insertions(+), 6
to be much longer than expected.
This patch fixes this by using udelay() under the hood when
CONFIG_HIGH_RES_TIMERS isn't enabled. This increases CPU usage.
Signed-off-by: Antoine Tenart
---
drivers/net/phy/Kconfig | 3 ++-
drivers/net/phy/mdio-mscc-miim.c | 22 +-
2
timestamping operations (this feature will be sent quite soon to the
mailing lists).
Thanks,
Antoine
Antoine Tenart (4):
net: phy: mscc-miim: use more reasonable delays
net: phy: mscc-miim: remove redundant timeout check
net: phy: mscc-miim: improve waiting logic
net: phy: mscc-miim: read poll when
-off-by: Antoine Tenart
---
drivers/net/phy/mdio-mscc-miim.c | 15 +--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/drivers/net/phy/mdio-mscc-miim.c b/drivers/net/phy/mdio-mscc-miim.c
index 42119f661452..aed9afa1e8f1 100644
--- a/drivers/net/phy/mdio-mscc-miim.c
+++ b
to succeed at the first retry. The overall delay is also
lowered as the prior value was really way to high, 1us is large
enough.
Signed-off-by: Antoine Tenart
---
drivers/net/phy/mdio-mscc-miim.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/phy/mdio-mscc
Hello,
These two patches allow forwarding ioctl to the PHY MII implementation,
and support is added for offloading timestamping operations to
compatible attached PHYs.
Thanks,
Antoine
Antoine Tenart (2):
net: mscc: use the PHY MII ioctl interface when possible
net: mscc: allow offloading
Allow ioctl to be implemented by the PHY, when a PHY is attached to the
Ocelot switch. In case the ioctl is a request to set or get the hardware
timestamp, use the Ocelot switch implementation for now.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/mscc/ocelot.c | 20
.
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/mscc/ocelot.c | 5 -
drivers/net/ethernet/mscc/ocelot_board.c | 3 ++-
2 files changed, 6 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/mscc/ocelot.c
b/drivers/net/ethernet/mscc/ocelot.c
index 2151c08a57c7
first bank was used leading to the two upper PHYs being unstable when
using the VSC8584. This patch fixes it.
Fixes: 1bbe0ecc2a1a ("net: phy: mscc: macsec initialization")
Signed-off-by: Antoine Tenart
---
Since v1:
- Resent to net.
drivers/net/phy/mscc/mscc.h| 2 ++
drivers/net
Quoting David Miller (2020-05-22 02:31:05)
> From: Antoine Tenart
> Date: Wed, 20 May 2020 12:03:55 +0200
>
> > What's the best way to handle this? I can provide all the patches.
>
> Resubmit this against 'net' please, then I'll deal with the fallout
> when I merge net
first bank was used leading to the two upper PHYs being unstable when
using the VSC8584. This patch fixes it.
Fixes: 1bbe0ecc2a1a ("net: phy: mscc: macsec initialization")
Signed-off-by: Antoine Tenart
---
Hi,
This patch fixes a bug there since v5.6, but only applies on top of
net
[Adding arm-soc]
Hi Hanna,
Sorry for the delay, the series was buried in my mails...
Acked-by: Antoine Tenart
Arnd, Olof, could you take this series directly as this will be the only
Alpine patches for this release (and for a long time)?
Thanks!
Antoine
Quoting Hanna Hawa (2020-03-24 11:49
en HW offloading
is enabled")
Signed-off-by: Antoine Tenart
---
drivers/net/macsec.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/net/macsec.c b/drivers/net/macsec.c
index d4034025c87c..d0d31cb99180 100644
--- a/drivers/net/macsec.c
+++ b/drivers/net/macsec.c
@
Hello Michael,
Quoting Michael Walle (2020-05-04 23:31:36)
>
> diff --git a/drivers/net/phy/mscc/mscc_main.c
> b/drivers/net/phy/mscc/mscc_main.c
> index 5391acdece05..a505286b2195 100644
> --- a/drivers/net/phy/mscc/mscc_main.c
> +++ b/drivers/net/phy/mscc/mscc_main.c
> -static bool
platform_set_drvdata() earlier in the probe.
Fixes: 83a8471ba255 ("net: ethernet: ti: cpsw: refactor probe to group common
hw initialization")
Reported-by: Maxime Chevallier
Signed-off-by: Antoine Tenart
---
drivers/net/ethernet/ti/cpsw.c | 2 +-
1 file changed, 1 insertion(+), 1 deletio
Hi Sabrina,
On Tue, Aug 20, 2019 at 04:41:19PM +0200, Sabrina Dubroca wrote:
> 2019-08-20, 12:01:40 +0200, Antoine Tenart wrote:
> > So it seems the ability to enable or disable the offloading on a given
> > interface is the main missing feature. I'll add that, however I'll
> &g
Hi Florian,
On Wed, Aug 14, 2019 at 04:15:03PM -0700, Florian Fainelli wrote:
> On 8/8/19 7:05 AM, Antoine Tenart wrote:
> > This patch adds a reference to MACsec ops in the phy_device, to allow
> > PHYs to support offloading MACsec operations. The phydev lock will be
> > hel
Hi Sabrina,
On Fri, Aug 16, 2019 at 03:25:00PM +0200, Sabrina Dubroca wrote:
> 2019-08-13, 10:58:17 +0200, Antoine Tenart wrote:
> >
> > As for the need for xmit / handle_frame ops (for a MAC w/ MACsec
> > offloading), I'd say the xmit / handle_frame ops of the real net de
Hi Andrew,
On Tue, Aug 13, 2019 at 06:28:23PM +0200, Andrew Lunn wrote:
> > 1) With current implementation it's impossible to install SW macsec engine
> > onto
> > the device which supports HW offload. That could be a strong limitation in
> > cases when user sees HW macsec offload is broken or
Hi Sabrina,
On Fri, Aug 16, 2019 at 03:29:59PM +0200, Sabrina Dubroca wrote:
> 2019-08-13, 16:18:40 +, Igor Russkikh wrote:
> > On 13.08.2019 16:17, Andrew Lunn wrote:
>
> > That could be a strong limitation in
> > cases when user sees HW macsec offload is broken or work differently, and
>
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