Sent from my iPad
> On Jan 31, 2019, at 10:03 PM, Ezequiel Garcia wrote:
>
> Hey Ayaka!
>
>> On Thu, 2019-01-31 at 11:13 +0800, ayaka wrote:
>> From: Randy 'ayaka' Li
>>
>> Hello
>> Those patches are based on the previous vendor driver
From: Randy Li
Signed-off-by: Randy Li
---
drivers/staging/Kconfig | 2 ++
drivers/staging/Makefile | 1 +
2 files changed, 3 insertions(+)
diff --git a/drivers/staging/Kconfig b/drivers/staging/Kconfig
index e4f608815c05..81634dd0a283 100644
--- a/drivers/staging/Kconfig
+++
From: Randy 'ayaka' Li
Hello
Those patches are based on the previous vendor driver I post before,
but it can apply without the previous one.
I really want to make it work before FOSDEM and I didn't. And upcoming
the lunar new year holiday would last two week.
I have verified the v4l2 part
Yes, the buffer won't be freed.
I don't want to store buffers for a session.
I just want to use it to verify the FFmpeg.
Signed-off-by: ayaka
---
drivers/staging/rockchip-mpp/mpp_dev_common.h | 3 ++
drivers/staging/rockchip-mpp/mpp_dev_vdpu2.c | 3 ++
drivers/staging/rockchip-mpp/vdpu2
From: Randy 'ayaka' Li
It doesn't work yet, I am suffering unknow power or
clock problem, but the vendor driver I post to ML
would work.
I want to put the implementation of those v4l2 ioctl
which related to device in echo device's files, but
the current inheritance looks ugly.
TODO:
qp table
From: Randy 'ayaka' Li
The current version is designed for multi-planes
buffers.
TODO:
improve the interface and work flow of v4l2
finish a task before it would be dequeued
Signed-off-by: Randy Li
Signed-off-by: Randy Li
---
drivers/staging/rockchip-mpp/Kconfig | 54 +
drivers
Sent from my iPad
> On Jan 30, 2019, at 3:17 PM, Tomasz Figa wrote:
>
>> On Wed, Jan 30, 2019 at 3:28 PM Ayaka wrote:
>>
>>
>>
>> Sent from my iPad
>>
>>> On Jan 30, 2019, at 11:35 AM, Tomasz Figa wrote:
>>>
>&
Sent from my iPad
> On Jan 30, 2019, at 5:41 AM, Nicolas Dufresne wrote:
>
>> Le mardi 29 janvier 2019 à 16:44 +0900, Alexandre Courbot a écrit :
>> On Fri, Jan 25, 2019 at 10:04 PM Paul Kocialkowski
>> wrote:
>>> Hi,
>>>
>>>> On Thu,
29 janvier 2019 à 16:44 +0900, Alexandre Courbot a écrit :
>>>> On Fri, Jan 25, 2019 at 10:04 PM Paul Kocialkowski
>>>> wrote:
>>>>> Hi,
>>>>>
>>>>>> On Thu, 2019-01-24 at 20:23 +0800, Ayaka wrote:
>>>>>> Sent from my i
Sent from my iPad
> On Jan 24, 2019, at 10:23 PM, Maxime Ripard wrote:
>
> Hi!
>
> On Sun, Jan 20, 2019 at 08:48:32PM +0800, ayaka wrote:
>>>>> +struct v4l2_ctrl_h264_scaling_matrix {
>>>>> +__u8 scaling_list_4x4[6][16];
>>>>>
Sent from my iPad
> On Jan 24, 2019, at 6:27 PM, Paul Kocialkowski
> wrote:
>
> Hi,
>
>> On Thu, 2019-01-10 at 21:32 +0800, ayaka wrote:
>> I forget a important thing, for the rkvdec and rk hevc decoder, it would
>> requests cabac table, scaling list, pi
Sent from my iPad
> On Jan 24, 2019, at 6:36 PM, Paul Kocialkowski
> wrote:
>
> Hi,
>
>> On Tue, 2019-01-08 at 18:00 +0800, Ayaka wrote:
>>
>> Sent from my iPad
>>
>>> On Jan 8, 2019, at 4:38 PM, Paul Kocialkowski
>>> wrote:
I am sorry I am a little busy for the lunar new year recently and the
H.264 syntax rules are little complex, I will try explain my ideas more
clear here.
On 1/17/19 7:01 PM, Maxime Ripard wrote:
Hi,
On Tue, Jan 08, 2019 at 05:52:28PM +0800, Randy 'ayaka' Li wrote:
+struct
and rps, it is possible to reuse the slice header, just let
the decoder know the offset from the bitstream bufer, I would suggest to
add three properties(with sps) for them. But I think we need a method to
mark a OUTPUT side buffer for those aux data.
On 1/9/19 1:01 AM, ayaka wrote:
On 1/8/19 5
and rps, it is possible to reuse the slice header, just let
the decoder know the offset from the bitstream bufer, I would suggest to
add three properties(with sps) for them. But I think we need a method to
mark a OUTPUT side buffer for those aux data.
On 1/8/19 6:00 PM, Ayaka wrote:
Sent from
On 1/8/19 5:52 PM, Randy 'ayaka' Li wrote:
On Thu, Nov 15, 2018 at 03:56:49PM +0100, Maxime Ripard wrote:
From: Pawel Osciak
Stateless video codecs will require both the H264 metadata and slices in
order to be able to decode frames.
This introduces the definitions for a new pixel format
Sent from my iPad
> On Jan 8, 2019, at 4:38 PM, Paul Kocialkowski
> wrote:
>
> Hi,
>
>> On Tue, 2019-01-08 at 09:16 +0800, Ayaka wrote:
>>
>> Sent from my iPad
>>
>>> On Jan 7, 2019, at 5:57 PM, Paul Kocialkowski
>>> wrote:
On Thu, Nov 15, 2018 at 03:56:49PM +0100, Maxime Ripard wrote:
> From: Pawel Osciak
>
> Stateless video codecs will require both the H264 metadata and slices in
> order to be able to decode frames.
>
> This introduces the definitions for a new pixel format for H264 slices that
> have been
Sent from my iPad
> On Jan 8, 2019, at 2:33 PM, Tomasz Figa wrote:
>
>> On Mon, Jan 7, 2019 at 2:30 AM Ayaka wrote:
>>
>> Hello Ezequiel
>>
>> Sent from my iPad
>>
>>>> On Jan 7, 2019, at 1:21 AM, Ezequiel Garcia
>>>
gt;>>>> +__s8slice_act_cr_qp_offset;
>>>>> +__u8slice_deblocking_filter_disabled_flag;
>>>>> +__s8slice_beta_offset_div2;
>>>>> +__s8slice_tc_offset_div2;
>>>>> +__u8slice_loop_fil
Hello Ezequiel
Sent from my iPad
> On Jan 7, 2019, at 1:21 AM, Ezequiel Garcia
> wrote:
>
>> On Sun, 6 Jan 2019 at 13:16, Ayaka wrote:
>>
>>
>>
>> Sent from my iPad
>>
>>> On Jan 7, 2019, at 12:04 AM, Ezequiel Garcia wrote:
&
Sent from my iPad
> On Jan 7, 2019, at 12:04 AM, Ezequiel Garcia wrote:
>
> On Sun, 2019-01-06 at 23:05 +0800, Ayaka wrote:
>>> On Jan 6, 2019, at 10:22 PM, Ezequiel Garcia wrote:
>>>
>>> Hi Randy,
>>>
>>> Thanks a lot for this patch
> On Jan 6, 2019, at 10:22 PM, Ezequiel Garcia wrote:
>
> Hi Randy,
>
> Thanks a lot for this patches. They are really useful
> to provide more insight into the VPU hardware.
>
> This change will make the vpu encoder and vpu decoder
> completely independent, can they really work in parallel?
> On Jan 6, 2019, at 10:22 PM, Ezequiel Garcia wrote:
>
> Hi Randy,
>
> Thanks a lot for this patches. They are really useful
> to provide more insight into the VPU hardware.
>
> This change will make the vpu encoder and vpu decoder
> completely independent, can they really work in parallel?
On 05/14/2017 10:59 PM, Heiko Stuebner wrote:
Hi Randy,
Am Sonntag, 7. Mai 2017, 22:34:46 CEST schrieb Randy Li:
The PWM devices need to access the grf to switch the PWM IP.
The grf property is not part of the pwm binding and I remember
this coming up in veyron times, when Thiery didn't
On 05/14/2017 10:59 PM, Heiko Stuebner wrote:
Hi Randy,
Am Sonntag, 7. Mai 2017, 22:34:46 CEST schrieb Randy Li:
The PWM devices need to access the grf to switch the PWM IP.
The grf property is not part of the pwm binding and I remember
this coming up in veyron times, when Thiery didn't
On 04/18/2017 03:33 AM, Mauro Carvalho Chehab wrote:
Em Sun, 5 Mar 2017 18:00:32 +0800
Randy Li escreveu:
The formats added by this patch are:
V4L2_PIX_FMT_P010
V4L2_PIX_FMT_P010M
V4L2_PIX_FMT_P016
V4L2_PIX_FMT_P016M
Currently, none of
On 04/18/2017 03:33 AM, Mauro Carvalho Chehab wrote:
Em Sun, 5 Mar 2017 18:00:32 +0800
Randy Li escreveu:
The formats added by this patch are:
V4L2_PIX_FMT_P010
V4L2_PIX_FMT_P010M
V4L2_PIX_FMT_P016
V4L2_PIX_FMT_P016M
Currently, none of driver uses those
從我的 iPad 傳送
> Clint Taylor <clinton.a.tay...@intel.com> 於 2017年3月28日 上午6:49 寫道:
>
>> On 03/26/2017 09:05 PM, Ayaka wrote:
>>
>>
>> 從我的 iPad 傳送
>>
>>>> Ander Conselvan De Oliveira <conselv...@gmail.com> 於 2017年3月14日 下午9:53 寫
從我的 iPad 傳送
> Clint Taylor 於 2017年3月28日 上午6:49 寫道:
>
>> On 03/26/2017 09:05 PM, Ayaka wrote:
>>
>>
>> 從我的 iPad 傳送
>>
>>>> Ander Conselvan De Oliveira 於 2017年3月14日 下午9:53 寫道:
>>>>
>>>> On Tue, 2017-03-07 at 04:27
從我的 iPad 傳送
> Ander Conselvan De Oliveira <conselv...@gmail.com> 於 2017年3月14日 下午9:53 寫道:
>
>> On Tue, 2017-03-07 at 04:27 +0800, Ayaka wrote:
>>
>> 從我的 iPad 傳送
>>
>>>> Ville Syrjälä <ville.syrj...@linux.intel.com> 於 2017年3月7日 上午2:34 寫
從我的 iPad 傳送
> Ander Conselvan De Oliveira 於 2017年3月14日 下午9:53 寫道:
>
>> On Tue, 2017-03-07 at 04:27 +0800, Ayaka wrote:
>>
>> 從我的 iPad 傳送
>>
>>>> Ville Syrjälä 於 2017年3月7日 上午2:34 寫道:
>>>>
>>>> On Tue, Mar 07, 2
從我的 iPad 傳送
> Ville Syrjälä <ville.syrj...@linux.intel.com> 於 2017年3月7日 上午2:34 寫道:
>
>> On Tue, Mar 07, 2017 at 01:58:23AM +0800, Ayaka wrote:
>>
>>
>> 從我的 iPad 傳送
>>
>>>> Ville Syrjälä <ville.syrj...@linux.intel.com> 於 2017年3
從我的 iPad 傳送
> Ville Syrjälä 於 2017年3月7日 上午2:34 寫道:
>
>> On Tue, Mar 07, 2017 at 01:58:23AM +0800, Ayaka wrote:
>>
>>
>> 從我的 iPad 傳送
>>
>>>> Ville Syrjälä 於 2017年3月6日 下午9:06 寫道:
>>>>
>>>> On Sun, Mar 05, 2
從我的 iPad 傳送
> Ville Syrjälä 於 2017年3月6日 下午9:06 寫道:
>
>> On Sun, Mar 05, 2017 at 06:00:31PM +0800, Randy Li wrote:
>> P010 is a planar 4:2:0 YUV with interleaved UV plane, 10 bits
>> per channel video format.
>>
>> P016 is a planar 4:2:0 YUV with interleaved UV
從我的 iPad 傳送
> Ville Syrjälä 於 2017年3月6日 下午9:06 寫道:
>
>> On Sun, Mar 05, 2017 at 06:00:31PM +0800, Randy Li wrote:
>> P010 is a planar 4:2:0 YUV with interleaved UV plane, 10 bits
>> per channel video format.
>>
>> P016 is a planar 4:2:0 YUV with interleaved UV plane, 16 bits
>> per channel
What is wrong with this patch? I have not seen it is merged in
next-20170303.
On 12/11/2016 11:36 PM, Randy Li wrote:
On the rk3288 USB host-only port (the one that's not the OTG-enabled
port) the PHY can get into a bad state when a wakeup is asserted (not
just a wakeup from full system
What is wrong with this patch? I have not seen it is merged in
next-20170303.
On 12/11/2016 11:36 PM, Randy Li wrote:
On the rk3288 USB host-only port (the one that's not the OTG-enabled
port) the PHY can get into a bad state when a wakeup is asserted (not
just a wakeup from full system
從我的 iPad 傳送
> Mauro Carvalho Chehab <mche...@s-opensource.com> 於 2017年2月3日 下午10:04 寫道:
>
> Em Thu, 5 Jan 2017 20:27:17 +0200
> Sakari Ailus <sakari.ai...@iki.fi> escreveu:
>
>> Hi Randy,
>>
>>> On Thu, Jan 05, 2017 at 11:22:26PM +0800, ay
從我的 iPad 傳送
> Mauro Carvalho Chehab 於 2017年2月3日 下午10:04 寫道:
>
> Em Thu, 5 Jan 2017 20:27:17 +0200
> Sakari Ailus escreveu:
>
>> Hi Randy,
>>
>>> On Thu, Jan 05, 2017 at 11:22:26PM +0800, ayaka wrote:
>>>
>>>
>>&g
Hello:
I meet a problem when I want to add support for a lg,lp079qx1-sp0v eDP
panel at firefly release rk3288 platform. I could hardly make the eDP
work both on firefly release and firefly reload. Does you have any idea
about that?
[ 11.136586] i2c i2c-6: of_i2c: modalias failure on
Hello:
I meet a problem when I want to add support for a lg,lp079qx1-sp0v eDP
panel at firefly release rk3288 platform. I could hardly make the eDP
work both on firefly release and firefly reload. Does you have any idea
about that?
[ 11.136586] i2c i2c-6: of_i2c: modalias failure on
On 01/15/2017 12:54 AM, Eduardo Valentin wrote:
Folks,
On Wed, Jan 04, 2017 at 12:30:40AM +0800, ayaka wrote:
On 01/03/2017 09:13 AM, Randy Li wrote:
On 01/03/2017 09:02 AM, Caesar Wang wrote:
在 2017年01月03日 07:57, Randy Li 写道:
On 01/02/2017 09:16 PM, Caesar Wang wrote:
在 2016年12月31日 00
On 01/15/2017 12:54 AM, Eduardo Valentin wrote:
Folks,
On Wed, Jan 04, 2017 at 12:30:40AM +0800, ayaka wrote:
On 01/03/2017 09:13 AM, Randy Li wrote:
On 01/03/2017 09:02 AM, Caesar Wang wrote:
在 2017年01月03日 07:57, Randy Li 写道:
On 01/02/2017 09:16 PM, Caesar Wang wrote:
在 2016年12月31日 00
On 01/05/2017 06:30 PM, Sakari Ailus wrote:
Hi Randy,
Thanks for the update.
On Thu, Jan 05, 2017 at 12:29:11AM +0800, Randy Li wrote:
The formats added by this patch are:
V4L2_PIX_FMT_P010
V4L2_PIX_FMT_P010M
V4L2_PIX_FMT_P016
V4L2_PIX_FMT_P016M
Currently,
On 01/05/2017 06:30 PM, Sakari Ailus wrote:
Hi Randy,
Thanks for the update.
On Thu, Jan 05, 2017 at 12:29:11AM +0800, Randy Li wrote:
The formats added by this patch are:
V4L2_PIX_FMT_P010
V4L2_PIX_FMT_P010M
V4L2_PIX_FMT_P016
V4L2_PIX_FMT_P016M
Currently,
從我的 iPad 傳送
> Daniel Stone 於 2017年1月5日 上午1:02 寫道:
>
> Hi Randy,
>
>> On 4 January 2017 at 16:29, Randy Li wrote:
>> index 90d2cc8..23c8e99 100644
>> --- a/drivers/gpu/drm/drm_fourcc.c
>> +++ b/drivers/gpu/drm/drm_fourcc.c
>> @@ -165,6 +165,9 @@ const
從我的 iPad 傳送
> Daniel Stone 於 2017年1月5日 上午1:02 寫道:
>
> Hi Randy,
>
>> On 4 January 2017 at 16:29, Randy Li wrote:
>> index 90d2cc8..23c8e99 100644
>> --- a/drivers/gpu/drm/drm_fourcc.c
>> +++ b/drivers/gpu/drm/drm_fourcc.c
>> @@ -165,6 +165,9 @@ const struct drm_format_info
On 01/04/2017 11:56 PM, Ville Syrjälä wrote:
On Mon, Jan 02, 2017 at 04:50:03PM +0800, Randy Li wrote:
P010 is a planar 4:2:0 YUV with interleaved UV plane, 10 bits
per channel video format. Rockchip's vop support this
video format(little endian only) as the input video format.
On 01/04/2017 11:56 PM, Ville Syrjälä wrote:
On Mon, Jan 02, 2017 at 04:50:03PM +0800, Randy Li wrote:
P010 is a planar 4:2:0 YUV with interleaved UV plane, 10 bits
per channel video format. Rockchip's vop support this
video format(little endian only) as the input video format.
On 01/04/2017 08:51 PM, Ziyuan Xu wrote:
Immediately after reset, issue the command which sets
update_clock_register_only bit, the card clock will restart. Revise
dw_mci_ctrl_reset to dw_mci_reset, which has wrapped this sequence.
The patch fixes commit e9ed8835e990 ("mmc: dw_mmc: add runtime
On 01/04/2017 08:51 PM, Ziyuan Xu wrote:
Immediately after reset, issue the command which sets
update_clock_register_only bit, the card clock will restart. Revise
dw_mci_ctrl_reset to dw_mci_reset, which has wrapped this sequence.
The patch fixes commit e9ed8835e990 ("mmc: dw_mmc: add runtime
On 01/03/2017 09:13 AM, Randy Li wrote:
On 01/03/2017 09:02 AM, Caesar Wang wrote:
在 2017年01月03日 07:57, Randy Li 写道:
On 01/02/2017 09:16 PM, Caesar Wang wrote:
在 2016年12月31日 00:11, ayaka 写道:
BTW, Caesar have you ever met this at RK3288 at booting time?
[8.430582] thermal
On 01/03/2017 09:13 AM, Randy Li wrote:
On 01/03/2017 09:02 AM, Caesar Wang wrote:
在 2017年01月03日 07:57, Randy Li 写道:
On 01/02/2017 09:16 PM, Caesar Wang wrote:
在 2016年12月31日 00:11, ayaka 写道:
BTW, Caesar have you ever met this at RK3288 at booting time?
[8.430582] thermal
On 01/02/2017 07:07 PM, Sakari Ailus wrote:
Hi,
On Mon, Jan 02, 2017 at 06:53:16PM +0800, ayaka wrote:
On 01/02/2017 05:10 PM, Sakari Ailus wrote:
Hi Randy,
Thanks for the patch.
On Mon, Jan 02, 2017 at 04:50:04PM +0800, Randy Li wrote:
The formats added by this patch
On 01/02/2017 07:07 PM, Sakari Ailus wrote:
Hi,
On Mon, Jan 02, 2017 at 06:53:16PM +0800, ayaka wrote:
On 01/02/2017 05:10 PM, Sakari Ailus wrote:
Hi Randy,
Thanks for the patch.
On Mon, Jan 02, 2017 at 04:50:04PM +0800, Randy Li wrote:
The formats added by this patch
On 01/02/2017 05:10 PM, Sakari Ailus wrote:
Hi Randy,
Thanks for the patch.
On Mon, Jan 02, 2017 at 04:50:04PM +0800, Randy Li wrote:
The formats added by this patch are:
V4L2_PIX_FMT_P010
V4L2_PIX_FMT_P010M
Currently, none of driver uses those format, but some video device
On 01/02/2017 05:10 PM, Sakari Ailus wrote:
Hi Randy,
Thanks for the patch.
On Mon, Jan 02, 2017 at 04:50:04PM +0800, Randy Li wrote:
The formats added by this patch are:
V4L2_PIX_FMT_P010
V4L2_PIX_FMT_P010M
Currently, none of driver uses those format, but some video device
BTW, Caesar have you ever met this at RK3288 at booting time?
[8.430582] thermal thermal_zone1: critical temperature reached(125
C),shutting down
[8.439038] thermal thermal_zone2: critical temperature reached(125
C),shutting down
[8.456344] thermal thermal_zone1: critical
BTW, Caesar have you ever met this at RK3288 at booting time?
[8.430582] thermal thermal_zone1: critical temperature reached(125
C),shutting down
[8.439038] thermal thermal_zone2: critical temperature reached(125
C),shutting down
[8.456344] thermal thermal_zone1: critical
On 12/29/2016 10:04 PM, Jaehoon Chung wrote:
Hi,
On 12/29/2016 09:55 PM, ayaka wrote:
[5.849733] rk_gmac-dwmac ff29.ethernet (unnamed net_device)
(uninitialized): Enable RX Mitigation via HW Watchdog Timer
[5.944512] mmc_host mmc1: Bus speed (slot 0) = 5000Hz (slot req
On 12/29/2016 10:04 PM, Jaehoon Chung wrote:
Hi,
On 12/29/2016 09:55 PM, ayaka wrote:
[5.849733] rk_gmac-dwmac ff29.ethernet (unnamed net_device)
(uninitialized): Enable RX Mitigation via HW Watchdog Timer
[5.944512] mmc_host mmc1: Bus speed (slot 0) = 5000Hz (slot req
[5.849733] rk_gmac-dwmac ff29.ethernet (unnamed net_device)
(uninitialized): Enable RX Mitigation via HW Watchdog Timer
[5.944512] mmc_host mmc1: Bus speed (slot 0) = 5000Hz (slot req
5000Hz, actual 5000HZ div = 0)
[5.958249] mmc1: new ultra high speed DDR50 SDIO
[5.849733] rk_gmac-dwmac ff29.ethernet (unnamed net_device)
(uninitialized): Enable RX Mitigation via HW Watchdog Timer
[5.944512] mmc_host mmc1: Bus speed (slot 0) = 5000Hz (slot req
5000Hz, actual 5000HZ div = 0)
[5.958249] mmc1: new ultra high speed DDR50 SDIO
On 12/07/2016 10:55 PM, Daniel Vetter wrote:
On Wed, Dec 07, 2016 at 08:57:23AM +0800, Ayaka wrote:
從我的 iPad 傳送
Thierry Reding <thierry.red...@gmail.com> 於 2016年12月6日 下午11:46 寫道:
On Tue, Sep 20, 2016 at 03:02:51AM +0800, Randy Li wrote:
The Chunghwa CLAA070WP03XG is a 7" 128
On 12/07/2016 10:55 PM, Daniel Vetter wrote:
On Wed, Dec 07, 2016 at 08:57:23AM +0800, Ayaka wrote:
從我的 iPad 傳送
Thierry Reding 於 2016年12月6日 下午11:46 寫道:
On Tue, Sep 20, 2016 at 03:02:51AM +0800, Randy Li wrote:
The Chunghwa CLAA070WP03XG is a 7" 1280x800 panel, which can be
supp
從我的 iPad 傳送
> Thierry Reding 於 2016年12月6日 下午11:46 寫道:
>
>> On Tue, Sep 20, 2016 at 03:02:51AM +0800, Randy Li wrote:
>> The Chunghwa CLAA070WP03XG is a 7" 1280x800 panel, which can be
>> supported by the simple panel driver.
>>
>> Signed-off-by: Randy Li
從我的 iPad 傳送
> Thierry Reding 於 2016年12月6日 下午11:46 寫道:
>
>> On Tue, Sep 20, 2016 at 03:02:51AM +0800, Randy Li wrote:
>> The Chunghwa CLAA070WP03XG is a 7" 1280x800 panel, which can be
>> supported by the simple panel driver.
>>
>> Signed-off-by: Randy Li
>> ---
>>
Hello John
I still waiting them be merged, but I still can't find it at next-20161206.
從我的 iPad 傳送
> John Youn <john.y...@synopsys.com> 於 2016年10月25日 上午9:30 寫道:
>
>> On 10/23/2016 2:33 AM, ayaka wrote:
>>
>>
>>> On 10/22/2016 03:27 AM, John Youn wrote
Hello John
I still waiting them be merged, but I still can't find it at next-20161206.
從我的 iPad 傳送
> John Youn 於 2016年10月25日 上午9:30 寫道:
>
>> On 10/23/2016 2:33 AM, ayaka wrote:
>>
>>
>>> On 10/22/2016 03:27 AM, John Youn wrote:
>>&g
On 10/28/2016 05:29 PM, Randy Li wrote:
On 10/28/2016 05:11 PM, Shawn Lin wrote:
On 2016/10/23 3:18, Randy Li wrote:
I found if eDP_AVDD_1V0 and eDP_AVDD_1V8 are not been power at
RK3288, once trying to enable the pclk clock, the kernel would dead.
This patch would try to enable them
On 10/28/2016 05:29 PM, Randy Li wrote:
On 10/28/2016 05:11 PM, Shawn Lin wrote:
On 2016/10/23 3:18, Randy Li wrote:
I found if eDP_AVDD_1V0 and eDP_AVDD_1V8 are not been power at
RK3288, once trying to enable the pclk clock, the kernel would dead.
This patch would try to enable them
On 10/28/2016 05:29 PM, Randy Li wrote:
On 10/28/2016 05:11 PM, Shawn Lin wrote:
On 2016/10/23 3:18, Randy Li wrote:
I found if eDP_AVDD_1V0 and eDP_AVDD_1V8 are not been power at
RK3288, once trying to enable the pclk clock, the kernel would dead.
This patch would try to enable them
On 10/28/2016 05:29 PM, Randy Li wrote:
On 10/28/2016 05:11 PM, Shawn Lin wrote:
On 2016/10/23 3:18, Randy Li wrote:
I found if eDP_AVDD_1V0 and eDP_AVDD_1V8 are not been power at
RK3288, once trying to enable the pclk clock, the kernel would dead.
This patch would try to enable them
On 10/22/2016 03:27 AM, John Youn wrote:
On 10/20/2016 11:38 AM, Randy Li wrote:
On the rk3288 USB host-only port (the one that's not the OTG-enabled
port) the PHY can get into a bad state when a wakeup is asserted (not
just a wakeup from full system suspend but also a wakeup from
On 10/22/2016 03:27 AM, John Youn wrote:
On 10/20/2016 11:38 AM, Randy Li wrote:
On the rk3288 USB host-only port (the one that's not the OTG-enabled
port) the PHY can get into a bad state when a wakeup is asserted (not
just a wakeup from full system suspend but also a wakeup from
On 10/21/2016 04:25 PM, Heiko Stuebner wrote:
Am Donnerstag, 20. Oktober 2016, 15:47:56 CEST schrieb Tomeu Vizoso:
On 10/20/2016 03:45 PM, Heiko Stübner wrote:
Am Donnerstag, 20. Oktober 2016, 10:07:25 schrieb Tomeu Vizoso:
Add an empty 'i2c-bus' subnode to the edp node just so that the I2C
On 10/21/2016 04:25 PM, Heiko Stuebner wrote:
Am Donnerstag, 20. Oktober 2016, 15:47:56 CEST schrieb Tomeu Vizoso:
On 10/20/2016 03:45 PM, Heiko Stübner wrote:
Am Donnerstag, 20. Oktober 2016, 10:07:25 schrieb Tomeu Vizoso:
Add an empty 'i2c-bus' subnode to the edp node just so that the I2C
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> Krzysztof Kozlowski 於 2016年10月19日 上午1:37 寫道:
>
>> On Wed, Oct 19, 2016 at 01:18:49AM +0800, Randy Li wrote:
>> The TOPEET itop exynos 4412 have three versions base board. The
>> Elite version is the cheap one without too much peripheral devices
>> on it.
>>
>>
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> Krzysztof Kozlowski 於 2016年10月19日 上午1:37 寫道:
>
>> On Wed, Oct 19, 2016 at 01:18:49AM +0800, Randy Li wrote:
>> The TOPEET itop exynos 4412 have three versions base board. The
>> Elite version is the cheap one without too much peripheral devices
>> on it.
>>
>> Currently
On 10/18/2016 12:27 AM, Krzysztof Kozlowski wrote:
On Mon, Sep 19, 2016 at 11:48:22PM +0800, Randy Li wrote:
The TOPEET itop is a samsung exnynos 4412 core board, which have
two package versions. This patch add the support for SCP version.
Currently supported are USB3503A HSIC, USB OTG,
On 10/18/2016 12:27 AM, Krzysztof Kozlowski wrote:
On Mon, Sep 19, 2016 at 11:48:22PM +0800, Randy Li wrote:
The TOPEET itop is a samsung exnynos 4412 core board, which have
two package versions. This patch add the support for SCP version.
Currently supported are USB3503A HSIC, USB OTG,
Hello:
I meet a problem with eDP in rk3288 with the linux next 20161006, it
is just like the early stage of 4.4
kernel. I have added a eDP panel entry in the firefly reload board,
once the kernel loaded analogix_dp-rockchip.ko, after printed the
following two lines, the kernel stop
Hello:
I meet a problem with eDP in rk3288 with the linux next 20161006, it
is just like the early stage of 4.4
kernel. I have added a eDP panel entry in the firefly reload board,
once the kernel loaded analogix_dp-rockchip.ko, after printed the
following two lines, the kernel stop
On 09/24/2016 02:00 AM, Rob Herring wrote:
On Tue, Sep 20, 2016 at 03:02:51AM +0800, Randy Li wrote:
The Chunghwa CLAA070WP03XG is a 7" 1280x800 panel, which can be
supported by the simple panel driver.
Signed-off-by: Randy Li
---
On 09/24/2016 02:00 AM, Rob Herring wrote:
On Tue, Sep 20, 2016 at 03:02:51AM +0800, Randy Li wrote:
The Chunghwa CLAA070WP03XG is a 7" 1280x800 panel, which can be
supported by the simple panel driver.
Signed-off-by: Randy Li
---
.../display/panel/chunghwa,claa070wp03xg.txt | 7
/linux-kernel/tree/firefly-rk3288-reload-next
*) Maybe some different kernel config options -> mine are
multi_v7_defconfig with a few modules added
Not sure with that defconfig, even I didn't know whether you enabled the
USB module
Kind regards,
Norbert
2016-09-24 20:53 GMT+02:00
/linux-kernel/tree/firefly-rk3288-reload-next
*) Maybe some different kernel config options -> mine are
multi_v7_defconfig with a few modules added
Not sure with that defconfig, even I didn't know whether you enabled the
USB module
Kind regards,
Norbert
2016-09-24 20:53 GMT+02:00 ayaka :
a single peripheral, just getting read errors.
Seems like something is getting powered down if no USB peripheral is
connected, and can`t start up again.
Kind regard,
Norbert
2016-09-23 2:48 GMT+02:00 Ayaka <ay...@soulik.info>:
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Norbert Lange <nolang...@gmail.com> 於 2016年
a single peripheral, just getting read errors.
Seems like something is getting powered down if no USB peripheral is
connected, and can`t start up again.
Kind regard,
Norbert
2016-09-23 2:48 GMT+02:00 Ayaka :
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Norbert Lange 於 2016年9月23日 上午7:37 寫道:
Hello Randi,
I am Randy
sorry
On 09/20/2016 03:12 AM, Fabio Estevam wrote:
On Mon, Sep 19, 2016 at 4:02 PM, Randy Li wrote:
+ vcc_sys_lcd: sys-lcd {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_5v";
+ regulator-min-microvolt = <500>;
+
On 09/20/2016 03:12 AM, Fabio Estevam wrote:
On Mon, Sep 19, 2016 at 4:02 PM, Randy Li wrote:
+ vcc_sys_lcd: sys-lcd {
+ compatible = "regulator-fixed";
+ regulator-name = "vcc_5v";
+ regulator-min-microvolt = <500>;
+
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> Mark Brown 於 2016年9月19日 下午4:33 寫道:
>
>> On Sun, Sep 18, 2016 at 10:09:11PM +0800, Randy Li wrote:
>>
>> It is simple sound card time, we could assign different codec
>> to a interface without making a specific driver for it.
>
>> config SND_SAMSUNG_AC97
>>
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> Mark Brown 於 2016年9月19日 下午4:33 寫道:
>
>> On Sun, Sep 18, 2016 at 10:09:11PM +0800, Randy Li wrote:
>>
>> It is simple sound card time, we could assign different codec
>> to a interface without making a specific driver for it.
>
>> config SND_SAMSUNG_AC97
>> -tristate
>> +
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> Krzysztof Kozlowski <k...@kernel.org> 於 2016年9月19日 上午2:09 寫道:
>
>> On Sun, Sep 18, 2016 at 11:12:34PM +0800, ayaka wrote:
>>
>>
>>> On 09/18/2016 10:42 PM, Krzysztof Kozlowski wrote:
>>>> On Sun, Sep 18, 2016 at 10:09:11PM
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> Krzysztof Kozlowski 於 2016年9月19日 上午2:09 寫道:
>
>> On Sun, Sep 18, 2016 at 11:12:34PM +0800, ayaka wrote:
>>
>>
>>> On 09/18/2016 10:42 PM, Krzysztof Kozlowski wrote:
>>>> On Sun, Sep 18, 2016 at 10:09:11PM +0800, Randy Li wrote
On 09/18/2016 10:42 PM, Krzysztof Kozlowski wrote:
On Sun, Sep 18, 2016 at 10:09:11PM +0800, Randy Li wrote:
It is simple sound card time, we could assign different codec
to a interface without making a specific driver for it.
The description does not convince me and I do not see an example
On 09/18/2016 10:42 PM, Krzysztof Kozlowski wrote:
On Sun, Sep 18, 2016 at 10:09:11PM +0800, Randy Li wrote:
It is simple sound card time, we could assign different codec
to a interface without making a specific driver for it.
The description does not convince me and I do not see an example
kernel.
[0.00] Booting Linux on physical CPU 0xa00
[0.00] Linux version 4.8.0-rc6-next-20160916-4-gae92137
(ayaka@ritsuko) (gcc version 6.1.0 (Buildroot 2016.05-6-g0
792d0d-dirty) ) #83 SMP PREEMPT Sun Sep 18 17:29:56 CST 2016
[0.00] CPU: ARMv7 Processor [413fc090] revision 0
kernel.
[0.00] Booting Linux on physical CPU 0xa00
[0.00] Linux version 4.8.0-rc6-next-20160916-4-gae92137
(ayaka@ritsuko) (gcc version 6.1.0 (Buildroot 2016.05-6-g0
792d0d-dirty) ) #83 SMP PREEMPT Sun Sep 18 17:29:56 CST 2016
[0.00] CPU: ARMv7 Processor [413fc090] revision 0
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