On Wed, 14 Aug 2019 at 17:19, Mark Brown wrote:
>
> On Wed, Aug 14, 2019 at 02:09:11PM +0100, Ben Whitten wrote:
>
> > So it appeared that the last patch in this area for validating a register
> > block [1] broke the regmap_noinc_write use case.
>
> Please include
On Wed, 14 Aug 2019 at 11:01, Mark Brown wrote:
>
> On Tue, Aug 13, 2019 at 10:22:51PM +0100, Ben Whitten wrote:
>
> > @@ -1489,10 +1489,11 @@ static int _regmap_raw_write_impl(struct regmap
> > *map, unsigned int reg,
> > WARN_ON(!map->bus);
> >
> &g
When checking if a register is writable we must first check if the
register is a non incrementing writable register.
Non incrementing register are deep and do not move to the next
register when writing, for example a FIFO.
Signed-off-by: Ben Whitten
---
drivers/base/regmap/regmap.c | 9
From: Ben Whitten
The AGC software requires loading of a power lookup table on initialisation
prior to transmission.
The fields required are digital, pa, dac, and mixer gain. These values are
typically hardware specific and calibrated for a particular power output at
the card rf port.
The format
From: Ben Whitten
Adding power lookup table for the concentrator specified in DT.
These values are calibrated for the hardware and are unique to hardware
designs and certifications.
First byte is signed power in dBm measured at the rf connector.
Second byte is unsigned value for DIGITAL gain
est transmission with
real values and has been tested to show changing bandwidths.
To perform testing a tx_test [4] was used to show changing
parameters on a spectrum analyser.
We also add patches to the defaults in the SX130x to fill in a TODO
in our initialisation.
Thanks,
Ben Whitten
[1] h
From: Ben Whitten
The transaction to the internal MCU starts with CMD_WAIT to start a
transaction, written to CHRS followed by writing the value, the status of
the command is read back from AGCSTS.
Signed-off-by: Ben Whitten
---
drivers/net/lora/sx130x.c | 28
As we are not allowed to sleep in _start_xmit, we need to add a work queue
to handle transmission of the packets.
Signed-off-by: Ben Whitten
---
drivers/net/lora/sx130x.c | 50 ++-
1 file changed, 49 insertions(+), 1 deletion(-)
diff --git a/drivers/net/lora
From: Ben Whitten
Setup requires a more steps to be complete, call these out specifically
so they are not missed.
Signed-off-by: Ben Whitten
---
drivers/net/lora/sx130x.c | 12 +++-
1 file changed, 11 insertions(+), 1 deletion(-)
diff --git a/drivers/net/lora/sx130x.c b/drivers/net
Information such as spreading factor, coding rate and power are on a per
transmission basis so we can encode this information in the lora socket
address.
In future we may have a different format for receive with additional
fields which get populated.
Signed-off-by: Ben Whitten
---
include/linux
We take the metadata encoded in the lora address and apply it to the
outgoing transmission.
Signed-off-by: Ben Whitten
---
drivers/net/lora/sx130x.c | 58 ---
1 file changed, 48 insertions(+), 10 deletions(-)
diff --git a/drivers/net/lora/sx130x.c b/drivers
The SX130x chips require a number of constant adjustments and patches.
We add the fields for the registers which require patches, add patch
values then add a helper to patch fields. Removing one TODO.
Signed-off-by: Ben Whitten
---
drivers/net/lora/sx130x.c | 131
From: Ben Whitten
Initialisation of the AGC firmware requires a couple of steps to be
completed;
- Loading a TX LUT
- Loading the two MSBs for the radio tx synthesizer frequencies,
(Always 3 if f > 768 for SX1257 and SX1258 or f > 384 for SX1255)
- Loading a firmware option
-
First transmission from the SX130x, all metadata values are hardcoded
and will be replaced with a suitable alternative.
Data sent into the socket is sent straight out of the card.
Signed-off-by: Ben Whitten
---
drivers/net/lora/sx130x.c | 128 +-
drivers/net
From: Ben Whitten
The CHRS register is used in transactions to the MCU within the SX130x,
we need to always write to it.
Signed-off-by: Ben Whitten
---
drivers/net/lora/sx130x.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/net/lora/sx130x.c b/drivers/net/lora/sx130x.c
index
Missed linux-lpwan
On Thu, 24 Jan 2019 at 14:53, Ben Whitten wrote:
>
> From: Ben Whitten
>
> The SX130x family consumes two clocks, a 32 MHz clock provided by a
> connected IQ transceiver, and a 133 MHz high speed clock.
> It also provides a 32 MHz clock out to the ra
Missed linux-lpwan
On Thu, 24 Jan 2019 at 14:53, Ben Whitten wrote:
>
> From: Ben Whitten
>
> The SX125x family are IQ radio transceivers from Semtech configured over
> SPI, they are typically connected to an SX130x series concentrator however
> may be connected to a host dire
Missed linux-lpwan
On Thu, 24 Jan 2019 at 14:53, Ben Whitten wrote:
>
> From: Ben Whitten
>
> The SX125x consumes a clock (FXOSC) ranging from 32 to 36 MHz as its main
> XTAL. It may also consume a clock for the TX synthesizer or DAC input clock
> (FCLK_IN).
> If
Missed linux-lpwan
On Thu, 24 Jan 2019 at 14:53, Ben Whitten wrote:
>
> From: Ben Whitten
>
> Add basic documentation in YAML format for the SX130x series concentrators
> from Semtech.
> Required is; the location on the SPI bus and the compatible string.
>
> Si
Missed linux-lpwan
On Thu, 24 Jan 2019 at 14:53, Ben Whitten wrote:
>
> Hello,
>
> This series adds documentation for the SX130x and SX125x chips.
> We are using the yaml binding format and this series builds with
> 'make dt_binding_check'.
>
> This series is s
From: Ben Whitten
Add basic documentation in YAML format for the SX130x series concentrators
from Semtech.
Required is; the location on the SPI bus and the compatible string.
Signed-off-by: Ben Whitten
---
v2 -> v3:
* Corrected fallback notation
* Limited radio node names from anyth
From: Ben Whitten
The SX125x family are IQ radio transceivers from Semtech configured over
SPI, they are typically connected to an SX130x series concentrator however
may be connected to a host directly.
Required properties include the radio number of the host or concentrator
bus.
Signed-off
From: Ben Whitten
The SX130x family consumes two clocks, a 32 MHz clock provided by a
connected IQ transceiver, and a 133 MHz high speed clock.
It also provides a 32 MHz clock out to the radio in the TX path.
In the example we connect the concentrator to a fixed clock providing
the 133 MHz high
From: Ben Whitten
The SX125x consumes a clock (FXOSC) ranging from 32 to 36 MHz as its main
XTAL. It may also consume a clock for the TX synthesizer or DAC input clock
(FCLK_IN).
If the radio is coupled with an SX130x the radio is therefor operating in
master mode and it may also provide a gated
clk
over spi backed regmaps on certain spi controller drivers [1]
Thanks,
Ben Whitten
v2 -> v3
* Added the clock input and output names
* Limited the radio-spi node children names to radio@
* Fixed fallback compatible for SX1308 -> SX1301
v1 -> v2
* Dropped reset-gpios, radio-spi from
Hi,
On 22/01/2019 20:04, Rob Herring wrote:
On Tue, Jan 22, 2019 at 12:07 PM Ben Whitten wrote:
From: Ben Whitten
Add basic documentation in YAML format for the SX130x series concentrators
from Semtech.
Required is; the location on the SPI bus and the compatible string.
Signed-off-by: Ben
Hello,
This series adds documentation for the SX130x and SX125x chips.
We are using the yaml binding format and this series builds with
'make dt_binding_check'.
Thanks,
Ben Whitten
Ben Whitten (4):
dt-bindings: lora: sx130x: add basic documentation
dt-bindings: lora: sx125x: add basic
From: Ben Whitten
Add basic documentation in YAML format for the SX130x series concentrators
from Semtech.
Required is; the location on the SPI bus and the compatible string.
Signed-off-by: Ben Whitten
---
v1 -> v2:
* Dropped reset-gpios, radio-spi from required.
* Dropped spi-max-freque
From: Ben Whitten
The SX125x family are IQ radio transceivers from Semtech configured over
SPI, they are typically connected to an SX130x series concentrator however
may be connected to a host directly.
Required properties include the radio number of the host or concentrator
bus.
Signed-off
From: Ben Whitten
The SX125x consumes a clock (FXOSC) ranging from 32 to 36 MHz.
If the radio is coupled with an SX130x the radio is therefor operating in
master mode and it may also provide a gated version of this clock for the
concentrator. In this case the concentrator is expecting a 32 MHz
From: Ben Whitten
The SX130x family consumes two clocks, a 32 MHz clock provided by a
connected IQ transceiver, and a 133 MHz high speed clock.
In the example we connect the concentrator to a fixed clock providing
the 133 MHz high speed clock, and we connect to a connected transceiver
32 MHz
Hi Andreas,
> Am 08.01.19 um 09:41 schrieb Ben Whitten:
> > The sx125x family are IQ radio transceivers from Semtech configured over
> > SPI, they are typically connected to an sx130x series concentrator however
> > may be connected to a host directly.
>
Hi Andreas,
> Am 08.01.19 um 09:41 schrieb Ben Whitten:
> > Add basic documentation in YAML format for the sx130x series concentrators
> > from Semtech.
> > Required is; the location on the SPI bus, the reset gpio and the node for
> > downstream IQ radios, typically
clock.
The connected radios are both fed from output 0 of a fixed 32MHz clock,
with only one being the clock source back with one output to the
sx130x concentrator.
Signed-off-by: Ben Whitten
---
.../{ => net}/lora/semtech,sx130x.yaml| 39 ++-
1 file changed, 38 inserti
s = <0>", named
"clk32m" for consumption by the sx130x concentrator.
Signed-off-by: Ben Whitten
---
.../{ => net}/lora/semtech,sx125x.yaml| 27 +++
1 file changed, 27 insertions(+)
rename Documentation/devicetree/bindings/{ => net}/lora/semtech,sx12
The sx125x family are IQ radio transceivers from Semtech configured over
SPI, they are typically connected to an sx130x series concentrator however
may be connected to a host directly.
Required properties include the radio number of the host or concentrator
bus.
Signed-off-by: Ben Whitten
Add basic documentation in YAML format for the sx130x series concentrators
from Semtech.
Required is; the location on the SPI bus, the reset gpio and the node for
downstream IQ radios, typically sx125x.
Signed-off-by: Ben Whitten
---
.../bindings/lora/semtech,sx130x.yaml | 87
truct serdev_device_driver picogw_serdev_driver = {
+ .probe = picogw_serdev_probe,
+ .remove = picogw_serdev_remove,
+ .driver = {
+ .name = "lora-picogw",
+ .of_match_table = picogw_serdev_of_match,
+ },
+};
+
+static int __init picogw_serdev_init(void)
+{
+ int ret;
+
+ ret = serdev_device_driver_register(_serdev_driver);
+ if (ret) {
+ pr_err("serdev_device_driver_register failed (%d)", ret);
+ return ret;
+ }
+
+ return 0;
+}
+module_init(picogw_serdev_init);
+
+static void __exit picogw_serdev_exit(void)
+{
+ serdev_device_driver_unregister(_serdev_driver);
+}
+module_exit(picogw_serdev_exit);
+
+MODULE_LICENSE("GPL");
Thanks,
Ben Whitten
Hi Andreas,
On 29/12/2018 09:05, Andreas Färber wrote:
Hi Ben,
Am 19.12.18 um 16:56 schrieb Ben Whitten:
Checkpatch highlights some style issues which need to be addressed.
Signed-off-by: Ben Whitten
---
drivers/net/lora/sx125x.c | 20 +--
drivers/net/lora/sx1301.c | 52
On 29/12/2018 09:58, Andreas Färber wrote:
Hi Ben,
Am 19.12.18 um 16:56 schrieb Ben Whitten:
As part of initialisation when opening the lora device after loading
the AGC firmware we need to satisfy its startup procedure which involves
a few steps;
Loading a 16 entry lookup table
can we get the
end device regmap_config and apply it from there?
Mark what are your thoughts on the route to take?
Regards,
Ben Whitten
> > > Am 18.12.18 um 15:27 schrieb Jian-Hong Pan:
> > > >> Sun, Dec 16, 2018 at 11:18:59AM CET, starni...@g.ncu.edu.tw wrote:
> > > >>> LoRaWAN defined by LoRa Alliance(TM) is the MAC layer over LoRa
> > > devices.
> > > >>>
> > > >>> This patch implements part of Class A end-devices SoftMAC
Checkpatch highlights some style issues which need to be addressed.
Signed-off-by: Ben Whitten
---
drivers/net/lora/sx125x.c | 20 +--
drivers/net/lora/sx1301.c | 52 ++-
drivers/net/lora/sx1301.h | 7 +++---
3 files changed, 45 insertions(+), 34
such as coding rate, spreading factor and
power into the transmission.
Signed-off-by: Ben Whitten
---
drivers/net/lora/sx1301.c | 166 +-
drivers/net/lora/sx1301.h | 21 +
2 files changed, 186 insertions(+), 1 deletion(-)
diff --git a/drivers/net/lora/sx1301.c
Information such as spreading factor, coding rate and power are on a per
transmission basis so it makes sence to include this in a header much
like CAN frames do.
Signed-off-by: Ben Whitten
---
drivers/net/lora/dev.c| 2 -
drivers/net/lora/sx1301.c | 79
investigation on how other devices
load calibration data.
Selecting the correct channel to transmit on.
Currently always 0 for the reference design.
Then ending the AGC init procedure and seeing that it has come up.
Signed-off-by: Ben Whitten
---
drivers/net/lora/sx1301.c | 254
spreading factor / data rate, power, are given by a remote server and passed
in from the userspace application which received it.
Eventually in the kernel these need to be checked locally to ensure regulatory
compliance.
To that end I have experimented with framing, as CAN does, so that this
metadata can be provided on a write from userspace to the SX1301 driver.
Sounds like we need different protocols for framing within the protocol family.
Raw in the case of nodes and framed with metadata in the case of concentrator
cards, thoughts?
I will send my experiment RFC to the lpwan mailing list.
Regards,
Ben Whitten
.
Signed-off-by: Ben Whitten
---
drivers/base/regmap/internal.h | 3 ++
drivers/base/regmap/regmap.c | 77 ++
include/linux/regmap.h | 19 +++
3 files changed, 99 insertions(+)
diff --git a/drivers/base/regmap/internal.h b/drivers/base
.
Signed-off-by: Ben Whitten
---
drivers/base/regmap/internal.h | 3 ++
drivers/base/regmap/regmap.c | 77 ++
include/linux/regmap.h | 19 +++
3 files changed, 99 insertions(+)
diff --git a/drivers/base/regmap/internal.h b/drivers/base
> Subject: Re: [PATCH v2 4/6] arm: dts: add support for Laird
> WB50N cpu module and DVK
>
> Hi,
>
> I've now applied the whole series after fixing two small
> whitespace
> issues.
Thanks!
> On 15/06/2018 14:40:53+0100, Ben Whitten wrote:
> > +_clk {
&g
> Subject: Re: [PATCH v2 4/6] arm: dts: add support for Laird
> WB50N cpu module and DVK
>
> Hi,
>
> I've now applied the whole series after fixing two small
> whitespace
> issues.
Thanks!
> On 15/06/2018 14:40:53+0100, Ben Whitten wrote:
> > +_clk {
&g
etooth and, Atmel SAMA5D3 CPU.
> https://www.lairdtech.com/products/wb50nbt-wi-fi-bluetooth-module
>
> Signed-off-by: Ben Whitten
> ---
> arch/arm/boot/dts/Makefile| 1 +
> arch/arm/boot/dts/at91-wb50n.dts | 112 +
> arch/arm/boo
etooth and, Atmel SAMA5D3 CPU.
> https://www.lairdtech.com/products/wb50nbt-wi-fi-bluetooth-module
>
> Signed-off-by: Ben Whitten
> ---
> arch/arm/boot/dts/Makefile| 1 +
> arch/arm/boot/dts/at91-wb50n.dts | 112 +
> arch/arm/boo
This adds a vendor prefix "laird" for Laird PLC who make
CPU modules and system on chips.
Also adds "giantec" for Giantec Semiconductor, Inc. who
make eeprom memory used on Laird designs.
Signed-off-by: Ben Whitten
---
Documentation/devicetree/bindings/vendor-prefixes.txt |
This adds a vendor prefix "laird" for Laird PLC who make
CPU modules and system on chips.
Also adds "giantec" for Giantec Semiconductor, Inc. who
make eeprom memory used on Laird designs.
Signed-off-by: Ben Whitten
---
Documentation/devicetree/bindings/vendor-prefixes.txt |
This adds support for Lairds combo CPU module, featuring on board
Atheros wifi, CSR Bluetooth radio and, Atmel CPU.
https://www.lairdtech.com/products/wb45nbt
Signed-off-by: Ben Whitten
---
arch/arm/boot/dts/Makefile| 1 +
arch/arm/boot/dts/at91-wb45n.dts | 64 +++
arch
This adds support for Lairds combo CPU module, featuring on board
Atheros wifi, CSR Bluetooth radio and, Atmel CPU.
https://www.lairdtech.com/products/wb45nbt
Signed-off-by: Ben Whitten
---
arch/arm/boot/dts/Makefile| 1 +
arch/arm/boot/dts/at91-wb45n.dts | 64 +++
arch
This adds support for Lairds upcoming SOM module, featuring Marvell WiFi
and Bluetooth, 2Gb NAND / 1Gb LPDDR SDRAM, and an Atmel SAMA5D3 CPU.
Signed-off-by: Ben Whitten
---
arch/arm/boot/dts/Makefile| 1 +
arch/arm/boot/dts/at91-dvk_som60.dts | 95
This adds support for Lairds upcoming SOM module, featuring Marvell WiFi
and Bluetooth, 2Gb NAND / 1Gb LPDDR SDRAM, and an Atmel SAMA5D3 CPU.
Signed-off-by: Ben Whitten
---
arch/arm/boot/dts/Makefile| 1 +
arch/arm/boot/dts/at91-dvk_som60.dts | 95
This adds support for Lairds CPU module, featuring Atheros wifi, CSR
Bluetooth and, Atmel SAMA5D3 CPU.
https://www.lairdtech.com/products/wb50nbt-wi-fi-bluetooth-module
Signed-off-by: Ben Whitten
---
arch/arm/boot/dts/Makefile| 1 +
arch/arm/boot/dts/at91-wb50n.dts | 112
This adds support for Lairds CPU module, featuring Atheros wifi, CSR
Bluetooth and, Atmel SAMA5D3 CPU.
https://www.lairdtech.com/products/wb50nbt-wi-fi-bluetooth-module
Signed-off-by: Ben Whitten
---
arch/arm/boot/dts/Makefile| 1 +
arch/arm/boot/dts/at91-wb50n.dts | 112
Add support for the LoRa gateway from Laird, the RG1xx.
This board houses the WB50NBT CPU module along with a Semtech SX1301 based
concentrator card.
https://www.lairdtech.com/products/rg1xx-lora-gateway
Signed-off-by: Ben Whitten
# Conflicts:
# arch/arm/boot/dts/Makefile
---
arch/arm
Add support for the LoRa gateway from Laird, the RG1xx.
This board houses the WB50NBT CPU module along with a Semtech SX1301 based
concentrator card.
https://www.lairdtech.com/products/rg1xx-lora-gateway
Signed-off-by: Ben Whitten
# Conflicts:
# arch/arm/boot/dts/Makefile
---
arch/arm
This adds labels to commonly used device-tree nodes so that derivative
boards can avoid ahb/apb hierarchy.
Signed-off-by: Ben Whitten
---
arch/arm/boot/dts/at91sam9x5.dtsi | 8
arch/arm/boot/dts/sama5d3.dtsi| 8
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git
This adds labels to commonly used device-tree nodes so that derivative
boards can avoid ahb/apb hierarchy.
Signed-off-by: Ben Whitten
---
arch/arm/boot/dts/at91sam9x5.dtsi | 8
arch/arm/boot/dts/sama5d3.dtsi| 8
2 files changed, 8 insertions(+), 8 deletions(-)
diff --git
> On 14/06/2018 at 10:51, Ben Whitten wrote:
> > Signed-off-by: Ben Whitten
> > ---
> > arch/arm/boot/dts/Makefile| 3 +-
> > arch/arm/boot/dts/at91-wb45n.dts | 66 +++
> > arch/arm/boot/dts/at91-wb45n.dtsi | 169
>
> On 14/06/2018 at 10:51, Ben Whitten wrote:
> > Signed-off-by: Ben Whitten
> > ---
> > arch/arm/boot/dts/Makefile| 3 +-
> > arch/arm/boot/dts/at91-wb45n.dts | 66 +++
> > arch/arm/boot/dts/at91-wb45n.dtsi | 169
>
Thanks all for the reviews and comments, I will work on a new series.
> On 14/06/2018 at 10:51, Ben Whitten wrote:
> > Signed-off-by: Ben Whitten
> > ---
> > arch/arm/boot/dts/Makefile| 3 +-
> > arch/arm/boot/dts/at91-dvk_som60.dts |
Thanks all for the reviews and comments, I will work on a new series.
> On 14/06/2018 at 10:51, Ben Whitten wrote:
> > Signed-off-by: Ben Whitten
> > ---
> > arch/arm/boot/dts/Makefile| 3 +-
> > arch/arm/boot/dts/at91-dvk_som60.dts |
Signed-off-by: Ben Whitten
---
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/at91-gatwick.dts | 125 +
2 files changed, 127 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/at91-gatwick.dts
diff --git a/arch/arm/boot/dts
Signed-off-by: Ben Whitten
---
arch/arm/boot/dts/Makefile| 3 +-
arch/arm/boot/dts/at91-dvk_som60.dts | 95 +++
arch/arm/boot/dts/at91-dvk_su60_somc.dtsi | 159 ++
arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi | 96 +++
arch
Signed-off-by: Ben Whitten
---
arch/arm/boot/dts/Makefile | 3 +-
arch/arm/boot/dts/at91-gatwick.dts | 125 +
2 files changed, 127 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot/dts/at91-gatwick.dts
diff --git a/arch/arm/boot/dts
Signed-off-by: Ben Whitten
---
arch/arm/boot/dts/Makefile| 3 +-
arch/arm/boot/dts/at91-dvk_som60.dts | 95 +++
arch/arm/boot/dts/at91-dvk_su60_somc.dtsi | 159 ++
arch/arm/boot/dts/at91-dvk_su60_somc_lcm.dtsi | 96 +++
arch
Signed-off-by: Ben Whitten
---
arch/arm/boot/dts/Makefile| 3 +-
arch/arm/boot/dts/at91-wb50n.dts | 116 ++
arch/arm/boot/dts/at91-wb50n.dtsi | 202 ++
3 files changed, 320 insertions(+), 1 deletion(-)
create mode 100644 arch
Signed-off-by: Ben Whitten
---
arch/arm/boot/dts/Makefile| 3 +-
arch/arm/boot/dts/at91-wb45n.dts | 66 +++
arch/arm/boot/dts/at91-wb45n.dtsi | 169 ++
3 files changed, 237 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot
Signed-off-by: Ben Whitten
---
arch/arm/boot/dts/Makefile| 3 +-
arch/arm/boot/dts/at91-wb50n.dts | 116 ++
arch/arm/boot/dts/at91-wb50n.dtsi | 202 ++
3 files changed, 320 insertions(+), 1 deletion(-)
create mode 100644 arch
Signed-off-by: Ben Whitten
---
arch/arm/boot/dts/Makefile| 3 +-
arch/arm/boot/dts/at91-wb45n.dts | 66 +++
arch/arm/boot/dts/at91-wb45n.dtsi | 169 ++
3 files changed, 237 insertions(+), 1 deletion(-)
create mode 100644 arch/arm/boot
On 24 January 2018 at 14:54, Mark Brown <broo...@kernel.org> wrote:
> On Wed, Jan 24, 2018 at 02:01:55PM +0000, Ben Whitten wrote:
>> On 23 January 2018 at 11:11, Mark Brown <broo...@kernel.org> wrote:
>
>> > level. Things that have their own transfer function wo
On 24 January 2018 at 14:54, Mark Brown wrote:
> On Wed, Jan 24, 2018 at 02:01:55PM +0000, Ben Whitten wrote:
>> On 23 January 2018 at 11:11, Mark Brown wrote:
>
>> > level. Things that have their own transfer function would be better off
>> > just being first or
On 23 January 2018 at 11:11, Mark Brown <broo...@kernel.org> wrote:
> On Mon, Jan 22, 2018 at 10:51:12PM +0000, Ben Whitten wrote:
>
>> Like I2C busses SPI devices can also sit behind multiplexers.
>> This patch adds is based off the I2C implementation and allows
>>
On 23 January 2018 at 11:11, Mark Brown wrote:
> On Mon, Jan 22, 2018 at 10:51:12PM +0000, Ben Whitten wrote:
>
>> Like I2C busses SPI devices can also sit behind multiplexers.
>> This patch adds is based off the I2C implementation and allows
>> description in
Like I2C busses SPI devices can also sit behind multiplexers.
This patch adds is based off the I2C implementation and allows
description in the devicetree.
Signed-off-by: Ben Whitten <ben.whit...@gmail.com>
---
drivers/spi/Kconfig | 10 +++
drivers/spi/Makefile| 3 +
drivers/s
Like I2C busses SPI devices can also sit behind multiplexers.
This patch adds is based off the I2C implementation and allows
description in the devicetree.
Signed-off-by: Ben Whitten
---
drivers/spi/Kconfig | 10 +++
drivers/spi/Makefile| 3 +
drivers/spi/spi-mux.c | 181
the downstream radios through its regmap and not straight on the bus.
This is a first proof of concept and I'm expecting a few revisions, which is
why there is no documentation yet.
Thanks!
Ben Whitten (1):
spi: add spi multiplexing functions for dt
drivers/spi/Kconfig | 10 +++
drivers
the downstream radios through its regmap and not straight on the bus.
This is a first proof of concept and I'm expecting a few revisions, which is
why there is no documentation yet.
Thanks!
Ben Whitten (1):
spi: add spi multiplexing functions for dt
drivers/spi/Kconfig | 10 +++
drivers
This commit introduces a NETDEV trigger for named device
activity. Available triggers are link, rx, and tx.
Signed-off-by: Ben Whitten <ben.whit...@gmail.com>
---
Changes in v5:
Adjust header comment style to be consistent
Changes in v4:
Adopt SPDX licence header
Changes in v3:
This commit introduces a NETDEV trigger for named device
activity. Available triggers are link, rx, and tx.
Signed-off-by: Ben Whitten
---
Changes in v5:
Adjust header comment style to be consistent
Changes in v4:
Adopt SPDX licence header
Changes in v3:
Cancel the software blink prior
Hi Jacek,
On 10 December 2017 at 18:31, Jacek Anaszewski
<jacek.anaszew...@gmail.com> wrote:
> Hi Ben,
>
> Thanks for the update. I have one doubt about comment style
> at the top of the file. Please refer below.
>
> On 12/10/2017 05:24 PM, Ben Whitten wrote:
>> T
Hi Jacek,
On 10 December 2017 at 18:31, Jacek Anaszewski
wrote:
> Hi Ben,
>
> Thanks for the update. I have one doubt about comment style
> at the top of the file. Please refer below.
>
> On 12/10/2017 05:24 PM, Ben Whitten wrote:
>> This commit introduces a NETDEV
This commit introduces a NETDEV trigger for named device
activity. Available triggers are link, rx, and tx.
Signed-off-by: Ben Whitten <ben.whit...@gmail.com>
---
Changes in v4:
Adopt SPDX licence header
Changes in v3:
Cancel the software blink prior to a oneshot re-queue
Changes in v2
This commit introduces a NETDEV trigger for named device
activity. Available triggers are link, rx, and tx.
Signed-off-by: Ben Whitten
---
Changes in v4:
Adopt SPDX licence header
Changes in v3:
Cancel the software blink prior to a oneshot re-queue
Changes in v2:
Sort includes and redate
Philippe,
On 7 December 2017 at 13:01, Philippe Ombredanne <pombreda...@nexb.com> wrote:
> Ben,
>
> On Thu, Dec 7, 2017 at 12:46 PM, Ben Whitten <ben.whit...@gmail.com> wrote:
>> From: Ben Whitten <ben.whit...@gmail.com>
>>
>> This commit introduces
Philippe,
On 7 December 2017 at 13:01, Philippe Ombredanne wrote:
> Ben,
>
> On Thu, Dec 7, 2017 at 12:46 PM, Ben Whitten wrote:
>> From: Ben Whitten
>>
>> This commit introduces a NETDEV trigger for named device
>> activity. Available triggers are link, rx,
From: Ben Whitten <ben.whit...@gmail.com>
This commit introduces a NETDEV trigger for named device
activity. Available triggers are link, rx, and tx.
Signed-off-by: Ben Whitten <ben.whit...@gmail.com>
---
Changes in v3:
Cancel the software blink prior to a oneshot re-queue
Changes
From: Ben Whitten
This commit introduces a NETDEV trigger for named device
activity. Available triggers are link, rx, and tx.
Signed-off-by: Ben Whitten
---
Changes in v3:
Cancel the software blink prior to a oneshot re-queue
Changes in v2:
Sort includes and redate documentation
Correct
On 6 December 2017 at 20:07, Ben Whitten <ben.whit...@gmail.com> wrote:
> Hi Jacek,
>
> On 5 December 2017 at 20:38, Jacek Anaszewski
> <jacek.anaszew...@gmail.com> wrote:
>> Hi Ben,
>>
>> On 12/05/2017 12:19 PM, Ben Whitten wrote:
>>> From: Be
On 6 December 2017 at 20:07, Ben Whitten wrote:
> Hi Jacek,
>
> On 5 December 2017 at 20:38, Jacek Anaszewski
> wrote:
>> Hi Ben,
>>
>> On 12/05/2017 12:19 PM, Ben Whitten wrote:
>>> From: Ben Whitten
>>>
>>> The patc
Hi Jacek,
On 5 December 2017 at 20:38, Jacek Anaszewski
<jacek.anaszew...@gmail.com> wrote:
> Hi Ben,
>
> On 12/05/2017 12:19 PM, Ben Whitten wrote:
>> From: Ben Whitten <ben.whit...@gmail.com>
>>
>> The patch was converted to led_blink_oneshot, in doi
Hi Jacek,
On 5 December 2017 at 20:38, Jacek Anaszewski
wrote:
> Hi Ben,
>
> On 12/05/2017 12:19 PM, Ben Whitten wrote:
>> From: Ben Whitten
>>
>> The patch was converted to led_blink_oneshot, in doing so we find that the
>> behaviour has changed. As I d
From: Ben Whitten <ben.whit...@gmail.com>
This commit introduces a NETDEV trigger for named device
activity. Available triggers are link, rx, and tx.
Signed-off-by: Ben Whitten <ben.whit...@gmail.com>
---
Changes in v2:
Sort includes and redate documentation
Correct licence
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