ot;, str,sys_errlist[errno]);
else
printf("/proc/self/exe in %s: OK\n", str);
return 0;
}
int main(){
pthread_t thread;
int retval=pthread_create( , NULL, thread_main, "thread");
if(retval!=0)
exit(1);
thread_main("main");
pthread_join(thread
);
exit(0);
}
Signed-off-by: Ben Woodard wood...@redhat.com
Signed-off-by: Mark Grondona mgrond...@llnl.gov
---
kernel/ptrace.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/kernel/ptrace.c b/kernel/ptrace.c
index acbd284..347c4c7 100644
--- a/kernel/ptrace.c
+++ b/kernel
We may need to go back and do some additional work on this. It doesn't
seem to be quite as cut and dried as we initially thought.
This quirk doesn't appear to work on virtually the same motherboard with
the barcelona processors in it. It also may be sensitive to the firmware
version. More
We may need to go back and do some additional work on this. It doesn't
seem to be quite as cut and dried as we initially thought.
This quirk doesn't appear to work on virtually the same motherboard with
the barcelona processors in it. It also may be sensitive to the firmware
version. More
Eric W. Biederman wrote:
Vivek Goyal <[EMAIL PROTECTED]> writes:
Ok. Got it. So in this case we route the interrupts directly through LAPIC
and put LVT0 in ExtInt mode and IOAPIC is bypassed.
I am looking at Intel Multiprocessor specification v1.4 and as per figure
3-3 on page 3-9, 8259 is
Vivek Goyal wrote:
On Wed, Nov 28, 2007 at 11:02:06AM -0500, Neil Horman wrote:
On Wed, Nov 28, 2007 at 10:36:49AM -0500, Vivek Goyal wrote:
On Tue, Nov 27, 2007 at 03:24:35PM -0800, Ben Woodard wrote:
Andi Kleen wrote:
Are we putting the system back in PIC mode or virtual wire mode? I have
Eric W. Biederman wrote:
Vivek Goyal [EMAIL PROTECTED] writes:
Ok. Got it. So in this case we route the interrupts directly through LAPIC
and put LVT0 in ExtInt mode and IOAPIC is bypassed.
I am looking at Intel Multiprocessor specification v1.4 and as per figure
3-3 on page 3-9, 8259 is
Vivek Goyal wrote:
On Wed, Nov 28, 2007 at 11:02:06AM -0500, Neil Horman wrote:
On Wed, Nov 28, 2007 at 10:36:49AM -0500, Vivek Goyal wrote:
On Tue, Nov 27, 2007 at 03:24:35PM -0800, Ben Woodard wrote:
Andi Kleen wrote:
Are we putting the system back in PIC mode or virtual wire mode? I have
Andi Kleen wrote:
Are we putting the system back in PIC mode or virtual wire mode? I have
not seen systems which support PIC mode. All latest systems seems
to be having virtual wire mode. I think in case of PIC mode, interrupts
Yes it's probably virtual wire. For real PIC mode we would need
Eric W. Biederman wrote:
Neil Horman <[EMAIL PROTECTED]> writes:
..TIMER: vector=0x31 apic1=0 pin1=2 apic2=-1 pin2=-1
Ben, what chipset is this?
nVidia MCP55 pro
It is the original version of
http://www.supermicro.com/Aplus/motherboard/Opteron8000/MCP55/H8QM8-2.cfm
i.e. not the -2.
Eric W. Biederman wrote:
Neil Horman <[EMAIL PROTECTED]> writes:
So, it sounds to me then, like unless I'm willing to really re-write the APIC
setup code (which I don't feel qualified to do quite yet), that the immediate
solution would be to not rely on interrupts in legacy mode, which was
Eric W. Biederman wrote:
Andi Kleen <[EMAIL PROTECTED]> writes:
his is any less reliable that what we have currently.
It doesn't make things more reliable, and it adds code to a code path
that already has to much code to be solid reliable (thus your
problem).
Putting the system back in PIC
Eric W. Biederman wrote:
Andi Kleen [EMAIL PROTECTED] writes:
his is any less reliable that what we have currently.
It doesn't make things more reliable, and it adds code to a code path
that already has to much code to be solid reliable (thus your
problem).
Putting the system back in PIC
Eric W. Biederman wrote:
Neil Horman [EMAIL PROTECTED] writes:
So, it sounds to me then, like unless I'm willing to really re-write the APIC
setup code (which I don't feel qualified to do quite yet), that the immediate
solution would be to not rely on interrupts in legacy mode, which was
Andi Kleen wrote:
Are we putting the system back in PIC mode or virtual wire mode? I have
not seen systems which support PIC mode. All latest systems seems
to be having virtual wire mode. I think in case of PIC mode, interrupts
Yes it's probably virtual wire. For real PIC mode we would need
Eric W. Biederman wrote:
Neil Horman [EMAIL PROTECTED] writes:
..TIMER: vector=0x31 apic1=0 pin1=2 apic2=-1 pin2=-1
Ben, what chipset is this?
nVidia MCP55 pro
It is the original version of
http://www.supermicro.com/Aplus/motherboard/Opteron8000/MCP55/H8QM8-2.cfm
i.e. not the -2.
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