On Tue 03 Sep 06:50 PDT 2019, Lee Jones wrote:
> When booting with ACPI, the Geni Serial Engine is not set as the I2C/SPI
> parent and thus, the wrapper (parent device) is unassigned. This causes
> the kernel to crash with a null dereference error.
>
Now I see what you did in 8bc529b25354;
On Tue 03 Sep 14:45 PDT 2019, Stephen Boyd wrote:
> Quoting Jack Pham (2019-09-03 10:39:24)
> > On Mon, Sep 02, 2019 at 08:23:04AM +0200, Jorge Ramirez wrote:
> > > On 8/30/19 20:28, Stephen Boyd wrote:
> > > > Quoting Bjorn Andersson (2019-08-30 09:45:20)
> &g
On Mon 02 Sep 06:24 PDT 2019, Lee Jones wrote:
> From: Bjorn Andersson
>
> The Lenovo Yoga C630 is built on the SDM850 from Qualcomm, but this seem
> to be similar enough to the SDM845 that we can reuse the sdm845.dtsi.
>
> Supported by this patch is: keyboard, battery monit
On Mon 02 Sep 06:07 PDT 2019, Lee Jones wrote:
> Tested on the Lenovo Yoga C630 where this patch enables USB.
> Without it USB devices are not enumerated.
>
> Signed-off-by: Lee Jones
Reviewed-by: Bjorn Andersson
> ---
> arch/arm64/configs/defconfig | 1 +
> 1 file
On Mon 02 Sep 06:07 PDT 2019, Lee Jones wrote:
> Tested on the Lenovo Yoga C630 where this patch enables the
> framebuffer (screen/monitor). Without it the device appears
> not to boot.
>
> Signed-off-by: Lee Jones
Reviewed-by: Bjorn Andersson
> ---
> arch/arm64/
On Mon 02 Sep 06:07 PDT 2019, Lee Jones wrote:
> Tested on the Lenovo Yoga C630 where this patch enables the
> keyboard, touchpad and touchscreen.
>
> Signed-off-by: Lee Jones
Reviewed-by: Bjorn Andersson
> ---
> arch/arm64/configs/defconfig | 1 +
> 1 file changed, 1 i
On Fri 30 Aug 09:01 PDT 2019, Stephen Boyd wrote:
> Quoting Jorge Ramirez (2019-08-29 00:03:48)
> > On 2/23/19 17:52, Bjorn Andersson wrote:
> > > On Thu 07 Feb 03:17 PST 2019, Jorge Ramirez-Ortiz wrote:
> > >> +
> > >> +Required child nodes:
> &
On Thu 29 Aug 11:17 PDT 2019, Gustavo A. R. Silva wrote:
> One of the more common cases of allocation size calculations is finding
> the size of a structure that has a zero-sized array at the end, along
> with memory for some number of elements for that array. For example:
>
> struct {
>
-off-by: Bjorn Andersson
---
drivers/rpmsg/qcom_glink_smem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/rpmsg/qcom_glink_smem.c b/drivers/rpmsg/qcom_glink_smem.c
index 64a5ce324c7f..4238383d8685 100644
--- a/drivers/rpmsg/qcom_glink_smem.c
+++ b/drivers/rpmsg
tiz
Nice, I like this version.
Reviewed-by: Bjorn Andersson
> ---
> drivers/mailbox/qcom-apcs-ipc-mailbox.c | 8 ++--
> 1 file changed, 6 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/mailbox/qcom-apcs-ipc-mailbox.c
> b/drivers/mailbox/qcom-apcs-ipc-mailbox.c
>
-by: Bjorn Andersson
---
Changes since v3:
- Renamed device-reset-gpios to just reset-gpios.
- Explicitly bail on !host->device_reset, to not rely on passing NULL to
gpiod_set_value_cansleep()
.../devicetree/bindings/ufs/ufshcd-pltfrm.txt | 2 ++
drivers/scsi/ufs/ufs-qcom.c |
Specify the UFS device-reset gpio for db845c and mtp, so that the
controller will issue a reset of the UFS device.
Reviewed-by: Linus Walleij
Signed-off-by: Bjorn Andersson
---
Changes since v3:
- Renamed property
- Added property to db845c
arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 2
UIC_CMD_DME_END_PT_RST. I have not been successful in validating that this
works for me, so I'm postponing this effort and hoping we can add it
incrementally at a later time.
Bjorn Andersson (3):
scsi: ufs: Introduce vops for resetting device
scsi: ufs-qcom: Implement device_reset vops
arm64: dts
Some UFS memory devices needs their reset line toggled in order to get
them into a good state for initialization. Provide a new vops to allow
the platform driver to implement this operation.
Reviewed-by: Alim Akhtar
Signed-off-by: Bjorn Andersson
---
Changes since v3:
- None
drivers/scsi/ufs
On Tue 27 Aug 15:17 PDT 2019, Suman Anna wrote:
> On 8/27/19 5:15 PM, Suman Anna wrote:
> > On 8/27/19 5:07 PM, Bjorn Andersson wrote:
> >> On Tue 27 Aug 13:25 PDT 2019, Suman Anna wrote:
> >>
> >>> Hi Bjorn,
> >>>
> >>> On 8/27/19
On Tue 27 Aug 13:25 PDT 2019, Suman Anna wrote:
> Hi Bjorn,
>
> On 8/27/19 12:10 AM, Bjorn Andersson wrote:
> > On Fri 09 Aug 13:25 PDT 2019, Suman Anna wrote:
> >
> >> Hi Bjorn,
> >>
> >
> > Hi Suman
> >
> >> On 10/23/18
On Tue 27 Aug 08:48 PDT 2019, Enric Balletbo i Serra wrote:
> Recently we refactored the CrOS EC drivers moving part of the code from
> the MFD subsystem to the platform chrome subsystem. During this change
> we needed to rename some config options, so, update the defconfigs
> accordingly.
>
>
On Fri 09 Aug 13:25 PDT 2019, Suman Anna wrote:
> Hi Bjorn,
>
Hi Suman
> On 10/23/18 8:19 PM, Suman Anna wrote:
> > The virtio_rpmsg_bus driver uses the "%p" format-specifier for
> > printing the vring buffer address. This prints only a hashed
> > pointer even for previliged users. Use "%pK"
On Thu 22 Aug 23:52 PDT 2019, Linus Walleij wrote:
> On Tue, Aug 13, 2019 at 4:46 PM Jordan Crouse wrote:
>
> > Now that CONFIG_DRM_MSM is no longer default 'y' add it as a module to all
> > ARCH_QCOM enabled defconfigs to restore the previous expected build
> > behavior.
> >
> > Signed-off-by:
On Mon 26 Aug 10:31 PDT 2019, Vinod Koul wrote:
> Convert the rpmh clock driver to use the new parent data scheme by
> specifying the parent data for board clock.
>
> Signed-off-by: Vinod Koul
Reviewed-by: Bjorn Andersson
> ---
> drivers/clk/qcom/clk-rpmh.c | 10 --
are the same pointer. This will
> fix this problem and avoid the overhead for the "normal" case.
>
> Based on a patch by Bjorn Andersson.
>
> Fixes: da0f0b2c3ad2 ("clk: Correct lookup logic in clk_fetch_parent_index()")
> Cc: Bjorn Andersson
Thanks for writi
On Mon 29 Jul 11:31 PDT 2019, Paul Cercueil wrote:
> This driver is used to boot, communicate with and load firmwares to the
> MIPS co-processor found in the VPU hardware of the JZ47xx SoCs from
> Ingenic.
>
> Signed-off-by: Paul Cercueil
> ---
>
> Notes:
> v2: Remove exception for
On Tue 20 Aug 17:23 PDT 2019, Kishon Vijay Abraham I wrote:
> Hi Sasha,
>
> On 06/08/19 9:20 PM, Sasha Levin wrote:
> > Hi,
> >
> > [This is an automated email]
> >
> > This commit has been processed because it contains a "Fixes:" tag,
> > fixing commit: 885bd765963b phy: qcom-qmp: Correct
On Thu 22 Aug 10:01 PDT 2019, Vinod Koul wrote:
> Convert the rpmh clock driver to use the new parent data scheme by
> specifying the parent data for board clock.
>
> Signed-off-by: Vinod Koul
> ---
> drivers/clk/qcom/clk-rpmh.c | 10 --
> 1 file changed, 8 insertions(+), 2
On Wed 21 Aug 11:42 PDT 2019, Vinod Koul wrote:
> This series adds DTS for SM8150, PMIC PM8150, PM8150B, PM8150L and
> the MTP for SM8150.
>
Applied, with Amit's acks.
> Changes in v4:
> - Update the address and size cell to 2 and extend ranges and describe DMA
>space
> - Fix node
On Wed 07 Aug 00:09 PDT 2019, Sibi Sankar wrote:
> This patch series adds SCM, APSS shared mailbox and QMP AOSS PD/clock
> support on SM8150 and SC7180 SoCs.
>
> v2:
> * re-arrange the compatible lists in sort order
>
Applied patches 1-3 and 6-7.
Regards,
Bjorn
> Sibi Sankar (7):
> soc:
On Wed 07 Aug 00:09 PDT 2019, Sibi Sankar wrote:
> Add the corresponding APSS shared offset for SM8150 and SC7180 SoCs.
>
> Signed-off-by: Sibi Sankar
Reviewed-by: Bjorn Andersson
> ---
> drivers/mailbox/qcom-apcs-ipc-mailbox.c | 2 ++
> 1 file changed, 2 insertions(
void *data)
> {
> @@ -453,6 +479,7 @@ static int clk_rpmh_probe(struct platform_device *pdev)
>
> static const struct of_device_id clk_rpmh_match_table[] = {
> { .compatible = "qcom,sdm845-rpmh-clk", .data = _rpmh_sdm845},
> + { .compatible = "qcom,sm8150-rpmh-clk", .data = _rpmh_sm8150},
> { }
> };
> MODULE_DEVICE_TABLE(of, clk_rpmh_match_table);
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> --
> 2.20.1
>
On Mon 19 Aug 00:39 PDT 2019, Vinod Koul wrote:
> Document the SM8150 rpmh-clock compatible for rpmh clock controller
> found on SM8150 platforms.
>
> Signed-off-by: Vinod Koul
Reviewed-by: Bjorn Andersson
> ---
> Documentation/devicetree/bindings/clock/qcom,rpmh-clk.txt
On Mon 19 Aug 00:39 PDT 2019, Vinod Koul wrote:
> Convert the rpmh clock driver to use the new parent data scheme by
> specifying the parent data for board clock.
>
> Signed-off-by: Vinod Koul
> ---
> drivers/clk/qcom/clk-rpmh.c | 10 --
> 1 file changed, 8 insertions(+), 2
On Mon 19 Aug 00:39 PDT 2019, Vinod Koul wrote:
> With clock parent data scheme we must specify the parent clocks for the
> rpmhcc nodes. So describe the parent clock for rpmhcc in the bindings.
>
Reviewed-by: Bjorn Andersson
> Signed-off-by: Vinod Koul
> ---
> Docume
-off-by: Bjorn Andersson
---
drivers/rpmsg/qcom_glink_smem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/rpmsg/qcom_glink_smem.c b/drivers/rpmsg/qcom_glink_smem.c
index 64a5ce324c7f..4238383d8685 100644
--- a/drivers/rpmsg/qcom_glink_smem.c
+++ b/drivers/rpmsg
On Fri 26 Jul 06:48 PDT 2019, Mark Brown wrote:
> On Fri, Jul 26, 2019 at 05:18:01AM -0700, kernelci.org bot wrote:
>
> The past few versions of -next failed to boot on apq8096-db820c:
>
> > defconfig:
> > gcc-8:
> > apq8096-db820c: 1 failed lab
>
> with an RCU stall
On Sat 17 Aug 01:25 PDT 2019, Alex Dewar wrote:
> In pinctrl-spmi-gpio.c there is a switch case which is obviously
> intended to fall through to the next label. Add a comment to suppress
> -Wimplicit-fallthrough warning.
>
Thanks for your patch Alex, this was fixed in 6161dc03587b ("pinctrl:
On Wed 14 Aug 11:35 PDT 2019, Stephen Boyd wrote:
> Quoting Bjorn Andersson (2019-08-14 10:44:39)
> > On Wed 14 Aug 09:58 PDT 2019, Stephen Boyd wrote:
> >
> > > Quoting Vinod Koul (2019-08-14 05:49:51)
> > > > diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi
On Wed 14 Aug 05:50 PDT 2019, Vinod Koul wrote:
> Add the pon and adc nodes found in pm8150b PMIC.
>
> Signed-off-by: Vinod Koul
> ---
> arch/arm64/boot/dts/qcom/pm8150b.dtsi | 54 +++
> 1 file changed, 54 insertions(+)
>
> diff --git
On Wed 14 Aug 05:49 PDT 2019, Vinod Koul wrote:
> This add base DTS file for sm8150-mtp and enables
> boot to console
>
> Signed-off-by: Vinod Koul
Reviewed-by: Bjorn Andersson
> ---
> arch/arm64/boot/dts/qcom/Makefile | 1 +
> arch/arm64/boot/dts/qco
On Wed 14 Aug 05:49 PDT 2019, Vinod Koul wrote:
> diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> b/arch/arm64/boot/dts/qcom/sm8150.dtsi
[..]
> + soc: soc@0 {
> + #address-cells = <1>;
> + #size-cells = <1>;
> + ranges = <0 0 0 0x>;
I'm
On Wed 14 Aug 09:58 PDT 2019, Stephen Boyd wrote:
> Quoting Vinod Koul (2019-08-14 05:49:51)
> > diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi
> > b/arch/arm64/boot/dts/qcom/sm8150.dtsi
[..]
> > + clocks {
> > + xo_board: xo-board {
> > + compatible
locks must be marked as "protected" to prevent the clock code
from touching them.
Numerical values are used as the constants are not yet available in a
common tree.
Reported-by: Mark Brown
Reported-by: Niklas Cassel
Signed-off-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/qcs404-
On Fri 09 Aug 00:36 PDT 2019, Vinod Koul wrote:
> Add the PMIC5 modes and use them pmic5 ldo and smps
>
> Signed-off-by: Vinod Koul
Reviewed-by: Bjorn Andersson
> ---
> drivers/regulator/qcom-rpmh-regulator.c | 52 +
> 1 file changed, 45 insertio
On Fri 09 Aug 00:36 PDT 2019, Vinod Koul wrote:
> pmic5_bob voltages count is 136 [0,135] so update it
>
> Signed-off-by: Vinod Koul
Reviewed-by: Bjorn Andersson
> ---
> drivers/regulator/qcom-rpmh-regulator.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
&
On Fri 09 Aug 00:36 PDT 2019, Vinod Koul wrote:
> It helps to keep sorted order for compatibles, so sort them
>
> Suggested-by: Bjorn Andersson
> Signed-off-by: Vinod Koul
Reviewed-by: Bjorn Andersson
> ---
> drivers/regulator/qcom-rpmh-regulator.c | 20 ++--
On Fri 09 Aug 00:36 PDT 2019, Vinod Koul wrote:
> It helps to keep sorted order for compatibles and nodes, so sort them
>
> Suggested-by: Bjorn Andersson
> Signed-off-by: Vinod Koul
> ---
> .../regulator/qcom,rpmh-regulator.txt | 19 ++-
> 1 file c
On Thu 08 Aug 02:33 PDT 2019, Vinod Koul wrote:
> diff --git a/drivers/regulator/qcom-rpmh-regulator.c
> b/drivers/regulator/qcom-rpmh-regulator.c
[..]
> +static const struct rpmh_vreg_hw_data pmic5_bob = {
> + .regulator_type = VRM,
> + .ops = _regulator_vrm_bypass_ops,
> +
1 - smps4
> + PM8150: smps1 - smps10, ldo1 - ldo18
> + PM8150L:smps1 - smps8, ldo1 - ldo11, bob, flash, rgb
> + PM8009: smps1 - smps2, ld01 - ldo7
Please maintain the sort order.
Apart from that
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
>
> =
Use the sysmon_name as identifier and store the relocated base address
and size of the memory region in the PIL reloation info structure in
IMEM.
Signed-off-by: Bjorn Andersson
---
drivers/remoteproc/Kconfig | 1 +
drivers/remoteproc/qcom_q6v5_pas.c | 15 ---
2 files
Make the PAS and ADSP/CDSP remoteproc drivers implement the panic
handler that will invoke a stop to prepare the remoteprocs for post
mortem debugging.
Signed-off-by: Bjorn Andersson
---
drivers/remoteproc/qcom_q6v5_adsp.c | 8
drivers/remoteproc/qcom_q6v5_pas.c | 8
2 files
Add a simple-mfd representing IMEM on QCS404 and define the PIL
relocation info region, so that post mortem tools will be able to locate
the loaded remoteprocs.
Signed-off-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/qcs404.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git
Introduce a "panic" function in the remoteproc ops table, to allow
remoteproc instances to perform operations needed in order to aid in
post mortem system debugging, such as flushing caches etc, when the
kernel panics.
Signed-off-by: Bjorn Andersson
---
drivers/remoteproc/remoteproc_c
A region in IMEM is used to communicate load addresses of remoteproc to
post mortem debug tools. Implement a driver that can be used to store
this information in order to enable these tools to process collected
ramdumps.
Signed-off-by: Bjorn Andersson
---
drivers/remoteproc/Kconfig
Add a common panic handler that invokes a stop request and sleep enough
to let the remoteproc flush it's caches etc in order to aid post mortem
debugging.
Signed-off-by: Bjorn Andersson
---
drivers/remoteproc/qcom_q6v5.c | 19 +++
drivers/remoteproc/qcom_q6v5.h | 1 +
2 files
Store the relocated base address and size in the PIL relocation info
structure in IMEM.
Signed-off-by: Bjorn Andersson
---
drivers/remoteproc/Kconfig | 1 +
drivers/remoteproc/qcom_wcnss.c | 14 +++---
2 files changed, 12 insertions(+), 3 deletions(-)
diff --git a/drivers
Add a simple-mfd representing IMEM on SDM845 and define the PIL
relocation info region, so that post mortem tools will be able to locate
the loaded remoteprocs.
Signed-off-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git
on the
remoteprocs during a kernel panic, in order to trigger them to flush caches
etc.
Bjorn Andersson (9):
remoteproc: qcom: Introduce driver to store pil info in IMEM
remoteproc: qcom: mss: Update IMEM PIL info on load
remoteproc: qcom: pas: Update IMEM PIL info on load
remoteproc: qcom
As the MPSS address is calculated during load store it, and the size, in
the PIL info region structure in IMEM.
Signed-off-by: Bjorn Andersson
---
drivers/remoteproc/Kconfig | 1 +
drivers/remoteproc/qcom_q6v5_mss.c | 3 +++
2 files changed, 4 insertions(+)
diff --git a/drivers
Introduce fall through annotations in the switch statements of
socinfo_debugfs_init() to silence compiler warnings.
Fixes: 9c84c1e78634 ("soc: qcom: socinfo: Expose custom attributes")
Reported-by: Stephen Rothwell
Signed-off-by: Bjorn Andersson
---
drivers/soc/qcom/socinfo.c | 8 +
On Tue 06 Aug 18:50 PDT 2019, Stephen Rothwell wrote:
> Hi Bjorn,
>
> On Tue, 6 Aug 2019 18:24:57 -0700 Bjorn Andersson
> wrote:
> >
> >qcom_socinfo->dbg_root,
> >_socinfo->info.raw_device_n
Introduce fall through annotations in the switch statements of
socinfo_debugfs_init() to silence compiler warnings.
Fixes: 9c84c1e78634 ("soc: qcom: socinfo: Expose custom attributes")
Reported-by: Stephen Rothwell
Signed-off-by: Bjorn Andersson
---
drivers/soc/qcom/soci
On Fri 19 Jul 08:50 PDT 2019, Marc Gonzalez wrote:
> On 13/06/2019 11:10, Marc Gonzalez wrote:
>
> > Here are my observations for a 8998 board:
> >
> > 1) If I apply only the readl_poll_timeout() fix (not the mask_pcs_ready
> > fixup)
> > qcom_pcie_probe() fails with a timeout in phy_init.
> >
Cc: Evan Green
Cc: Niklas Cassel
Reported-by: Marc Gonzalez
Fixes: 885bd765963b ("phy: qcom-qmp: Correct READY_STATUS poll break condition")
Signed-off-by: Bjorn Andersson
---
drivers/phy/qualcomm/phy-qcom-qmp.c | 33 ++---
1 file changed, 16 insertions(+
On Sun 04 Aug 09:25 PDT 2019, Nishka Dasgupta wrote:
> Each iteration of for_each_available_child_of_node puts the previous
> node, but in the case of a goto from the middle of the loop, there is no
> put, thus causing a memory leak. Hence make the gotos within the loop
> first go to a new label
On Wed 12 Jun 00:15 PDT 2019, Vivek Gautam wrote:
> Indicate on MTP SDM845 that firmware implements handler to
> TLB invalidate erratum SCM call where SAFE sequence is toggled
> to achieve optimum performance on real-time clients, such as
> display and camera.
>
> Signed-off-by: Vivek Gautam
>
nctions]
> Signed-off-by: Rajendra Nayak
Reviewed-by: Bjorn Andersson
> ---
> .../bindings/pinctrl/qcom,sc7180-pinctrl.txt | 186 ++
> 1 file changed, 186 insertions(+)
> create mode 100644
> Documentation/devicetree/bindings/pinctrl/qcom,sc7180-pinctrl
_, _, _, _),
> + [6] = PINGROUP(6, NORTH, qup11, qup11, _, _, _, _, _, _, _), [7] =
> PINGROUP(7, NORTH, qup11, qup11, ddr_bist, _, _, _, _, _, _),
5 and 7 deserve to be on their own line :)
Apart from that:
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
t; -... }
> |
> ...
> -dev_err(...);
> )
> ...
> }
> //
>
> While we're here, remove braces on if statements that only have one
> statement (manually).
>
> Cc: Andy Gross
> Cc: Thierry Reding
> Cc: Bjorn Andersson
Reviewed-by: Bjorn Andersson
>
On Mon 29 Jul 05:06 PDT 2019, Sibi Sankar wrote:
> This patch series adds SCM, APSS shared mailbox and QMP AOSS PD/clock
> support on SM8150 and SC7180 SoCs.
>
Thanks Sibi, this looks good.
Could you please update the last 5 patches to ensure/maintain sort order
of the lists they affect.
On Fri 26 Jul 06:48 PDT 2019, Mark Brown wrote:
> On Fri, Jul 26, 2019 at 05:18:01AM -0700, kernelci.org bot wrote:
>
> The past few versions of -next failed to boot on apq8096-db820c:
>
> > defconfig:
> > gcc-8:
> > apq8096-db820c: 1 failed lab
>
> with an RCU stall
On Wed 24 Jul 04:16 PDT 2019, Marc Gonzalez wrote:
> On 22/07/2019 18:58, Jeffrey Hugo wrote:
>
> > DT nodes should be ordered by address, then node name, and finally label.
> > The msm8998 dtsi does not follow this, so clean it up by reordering the
> > nodes. While we are at it, extend the
On Mon 22 Jul 22:14 PDT 2019, Vinod Koul wrote:
> On 23-07-19, 10:38, Amit Kucheria wrote:
> > On Mon, Jul 22, 2019 at 6:06 PM Vinod Koul wrote:
> > >
> > > Unit name is supposed to be a number, using a macro with hex value is
> >
> > /s/name/address?
>
> Right, will fix.
>
> > > not
unregistered.
Signed-off-by: Bjorn Andersson
---
This resolves the issue seen where the DSI PLL (and it's provided clocks) is
being registered and unregistered multiple times due to probe deferral.
Marking it RFC because I don't fully understand the life of the clock yet.
drivers/clk/clk.c | 18
On Mon 22 Jul 17:04 PDT 2019, Stephen Boyd wrote:
> Quoting Bjorn Andersson (2019-07-22 16:27:19)
> > On Fri 17 May 14:09 PDT 2019, Stephen Boyd wrote:
> >
> > > There are some questionable coding styles in this function. It looks
> > > quite odd to deref a poin
On Fri 21 Jun 07:54 PDT 2019, Jeffrey Hugo wrote:
> This adds the initial DT for the Lenovo Miix 630 laptop. Supported
> functionality includes USB (host), microSD-card, keyboard, and trackpad.
>
> Signed-off-by: Jeffrey Hugo
Applied patch 3-5
Thanks,
Bjorn
> ---
>
the function and then overwriting it on success is not clear. It's
> better to use a local variable and the kernel macros to step through
> each bit set in a bitmask and clearly show where outputs are set.
>
> Cc: Ian Jackson
> Cc: Julien Grall
> Cc: Bjorn Andersson
> Cc: Avaneesh Kumar
On Thu 11 Jul 14:39 PDT 2019, Vaishali Thakkar wrote:
> This patchset adds SoC info driver which can provide information
> such as Chip ID, Chip family and serial number about Qualcomm SoCs
> to user space via sysfs. Furthermore, it allows userspace to get
> information about custom attributes
On Mon 22 Jul 02:30 PDT 2019, Christoph Hellwig wrote:
> On Mon, Jul 22, 2019 at 10:38:55AM +0200, Marc Gonzalez wrote:
> > > In file included from drivers/firmware/qcom_scm.c:12:0:
> > > ./include/linux/dma-mapping.h:636:21: note: expected ‘dma_addr_t * {aka
> > > long long unsigned int *}’ but
On Fri 19 Jul 13:32 PDT 2019, David Dai wrote:
> Add the DT nodes for each of the Network-On-Chip interconnect
> buses found on SDM845 based platform and redefine the rsc_hlos
> child node as a bcm-voter device to better represent the hardware.
>
> Signed-off-by: David Dai
> ---
>
ibed as RSCs(Resource State Coordinators).
>
> Signed-off-by: David Dai
I like this and we don't have any consumers in DT yet, so I think this
is good.
But we need a patch to the implementation as well, to have the
provider(s) registered with the new compatibles.
Reviewed-by: Bjorn Andersso
On Thu 18 Jul 16:56 PDT 2019, Benjamin LaHaise wrote:
> On Thu, Jul 18, 2019 at 04:43:52PM -0700, Bjorn Andersson wrote:
> > On Thu 18 Jul 16:17 PDT 2019, Al Viro wrote:
> >
> > > On Thu, Jul 18, 2019 at 04:10:54PM -0700, Bjorn Andersson wrote:
> > > > Impl
On Thu 18 Jul 16:17 PDT 2019, Al Viro wrote:
> On Thu, Jul 18, 2019 at 04:10:54PM -0700, Bjorn Andersson wrote:
> > Implement a wrapper for aio_read()/write() to allow async IO on files
> > not implementing the iter version of read/write, such as sysfs. This
> > mimics how
Implement a wrapper for aio_read()/write() to allow async IO on files
not implementing the iter version of read/write, such as sysfs. This
mimics how readv/writev uses non-iter ops in do_loop_readv_writev().
Signed-off-by: Bjorn Andersson
---
fs/aio.c | 52
On Thu 18 Jul 08:31 PDT 2019, Mathieu Poirier wrote:
> On Wed, 17 Jul 2019 at 23:47, Sai Prakash Ranjan
> wrote:
> >
> > Hi Mathieu,
> >
> > On 7/17/2019 10:30 PM, Mathieu Poirier wrote:
> > > On Fri, Jul 12, 2019 at 07:46:25PM +0530, Sai Prakash Ranjan wrote:
> > >> From: Vivek Gautam
> > >>
>
The following changes since commit a188339ca5a396acc588e5851ed7e19f66b0ebd9:
Linux 5.2-rc1 (2019-05-19 15:47:09 -0700)
are available in the Git repository at:
git://github.com/andersson/remoteproc tags/hwlock-v5.3
for you to fetch changes up to 360aa640a59f269b784848c0b2d6d462952750d9:
DSP. Initial
support for vendor specific resource table entries and support for
unprocessed Qualcomm firmware files.
Arnd Bergmann (1):
remoteproc: stm32: fix building without ARM SMCC
Bjorn Andersson (4):
dt-bindings
The following changes since commit a188339ca5a396acc588e5851ed7e19f66b0ebd9:
Linux 5.2-rc1 (2019-05-19 15:47:09 -0700)
are available in the Git repository at:
git://github.com/andersson/remoteproc tags/rpmsg-v5.3
for you to fetch changes up to 54119bc1110dab2fa389f45c73a0787b8e037e8b:
id this issue.
This has the side effect of us not notifying the dying remote processor
itself about its fate, which has been seen to block in certain resource
constraint scenarios.
Signed-off-by: Bjorn Andersson
---
drivers/remoteproc/qcom_common.c | 4 ++--
1 file changed, 2 insertions(+), 2 delet
On Mon 15 Jul 08:34 PDT 2019, Marc Gonzalez wrote:
[..]
> diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
> index c0990703ce54..5e85548357c0 100644
> --- a/drivers/clk/clk.c
> +++ b/drivers/clk/clk.c
> @@ -914,6 +914,18 @@ int clk_prepare(struct clk *clk)
> }
>
On Thu 27 Jun 06:34 PDT 2019, Sibi Sankar wrote:
> Add and export 'dev_pm_opp_set_bw' to set the bandwidth
> levels associated with an OPP for a given frequency.
>
While this looks quite reasonable I'm uncertain about the overall OPP
API.
With the profiling based (bwmon/llcc) approach we would
On Thu 11 Jul 04:03 PDT 2019, Vivek Gautam wrote:
> - Remove 'sdm845' from names, and use 'plat' instead.
> - Move SCT_ENTRY macro to header file.
> - Create a new config structure to asssign to of-match-data.
>
I interpret the intention of these two patches as that you want to add
some new
On Thu 11 Jul 04:03 PDT 2019, Vivek Gautam wrote:
> To avoid adding files for each future supported SoCs rename
> the file to a generic name - llcc-plat, so that llcc configuration
> tables for other SoCs can be added in the same driver.
>
We've had a generic LLCC Kconfig option and then a
On Tue 25 Jun 09:47 PDT 2019, Jorge Ramirez-Ortiz wrote:
> Limit the GPLL0_AO_OUT_MAIN operating frequency as per its hardware
> specifications.
>
> Co-developed-by: Niklas Cassel
> Signed-off-by: Niklas Cassel
> Signed-off-by: Jorge Ramirez-Ortiz
> Acked-by: Stephen Boyd
is with the opp
table. But unless you respin this
Reviewed-by: Bjorn Andersson
> ---
> arch/arm64/boot/dts/qcom/qcs404.dtsi | 12
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi
> b/arch/arm64/boot/dts/qcom/qcs404.dtsi
&
z-Ortiz
Reviewed-by: Bjorn Andersson
> ---
> arch/arm64/boot/dts/qcom/qcs404.dtsi | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi
> b/arch/arm64/boot/dts/qcom/qcs404.dtsi
> index 94471aa31979..9569686dbc41 100644
> --- a/arch/ar
On Tue 25 Jun 09:47 PDT 2019, Jorge Ramirez-Ortiz wrote:
> The high frequency pll is required on compatible Qualcomm SoCs to
> support the CPU frequency scaling feature.
>
Reviewed-by: Bjorn Andersson
> Co-developed-by: Niklas Cassel
> Signed-off-by: Niklas Cassel
> Si
On Tue 25 Jun 09:47 PDT 2019, Jorge Ramirez-Ortiz wrote:
> The high frequency pll functionality is required to enable CPU
> frequency scaling operation.
>
Reviewed-by: Bjorn Andersson
> Co-developed-by: Niklas Cassel
> Signed-off-by: Niklas Cassel
> Signed-off-by: J
On Tue 25 Jun 09:47 PDT 2019, Jorge Ramirez-Ortiz wrote:
> Add a CPU OPP table to qcs404
>
> Co-developed-by: Niklas Cassel
> Signed-off-by: Niklas Cassel
> Signed-off-by: Jorge Ramirez-Ortiz
Reviewed-by: Bjorn Andersson
> ---
> arch/arm64/boot/dts/
m8916 to access the parent clock names
> required by the driver operation using the device tree node.
>
> Signed-off-by: Jorge Ramirez-Ortiz
Reviewed-by: Bjorn Andersson
> ---
> arch/arm64/boot/dts/qcom/msm8916.dtsi | 3 ++-
> 1 file changed, 2 insertions(+), 1 deletion(-)
>
>
by: Jorge Ramirez-Ortiz
I can see that we have a real issue in the case where CPUfreq is not
enabled and hence there are no clients, according to Linux. And that I
don't know another way to guard against.
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> drivers/clk/qcom/hfpll.c | 7 +
rez-Ortiz
> Acked-by: Stephen Boyd
Reviewed-by: Bjorn Andersson
> ---
> drivers/clk/qcom/hfpll.c | 10 +-
> 1 file changed, 9 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/qcom/hfpll.c b/drivers/clk/qcom/hfpll.c
> index 87b7f46d27e0..0ffed0d41c50 100644
&
ckwards compatibility leave the previous value as default.
>
> Co-developed-by: Niklas Cassel
> Signed-off-by: Niklas Cassel
> Signed-off-by: Jorge Ramirez-Ortiz
The driver should be updated to use parent_data instead, but I consider
that's an independent change.
Reviewed-by: Bjorn
1401 - 1500 of 7307 matches
Mail list logo
