On Sat 12 Dec 14:48 CST 2020, Rishabh Bhatnagar wrote:
> Create an unbound high priority workqueue for recovery tasks.
This simply repeats $subject
> Recovery time is an important parameter for a subsystem and there
> might be situations where multiple subsystems crash around the same
> time.
gt;
> [0.519657] sysfs: cannot create duplicate filename
> '/bus/platform/devices/qcom-apcs-msm8916-clk'
> ...
> [0.661158] qcom_apcs_ipc b111000.mailbox: failed to register APCS clk
>
> Signed-off-by: Shawn Guo
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> --
On Fri 11 Dec 08:12 CST 2020, Shawn Guo wrote:
> On Fri, Dec 11, 2020 at 12:16 PM Bjorn Andersson
> wrote:
> >
> > On Mon 12 Oct 21:12 CDT 2020, Shawn Guo wrote:
> >
> > > On MSM8916, only one qcom-apcs-msm8916-clk device is needed, as there is
> > >
The following changes since commit 3650b228f83adda7e5ee532e2b90429c03f7b9ec:
Linux 5.10-rc1 (2020-10-25 15:14:11 -0700)
are available in the Git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/andersson/remoteproc.git
tags/hwlock-v5.11
for you to fetch changes up to
remoteproc: ti_k3: fix -Wcast-function-type warning
remoteproc: sysmon: fix shutdown_acked state
Bjorn Andersson (4):
remoteproc: sysmon: Ensure remote notification ordering
remoteproc: sysmon: Expose the shutdown result
remoteproc: qcom: q6v5: Query sysmon before gracefu
The following changes since commit 3650b228f83adda7e5ee532e2b90429c03f7b9ec:
Linux 5.10-rc1 (2020-10-25 15:14:11 -0700)
are available in the Git repository at:
https://git.kernel.org/pub/scm/linux/kernel/git/andersson/remoteproc.git
tags/rpmsg-v5.11
for you to fetch changes up to
On Tue 15 Dec 11:42 CST 2020, Bartosz Golaszewski wrote:
> On Tue, Dec 15, 2020 at 6:02 PM Bjorn Andersson
> wrote:
> >
> > Not all GPIO pins are exposed to the world and this is typically
> > described by not giving these lines particular names, commonly "" or
multiple such
pins will refuse to probe.
Fix this by treating "" and "NC" as "no name specified" in
gpio_name_to_desc()
Fixes: 2cd64ae98f35 ("gpiolib: Disallow identical line names in the same chip")
Signed-off-by: Bjorn Andersson
---
The introduction of 2
nges in v3:
> >> - moved test description to cover letter
> >> - changed name and symbols from sunxi to sun8i
> >> - improved driver description
> >> - further simplified driver
> >> - fully switched to devm_* and devm_add_action_* function
uot;actual_clock"
> field shouldn't include the multiplier that sdhci-msm needs
> internally.
>
> Signed-off-by: Douglas Anderson
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
>
> Changes in v4:
> - ("mmc: sdhci-msm: Actually set the actual clock") new f
On Mon 14 Dec 07:47 CST 2020, Zheng Yongjun wrote:
> The parameter of kfree function is NULL, so kfree code is useless, delete it.
>
> Signed-off-by: Zheng Yongjun
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> drivers/iommu/msm_iommu.c | 6 +-
> 1 file changed,
On Mon 12 Oct 21:12 CDT 2020, Shawn Guo wrote:
> On MSM8916, only one qcom-apcs-msm8916-clk device is needed, as there is
> only one APCS clock. However, on MSM8939 three APCS clocks need to be
> registered for cluster0 (little cores), cluster1 (big cores) and CCI
> (Cache Coherent
uggested-by: Peter Collingbourne
> Signed-off-by: Robert Foss
> Tested-by: John Stultz
This looks very similar to what I had in the early revisions of the
driver.
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> drivers/gpu/drm/bridge/lontium-lt9611.c | 8 +++-
> 1
7f@changeid
>
> Suggested-by: Stephen Boyd
> Signed-off-by: Douglas Anderson
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
>
> Changes in v3:
> - Proper printf format code.
>
> Changes in v2:
> - Store rate in unsigned long, not unsigned int.
> - Reu
> at 50 MHz max. As you can probably guess that doesn't work super
> well.
>
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> Signed-off-by: Douglas Anderson
> Fixes: 17269568f726 ("clk: qcom: Add Global Clock controller (GCC) driver for
> SC7180")
> ---
> Taniya:
upport this then older "high speed" cards can only run at
> 25 MHz or at half their normal speed. There doesn't seem to be any
> reason to skip this clock rate, so add it.
>
> Fixes: 17269568f726 ("clk: qcom: Add Global Clock controller (GCC) driver for
> SC7180")
&
> Reviewed-by: Linus Walleij
> Reviewed-by: Andy Shevchenko
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> Signed-off-by: Zhaoyu Liu
> ---
> Changelog:
> v2:
> - Fixed the same problem in all files in pinctrl subsystem.
> v1:
> - Remove the blank line in pinctrl_regis
On Wed 18 Nov 16:26 CST 2020, Mathieu Poirier wrote:
> On Mon, Nov 16, 2020 at 01:44:44PM -0800, Rishabh Bhatnagar wrote:
> > Add trace events to trace bootup/shutdown/recovery of remote
> > processors. These events are useful in analyzing the time
> > spent in each step in the life cycle and can
On Mon 16 Nov 15:44 CST 2020, Rishabh Bhatnagar wrote:
> Add trace events to the qcom_scm driver to trace pas calls.
> These events can help us analyze the time impact for each scm
> operation and can also serve as standard checkpoints in code.
>
> Signed-off-by: Rishabh Bhatnagar
> ---
>
On Mon 16 Nov 15:44 CST 2020, Rishabh Bhatnagar wrote:
> Add trace events to the mdt loader driver. These events
> can help us trace the region where we are loading the
> segments and the time it takes to initialize the image
> and setup the memory region.
>
> Signed-off-by: Rishabh Bhatnagar
>
On Mon 16 Nov 15:44 CST 2020, Rishabh Bhatnagar wrote:
> Add trace events to trace bootup/shutdown/recovery of remote
> processors. These events are useful in analyzing the time
> spent in each step in the life cycle and can be used for
> performace analysis. Also these serve as standard
On Sun 06 Dec 20:07 CST 2020, Peng Fan wrote:
> Hi Bjorn,
>
> > Subject: Re: [PATCH V3 1/7] remoteproc: elf: support platform specific
> > memory hook
> >
> > On Fri 04 Dec 01:40 CST 2020, Peng Fan (OSS) wrote:
> >
> > > From: Peng Fan
> > >
> > > To arm64, "dc zva, dst" is used in
On Tue 08 Dec 02:57 CST 2020, Vinod Koul wrote:
> Add device tree binding Documentation details for Qualcomm SM8350
> pinctrl driver.
>
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> Signed-off-by: Vinod Koul
> ---
>
> Changes since v1:
> - Fix pins pattern
igned-off-by: Vinod Koul
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
>
> Changes since v1:
> - remove reserved gpios
>
> Changes since v2:
> - Fix build error
>
> drivers/pinctrl/qcom/Kconfig |8 +
> drivers/pinctrl/qcom/Makefile |
On Wed 09 Dec 19:51 CST 2020, Shawn Guo wrote:
> On Mon, Dec 07, 2020 at 10:40:22PM -0600, Bjorn Andersson wrote:
> > The SN65DSI86 provides the ability to supply a PWM signal on GPIO 4,
> > with the primary purpose of controlling the backlight of the attached
> > panel.
On Tue 08 Dec 02:04 CST 2020, Uwe Kleine-K?nig wrote:
> Hello,
>
> On Mon, Dec 07, 2020 at 10:40:22PM -0600, Bjorn Andersson wrote:
> > The SN65DSI86 provides the ability to supply a PWM signal on GPIO 4,
> > with the primary purpose of controlling the backlight of the at
On Tue 08 Dec 17:52 CST 2020, Daniel Vetter wrote:
> On Tue, Dec 08, 2020 at 04:02:16PM -0600, Bjorn Andersson wrote:
> > On Tue 08 Dec 06:47 CST 2020, Thierry Reding wrote:
> >
> > > On Mon, Dec 07, 2020 at 10:44:46PM -0600, Bjorn Andersson wrote:
> > > &g
On Tue 08 Dec 06:47 CST 2020, Thierry Reding wrote:
> On Mon, Dec 07, 2020 at 10:44:46PM -0600, Bjorn Andersson wrote:
> > Some bridge chips, such as the TI SN65DSI86 DSI/eDP bridge, provides
> > means of generating a PWM signal for backlight control of the attached
> > pa
On Mon 07 Dec 23:48 CST 2020, Sam Ravnborg wrote:
> Hi Bjorn,
> On Mon, Dec 07, 2020 at 10:44:46PM -0600, Bjorn Andersson wrote:
> > Some bridge chips, such as the TI SN65DSI86 DSI/eDP bridge, provides
> > means of generating a PWM signal for backlight control of the
backlight result in the detachment of the camera
as well.
Signed-off-by: Bjorn Andersson
---
This depends on the implementation of the pwm_chip in the TI SN65DSI86 bridge
driver [1], but posting this for reference and testing of said patch. The patch
can further be improved by the inclusion
of the backlight as the panel is turned on or
off.
Signed-off-by: Bjorn Andersson
---
drivers/gpu/drm/drm_panel.c | 47 +++--
include/drm/drm_panel.h | 8 +++
2 files changed, 43 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/drm_panel.c b/drivers/gpu/drm
to Doug Anderson for suggestions related to the involved
math.
Signed-off-by: Bjorn Andersson
---
drivers/gpu/drm/bridge/ti-sn65dsi86.c | 202 ++
1 file changed, 202 insertions(+)
diff --git a/drivers/gpu/drm/bridge/ti-sn65dsi86.c
b/drivers/gpu/drm/bridge/ti-sn65dsi86.c
index
On Mon, Dec 7, 2020 at 2:00 PM Evan Green wrote:
>
> On Sat, Nov 21, 2020 at 9:43 PM Bjorn Andersson
> wrote:
> >
> > A graceful shutdown of the Qualcomm remote processors where
> > traditionally performed by invoking a shared memory state signal and
> &g
660_match_table);
> +
> +static int gpucc_sdm660_probe(struct platform_device *pdev)
> +{
> + struct regmap *regmap;
> + struct alpha_pll_config gpu_pll_config = {
> + .config_ctl_val = 0x4001055b,
> + .alpha = 0xab00,
> +
On Sat 26 Sep 08:03 CDT 2020, khol...@gmail.com wrote:
> From: AngeloGioacchino Del Regno
>
> Add device tree bindings for graphics clock controller for
> Qualcomm Technology Inc's SDM630 and SDM660 SoCs.
> ---
> .../bindings/clock/qcom,sdm660-gpucc.yaml | 75 +++
> 1 file
On Sat 26 Sep 08:03 CDT 2020, khol...@gmail.com wrote:
> From: AngeloGioacchino Del Regno
>
> It is required for optimal performance and to avoid MDP stalls to
> retain mem/periph on GDSC enablement: to achieve this, let's add
> the required CXC to the MDSS GDSC.
>
Can you please explain how
On Sat 26 Sep 08:03 CDT 2020, khol...@gmail.com wrote:
> diff --git a/drivers/clk/qcom/mmcc-sdm660.c b/drivers/clk/qcom/mmcc-sdm660.c
[..]
> +static int mmcc_660_probe(struct platform_device *pdev)
> +{
> + struct regmap *regmap;
> + bool is_sdm630 = 0;
This shouldn't be 0, but there's no
On Fri 04 Dec 01:40 CST 2020, Peng Fan (OSS) wrote:
> From: Peng Fan
>
> Use virtio/mailbox to build connection between Remote Proccessors
> and Linux. Add work queue to handle incoming messages.
>
> Reviewed-by: Richard Zhu
> Signed-off-by: Peng Fan
> ---
> drivers/remoteproc/imx_rproc.c |
On Fri 04 Dec 01:40 CST 2020, Peng Fan (OSS) wrote:
> From: Peng Fan
>
> It is using devm_ioremap, so not devm_ioremap_resource. Correct
> the error message and print out sa/size.
>
> Acked-by: Richard Zhu
> Reviewed-by: Mathieu Poirier
> Signed-off-by: Peng Fan
> ---
>
On Fri 04 Dec 01:40 CST 2020, Peng Fan (OSS) wrote:
> From: Peng Fan
>
> To arm64, "dc zva, dst" is used in memset.
> Per ARM DDI 0487A.j, chapter C5.3.8 DC ZVA, Data Cache Zero by VA,
>
> "If the memory region being zeroed is any type of Device memory,
> this instruction can give an
interconnect RPMh
> support")
> Signed-off-by: Arnd Bergmann
Your patch looks correct to me, so:
Reviewed-by: Bjorn Andersson
But we're going to have to sprinkle a handful of these throughout the
tree and we're not a lot of people who "understand" what it does (and at
leas
SoundWire Bus.
>
> Signed-off-by: Srinivas Kandagatla
Let's try again, this time with Linus in Cc :)
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> drivers/pinctrl/qcom/Kconfig | 8 +
> drivers/pinctrl/qcom/Makefile| 1 +
> drivers/pinctrl/qcom/p
On Thu 03 Dec 01:02 CST 2020, Vinod Koul wrote:
> diff --git a/drivers/clk/qcom/gcc-sm8350.c b/drivers/clk/qcom/gcc-sm8350.c
[..]
> +static int gcc_sm8350_probe(struct platform_device *pdev)
> +{
> + struct regmap *regmap;
> + int ret;
> +
> + regmap = qcom_cc_map(pdev, _sm8350_desc);
On Thu 03 Dec 01:02 CST 2020, Vinod Koul wrote:
> Add bindings and update documentation for clock rpmh driver on SM8350.
>
> Signed-off-by: Vinod Koul
Reviewed-by: Bjorn Andersson
> ---
> Documentation/devicetree/bindings/clock/qcom,rpmhcc.yaml | 1 +
> 1 file ch
On Thu 03 Dec 01:02 CST 2020, Vinod Koul wrote:
> This adds the RPMH clocks present in SM8350 SoC
>
> Signed-off-by: Vinod Koul
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> drivers/clk/qcom/clk-rpmh.c | 34 +++
> include/dt-b
On Thu 03 Dec 01:09 CST 2020, Vinod Koul wrote:
> diff --git a/drivers/pinctrl/qcom/pinctrl-sm8350.c
> b/drivers/pinctrl/qcom/pinctrl-sm8350.c
[..]
> +static const int sm8350_reserved_gpios[] = {
> + 52, 53, 54, 55, 56, 57, 58, 59, -1
> +};
Reserving these gpios here instead of in the DT
On Thu 03 Dec 01:08 CST 2020, Vinod Koul wrote:
> Add device tree binding Documentation details for Qualcomm SM8350
> pinctrl driver.
>
> Signed-off-by: Vinod Koul
> ---
> .../pinctrl/qcom,sdm8350-pinctrl.yaml | 151 ++
> 1 file changed, 151 insertions(+)
> create mode
On Thu 03 Dec 01:12 CST 2020, Vinod Koul wrote:
> Add support from RPMH regulators found in PM8350 and PM8350c PMICs
>
Reviewed-by: Bjorn Andersson
> Signed-off-by: Vinod Koul
> ---
> drivers/regulator/qcom-rpmh-regulator.c | 62 +
> 1 file chan
On Thu 03 Dec 01:12 CST 2020, Vinod Koul wrote:
> Add PM8350 and PM8350C compatibles for these PMICs found in some
> Qualcomm platforms.
>
Reviewed-by: Bjorn Andersson
> Signed-off-by: Vinod Koul
> ---
> .../devicetree/bindings/regulator/qcom,rpmh-regulator.txt
;soc: qcom: ipa: GSI transactions")
> Reported-by: Stephen Boyd
> Tested-by: Sujit Kautkar
> Signed-off-by: Alex Elder
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> drivers/net/ipa/gsi_trans.c | 7 ++-
> 1 file changed, 6 insertions(+), 1 deletion(-)
>
> diff
SoundWire Bus.
>
> Signed-off-by: Srinivas Kandagatla
Reviewed-by: Bjorn Andersson
Regards,
Bjorn
> ---
> drivers/pinctrl/qcom/Kconfig | 8 +
> drivers/pinctrl/qcom/Makefile| 1 +
> drivers/pinctrl/qcom/pinctrl-lpass-lpi.c | 695 +++
On Wed 02 Dec 09:39 CST 2020, Wolfram Sang wrote:
>
> > >> -if (!of_machine_is_compatible("lenovo,yoga-c630"))
> > >> +if (!of_machine_is_compatible("lenovo,yoga-c630") &&
> > >> +!of_machine_is_compatible("oneplus,oneplus6"))
> > > This hack seems to have been
On Tue 01 Dec 13:29 CST 2020, Jakub Kicinski wrote:
> On Fri, 27 Nov 2020 19:26:02 -0800 Hemant Kumar wrote:
> > This patch series adds support for UCI driver. UCI driver enables userspace
> > clients to communicate to external MHI devices like modem and WLAN. UCI
> > driver
> > probe creates
On Mon 30 Nov 20:59 CST 2020, Zijun Hu wrote:
> From: Tim Jiang
>
> we define many nvm files for wcn6855 btsoc and host driver
> should find the correct nvm file based on board ID and then
> download it.
>
> Signed-off-by: Tim Jiang
> ---
> drivers/bluetooth/btusb.c | 17 ++---
>
On Mon 30 Nov 22:25 CST 2020, Vinod Koul wrote:
> gpi_dma0 can be used for spi and i2c transfers on db845c, so enable it
>
> Signed-off-by: Vinod Koul
> ---
> arch/arm64/boot/dts/qcom/sdm845-db845c.dts | 4
> 1 file changed, 4 insertions(+)
>
> diff --git
On Tue 01 Dec 08:28 CST 2020, Srinivas Kandagatla wrote:
> Add initial pinctrl driver to support pin configuration for
> LPASS (Low Power Audio SubSystem) LPI (Low Power Island) pinctrl
> on SM8250.
>
> This IP is an additional pin control block for Audio Pins on top the
> existing SoC Top level
On Tue 01 Dec 09:37 CST 2020, Srinivas Kandagatla wrote:
> This patch add support for two WSA881X smart speakers attached via Soundwire
> and a DMIC0 on the main board.
>
> Signed-off-by: Srinivas Kandagatla
> ---
> arch/arm64/boot/dts/qcom/qrb5165-rb5.dts | 125 +++
> 1
On Tue 01 Dec 09:37 CST 2020, Srinivas Kandagatla wrote:
> Add apr node and its associated services required for audio on RB5.
>
> Signed-off-by: Srinivas Kandagatla
> ---
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 56
> 1 file changed, 56 insertions(+)
>
> diff
On Tue 01 Dec 09:37 CST 2020, Srinivas Kandagatla wrote:
> Add primary and tertinary mi2s pinconfs required to get I2S audio.
>
> Signed-off-by: Srinivas Kandagatla
> ---
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 98
> 1 file changed, 98 insertions(+)
>
> diff
On Tue 01 Dec 09:37 CST 2020, Srinivas Kandagatla wrote:
> Add LPASS LPI pinctrl node required for Audio functionality on RB5.
>
> Signed-off-by: Srinivas Kandagatla
> ---
> arch/arm64/boot/dts/qcom/sm8250.dtsi | 95
> 1 file changed, 95 insertions(+)
>
> diff
On Tue 01 Dec 08:28 CST 2020, Srinivas Kandagatla wrote:
> Add device tree binding Documentation details for Qualcomm SM8250
> LPASS(Low Power Audio Sub System) LPI(Low Power Island) pinctrl driver.
>
> Signed-off-by: Srinivas Kandagatla
> Reviewed-by: Rob Herring
Reviewed-by:
On Tue 01 Dec 04:01 CST 2020, Srinivas Kandagatla wrote:
> Many thanks for review Bjorn,
>
>
> On 01/12/2020 00:47, Bjorn Andersson wrote:
> > On Mon 16 Nov 08:34 CST 2020, Srinivas Kandagatla wrote:
> >
> > > Add initial pinctrl driver to support pin configu
On Mon 30 Nov 23:35 CST 2020, Vinod Koul wrote:
> Add the compatible string for SM8250 SoC from Qualcomm. This compatible
> is used already in DTS files but not documented yet
>
> Signed-off-by: Vinod Koul
Reviewed-by: Bjorn Andersson
Although it doesn't matter much until this i
On Mon 30 Nov 21:19 CST 2020, Asutosh Das (asd) wrote:
> On 11/30/2020 6:53 PM, Bjorn Andersson wrote:
> > On Mon 30 Nov 17:54 CST 2020, Asutosh Das (asd) wrote:
> >
> > > On 11/30/2020 3:14 PM, Bjorn Andersson wrote:
> > > > On Mon 30 Nov 16:
On Mon 30 Nov 00:39 CST 2020, Vinod Koul wrote:
> This add the device node for gpi_dma0 and gpi_dma1 instances found in
> sdm845.
>
> Signed-off-by: Vinod Koul
> ---
> arch/arm64/boot/dts/qcom/sdm845.dtsi | 45
> 1 file changed, 45 insertions(+)
>
> diff --git
On Mon 30 Nov 17:54 CST 2020, Asutosh Das (asd) wrote:
> On 11/30/2020 3:14 PM, Bjorn Andersson wrote:
> > On Mon 30 Nov 16:51 CST 2020, Asutosh Das (asd) wrote:
> >
> > > On 11/30/2020 1:16 AM, Stanley Chu wrote:
> > > > UFS specficication allows differen
On Mon 16 Nov 08:34 CST 2020, Srinivas Kandagatla wrote:
> Add device tree binding Documentation details for Qualcomm SM8250
> LPASS(Low Power Audio Sub System) LPI(Low Power Island) pinctrl driver.
>
> Signed-off-by: Srinivas Kandagatla
> ---
> .../pinctrl/qcom,lpass-lpi-pinctrl.yaml |
On Mon 16 Nov 08:34 CST 2020, Srinivas Kandagatla wrote:
> Add initial pinctrl driver to support pin configuration for
> LPASS (Low Power Audio SubSystem) LPI (Low Power Island) pinctrl
> on SM8250.
>
> This IP is an additional pin control block for Audio Pins on top the
> existing SoC Top level
d takes over
> control.
>
> Do so using the WDOG_HW_RUNNING flag that exists for exactly
> that use-case.
>
> Signed-off-by: Robert Marko
> Cc: Luka Perkov
Reviewed-by: Bjorn Andersson
> ---
> Changes in v4:
> * Use QCOM_WDT_ENABLE macro
>
> Changes in
On Mon 30 Nov 16:51 CST 2020, Asutosh Das (asd) wrote:
> On 11/30/2020 1:16 AM, Stanley Chu wrote:
> > UFS specficication allows different VCC configurations for UFS devices,
> > for example,
> > (1). 2.70V - 3.60V (By default)
> > (2). 1.70V - 1.95V (Activated if "vcc-supply-1p8" is
Please help review this and feel
> free to feedback any ideas. Once this concept is accepted, and then
> I would post a more completed patch series to fix this issue.
>
> Signed-off-by: Stanley Chu
Reviewed-by: Bjorn Andersson
This is the correct thing to do and I would prefer that we did the s
The "pins" property takes an array of pin _names_, not pin numbers. Fix
this.
Fixes: 44acee207844 ("arm64: dts: qcom: Add Lenovo Yoga C630")
Signed-off-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts | 8
1 file changed, 4 insert
comparison with the ACPI
tables.
Fixes: 44acee207844 ("arm64: dts: qcom: Add Lenovo Yoga C630")
Signed-off-by: Bjorn Andersson
---
.../boot/dts/qcom/sdm850-lenovo-yoga-c630.dts | 31 +++
1 file changed, 18 insertions(+), 13 deletions(-)
diff --git a/arch/arm64/boot/dts/q
On Mon 30 Nov 04:34 CST 2020, Stanimir Varbanov wrote:
> Bjorn, could you take this for v5.11.
>
I did apply it a few weeks back, but seems I forgot to reply (and it was
before I asked patchwork-bot to do so for me).
Regards,
Bjorn
> On 11/2/20 2:07 PM, Georgi Djakov wrote:
> > Hi Stan,
> >
On Wed 30 Sep 01:42 CDT 2020, Srinivasa Rao Mandadapu wrote:
> These patches are device tree changes to support audio over DP.
> It includes changes of HDMI reg, interrupt and iommu and
> hdmi dai link.
> These patches depends on the lpass I2S patch series
> and DP dts node patch series:
> --
On Fri 18 Sep 09:51 CDT 2020, Srinivasa Rao Mandadapu wrote:
> From: Ajit Pandey
>
> Add dai link for supporting lpass I2S driver, which is used
> for audio capture and playback.
> Add lpass-cpu node with pin controls and i2s primary
> and secondary dai-links
>
> Signed-off-by: Srinivasa Rao
The lack of TMPFS Posix ACL prevents the upstream defconfig from booting
e.g. Ubuntu, so enable this.
Signed-off-by: Bjorn Andersson
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index
The Lenovo Yoga C630 relies on HID multitouch support for proper
touchpad operation, so enable this.
Signed-off-by: Bjorn Andersson
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/configs/defconfig b/arch/arm64/configs/defconfig
index 8e3ed05b655a
The Lenovo Yoga C630 drives the Boe NV133FHM-N61 eDP display from DSI
using a TI SN65DSI86 bridge chip on I2C 10. Define the bridge and eDP
panel and enable the display blocks.
Signed-off-by: Bjorn Andersson
---
.../boot/dts/qcom/sdm850-lenovo-yoga-c630.dts | 100 ++
1 file
ake the same change for the SC7180 platform.
>
> See also:
>
> https://lore.kernel.org/linux-arm-msm/20201123052305.157686-1-bjorn.anders...@linaro.org/
>
Reviewed-by: Bjorn Andersson
> Fixes: d82fade846aa8 ("arm64: dts: qcom: sc7180: add IPA information")
> Sig
On Thu 26 Nov 02:31 CST 2020, Maulik Shah wrote:
> Use __fill_rpmh_msg API during rpmh_write(). This allows to
> remove duplication of code in error checking, copying commands
> and setting message state.
>
Reviewed-by: Bjorn Andersson
> Signed-off-by: Maulik Shah
> ---
&
On Thu 26 Nov 03:21 CST 2020, Vinod Koul wrote:
> PM55 pmic support gpio controller so add compatible and comment for gpio
> holes
>
> Signed-off-by: Vinod Koul
Reviewed-by: Bjorn Andersson
> ---
> drivers/pinctrl/qcom/pinctrl-spmi-gpio.c | 2 ++
> 1 file changed, 2 in
On Thu 26 Nov 03:30 CST 2020, Vinod Koul wrote:
> Add support from RPMH regulators found in SDX55 platform
>
> Signed-off-by: Vinod Koul
Acked-by: Bjorn Andersson
> ---
> drivers/regulator/qcom-rpmh-regulator.c | 31 +
> 1 file changed, 31 inser
On Thu 26 Nov 03:21 CST 2020, Vinod Koul wrote:
> Add support for the PMX55 GPIO support to the Qualcomm PMIC GPIO
> binding.
>
> Signed-off-by: Vinod Koul
Reviewed-by: Bjorn Andersson
> ---
> Documentation/devicetree/bindings/pinctrl/qcom,pmic-gpio.txt | 3 +++
&g
On Thu 26 Nov 03:30 CST 2020, Vinod Koul wrote:
> Add PMX55 compatibles for PMIC found in SDX55 platform
>
> Signed-off-by: Vinod Koul
Reviewed-by: Bjorn Andersson
> ---
> .../devicetree/bindings/regulator/qcom,rpmh-regulator.txt | 2 ++
> 1 file changed, 2 inser
The LID state can be read from GPIO 124 and the "tablet mode" from GPIO
95, expose these to the system using gpio-keys and mark the falling edge
of the LID state as a wakeup-source - to wake the system from suspend.
Signed-off-by: Bjorn Andersson
---
.../boot/dts/qcom/sdm850-lenovo
river")
Signed-off-by: Bjorn Andersson
---
drivers/slimbus/qcom-ngd-ctrl.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/slimbus/qcom-ngd-ctrl.c b/drivers/slimbus/qcom-ngd-ctrl.c
index d8decb345e9d..c502e9e93965 100644
--- a/drivers/slimbus/qcom-ngd-ctrl.c
+++ b/drivers/slimbu
The PON block in the PMIC provides, among other things, support for
"reboot reason", power key and reset "key" handling. Let's enable the
driver for this block.
Signed-off-by: Bjorn Andersson
---
arch/arm64/configs/defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git
On Tue 24 Nov 13:18 CST 2020, Alex Elder wrote:
> On 11/22/20 11:23 PM, Bjorn Andersson wrote:
> > The Android and Windows firmware does not accept the use of 3 as a mask
> > to cover the IPA streams. But with 0x721 being related to WiFi and 0x723
> > being unsed the m
A combination of recent bug fixes by Doug Anderson and the proper
definition of iommu streams means that this hack is no longer needed.
Let's clean up the code by reverting '127068abe85b ("i2c: qcom-geni:
Disable DMA processing on the Lenovo Yoga C630")'.
Signed-off-by: Bjorn
Re-enable the apps_smmu now that the arm-smmu driver supports stream
mapping handoff from firmware.
Signed-off-by: Bjorn Andersson
---
arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630.dts | 5 -
1 file changed, 5 deletions(-)
diff --git a/arch/arm64/boot/dts/qcom/sdm850-lenovo-yoga-c630
On Tue 03 Nov 01:48 CST 2020, Amit Pundir wrote:
> Hi Rob, Bjorn, Kalle,
>
> On Thu, 29 Oct 2020 at 19:10, Bjorn Andersson
> wrote:
> >
> > On Tue 29 Sep 14:08 CDT 2020, Rob Herring wrote:
> >
> > > On Fri, Sep 25, 2020 at 11:59:41PM +0530, Amit Pundir wro
On Mon 23 Nov 04:28 CST 2020, Amit Pundir wrote:
> Workaround to get WiFi working on Xiaomi Poco F1 (sdm845)
> phone. We get a non-fatal QMI_ERR_MALFORMED_MSG_V01 error
> message in ath10k_qmi_host_cap_send_sync(), but we can still
> bring up WiFi services successfully on AOSP if we ignore it.
>
On Tue 24 Nov 11:04 CST 2020, Vinod Koul wrote:
> On 24-11-20, 10:39, Bjorn Andersson wrote:
> > On Tue 24 Nov 09:34 CST 2020, Vinod Koul wrote:
> >
> > > On 22-11-20, 23:21, Bjorn Andersson wrote:
> > > > Every now and then it's convenient to be able to inspe
On Tue 24 Nov 09:34 CST 2020, Vinod Koul wrote:
> On 22-11-20, 23:21, Bjorn Andersson wrote:
> > Every now and then it's convenient to be able to inspect the content of
> > SMEM items. Rather than carrying some hack locally let's upstream a
> > driver that when inser
nkar
Reviewed-by: Bjorn Andersson
I renamed "ptr" to "mba_region" throughout the patch and applied the
pair.
Thanks,
Bjorn
> ---
> drivers/remoteproc/qcom_q6v5_mss.c | 37 ++---
> 1 file changed, 22 insertions(+), 15 delet
scm-legacy.o: in function
> `scm_legacy_call_atomic':
> qcom_scm-legacy.c:(.text+0x2e0): undefined reference to `__arm_smccc_smc'
>
> Fixes: a871be6b8eee ("cpuidle: Convert Qualcomm SPM driver to a generic
> CPUidle driver")
> Signed-off-by: Randy Dunlap
> Repor
On Tue 24 Nov 08:00 CST 2020, Manivannan Sadhasivam wrote:
> Add basic devicetree support for SDX55 Modem and MTP board from
Again, let's call is "SDX55 platform".
> Qualcomm. The SDX55 modem features an ARM Cortex A7 CPU which forms the
> Application Processor Sub System (APSS) along with
On Tue 24 Nov 08:00 CST 2020, Manivannan Sadhasivam wrote:
> From: Vinod Koul
>
> Document the SDX55 Modem binding and also the boards using it.
It's not really the "SDX55 Modem", it's the "SDX55 platform". That way
things become less confusing when we actually add the modem on SDX55
later.
>
On Mon 23 Nov 12:17 CST 2020, Wilken Gottwalt wrote:
> On Sat, 21 Nov 2020 23:19:00 -0600
> Bjorn Andersson wrote:
> > > +static int hwlocks_inuse_show(struct seq_file *seqf, void *unused)
> > > +{
> > > + struct sunxi_hwspinlock_data *priv =
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