On Thu, Jan 14, 2021 at 08:33:57PM +0100, Andrey Konovalov wrote:
> As of the "arm64: expose FAR_EL1 tag bits in siginfo" patch, the address
> that is passed to report_tag_fault has pointer tags in the format of 0x0X,
> while KASAN uses 0xFX format (note the difference in the top 4 bits).
>
> Fix
On Fri, Jan 15, 2021 at 06:24:48AM +1100, Stephen Rothwell wrote:
> Hi all,
>
> Commit
>
> b5639879902a ("arm64: syscall: include prototype for EL0 SVC functions")
>
> is missing a Signed-off-by from its author.
Thanks Stephen. Fixed.
--
Catalin
On Thu, Jan 14, 2021 at 08:20:52AM +, Marc Zyngier wrote:
> On 2021-01-14 07:15, Srinivas Ramana wrote:
> > On 1/11/2021 5:40 AM, Marc Zyngier wrote:
> > > On 2021-01-09 00:29, Srinivas Ramana wrote:
> > > > This patchset adds a control function for cpufeature framework
> > > > so that the
On Thu, Jan 14, 2021 at 10:24:25AM +, Vincenzo Frascino wrote:
> On 1/13/21 6:11 PM, Catalin Marinas wrote:
> > On Thu, Jan 07, 2021 at 05:29:07PM +, Vincenzo Frascino wrote:
> >> static inline void mte_sync_tags(pte_t *ptep, pte_t pte)
> >> {
> >> }
ice.
>
> Signed-off-by: Johannes Berg
I think that's the simplest.
Acked-by: Catalin Marinas
> Perhaps instead it should go the other way around, and kmemleak
> could even use/access the stack trace that's already in there ...
> But I don't really care too much, I can just t
On Thu, Jan 07, 2021 at 05:29:07PM +, Vincenzo Frascino wrote:
> diff --git a/arch/arm64/include/asm/mte.h b/arch/arm64/include/asm/mte.h
> index d02aff9f493d..a60d3718baae 100644
> --- a/arch/arm64/include/asm/mte.h
> +++ b/arch/arm64/include/asm/mte.h
> @@ -39,6 +39,7 @@ void
On Thu, Jan 07, 2021 at 05:29:06PM +, Vincenzo Frascino wrote:
> MTE provides an asynchronous mode for detecting tag exceptions. In
> particular instead of triggering a fault the arm64 core updates a
> register which is checked by the kernel at the first entry after the tag
> exception has
On Thu, Jan 07, 2021 at 05:29:05PM +, Vincenzo Frascino wrote:
> Architectures supported by KASAN HW can provide a light mode of
> execution. On an MTE enabled arm64 hw for example this can be identified
> with the asynch mode of execution. If an async exception occurs, the
> arm64 core
On Wed, Jan 13, 2021 at 05:03:30PM +0100, Andrey Konovalov wrote:
> As of the "arm64: expose FAR_EL1 tag bits in siginfo" patch, the address
> that is passed to report_tag_fault has pointer tags in the format of 0x0X,
> while KASAN uses 0xFX format (note the difference in the top 4 bits).
>
> Fix
On Tue, 12 Jan 2021 22:48:32 +, Will Deacon wrote:
> GCC versions >= 4.9 and < 5.1 have been shown to emit memory references
> beyond the stack pointer, resulting in memory corruption if an interrupt
> is taken after the stack pointer has been adjusted but before the
> reference has been
On Tue, 12 Jan 2021 09:58:13 +0800, Jianlin Lv wrote:
> S_FRAME_SIZE is the size of the pt_regs structure, no longer the size of
> the kernel stack frame, the name is misleading. In keeping with arm32,
> rename S_FRAME_SIZE to PT_REGS_SIZE.
Applied to arm64 (for-next/fixes), thanks!
[1/1] arm64:
On Fri, 8 Jan 2021 10:19:56 +0100, Arnd Bergmann wrote:
> With UBSAN enabled and building with clang, there are occasionally
> warnings like
>
> WARNING: modpost: vmlinux.o(.text+0xc533ec): Section mismatch in reference
> from the function arch_atomic64_or() to the variable
>
On Tue, Jan 12, 2021 at 06:35:50PM -0800, Linus Torvalds wrote:
> On Tue, Jan 12, 2021 at 6:14 PM Linus Torvalds
> wrote:
> >
> > Ack. I'll assume I get this the usual ways from the arm64 tree..
>
> Oh.. Actually, while you can use my ack if you decide to go this way,
> I do wonder if it might
WNR_SHIFT) != 0;
I now noticed, you could write this in a shorter way:
is_write = !!(esr & ESR_ELx_WNR);
> kasan_report(addr, 0, is_write, regs->pc);
> }
The patch looks fine to me.
Reviewed-by: Catalin Marinas
Hi Marc,
On Mon, Jan 11, 2021 at 01:27:59PM +, Marc Zyngier wrote:
> Add a facility to globally override a feature, no matter what
> the HW says. Yes, this is dangerous.
Yeah, it's dangerous. We can make it less so if we only allow safe
values (e.g. lower if FTR_UNSIGNED).
> diff --git
On Mon, Jan 11, 2021 at 10:03:18AM -0800, Randy Dunlap wrote:
> On 1/11/21 9:57 AM, Vanshidhar Konda wrote:
> > On Mon, Jan 11, 2021 at 10:56:36AM +, Will Deacon wrote:
> >> On Sat, Jan 09, 2021 at 09:36:15PM -0800,
> >> vanshiko...@os.amperecomputing.com wrote:
> >>> From: Vanshidhar Konda
flags: link with "-z norelno", discard .eh_frame_hdr
instead of --no-eh-frame-hdr.
--------
Catalin Marinas (2):
arm64: kasan: Set TCR_EL1.TBID1 when KASAN_HW_TAGS is enabled
arm64: Move PSTATE.TCO setting to separate
On Mon, Dec 28, 2020 at 03:32:35PM +0800, chenzhou wrote:
> On 2020/12/26 18:34, Nicolas Saenz Julienne wrote:
> > On Sat, 2020-12-26 at 11:35 +0800, Chen Zhou wrote:
> >> If the memory reserved for crash dump kernel falled in ZONE_DMA32,
> >> the devices in crash dump kernel need to use ZONE_DMA
On Sat, Dec 26, 2020 at 11:34:58AM +0100, Nicolas Saenz Julienne wrote:
> On Sat, 2020-12-26 at 11:35 +0800, Chen Zhou wrote:
> > If the memory reserved for crash dump kernel falled in ZONE_DMA32,
> > the devices in crash dump kernel need to use ZONE_DMA will alloc fail.
> >
> > Fix this by
On Wed, Jan 06, 2021 at 03:07:24PM +, Ionela Voinescu wrote:
> On Friday 18 Dec 2020 at 10:44:10 (+), Catalin Marinas wrote:
> > On Fri, Dec 18, 2020 at 05:00:16AM +0800, kernel test robot wrote:
> > > tree:
> > > https://git.kernel.org/pub/scm/linux/kernel/gi
On Tue, Jan 05, 2021 at 06:03:14PM +, David Brazdil wrote:
> Commit 5089bc51f81f ("arm64/smp: Use irq_desc_kstat_cpu() in
> arch_show_interrupts()") removed the only user of variable `irq`.
> Remove the unused variable.
>
> Signed-off-by: David Brazdil
Please search the list for similar
On Thu, 17 Dec 2020 16:24:32 -0800, Nick Desaulniers wrote:
> With GNU binutils 2.35+, linking with BFD produces warnings for vmlinux:
> aarch64-linux-gnu-ld: warning: -z norelro ignored
>
> BFD can produce this warning when the target emulation mode does not
> support RELRO program headers, and
On Tue, Jan 05, 2021 at 05:22:21PM +0800, Keqian Zhu wrote:
> The local variable irq is added in commit a26388152531 ("arm64:
> Remove custom IRQ stat accounting"), but forget to remove in
> commit 5089bc51f81f ("arm64/smp: Use irq_desc_kstat_cpu() in
> arch_show_interrupts()"). Just remove it.
>
On Fri, 18 Dec 2020 17:33:07 +0100, Nicolas Saenz Julienne wrote:
> Systems configured with CONFIG_ZONE_DMA32, CONFIG_ZONE_NORMAL and
> !CONFIG_ZONE_DMA will fail to properly setup ARCH_LOW_ADDRESS_LIMIT. The
> limit will default to ~0ULL, effectively spanning the whole memory,
> which is too high
On Tue, 15 Dec 2020 11:30:26 +0100, Geert Uytterhoeven wrote:
> arch/arm64/kernel/smp.c: In function ‘arch_show_interrupts’:
> arch/arm64/kernel/smp.c:808:16: warning: unused variable ‘irq’
> [-Wunused-variable]
> 808 | unsigned int irq = irq_desc_get_irq(ipi_desc[i]);
> |
On Wed, Dec 30, 2020 at 04:45:04PM +0100, Arnd Bergmann wrote:
> From: Arnd Bergmann
>
> The only use of this variable was removed in a recent patch:
>
> arch/arm64/kernel/smp.c:810:16: error: unused variable 'irq'
> [-Werror,-Wunused-variable]
> unsigned int irq =
Hi Linus,
These are some some trivial updates that mostly fix/clean-up code pushed
during the merging window. I'll be on holiday until the new year but
I'll check email occasionally in case anything falls apart.
Merry Christmas!
The following changes since commit
On Fri, Dec 18, 2020 at 09:56:02AM +0530, Viresh Kumar wrote:
> On 17-12-20, 10:55, Catalin Marinas wrote:
> > Hi Viresh,
> >
> > On Thu, Dec 17, 2020 at 01:27:32PM +0530, Viresh Kumar wrote:
> > > On 15-12-20, 11:04, Viresh Kumar wrote:
> > > > Every tim
On Fri, Dec 18, 2020 at 05:00:16AM +0800, kernel test robot wrote:
> tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> master
> head: 74f602dc96dd854c7b2034947798c1e2a6b84066
> commit: 68c5debcc06d6d24f15dbf978780fc5efc147d5e arm64: implement CPPC FFH
> support using
On Fri, Dec 18, 2020 at 01:47:39PM +1100, Stephen Rothwell wrote:
> Today's linux-next merge of the kvm tree got a conflict in:
>
> arch/arm64/include/asm/kvm_asm.h
>
> between commit:
>
> 9fd339a45be5 ("arm64: Work around broken GCC 4.9 handling of "S"
> constraint")
>
> from the
On Thu, Dec 17, 2020 at 12:41:47AM +0800, Lecopzer Chen wrote:
> so there is two points
> 1. out-of-tree function can't be approved
> I totally agree with this :) so we may have a driver upstream in the
> future.
It may not be upstreamable if it relies on the old APM interface ;).
> 2. APM
On Thu, Dec 17, 2020 at 09:44:31AM +0100, Nicolas Saenz Julienne wrote:
> On Thu, 2020-12-17 at 16:08 +0800, Peng Fan (OSS) wrote:
> > From: Peng Fan
> >
> > ZONE_DMA should not be disabled, otherwise arm64_dma_phys_limit is
> > left uninitialized and cause swiotlb have IO TLB above 4GB which
>
Hi Viresh,
On Thu, Dec 17, 2020 at 01:27:32PM +0530, Viresh Kumar wrote:
> On 15-12-20, 11:04, Viresh Kumar wrote:
> > Every time I have stumbled upon this routine, I get confused with the
> > way 'have_policy' is used and I have to dig in to understand why is it
> > so. Here is an attempt to
On Wed, Dec 16, 2020 at 02:06:46PM -0800, Linus Torvalds wrote:
> On Wed, Dec 16, 2020 at 2:04 PM Mark Rutland wrote:
> > Unfortunately the merge resolution broke the build for arm64 -- could
> > you please apply the fixup below? IIUC that matches what we did in
> > linux-next, and builds fine
On Wed, Nov 25, 2020 at 07:41:30PM +0800, Lecopzer Chen wrote:
> >> In order to select CONFIG_APM_EMULATION, make SYS_SUPPORTS_APM_EMULATION
> >> default is y if ACPI isn't configured.
> >
> >I'm a bit confused why this should be enabled for !ACPI. Which DT
> >platforms need this, and how do they
On Tue, Dec 15, 2020 at 04:56:20PM +0100, Nicolas Saenz Julienne wrote:
> Soon to be released versions of RPi4's firmware will take of care
> passing their bootloader's configuration to the OS by copying it into
> memory and creating a reserved memory node in the board's DT. In order
> to make use
On Thu, 10 Dec 2020 11:17:40 +0530, Viresh Kumar wrote:
> The previous call to update_freq_counters_refs() has already updated the
> per-cpu variables, don't overwrite them with the same value again.
Applied to arm64 (for-next/fixes), thanks!
[1/1] arm64: topology: Drop the useless update to
On Fri, Dec 11, 2020 at 12:18:50PM +0530, Viresh Kumar wrote:
> On 10-12-20, 11:17, Viresh Kumar wrote:
> > The previous call to update_freq_counters_refs() has already updated the
> > per-cpu variables, don't overwrite them with the same value again.
> >
> > Fixes: 4b9cf23c179a ("arm64: wrap and
On Mon, Dec 14, 2020 at 04:29:37PM -0800, Linus Torvalds wrote:
> On Mon, Dec 14, 2020 at 10:29 AM Catalin Marinas
> wrote:
> >
> > 114 files changed, 2392 insertions(+), 1401 deletions(-)
>
> My diffstat looked quite different, but that turns out to be because
> yo
arm64: omit [_text, _stext) from permanent kernel mapping
arm64/head: avoid symbol names pointing into first 64 KB of kernel image
arm64: head: tidy up the Image header definition
arm64: mm: Set ZONE_DMA size based on early IORT scan
Catalin Marinas (9):
arm64: Igno
On Mon, Dec 14, 2020 at 03:12:34PM +0800, kernel test robot wrote:
> tree: https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git
> master
> head: 2c85ebc57b3e1817b6ce1a6b703928e113a90442
> commit: ed3768db588291ddb5dc794daed12cc751373566 arm64: entry: convert
> el1_sync to C
>
On Mon, Dec 07, 2020 at 08:03:38PM +, Szabolcs Nagy wrote:
> The 12/03/2020 17:30, Catalin Marinas wrote:
> > On Fri, Nov 27, 2020 at 01:19:16PM +, Szabolcs Nagy wrote:
> > > This is v2 of
> > > https://sourceware.org/pipermail/libc-alpha/2020-November/119305.
On Wed, Dec 09, 2020 at 12:27:59PM -0600, Richard Henderson wrote:
> On 12/9/20 9:27 AM, Catalin Marinas wrote:
> > On Wed, Dec 09, 2020 at 01:25:18PM +, Marc Zyngier wrote:
> >> Would this syscall operate on the guest address space? Or on the VMM's
> >> own
On Wed, Dec 09, 2020 at 04:39:50PM +, Will Deacon wrote:
> diff --git a/arch/arm64/include/asm/cpufeature.h
> b/arch/arm64/include/asm/cpufeature.h
> index da250e4741bd..3424f5881390 100644
> --- a/arch/arm64/include/asm/cpufeature.h
> +++ b/arch/arm64/include/asm/cpufeature.h
> @@ -764,6
On Wed, Dec 09, 2020 at 01:25:18PM +, Marc Zyngier wrote:
> On 2020-12-09 12:44, Catalin Marinas wrote:
> > On Tue, Dec 08, 2020 at 06:21:12PM +, Marc Zyngier wrote:
> > > On 2020-12-08 17:21, Catalin Marinas wrote:
> > > > On Mon, Dec 07, 2020 at 07:03:
On Tue, Dec 08, 2020 at 06:21:12PM +, Marc Zyngier wrote:
> On 2020-12-08 17:21, Catalin Marinas wrote:
> > On Mon, Dec 07, 2020 at 07:03:13PM +, Marc Zyngier wrote:
> > > I wonder whether we will have to have something kernel side to
> > > dump/reload
On Mon, Dec 07, 2020 at 07:03:13PM +, Marc Zyngier wrote:
> On Mon, 07 Dec 2020 16:34:05 +,
> Catalin Marinas wrote:
> > On Mon, Dec 07, 2020 at 04:05:55PM +, Marc Zyngier wrote:
> > > What I'd really like to see is a description of how shared memory
> >
On Fri, Dec 04, 2020 at 09:59:10AM +, Will Deacon wrote:
> On Thu, Dec 03, 2020 at 11:32:11PM +0100, Arnd Bergmann wrote:
> > From: Arnd Bergmann
> >
> > The __system_matches_cap() function is now only used in an #ifdef
> > section:
> >
> > arch/arm64/kernel/cpufeature.c:2649:13: error:
On Mon, Dec 07, 2020 at 04:05:55PM +, Marc Zyngier wrote:
> On 2020-12-07 15:45, Steven Price wrote:
> > On 07/12/2020 15:27, Peter Maydell wrote:
> > > On Mon, 7 Dec 2020 at 14:48, Steven Price
> > > wrote:
> > > > Sounds like you are making good progress - thanks for the
> > > > update.
Hi Szabolcs,
On Fri, Nov 27, 2020 at 01:19:16PM +, Szabolcs Nagy wrote:
> This is v2 of
> https://sourceware.org/pipermail/libc-alpha/2020-November/119305.html
>
> To enable BTI support, re-mmap executable segments instead of
> mprotecting them in case mprotect is seccomp filtered.
>
> I
On Thu, Dec 03, 2020 at 07:36:10AM -0700, Jens Axboe wrote:
> On 12/3/20 4:01 AM, Catalin Marinas wrote:
> > On Thu, Dec 03, 2020 at 02:25:30PM +1100, Stephen Rothwell wrote:
> >> diff --cc arch/arm64/include/asm/thread_info.h
> >> index 015beafe58f5,cdcf307764aa..0
gged_addr(svpfn << PAGE_SHIFT);
> +
> + /* Ensure the address is inside the task */
> + if (start_vaddr > mm->task_size)
> start_vaddr = end_vaddr;
Otherwise the logic looks fine to me. With the above:
Reviewed-by: Catalin Marinas
On Thu, Dec 03, 2020 at 07:06:01PM +1100, Stephen Rothwell wrote:
> diff --cc arch/arm64/include/asm/uaccess.h
> index d841a560fae7,abb31aa1f8ca..
> --- a/arch/arm64/include/asm/uaccess.h
> +++ b/arch/arm64/include/asm/uaccess.h
> @@@ -186,64 -159,20 +159,43 @@@ static inline void
On Thu, Dec 03, 2020 at 02:25:30PM +1100, Stephen Rothwell wrote:
> diff --cc arch/arm64/include/asm/thread_info.h
> index 015beafe58f5,cdcf307764aa..
> --- a/arch/arm64/include/asm/thread_info.h
> +++ b/arch/arm64/include/asm/thread_info.h
> @@@ -63,7 -66,9 +63,8 @@@ void
or ARMv8.1,
so present with any MTE implementation. This patch is on top of -next,
though it has a Fixes tag in 5.10:
------8<---
>From ecc819804c1fb1ad498d7ced07e01e3b3e055a3f Mon Sep 17 00:00:00 2001
From: Catalin Marinas
Date: Thu, 3 Dec 2020 10:1
On Tue, Dec 01, 2020 at 09:34:32AM -0800, Andy Lutomirski wrote:
> On Tue, Dec 1, 2020 at 9:23 AM Andy Lutomirski wrote:
> > On Mon, Nov 30, 2020 at 2:31 PM Brian Gerst wrote:
> > > Commit 121b32a58a3a converted native x86-32 which take 64-bit arguments to
> > > use the compat handlers to allow
On Mon, Nov 30, 2020 at 07:50:25PM +, ZHIZHIKIN Andrey wrote:
> From Krzysztof Kozlowski :
> > On Mon, Nov 30, 2020 at 03:21:33PM +, Andrey Zhizhikin wrote:
> > > Commit 7ecdea4a0226 ("backlight: generic_bl: Remove this driver as it is
> > > unused") removed geenric_bl driver from the
arge pages).
>
> Cc: linuxppc-...@lists.ozlabs.org
> Cc: Catalin Marinas
> Cc: Will Deacon
> Cc: linux-arm-ker...@lists.infradead.org
> Cc: Thomas Gleixner
> Cc: Ingo Molnar
> Cc: Borislav Petkov
> Cc: x...@kernel.org
> Cc: "H. Peter Anvin"
> Signed-off-by
On Tue, Dec 01, 2020 at 10:05:47AM +1100, Stephen Rothwell wrote:
> diff --cc arch/arm64/include/asm/exception.h
> index 0756191f44f6,2a8aa1884d8a..
> --- a/arch/arm64/include/asm/exception.h
> +++ b/arch/arm64/include/asm/exception.h
> @@@ -31,13 -31,8 +31,13 @@@ static inline u32
de will be introduced with a future series.
>
> Fixes: c058b1c4a5ea ("arm64: mte: system register definitions")
> Cc: Catalin Marinas
> Cc: Will Deacon
> Signed-off-by: Vincenzo Frascino
> ---
> arch/arm64/include/asm/sysreg.h | 2 +-
> 1 file changed, 1 insertion(+),
On Mon, Nov 30, 2020 at 09:12:58PM +0530, Naresh Kamboju wrote:
> Linux next tag 20201130 arm64 build failed due to below error,
> - gcc-9, gcc-10 and clang-10 build FAIL
> - gcc-8 build PASS.
>
> make --silent --keep-going --jobs=8
> O=/home/tuxbuild/.cache/tuxmake/builds/2/tmp ARCH=arm64
>
On Mon, Nov 30, 2020 at 06:48:35PM +1100, Stephen Rothwell wrote:
> On Mon, 30 Nov 2020 18:28:40 +1100 Stephen Rothwell
> wrote:
> > Today's linux-next merge of the akpm tree got a conflict in:
> >
> > arch/arm64/kernel/mte.c
> >
> > between commit:
> >
> > e710c29e0177 ("arm64: mte: make
On Mon, Nov 30, 2020 at 04:28:20PM +0530, Anshuman Khandual wrote:
> On 11/30/20 3:08 PM, Catalin Marinas wrote:
> > On Mon, Nov 30, 2020 at 09:55:00AM +0530, Anshuman Khandual wrote:
> >> On 11/27/20 3:14 PM, Catalin Marinas wrote:
> >>> On Fri, Nov 27, 2020 at 09:2
On Mon, Nov 30, 2020 at 09:55:00AM +0530, Anshuman Khandual wrote:
> On 11/27/20 3:14 PM, Catalin Marinas wrote:
> > On Fri, Nov 27, 2020 at 09:22:24AM +0100, Christophe Leroy wrote:
> >> Le 27/11/2020 à 06:06, Anshuman Khandual a écrit :
> >>> This adds validation t
On Mon, 21 Sep 2020 14:15:55 -0500, Tyler Hicks wrote:
> Provide the CONFIG_CMDLINE_EXTEND config option for arm64 kernels. This
> config option can be used to extend the kernel command line parameters,
> specified by the bootloader, with additional command line parameters
> specified in the
On Thu, 19 Nov 2020 09:45:40 +0800, Youling Tang wrote:
> We currently try to emit *.init.rodata.* twice, once in INIT_DATA, and once
> in the line immediately following it. As the two section definitions are
> identical, the latter is redundant and can be dropped.
>
> This patch drops the
On Fri, Nov 27, 2020 at 06:11:01PM +, Marc Zyngier wrote:
> On 2020-11-27 14:15, Hanks Chen wrote:
> > Support for interrupt distribution design for SMP system solutions.
>
> As far as I know, we have been supporting interrupt distribution on
> ARM SMP systems pretty well for the past...
On Fri, Nov 27, 2020 at 09:22:24AM +0100, Christophe Leroy wrote:
> Le 27/11/2020 à 06:06, Anshuman Khandual a écrit :
> > This adds validation tests for dirtiness after write protect conversion for
> > each page table level. This is important for platforms such as arm64 that
> > removes the
On Thu, Oct 29, 2020 at 03:19:50PM +0900, Janghyuck Kim wrote:
> To support NUMA systems whose physical address layout is not continuous
> on one node, nodes spanning other nodes feature is required.
>
> Signed-off-by: Janghyuck Kim
> ---
> arch/arm64/Kconfig | 8
> 1 file changed, 8
Hi Miles,
Could you please cc me and Andrey Konovalov on future versions of this
patch (if any)?
On Mon, 23 Nov 2020 at 08:47, Miles Chen wrote:
> When we try to visit the pagemap of a tagged userspace pointer, we find
> that the start_vaddr is not correct because of the tag.
> To fix it, we
occurrences of open coded checks in arm64 with the new
> function and provide a generic stub for architectures that always modify
> page tables upon calls to set_direct_map APIs.
>
> Signed-off-by: Mike Rapoport
Reviewed-by: Catalin Marinas
Hi Mike,
On Tue, Nov 24, 2020 at 11:25:51AM +0200, Mike Rapoport wrote:
> +static vm_fault_t secretmem_fault(struct vm_fault *vmf)
> +{
> + struct address_space *mapping = vmf->vma->vm_file->f_mapping;
> + struct inode *inode = file_inode(vmf->vma->vm_file);
> + pgoff_t offset =
On Fri, Nov 20, 2020 at 09:09:03AM -0800, Minchan Kim wrote:
> On Fri, Nov 20, 2020 at 02:35:53PM +, Will Deacon wrote:
> > With hardware dirty bit management, calling pte_wrprotect() on a writable,
> > dirty PTE will lose the dirty state and return a read-only, clean entry.
> >
> > Move the
some point we'll understand how this all works ;).
For this patch:
Reviewed-by: Catalin Marinas
lise the aging path, adjust pte_accessible() to return
> true for any valid pte, even if the access flag is cleared.
>
> Cc:
> Fixes: 76c714be0e5e ("arm64: pgtable: implement pte_accessible()")
> Reported-by: Yu Zhao
> Signed-off-by: Will Deacon
Reviewed-by: Catalin Marinas
pi/asm/unistd.h
> @@ -20,5 +20,6 @@
> #define __ARCH_WANT_SET_GET_RLIMIT
> #define __ARCH_WANT_TIME32_SYSCALLS
> #define __ARCH_WANT_SYS_CLONE3
> +#define __ARCH_WANT_MEMFD_SECRET
>
> #include
For arm64:
Acked-by: Catalin Marinas
BLE) path to ignore the
flag if VM_SPARC_ADI. On arm64 we intercept memcmp_pages() but we have a
PG_arch_2 flag to mark a page as containing tags. Either way should
work.
FWIW, if you are happy with the mmap() rejecting PROT_ADI on
!adi_capable() hardware:
Reviewed-by: Catalin Marinas
On Thu, 19 Nov 2020 18:53:52 +0100, Nicolas Saenz Julienne wrote:
> Using two distinct DMA zones turned out to be problematic. Here's an
> attempt go back to a saner default.
>
> I tested this on both a RPi4 and QEMU.
Applied to arm64 (for-next/zone-dma-default-32-bit), thanks!
[1/7] arm64: mm:
On Thu, Nov 19, 2020 at 06:01:20PM +, Lorenzo Pieralisi wrote:
> [+Catalin - I hope it can go via arm64 tree, trivial doc fixup]
Or Will if you want it in 5.10, otherwise I can pick it up for 5.11.
> On Wed, Oct 14, 2020 at 10:31:39AM +0100, Shiju Jose wrote:
> > Fix following warnings
On Thu, Nov 19, 2020 at 06:25:29PM +0100, Nicolas Saenz Julienne wrote:
> On Thu, 2020-11-19 at 17:10 +0000, Catalin Marinas wrote:
> > On Thu, Nov 19, 2020 at 03:09:58PM +0100, Nicolas Saenz Julienne wrote:
> > > On Fri, 2020-11-13 at 11:29 +0000, Cat
On Thu, Nov 19, 2020 at 05:10:49PM +, Catalin Marinas wrote:
> diff --git a/arch/arm64/mm/mmu.c b/arch/arm64/mm/mmu.c
> index ed71b1c305d7..acdec0c67d3b 100644
> --- a/arch/arm64/mm/mmu.c
> +++ b/arch/arm64/mm/mmu.c
> @@ -469,6 +469,21 @@ void __init mark_linear_tex
me. Also enable CONTEXIDR_EL2
> tracing if we are running the kernel at EL2.
>
> Cc: Catalin Marinas
> Cc: Mathieu Poirier
> Cc: Mike Leach
> Cc: Will Deacon
> Signed-off-by: Jonathan Zhou
> [ Move the trace filtering setup etm_init_arch_data() and
> cl
TUAL ((0x1) << TRFCR_ELx_TS_SHIFT)
> +#define TRFCR_ELx_TS_GUEST_PHYSICAL ((0x2) << TRFCR_ELx_TS_SHIFT)
> +#define TRFCR_ELx_TS_PHYSICAL((0x3) << TRFCR_ELx_TS_SHIFT)
For consistency, I'd use 0x1UL etc. in case the shift goes beyond 32
(not the case he
On Thu, Nov 19, 2020 at 03:09:58PM +0100, Nicolas Saenz Julienne wrote:
> On Fri, 2020-11-13 at 11:29 +0000, Catalin Marinas wrote:
> [...]
> > > > > Let me stress that knowing the DMA constraints in the system before
> > > > > reserving
> > > >
On Thu, Nov 19, 2020 at 12:45:52PM +, Steven Price wrote:
> On 18/11/2020 17:05, Andrew Jones wrote:
> > On Wed, Nov 18, 2020 at 04:50:01PM +, Catalin Marinas wrote:
> > > On Wed, Nov 18, 2020 at 04:01:20PM +, Steven Price wrote:
> > > > On 17/11/202
On Wed, Nov 18, 2020 at 04:01:18PM +, Steven Price wrote:
> On 17/11/2020 19:20, Marc Zyngier wrote:
> > On 2020-10-26 15:57, Steven Price wrote:
> > > diff --git a/arch/arm64/include/asm/sysreg.h
> > > b/arch/arm64/include/asm/sysreg.h
> > > index d52c1b3ce589..7727df0bc09d 100644
> > > ---
On Wed, Nov 18, 2020 at 04:01:20PM +, Steven Price wrote:
> On 17/11/2020 16:07, Catalin Marinas wrote:
> > On Mon, Oct 26, 2020 at 03:57:27PM +, Steven Price wrote:
> > > diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c
> > > index 19aacc
On Fri, 16 Oct 2020 11:56:55 -0700, Sudarshan Rajagopalan wrote:
> V1: The initial patch used the approach to abort at the first instance of
> PMD_SIZE
> allocation failure, unmaps all previously mapped sections using vmemmap_free
> and maps the entire request with vmemmap_populate_basepages to
On Thu, Oct 22, 2020 at 01:23:53PM -0700, Sami Tolvanen wrote:
> As discussed a few months ago [1][2], virtually mapped shadow call stacks
> are better for safety and robustness. This series dusts off the VMAP
> option from the original SCS patch series and switches the kernel to use
> virtually
On Tue, Nov 17, 2020 at 06:29:31PM +0200, Mike Rapoport wrote:
> From: Mike Rapoport
>
> Wire up memfd_secret system call on architectures that define
> ARCH_HAS_SET_DIRECT_MAP, namely arm64, risc-v and x86.
>
> Signed-off-by: Mike Rapoport
> Acked-by: Palmer Dabbelt
> Acked-by: Arnd Bergmann
Hi Steven,
On Mon, Oct 26, 2020 at 03:57:27PM +, Steven Price wrote:
> diff --git a/arch/arm64/kvm/mmu.c b/arch/arm64/kvm/mmu.c
> index 19aacc7d64de..38fe25310ca1 100644
> --- a/arch/arm64/kvm/mmu.c
> +++ b/arch/arm64/kvm/mmu.c
> @@ -862,6 +862,26 @@ static int user_mem_abort(struct kvm_vcpu
ssell's tree with acks from the arm64 and
> kbuild maintainers.
So that's a fix for arch/arm going in the top Makefile.
For the arm64 part:
Acked-by: Catalin Marinas
On Mon, Nov 16, 2020 at 12:50:00PM +0100, Marco Elver wrote:
> On Mon, 16 Nov 2020 at 11:59, Dmitry Vyukov wrote:
> > On Thu, Oct 29, 2020 at 8:57 PM 'Andrey Konovalov' via kasan-dev
> > wrote:
> > > On Tue, Oct 27, 2020 at 1:44 PM Dmitry Vyukov wrote:
> > > >
> > > > On Thu, Oct 22, 2020 at
On Mon, Nov 16, 2020 at 08:42:17AM +, liwei (CM) wrote:
> I have changed SECTION_SIZE_BITS to 27 in our products, but I don't
> have to submit it.
Well, if you send a patch, I'm happy to merge it.
--
Catalin
> similar way as TCF0 affects EL0.
>
> MTE that is built on top of the Top Byte Ignore (TBI) feature hence we
> enable it as part of this patch as well.
>
> Signed-off-by: Vincenzo Frascino
> Co-developed-by: Andrey Konovalov
> Signed-off-by: Andrey Konovalov
Reviewed-by: Catalin Marinas
uld end up being racy, in fact if a CPU checks the
> PG_mte_tagged bit and decides that the page is not tagged but another
> CPU maps the same with PROT_MTE and becomes tagged the subsequent kernel
> access would fail.
>
> Signed-off-by: Vincenzo Frascino
> Signed-off-by: Andrey Konovalov
Reviewed-by: Catalin Marinas
mory map to generic mm and enable
> them in case HAVE_ARCH_PFN_VALID=y.
>
> Signed-off-by: Mike Rapoport
For arm64:
Acked-by: Catalin Marinas
On Fri, 6 Nov 2020 12:53:31 +, Ionela Voinescu wrote:
> Many thanks for everyone's review.
>
> This series adds support for CPPC's delivered and reference performance
> counters through the FFH methods by using the AMU equivalent core and
> constant cycle counters.
>
> This support is added
On Fri, Nov 13, 2020 at 04:37:12PM +, Ionela Voinescu wrote:
> On Friday 13 Nov 2020 at 14:16:58 (+), Sudeep Holla wrote:
> [..]
> > > diff --git a/arch/arm64/kernel/topology.c b/arch/arm64/kernel/topology.c
> > > index b8cb16e3a2cc..7c9b6a0ecd6a 100644
> > > ---
On Fri, Nov 13, 2020 at 04:58:43PM +, Ionela Voinescu wrote:
> On Friday 13 Nov 2020 at 16:02:34 (+), Mark Rutland wrote:
> > On Fri, Nov 13, 2020 at 03:53:28PM +, Ionela Voinescu wrote:
> > > Given that smp_call_function_single() can deadlock when interrupts are
> > > disabled, abort
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