Sometimes the clock driver can not set a accurate clock_rate for vop,
get the true rate of vop_dclk and set it back to adjusted_mode, since
the mipi dsi driver need to use the clock to make the calculation of
Blanking.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v3
From: Liu Ying <ying@freescale.com>
Signed-off-by: Liu Ying <ying@freescale.com>
Acked-by: Thierry Reding <tred...@nvidia.com>
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v3: None
Changes in v2: None
include/drm/drm_mipi_dsi.h | 14 ++
From: Liu Ying <ying@freescale.com>
This patch adds device tree bindings for Synopsys DesignWare MIPI DSI
host controller DRM bridge driver.
Signed-off-by: Liu Ying <ying@freescale.com>
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v3:
move t
Adds a new id for the sclk supplying the mipidsi on rk3288 socs.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v3: None
Changes in v2:
add the mipi clk id in a single patch
include/dt-bindings/clock/rk3288-cru.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/incl
the problem by switching to slow mode before
reboot, just like what we did before suspend.
Signed-off-by: Chris Zhong
Reviewed-by: Heiko Stuebner
---
Changes in v3:
remove include reboot.h
Changes in v2:
replace restart_handlers with the shutdown callback of syscore
drivers/clk/rockchip/clk
the problem by switching to slow mode before
reboot, just like what we did before suspend.
Signed-off-by: Chris Zhong
---
Changes in v2:
replace restart_handlers with the shutdown callback of syscore
drivers/clk/rockchip/clk-rk3288.c | 36 +++-
1 file changed, 19
the problem by switching to slow mode before
reboot, just like what we did before suspend.
Signed-off-by: Chris Zhong
---
drivers/clk/rockchip/clk-rk3288.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/drivers/clk/rockchip/clk-rk3288.c
b/drivers/clk/rockchip
the problem by switching to slow mode before
reboot, just like what we did before suspend.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
drivers/clk/rockchip/clk-rk3288.c | 31 +++
1 file changed, 31 insertions(+)
diff --git a/drivers/clk/rockchip/clk-rk328
the problem by switching to slow mode before
reboot, just like what we did before suspend.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
Reviewed-by: Heiko Stuebner <he...@sntech.de>
---
Changes in v3:
remove include reboot.h
Changes in v2:
replace restart_handlers with the shutd
the problem by switching to slow mode before
reboot, just like what we did before suspend.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v2:
replace restart_handlers with the shutdown callback of syscore
drivers/clk/rockchip/clk-rk3288.
Hi Rob
On 11/02/2015 11:06 PM, Rob Herring wrote:
On Sat, Oct 31, 2015 at 7:56 AM, Chris Zhong wrote:
Your subject should be more specific with the panel name.
I'll write more specific in subject next version.
This binding specifies a set of common properties for display panels. It
can
Hi Rob
On 11/02/2015 11:06 PM, Rob Herring wrote:
On Sat, Oct 31, 2015 at 7:56 AM, Chris Zhong <z...@rock-chips.com> wrote:
Your subject should be more specific with the panel name.
I'll write more specific in subject next version.
This binding specifies a set of common prop
From: Liu Ying
Signed-off-by: Liu Ying
Acked-by: Thierry Reding
Signed-off-by: Chris Zhong
---
Changes in v2: None
include/drm/drm_mipi_dsi.h | 14 ++
1 file changed, 14 insertions(+)
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index f1d8d0d..3662021
This binding specifies a set of common properties for display panels. It
can be used as a basis by bindings for specific panels.
Bindings for three specific panels are provided to show how the
simple panel binding can be used.
Signed-off-by: Chris Zhong
---
Changes in v2:
As Thierry.Reding
Add a mipi_dsi node, and also add mipi_dsi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Chris Zhong
---
Changes in v2: None
arch/arm/boot/dts/rk3288.dtsi | 39 +++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi
add device tree bindings for rk3288 specific Synopsys DW MIPI DSI driver
Signed-off-by: Chris Zhong
---
Changes in v2: None
.../bindings/video/dw_mipi_dsi_rockchip.txt| 56 ++
1 file changed, 56 insertions(+)
create mode 100644
Documentation/devicetree/bindings
add Synopsys DesignWare MIPI DSI host controller driver support.
Signed-off-by: Chris Zhong
---
Changes in v2: None
drivers/gpu/drm/bridge/Kconfig |9 +
drivers/gpu/drm/bridge/Makefile |1 +
drivers/gpu/drm/bridge/dw_mipi_dsi.c | 1055
This tv080wum-nl0 panel is a mipi panel, it can use in MIPI_TX socket
of rk3288 evb board.
Signed-off-by: Chris Zhong
---
Changes in v2: None
arch/arm/boot/dts/rk3288-evb.dtsi | 20 +++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288
Sometimes the clock driver can not set a accurate clock_rate for vop,
get the true rate of vop_dclk and set it back to adjusted_mode, since
the mipi dsi driver need to use the clock to make the calculation of
Blanking.
Signed-off-by: Chris Zhong
---
Changes in v2: None
drivers/gpu/drm
Signed-off-by: Chris Zhong
---
Changes in v2:
add vendor prefix for boe
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
b/Documentation/devicetree/bindings/vendor-prefixes.txt
From: Liu Ying
This patch adds device tree bindings for Synopsys DesignWare MIPI DSI
host controller DRM bridge driver.
Signed-off-by: Liu Ying
Signed-off-by: Chris Zhong
---
Changes in v2: None
.../devicetree/bindings/drm/bridge/dw_mipi_dsi.txt | 76 ++
1 file changed
This adds support for the BOE TV080WUM-NL0 1200x1920 mipi panel to the
DRM simple panel driver.
Signed-off-by: Chris Zhong
---
Changes in v2: None
drivers/gpu/drm/panel/panel-simple.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/panel
Add support for Synopsys DesignWare MIPI DSI host controller which is
embedded in the rk3288 SoCs.
Signed-off-by: Chris Zhong
---
Changes in v2: None
drivers/gpu/drm/rockchip/Kconfig| 10 +
drivers/gpu/drm/rockchip/Makefile | 1 +
drivers/gpu/drm/rockchip
2:
add the mipi clk id in a single patch
add vendor prefix for boe
As Thierry.Reding comment, add a documentation for this panel.
Chris Zhong (11):
clk: rockchip: add id for mipidsi sclk on rk3288
clk: rockchip: add mipidsi clocks on rk3288
drm/rockchip: return a true clock rate to adjuste
sclk_mipidsi_24m is the gating of mipi dsi phy.
Signed-off-by: Chris Zhong
---
Changes in v2: None
drivers/clk/rockchip/clk-rk3288.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk-rk3288.c
b/drivers/clk/rockchip/clk-rk3288.c
index 9040878
Adds a new id for the sclk supplying the mipidsi on rk3288 socs.
Signed-off-by: Chris Zhong
---
Changes in v2:
add the mipi clk id in a single patch
include/dt-bindings/clock/rk3288-cru.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings/clock/rk3288-cru.h
b/include/dt
add device tree bindings for rk3288 specific Synopsys DW MIPI DSI driver
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v2: None
.../bindings/video/dw_mipi_dsi_rockchip.txt| 56 ++
1 file changed, 56 insertions(+)
create mode 100644
Documen
add Synopsys DesignWare MIPI DSI host controller driver support.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v2: None
drivers/gpu/drm/bridge/Kconfig |9 +
drivers/gpu/drm/bridge/Makefile |1 +
drivers/gpu/drm/bridge/dw_mipi_dsi.c
Add support for Synopsys DesignWare MIPI DSI host controller which is
embedded in the rk3288 SoCs.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v2: None
drivers/gpu/drm/rockchip/Kconfig| 10 +
drivers/gpu/drm/rockchip/Makefile | 1 +
d
This tv080wum-nl0 panel is a mipi panel, it can use in MIPI_TX socket
of rk3288 evb board.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v2: None
arch/arm/boot/dts/rk3288-evb.dtsi | 20 +++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git
Sometimes the clock driver can not set a accurate clock_rate for vop,
get the true rate of vop_dclk and set it back to adjusted_mode, since
the mipi dsi driver need to use the clock to make the calculation of
Blanking.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v2
From: Liu Ying <ying@freescale.com>
This patch adds device tree bindings for Synopsys DesignWare MIPI DSI
host controller DRM bridge driver.
Signed-off-by: Liu Ying <ying@freescale.com>
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v2: None
.../d
This adds support for the BOE TV080WUM-NL0 1200x1920 mipi panel to the
DRM simple panel driver.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v2: None
drivers/gpu/drm/panel/panel-simple.c | 33 +
1 file changed, 33 insertions(+)
diff
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v2:
add vendor prefix for boe
Documentation/devicetree/bindings/vendor-prefixes.txt | 1 +
1 file changed, 1 insertion(+)
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt
b/Documentation/devicetree/bi
This binding specifies a set of common properties for display panels. It
can be used as a basis by bindings for specific panels.
Bindings for three specific panels are provided to show how the
simple panel binding can be used.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes
From: Liu Ying <ying@freescale.com>
Signed-off-by: Liu Ying <ying@freescale.com>
Acked-by: Thierry Reding <tred...@nvidia.com>
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v2: None
include/drm/drm_mipi_dsi.h | 14 ++
1 file changed
Add a mipi_dsi node, and also add mipi_dsi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v2: None
arch/arm/boot/dts/rk3288.dtsi | 39 +++
1 file changed, 39 insertions(+)
diff --git a/ar
2:
add the mipi clk id in a single patch
add vendor prefix for boe
As Thierry.Reding comment, add a documentation for this panel.
Chris Zhong (11):
clk: rockchip: add id for mipidsi sclk on rk3288
clk: rockchip: add mipidsi clocks on rk3288
drm/rockchip: return a true clock rate to adjuste
sclk_mipidsi_24m is the gating of mipi dsi phy.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v2: None
drivers/clk/rockchip/clk-rk3288.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk-rk3288.c
b/drivers/clk/rockchip/clk-rk
Adds a new id for the sclk supplying the mipidsi on rk3288 socs.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Changes in v2:
add the mipi clk id in a single patch
include/dt-bindings/clock/rk3288-cru.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dt-bindings
On 10/17/2015 05:39 AM, Stephen Boyd wrote:
On 10/10, Chris Zhong wrote:
sclk_mipidsi_24m is the gating of mipi dsi phy.
Signed-off-by: Chris Zhong
---
Acked-by: Stephen Boyd
drivers/clk/rockchip/clk-rk3288.c | 2 +-
include/dt-bindings/clock/rk3288-cru.h | 1 +
2 files changed
On 10/17/2015 05:39 AM, Stephen Boyd wrote:
On 10/10, Chris Zhong wrote:
sclk_mipidsi_24m is the gating of mipi dsi phy.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
Acked-by: Stephen Boyd <sb...@codeaurora.org>
drivers/clk/rockchip/clk-rk3288.c | 2 +-
include
Sometimes the clock driver can not set a accurate clock_rate for vop,
get the true rate of vop_dclk and set it back to adjusted_mode, since
the mipi dsi driver need to use the clock to make the calculation of
Blanking.
Signed-off-by: Chris Zhong
---
drivers/gpu/drm/rockchip/rockchip_drm_vop.c
Add support for Synopsys DesignWare MIPI DSI host controller which is
embedded in the rk3288 SoCs.
Signed-off-by: Chris Zhong
---
drivers/gpu/drm/rockchip/Kconfig| 10 +
drivers/gpu/drm/rockchip/Makefile | 1 +
drivers/gpu/drm/rockchip/dw_mipi_dsi_rockchip.c
This tv080wum-nl0 panel is a mipi panel, it can use in MIPI_TX socket
of rk3288 evb board.
Signed-off-by: Chris Zhong
---
arch/arm/boot/dts/rk3288-evb.dtsi | 20 +++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/rk3288-evb.dtsi
b/arch/arm
This adds support for the BOE TV080WUM-NL0 1200x1920 mipi panel to the
DRM simple panel driver.
Signed-off-by: Chris Zhong
---
drivers/gpu/drm/panel/panel-simple.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/drivers/gpu/drm/panel/panel-simple.c
b
Add a mipi_dsi node, and also add mipi_dsi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Chris Zhong
---
arch/arm/boot/dts/rk3288.dtsi | 39 +++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts
From: Liu Ying
Signed-off-by: Liu Ying
Acked-by: Thierry Reding
Signed-off-by: Chris Zhong
---
include/drm/drm_mipi_dsi.h | 14 ++
1 file changed, 14 insertions(+)
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index f1d8d0d..3662021 100644
--- a/include
add device tree bindings for rk3288 specific Synopsys DW MIPI DSI driver
Signed-off-by: Chris Zhong
---
.../bindings/video/dw_mipi_dsi_rockchip.txt| 56 ++
1 file changed, 56 insertions(+)
create mode 100644
Documentation/devicetree/bindings/video
From: Liu Ying
This patch adds device tree bindings for Synopsys DesignWare MIPI DSI
host controller DRM bridge driver.
Signed-off-by: Liu Ying
Signed-off-by: Chris Zhong
---
.../devicetree/bindings/drm/bridge/dw_mipi_dsi.txt | 76 ++
1 file changed, 76 insertions
add Synopsys DesignWare MIPI DSI host controller driver support.
Signed-off-by: Chris Zhong
---
drivers/gpu/drm/bridge/Kconfig | 10 +
drivers/gpu/drm/bridge/Makefile |1 +
drivers/gpu/drm/bridge/dw_mipi_dsi.c | 1055 ++
include/drm/bridge
only use the MIPI DSI video mode.
The MIPI DSI feature is tested on rk3288 evb board, backport them to
chrome os kernel v3.14, and it can display normally.
This patchset is base on the patchset from ying@freescale.com.
<http://www.spinics.net/lists/dri-devel/msg77181.html>
Chris Zh
sclk_mipidsi_24m is the gating of mipi dsi phy.
Signed-off-by: Chris Zhong
---
drivers/clk/rockchip/clk-rk3288.c | 2 +-
include/dt-bindings/clock/rk3288-cru.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk-rk3288.c
b/drivers/clk/rockchip
sclk_mipidsi_24m is the gating of mipi dsi phy.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
drivers/clk/rockchip/clk-rk3288.c | 2 +-
include/dt-bindings/clock/rk3288-cru.h | 1 +
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/rockchip/clk-rk328
only use the MIPI DSI video mode.
The MIPI DSI feature is tested on rk3288 evb board, backport them to
chrome os kernel v3.14, and it can display normally.
This patchset is base on the patchset from ying@freescale.com.
<http://www.spinics.net/lists/dri-devel/msg77181.html>
Chris Zh
add device tree bindings for rk3288 specific Synopsys DW MIPI DSI driver
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
.../bindings/video/dw_mipi_dsi_rockchip.txt| 56 ++
1 file changed, 56 insertions(+)
create mode 100644
Documentation/devicetree/bi
Add support for Synopsys DesignWare MIPI DSI host controller which is
embedded in the rk3288 SoCs.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
drivers/gpu/drm/rockchip/Kconfig| 10 +
drivers/gpu/drm/rockchip/Makefile | 1 +
drivers/gpu/drm/ro
This tv080wum-nl0 panel is a mipi panel, it can use in MIPI_TX socket
of rk3288 evb board.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
arch/arm/boot/dts/rk3288-evb.dtsi | 20 +++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/arch/arm/boot/dts/
Add a mipi_dsi node, and also add mipi_dsi endpoints to vopb and vopl
output port nodes.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
arch/arm/boot/dts/rk3288.dtsi | 39 +++
1 file changed, 39 insertions(+)
diff --git a/arch/arm/boot/dts/rk328
This adds support for the BOE TV080WUM-NL0 1200x1920 mipi panel to the
DRM simple panel driver.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
drivers/gpu/drm/panel/panel-simple.c | 33 +
1 file changed, 33 insertions(+)
diff --git a/drivers/gpu/drm
From: Liu Ying <ying@freescale.com>
Signed-off-by: Liu Ying <ying@freescale.com>
Acked-by: Thierry Reding <tred...@nvidia.com>
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
include/drm/drm_mipi_dsi.h | 14 ++
1 file changed, 14 insertions(+)
From: Liu Ying <ying@freescale.com>
This patch adds device tree bindings for Synopsys DesignWare MIPI DSI
host controller DRM bridge driver.
Signed-off-by: Liu Ying <ying@freescale.com>
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
.../devicetree/b
add Synopsys DesignWare MIPI DSI host controller driver support.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
drivers/gpu/drm/bridge/Kconfig | 10 +
drivers/gpu/drm/bridge/Makefile |1 +
drivers/gpu/drm/bridge/dw_mipi_dsi.c
Sometimes the clock driver can not set a accurate clock_rate for vop,
get the true rate of vop_dclk and set it back to adjusted_mode, since
the mipi dsi driver need to use the clock to make the calculation of
Blanking.
Signed-off-by: Chris Zhong <z...@rock-chips.com>
---
drivers/g
add the description about dvs1, dvs2, and add the example.
Signed-off-by: Chris Zhong
Reviewed-by: Doug Anderson
---
Changes in v4:
- Remove the description about dvs-ok
Changes in v3:
- Modify the syntax error
Changes in v2:
- increase description about dvs pins
Documentation/devicetree
an i2c write the rk808 will always ramp as fast
as it possibly can, about 100mv/us.
Signed-off-by: Chris Zhong
Reviewed-by: Doug Anderson
---
Changes in v4:
- remove dvsok pin
- add support gradual adjustment
Changes in v3: None
Changes in v2:
- modify the multiline commenting
drivers
the multiline commenting
Chris Zhong (2):
mfd: dt-bindings: add the description about dvs gpio for rk808
regulator: rk808: fixed the overshoot when adjust voltage
Documentation/devicetree/bindings/mfd/rk808.txt | 8 +-
drivers/regulator/rk808-regulator.c | 219
the multiline commenting
Chris Zhong (2):
mfd: dt-bindings: add the description about dvs gpio for rk808
regulator: rk808: fixed the overshoot when adjust voltage
Documentation/devicetree/bindings/mfd/rk808.txt | 8 +-
drivers/regulator/rk808-regulator.c | 219
an i2c write the rk808 will always ramp as fast
as it possibly can, about 100mv/us.
Signed-off-by: Chris Zhong z...@rock-chips.com
Reviewed-by: Doug Anderson diand...@chromium.org
---
Changes in v4:
- remove dvsok pin
- add support gradual adjustment
Changes in v3: None
Changes in v2:
- modify
add the description about dvs1, dvs2, and add the example.
Signed-off-by: Chris Zhong z...@rock-chips.com
Reviewed-by: Doug Anderson diand...@chromium.org
---
Changes in v4:
- Remove the description about dvs-ok
Changes in v3:
- Modify the syntax error
Changes in v2:
- increase description
These are actually not used in the pm code, as we moved suspend handling
to the clock driver, remove them here.
Signed-off-by: Chris Zhong
Reviewed-by: Douglas Anderson
---
Changes in v3: None
arch/arm/mach-rockchip/pm.h | 7 ---
1 file changed, 7 deletions(-)
diff --git a/arch/arm
If we want to wake up system via usb, the 24Mhz osc could not be
disabled during suspend, read the usb phy SIDDQ bit to decide whether
to switch to 32khz clock-in.
Signed-off-by: Chris Zhong
Reviewed-by: Douglas Anderson
Tested-by: Douglas Anderson
---
Changes in v3:
- Fixed commenting style
keyboard.
[0] https://chromium-review.googlesource.com/#/c/277811/3
Changes in v3:
- Fixed commenting style
- Move the #define-s above the rk3288_slp_disable_osc function
Chris Zhong (2):
ARM: rockchip: add support holding 24Mhz osc during suspend
ARM: rockchip: remove some useless macro
If we want to wake up system via usb, the 24Mhz osc could not be
disabled during suspend, read the usb phy SIDDQ bit to decide whether
to switch to 32khz clock-in.
Signed-off-by: Chris Zhong z...@rock-chips.com
Reviewed-by: Douglas Anderson diand...@chromium.org
Tested-by: Douglas Anderson diand
These are actually not used in the pm code, as we moved suspend handling
to the clock driver, remove them here.
Signed-off-by: Chris Zhong z...@rock-chips.com
Reviewed-by: Douglas Anderson diand...@chromium.org
---
Changes in v3: None
arch/arm/mach-rockchip/pm.h | 7 ---
1 file changed, 7
keyboard.
[0] https://chromium-review.googlesource.com/#/c/277811/3
Changes in v3:
- Fixed commenting style
- Move the #define-s above the rk3288_slp_disable_osc function
Chris Zhong (2):
ARM: rockchip: add support holding 24Mhz osc during suspend
ARM: rockchip: remove some useless macro
These are actually not used in the pm code, as we moved suspend handling
to the clock driver, remove them here.
Signed-off-by: Chris Zhong
---
arch/arm/mach-rockchip/pm.h | 7 ---
1 file changed, 7 deletions(-)
diff --git a/arch/arm/mach-rockchip/pm.h b/arch/arm/mach-rockchip/pm.h
index
keyboard.
[0] https://chromium-review.googlesource.com/#/c/277811/3
Chris Zhong (2):
ARM: rockchip: add support holding 24Mhz osc during suspend
ARM: rockchip: remove some useless macro in pm.h
arch/arm/mach-rockchip/pm.c | 38 --
arch/arm/mach-rockchip
If we want to wake up system via usb, the 24Mhz osc could not be
disabled during suspend, read the usb phy SIDDQ bit to decide whether
to switch to 32khz clock-in.
Signed-off-by: Chris Zhong
---
arch/arm/mach-rockchip/pm.c | 38 --
1 file changed, 36
If we want to wake up system via usb, the 24Mhz osc could not be
disabled during suspend, read the usb phy SIDDQ bit to decide whether
to switch to 32khz clock-in.
Signed-off-by: Chris Zhong
---
arch/arm/mach-rockchip/pm.c | 34 +++---
1 file changed, 31 insertions
These are actually not used in the pm code, as we moved suspend handling
to the clock driver, remove them here.
Signed-off-by: Chris Zhong
---
arch/arm/mach-rockchip/pm.h | 7 ---
1 file changed, 7 deletions(-)
diff --git a/arch/arm/mach-rockchip/pm.h b/arch/arm/mach-rockchip/pm.h
index
keyboard.
[0] https://chromium-review.googlesource.com/#/c/277811/3
Chris Zhong (2):
ARM: rockchip: add support holding 24Mhz osc during suspend
ARM: rockchip: remove some useless macro in pm.h
arch/arm/mach-rockchip/pm.c | 34 +++---
arch/arm/mach-rockchip/pm.h
If we want to wake up system via usb, the 24Mhz osc could not be
disabled during suspend, read the usb phy SIDDQ bit to decide whether
to switch to 32khz clock-in.
Signed-off-by: Chris Zhong z...@rock-chips.com
---
arch/arm/mach-rockchip/pm.c | 34 +++---
1 file
These are actually not used in the pm code, as we moved suspend handling
to the clock driver, remove them here.
Signed-off-by: Chris Zhong z...@rock-chips.com
---
arch/arm/mach-rockchip/pm.h | 7 ---
1 file changed, 7 deletions(-)
diff --git a/arch/arm/mach-rockchip/pm.h b/arch/arm/mach
keyboard.
[0] https://chromium-review.googlesource.com/#/c/277811/3
Chris Zhong (2):
ARM: rockchip: add support holding 24Mhz osc during suspend
ARM: rockchip: remove some useless macro in pm.h
arch/arm/mach-rockchip/pm.c | 34 +++---
arch/arm/mach-rockchip/pm.h
keyboard.
[0] https://chromium-review.googlesource.com/#/c/277811/3
Chris Zhong (2):
ARM: rockchip: add support holding 24Mhz osc during suspend
ARM: rockchip: remove some useless macro in pm.h
arch/arm/mach-rockchip/pm.c | 38 --
arch/arm/mach-rockchip
If we want to wake up system via usb, the 24Mhz osc could not be
disabled during suspend, read the usb phy SIDDQ bit to decide whether
to switch to 32khz clock-in.
Signed-off-by: Chris Zhong z...@rock-chips.com
---
arch/arm/mach-rockchip/pm.c | 38 --
1 file
These are actually not used in the pm code, as we moved suspend handling
to the clock driver, remove them here.
Signed-off-by: Chris Zhong z...@rock-chips.com
---
arch/arm/mach-rockchip/pm.h | 7 ---
1 file changed, 7 deletions(-)
diff --git a/arch/arm/mach-rockchip/pm.h b/arch/arm/mach
Hi Doug
Thank you for pointing out.
Reviewed-by: Chris Zhong
On 05/21/2015 04:34 AM, Doug Anderson wrote:
In the commit (0ea001d ARM: rockchip: disable dapswjdp during suspend)
we made the assumption that we didn't need to restore dapswjdp after
suspend because "the MASKROM will e
Hi Doug
Thank you for pointing out.
Reviewed-by: Chris Zhong z...@rock-chips.com
On 05/21/2015 04:34 AM, Doug Anderson wrote:
In the commit (0ea001d ARM: rockchip: disable dapswjdp during suspend)
we made the assumption that we didn't need to restore dapswjdp after
suspend because the MASKROM
Add support for 4 Japanese keys
Signed-off-by: Chris Zhong
Reviewed-by: Doug Anderson
---
arch/arm/boot/dts/cros-ec-keyboard.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/cros-ec-keyboard.dtsi
b/arch/arm/boot/dts/cros-ec-keyboard.dtsi
index 9c7fb0a..4e42f30c
On 05/06/2015 02:10 AM, Doug Anderson wrote:
Chris,
On Mon, May 4, 2015 at 7:07 PM, Chris Zhong wrote:
Add support for 4 Japanese keys
Signed-off-by: Chris Zhong
---
arch/arm/boot/dts/cros-ec-keyboard.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/cros
On 05/06/2015 02:10 AM, Doug Anderson wrote:
Chris,
On Mon, May 4, 2015 at 7:07 PM, Chris Zhong z...@rock-chips.com wrote:
Add support for 4 Japanese keys
Signed-off-by: Chris Zhong z...@rock-chips.com
---
arch/arm/boot/dts/cros-ec-keyboard.dtsi | 4
1 file changed, 4 insertions
Add support for 4 Japanese keys
Signed-off-by: Chris Zhong z...@rock-chips.com
Reviewed-by: Doug Anderson diand...@chromium.org
---
arch/arm/boot/dts/cros-ec-keyboard.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/cros-ec-keyboard.dtsi
b/arch/arm/boot/dts/cros
Add support for 4 Japanese keys
Signed-off-by: Chris Zhong
---
arch/arm/boot/dts/cros-ec-keyboard.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/cros-ec-keyboard.dtsi
b/arch/arm/boot/dts/cros-ec-keyboard.dtsi
index 9c7fb0a..4e42f30c 100644
--- a/arch/arm/boot
Add support for 4 Japanese keys
Signed-off-by: Chris Zhong z...@rock-chips.com
---
arch/arm/boot/dts/cros-ec-keyboard.dtsi | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/boot/dts/cros-ec-keyboard.dtsi
b/arch/arm/boot/dts/cros-ec-keyboard.dtsi
index 9c7fb0a..4e42f30c 100644
ash during resume.
Let's disable this jtag function by clear the dapdeviceen bit, it
prohibit the dapswjdp to access memory and registers. This bit would
be enable in MASKROM, so we need clear it in suspend everytime.
Signed-off-by: Chris Zhong
---
arch/arm/mach-rockchip/pm.c | 7 +++
arc
resume.
Let's disable this jtag function by clear the dapdeviceen bit, it
prohibit the dapswjdp to access memory and registers. This bit would
be enable in MASKROM, so we need clear it in suspend everytime.
Signed-off-by: Chris Zhong z...@rock-chips.com
---
arch/arm/mach-rockchip/pm.c | 7
On 03/03/2015 04:50 AM, Heiko Stuebner wrote:
Hi Chris,
Am Montag, 9. Februar 2015, 21:12:23 schrieb Chris Zhong:
The watchdog clock should be disable in dw_wdt_suspend, but we set a
dummy clock to watchdog for rk3288. So the watchdog will continue to
work during suspend. And we switch
On 03/03/2015 04:47 AM, Heiko Stuebner wrote:
Am Montag, 9. Februar 2015, 21:12:22 schrieb Chris Zhong:
The delay time for wait the 24MHz OSC stabilization is 750ms, and the
delay time for wait the external PMU stabilization is 750ms too, let's
decrease them to 30ms.
just to understand whats
801 - 900 of 1258 matches
Mail list logo
