From: "Chuah, Kim Tatt" <kim.tatt.ch...@intel.com>
Export serial8250_rx_dma_flush() for use by SOC UART drivers.
Signed-off-by: Chuah, Kim Tatt <kim.tatt.ch...@intel.com>
---
drivers/tty/serial/8250/8250_dma.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/d
From: "Chuah, Kim Tatt" <kim.tatt.ch...@intel.com>
To allow other code to safely read DMA Channel Status Register (where
the register attribute for Channel Error, Descriptor Time Out &
Descriptor Done fields are read-clear), export hsu_dma_get_status().
hsu_dma_irq() is renam
From: "Chuah, Kim Tatt"
Export serial8250_rx_dma_flush() for use by SOC UART drivers.
Signed-off-by: Chuah, Kim Tatt
---
drivers/tty/serial/8250/8250_dma.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/tty/serial/8250/8250_dma.c
b/drivers/tty/serial/8250/8250_d
From: "Chuah, Kim Tatt"
To allow other code to safely read DMA Channel Status Register (where
the register attribute for Channel Error, Descriptor Time Out &
Descriptor Done fields are read-clear), export hsu_dma_get_status().
hsu_dma_irq() is renamed to hsu_dma_do_irq() and r
From: "Chuah, Kim Tatt" <kim.tatt.ch...@intel.com>
In DNV, when RX DMA is used and number of bytes received is less than
transfer size, only RX DMA timeout interrupt is sent. When this happens,
read the RX buffer.
Signed-off-by: Chuah, Kim Tatt <kim.tatt.ch...@intel.com>
-
From: "Chuah, Kim Tatt" <kim.tatt.ch...@intel.com>
These patches fix a DNV HSUART DMA issue with timeout interrupts, where
RX data is stuck in buffer when RX DMA is used and the number of received
bytes is less than 4096.
These patches have been tested on Intel Denverton platfor
From: "Chuah, Kim Tatt"
In DNV, when RX DMA is used and number of bytes received is less than
transfer size, only RX DMA timeout interrupt is sent. When this happens,
read the RX buffer.
Signed-off-by: Chuah, Kim Tatt
---
drivers/tty/serial/8250/8250_mid.c | 6 --
1 file
From: "Chuah, Kim Tatt"
These patches fix a DNV HSUART DMA issue with timeout interrupts, where
RX data is stuck in buffer when RX DMA is used and the number of received
bytes is less than 4096.
These patches have been tested on Intel Denverton platform.
Changes from v1:
- Added pat
>-Original Message-
>From: Andy Shevchenko [mailto:andriy.shevche...@linux.intel.com]
>Sent: Friday, May 13, 2016 7:28 PM
>To: lkp <l...@intel.com>; Chuah, Kim Tatt <kim.tatt.ch...@intel.com>; Peter
>Hurley <pe...@hurleysoftware.com>
>Cc: kbuild-..
>-Original Message-
>From: Andy Shevchenko [mailto:andriy.shevche...@linux.intel.com]
>Sent: Friday, May 13, 2016 7:28 PM
>To: lkp ; Chuah, Kim Tatt ; Peter
>Hurley
>Cc: kbuild-...@01.org; gre...@linuxfoundation.org; Koul, Vinod
>; heikki.kroge...@linux.int
From: "Chuah, Kim Tatt" <kim.tatt.ch...@intel.com>
To allow other code to safely read DMA Channel Status Register (where
the register attribute for Channel Error, Descriptor Time Out &
Descriptor Done fields are read-clear), export hsu_dma_get_status().
hsu_dma_irq() is renam
From: "Chuah, Kim Tatt"
To allow other code to safely read DMA Channel Status Register (where
the register attribute for Channel Error, Descriptor Time Out &
Descriptor Done fields are read-clear), export hsu_dma_get_status().
hsu_dma_irq() is renamed to hsu_dma_do_irq() and r
From: "Chuah, Kim Tatt" <kim.tatt.ch...@intel.com>
In DNV, when RX DMA is used and number of bytes received is less than
transfer size, only RX DMA timeout interrupt is sent. When this happens,
read the RX buffer.
Signed-off-by: Chuah, Kim Tatt <kim.tatt.ch...@intel.com>
-
From: "Chuah, Kim Tatt"
In DNV, when RX DMA is used and number of bytes received is less than
transfer size, only RX DMA timeout interrupt is sent. When this happens,
read the RX buffer.
Signed-off-by: Chuah, Kim Tatt
---
drivers/tty/serial/8250/8250_mid.c | 6 --
1 file
From: "Chuah, Kim Tatt" <kim.tatt.ch...@intel.com>
These patches fix a DNV HSUART DMA issue with timeout interrupts which causes:
- RX to be padded with zeros up to 4kB when <4kB should be received
- RX to be truncated at 4kB when >4kB should be received.
These pa
From: "Chuah, Kim Tatt"
These patches fix a DNV HSUART DMA issue with timeout interrupts which causes:
- RX to be padded with zeros up to 4kB when <4kB should be received
- RX to be truncated at 4kB when >4kB should be received.
These patches have been tested on Intel De
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