ruct pci_dev *dev,
> struct device_node *pdn)
> int page_shift;
> u64 dma_addr, max_addr;
> struct device_node *dn;
> - u32 ddw_avail[3];
> + u32 ddw_avail[DDW_APPLICABLE_SIZE];
> struct direct_window *window;
> struct property *win64;
> struct dynamic_dma_window_prop *ddwprop;
> @@ -1029,7 +1038,7 @@ static u64 enable_ddw(struct pci_dev *dev,
> struct device_node *pdn)
>* the property is actually in the parent, not the PE
>*/
> ret = of_property_read_u32_array(pdn, "ibm,ddw-applicable",
> - _avail[0], 3);
> + _avail[0],
> DDW_APPLICABLE_SIZE);
> if (ret)
> goto out_failed;
>
Tested-by: David Dai
> @@ -1049,7 +1120,7 @@ static u64 enable_ddw(struct pci_dev *dev,
> struct device_node *pdn)
>* of page sizes: supported and supported for migrate-dma.
>*/
> dn = pci_device_to_OF_node(dev);
> - ret = query_ddw(dev, ddw_avail, );
> + ret = query_ddw(dev, ddw_avail, , pdn);
> if (ret != 0)
> goto out_failed;
>
> @@ -1077,7 +1148,7 @@ static u64 enable_ddw(struct pci_dev *dev,
> struct device_node *pdn)
> /* check largest block * page size > max memory hotplug addr */
> max_addr = ddw_memory_hotplug_max();
> if (query.largest_available_block < (max_addr >> page_shift)) {
> - dev_dbg(>dev, "can't map partition max 0x%llx with
> %u "
> + dev_dbg(>dev, "can't map partition max 0x%llx with
> %llu "
> "%llu-sized pages\n",
> max_addr, query.largest_available_block,
> 1ULL << page_shift);
> goto out_failed;
Tested-by: David Dai
ble */
> + ret = query_ddw(dev, ddw_avail, , pdn);
> + if (ret != 0)
> + goto out_failed;
> +
> + if (query.windows_available == 0) {
> + /* no windows are available for this device. */
> + dev_dbg(>dev, "no free dynamic windows");
> + goto out_failed;
> + }
> }
> if (query.page_size & 4) {
> page_shift = 24; /* 16MB */
> @@ -1231,6 +1288,8 @@ static u64 enable_ddw(struct pci_dev *dev,
> struct device_node *pdn)
> kfree(win64);
>
> out_failed:
> + if (default_win_removed)
> + reset_dma_window(dev, pdn);
>
> fpdn = kzalloc(sizeof(*fpdn), GFP_KERNEL);
> if (!fpdn)
Tested-by: David Dai
ma_window(np, ddw_avail, win);
> +
> + if (!remove_prop)
> + return;
>
> -delprop:
> - if (remove_prop)
> - ret = of_remove_property(np, win64);
> + ret = of_remove_property(np, win);
> if (ret)
> pr_warn("%pOF: failed to remove direct window property:
> %d\n",
> np, ret);
Tested-by: David Dai
ruct pci_dev *dev,
> struct device_node *pdn)
> int page_shift;
> u64 dma_addr, max_addr;
> struct device_node *dn;
> - u32 ddw_avail[3];
> + u32 ddw_avail[DDW_APPLICABLE_SIZE];
> struct direct_window *window;
> struct property *win64;
> struct dynamic_dma_window_prop *ddwprop;
> @@ -1029,7 +1038,7 @@ static u64 enable_ddw(struct pci_dev *dev,
> struct device_node *pdn)
>* the property is actually in the parent, not the PE
>*/
> ret = of_property_read_u32_array(pdn, "ibm,ddw-applicable",
> - _avail[0], 3);
> + _avail[0],
> DDW_APPLICABLE_SIZE);
> if (ret)
> goto out_failed;
>
Tested-by: David Dai
-off-by: David Dai
---
drivers/interconnect/qcom/sdm845.c | 727 +++--
1 file changed, 206 insertions(+), 521 deletions(-)
diff --git a/drivers/interconnect/qcom/sdm845.c
b/drivers/interconnect/qcom/sdm845.c
index 502a6c2..a731f4d 100644
--- a/drivers/interconnect
Add bcm voter driver and add support for RPMh specific interconnect
providers so that they may be re-used for icc-next RPMh based provider
drivers.
Signed-off-by: David Dai
---
drivers/interconnect/qcom/Kconfig | 8 +
drivers/interconnect/qcom/Makefile| 4 +
drivers/interconnect
Add the DT nodes for each of the Network-On-Chip interconnect
buses found on SDM845 based platform and redefine the rsc_hlos
child node as a bcm-voter device to better represent the hardware.
Signed-off-by: David Dai
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 60
bindings, convert the existing sdm845 bindings
to DT schema format using json-schema.
Signed-off-by: David Dai
---
.../bindings/interconnect/qcom,bcm-voter.yaml | 45 +
.../bindings/interconnect/qcom,sdm845.txt | 24 -
.../bindings/interconnect/qcom,sdm845.yaml
format using json-schema.
[1]: https://lkml.org/lkml/2019/6/13/143
[2]: https://lkml.org/lkml/2019/7/19/1063
David Dai (4):
dt-bindings: interconnect: Update Qualcomm SDM845 DT bindings
arm64: dts: sdm845: Redefine interconnect provider DT nodes
interconnect: qcom: Refactor icc rpmh support
ed-off-by: David Dai
---
drivers/net/ethernet/intel/e1000e/netdev.c |3 ++-
1 files changed, 2 insertions(+), 1 deletions(-)
diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c
b/drivers/net/ethernet/intel/e1000e/netdev.c
index d7d56e4..cf618e1 100644
--- a/drivers/net/ethernet/intel/e1000e/ne
I'm basically thinking about master vs. slave ports in AXI land.
Cc: Maxime Ripard
Cc:
Cc: Rob Herring
Cc:
Cc: Bjorn Andersson
Cc: Evan Green
Cc: David Dai
Signed-off-by: Stephen Boyd
---
.../bindings/interconnect/interconnect.txt| 19 ---
include/linux/interconnect.h
TCA_POLICE_RATE64 and TCA_POLICE_PEAKRATE64 from kernel,
tc can use them to break the 32bit limit, and still keep the backward
binary compatibility.
Tested-by: David Dai
Signed-off-by: David Dai
---
Changelog:
v1->v2:
- Change patch submit component from iproute2 to iproute2-next
- Mov
and TCA_POLICE_RATE64 in kernel for 64bit support
so that tc utility can use them for 64bit rate and peakrate value to
break the 32bit limit, and still keep the backward binary compatibility.
Tested-by: David Dai
Signed-off-by: David Dai
---
Changelog:
v1->v2:
- Move 2 attributes TCA_POLICE_RAT
TCA_POLICE_RATE64 and TCA_POLICE_PEAKRATE64 from kernel,
tc can use them to break the 32bit limit, and still keep the backward
binary compatibility.
Tested-by: David Dai
Signed-off-by: David Dai
---
Changelog:
v1->v2:
- Change patch submit component from iproute2 to iproute2-next
- Mov
and TCA_POLICE_RATE64 in kernel for 64bit support
so that tc utility can use them for 64bit rate and peakrate value to
break the 32bit limit, and still keep the backward binary compatibility.
Tested-by: David Dai
Signed-off-by: David Dai
---
Changelog:
v1->v2:
- Move 2 attributes TCA_POLICE_RAT
TCA_POLICE_RATE64 and TCA_POLICE_PEAKRATE64 from kernel,
tc can use them to break the 32bit limit, and still keep the backward
binary compatibility.
Tested-by: David Dai
Signed-off-by: David Dai
---
include/uapi/linux/pkt_cls.h |2 +
tc/m_police.c| 64
and TCA_POLICE_RATE64 in kernel for 64bit support
so that tc utility can use them for 64bit rate and peakrate value to
break the 32bit limit, and still keep the backward binary compatibility.
Tested-by: David Dai
Signed-off-by: David Dai
---
include/uapi/linux/pkt_cls.h |2 ++
net/sched
On 7/30/2019 3:54 PM, Evan Green wrote:
On Thu, Jul 18, 2019 at 10:59 AM David Dai wrote:
On 7/16/2019 1:15 PM, Evan Green wrote:
On Mon, Jul 15, 2019 at 4:34 PM David Dai wrote:
Hi Evan,
Thanks for the continued help in reviewing these patches!
No problem. I want to do more
On 7/24/2019 11:27 AM, Stephen Boyd wrote:
Quoting David Dai (2019-07-24 10:22:57)
The way that I view this is that the consumers consume both bandwidth
and QoS from these physical NoC devices by getting some path between two
endpoints on these different NoCs and applying some constraints
On 7/24/2019 7:18 AM, Stephen Boyd wrote:
Quoting David Dai (2019-07-23 14:48:42)
On 7/23/2019 7:42 AM, Stephen Boyd wrote:
Quoting David Dai (2019-07-19 13:32:23)
+- compatible : shall contain only one of the following:
+ "qcom,sdm845-bcm-voter",
+
Thanks for the feedback Stephen, much appreciated!
On 7/23/2019 7:42 AM, Stephen Boyd wrote:
Quoting David Dai (2019-07-19 13:32:23)
Redefine the Network-on-Chip devices to more accurately describe
the interconnect topology on Qualcomm's SDM845 platform. Each
interconnect device can
Thanks for looking over this, Bjorn.
On 7/21/2019 12:13 PM, Bjorn Andersson wrote:
On Fri 19 Jul 13:32 PDT 2019, David Dai wrote:
Add the DT nodes for each of the Network-On-Chip interconnect
buses found on SDM845 based platform and redefine the rsc_hlos
child node as a bcm-voter device
Add the DT nodes for each of the Network-On-Chip interconnect
buses found on SDM845 based platform and redefine the rsc_hlos
child node as a bcm-voter device to better represent the hardware.
Signed-off-by: David Dai
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 61
of Resource
State Coordinators (RSC). There are display use cases where consumers may need
to target a different bcm-voter (Some display specific RSC) than the default,
and there needs to be a way to represent this connection in devicetree.
[1]: https://lkml.org/lkml/2019/6/13/143
David Dai (2
Redefine the Network-on-Chip devices to more accurately describe
the interconnect topology on Qualcomm's SDM845 platform. Each
interconnect device can communicate with different instances of the
RPMh hardware which are described as RSCs(Resource State Coordinators).
Signed-off-by: David Dai
On 7/16/2019 1:15 PM, Evan Green wrote:
On Mon, Jul 15, 2019 at 4:34 PM David Dai wrote:
Hi Evan,
Thanks for the continued help in reviewing these patches!
No problem. I want to do more, but haven't found time to do the
prerequisite research before jumping into some of the other
discussions
Hi Evan,
Thanks for the continued help in reviewing these patches!
On 7/11/2019 10:06 AM, Evan Green wrote:
Hi Georgi and David,
On Tue, Jun 18, 2019 at 2:17 AM Georgi Djakov wrote:
From: David Dai
Add support for wake and sleep commands by using a tag to indicate
whether
On 3/8/2019 10:35 AM, Evan Green wrote:
On Fri, Feb 8, 2019 at 9:22 AM Georgi Djakov wrote:
From: David Dai
Add support for wake and sleep commands by using a tag to indicate
whether or not the aggregate and set requests are active only or
dual context for a particular path.
Signed-off
of frequency points. The Qualcomm IP Accelerator (IPA)
clock is an example of a resource that is managed by the BCM and this a
requirement from the IPA driver in order to scale its core clock.
Signed-off-by: David Dai
---
drivers/clk/qcom/clk-rpmh.c | 146
On 1/14/2019 8:47 AM, Stephen Boyd wrote:
Quoting David Dai (2019-01-11 16:56:14)
On 1/9/2019 11:28 AM, Stephen Boyd wrote:
Quoting David Dai (2018-12-13 18:35:04)
+
+#define BCM_TCS_CMD(valid, vote) \
+ (BCM_TCS_CMD_COMMIT_MASK
On 1/9/2019 11:28 AM, Stephen Boyd wrote:
Quoting David Dai (2018-12-13 18:35:04)
The current clk-rpmh driver only supports on and off RPMh clock resources,
let's extend the current driver by add support for clocks that are managed
by a different type of RPMh resource known as Bus Clock
based on a preset of frequency points. The Qualcomm IP Accelerator (IPA) clock
is an example of a resource that is managed by the BCM and this a requirement
from the IPA driver in order to scale its core clock.
Signed-off-by: David Dai
---
drivers/clk/qcom/clk-rpmh.c | 141
On 12/5/2018 8:00 AM, Georgi Djakov wrote:
Hi Evan,
On 12/1/18 02:39, Evan Green wrote:
On Tue, Nov 27, 2018 at 10:04 AM Georgi Djakov wrote:
From: David Dai
Introduce Qualcomm SDM845 specific provider driver using the
interconnect framework.
Signed-off-by: David Dai
Signed-off
On 12/5/2018 8:00 AM, Georgi Djakov wrote:
Hi Evan,
On 12/1/18 02:39, Evan Green wrote:
On Tue, Nov 27, 2018 at 10:04 AM Georgi Djakov wrote:
From: David Dai
Introduce Qualcomm SDM845 specific provider driver using the
interconnect framework.
Signed-off-by: David Dai
Signed-off
On 12/4/2018 11:15 PM, Stephen Boyd wrote:
Quoting David Dai (2018-12-04 17:14:10)
On 12/4/2018 2:34 PM, Stephen Boyd wrote:
Quoting Alex Elder (2018-12-04 13:41:47)
On 12/4/18 1:24 PM, Stephen Boyd wrote:
Quoting David Dai (2018-12-03 19:50:13)
Add IPA clock support by extending
On 12/4/2018 11:15 PM, Stephen Boyd wrote:
Quoting David Dai (2018-12-04 17:14:10)
On 12/4/2018 2:34 PM, Stephen Boyd wrote:
Quoting Alex Elder (2018-12-04 13:41:47)
On 12/4/18 1:24 PM, Stephen Boyd wrote:
Quoting David Dai (2018-12-03 19:50:13)
Add IPA clock support by extending
Thanks for the quick feedback!
On 12/4/2018 11:24 AM, Stephen Boyd wrote:
Quoting David Dai (2018-12-03 19:50:13)
Add IPA clock support by extending the current clk rpmh driver to support
clocks that are managed by a different type of RPMh resource known as
Bus Clock Manager(BCM).
Yes
Thanks for the quick feedback!
On 12/4/2018 11:24 AM, Stephen Boyd wrote:
Quoting David Dai (2018-12-03 19:50:13)
Add IPA clock support by extending the current clk rpmh driver to support
clocks that are managed by a different type of RPMh resource known as
Bus Clock Manager(BCM).
Yes
On 12/4/2018 2:34 PM, Stephen Boyd wrote:
Quoting Alex Elder (2018-12-04 13:41:47)
On 12/4/18 1:24 PM, Stephen Boyd wrote:
Quoting David Dai (2018-12-03 19:50:13)
Add IPA clock support by extending the current clk rpmh driver to support
clocks that are managed by a different type of RPMh
On 12/4/2018 2:34 PM, Stephen Boyd wrote:
Quoting Alex Elder (2018-12-04 13:41:47)
On 12/4/18 1:24 PM, Stephen Boyd wrote:
Quoting David Dai (2018-12-03 19:50:13)
Add IPA clock support by extending the current clk rpmh driver to support
clocks that are managed by a different type of RPMh
This patch extends the existing clk-rpmh driver to support a different
type of RPMh resource known as Bus Clock Manager(BCM) in order to scale
performance for the Qualcomm IP Accelerator(IPA) core clock.
David Dai (1):
clk: qcom: clk-rpmh: Add IPA clock support
drivers/clk/qcom/clk-rpmh.c
This patch extends the existing clk-rpmh driver to support a different
type of RPMh resource known as Bus Clock Manager(BCM) in order to scale
performance for the Qualcomm IP Accelerator(IPA) core clock.
David Dai (1):
clk: qcom: clk-rpmh: Add IPA clock support
drivers/clk/qcom/clk-rpmh.c
Add IPA clock support by extending the current clk rpmh driver to support
clocks that are managed by a different type of RPMh resource known as
Bus Clock Manager(BCM).
Signed-off-by: David Dai
---
drivers/clk/qcom/clk-rpmh.c | 142 ++
include/dt
Add IPA clock support by extending the current clk rpmh driver to support
clocks that are managed by a different type of RPMh resource known as
Bus Clock Manager(BCM).
Signed-off-by: David Dai
---
drivers/clk/qcom/clk-rpmh.c | 142 ++
include/dt
configuration specific to each NoC.
David Dai (2):
interconnect: qcom: Add sdm845 interconnect provider driver
arm64: dts: sdm845: Add interconnect provider DT nodes
.../bindings/interconnect/qcom-sdm845.txt | 22 +
arch/arm64/boot/dts/qcom/sdm845.dtsi | 5 +
drivers
configuration specific to each NoC.
David Dai (2):
interconnect: qcom: Add sdm845 interconnect provider driver
arm64: dts: sdm845: Add interconnect provider DT nodes
.../bindings/interconnect/qcom-sdm845.txt | 22 +
arch/arm64/boot/dts/qcom/sdm845.dtsi | 5 +
drivers
Introduce Qualcomm SDM845 specific provider driver using the
interconnect framework.
Change-Id: I716b39068b4a211b8203b2a52d3037a5b84594ea
Signed-off-by: David Dai
---
.../bindings/interconnect/qcom-sdm845.txt | 22 +
drivers/interconnect/qcom/Kconfig | 8 +
drivers
Introduce Qualcomm SDM845 specific provider driver using the
interconnect framework.
Change-Id: I716b39068b4a211b8203b2a52d3037a5b84594ea
Signed-off-by: David Dai
---
.../bindings/interconnect/qcom-sdm845.txt | 22 +
drivers/interconnect/qcom/Kconfig | 8 +
drivers
Add RSC(Resource State Coordinator) provider
dictating network-on-chip interconnect bus performance
found on SDM845-based platforms.
Change-Id: I58f0bfc3ed484d7b45064dceb94dcfda507e9333
Signed-off-by: David Dai
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 5 +
1 file changed, 5 insertions
Add RSC(Resource State Coordinator) provider
dictating network-on-chip interconnect bus performance
found on SDM845-based platforms.
Change-Id: I58f0bfc3ed484d7b45064dceb94dcfda507e9333
Signed-off-by: David Dai
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 5 +
1 file changed, 5 insertions
Hi Evan,
Thanks for taking the time to review and feedback!
On 7/27/2018 2:12 PM, Evan Green wrote:
Hi David,
On Thu, Jul 26, 2018 at 4:30 PM David Dai wrote:
Introduce Qualcomm SDM845 specific provider driver using the
interconnect framework.
Signed-off-by: David Dai
---
.../bindings
Hi Evan,
Thanks for taking the time to review and feedback!
On 7/27/2018 2:12 PM, Evan Green wrote:
Hi David,
On Thu, Jul 26, 2018 at 4:30 PM David Dai wrote:
Introduce Qualcomm SDM845 specific provider driver using the
interconnect framework.
Signed-off-by: David Dai
---
.../bindings
to each NoC.
David Dai (2):
interconnect: qcom: Add sdm845 interconnect provider driver
arm64: dts: sdm845: Add interconnect provider DT nodes
.../bindings/interconnect/qcom-sdm845.txt | 22 +
arch/arm64/boot/dts/qcom/sdm845.dtsi | 5 +
drivers/interconnect/qcom
Add RSC(Resource State Coordinator) provider
dictating network-on-chip interconnect bus performance
found on SDM845-based platforms.
Signed-off-by: David Dai
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b
Introduce Qualcomm SDM845 specific provider driver using the
interconnect framework.
Signed-off-by: David Dai
---
.../bindings/interconnect/qcom-sdm845.txt | 22 +
drivers/interconnect/qcom/Kconfig | 8 +
drivers/interconnect/qcom/Makefile | 1
to each NoC.
David Dai (2):
interconnect: qcom: Add sdm845 interconnect provider driver
arm64: dts: sdm845: Add interconnect provider DT nodes
.../bindings/interconnect/qcom-sdm845.txt | 22 +
arch/arm64/boot/dts/qcom/sdm845.dtsi | 5 +
drivers/interconnect/qcom
Add RSC(Resource State Coordinator) provider
dictating network-on-chip interconnect bus performance
found on SDM845-based platforms.
Signed-off-by: David Dai
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 5 +
1 file changed, 5 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sdm845.dtsi
b
Introduce Qualcomm SDM845 specific provider driver using the
interconnect framework.
Signed-off-by: David Dai
---
.../bindings/interconnect/qcom-sdm845.txt | 22 +
drivers/interconnect/qcom/Kconfig | 8 +
drivers/interconnect/qcom/Makefile | 1
with active only requirements.
* Add Network-on-Chip (NoC) objects to encapsulate logical nodes for QoS.
* Add QoS configuration specific to each NoC.
David Dai (2):
interconnect: qcom: Add sdm845 interconnect provider driver
arm64: dts: sdm845: Add interconnect provider DT nodes
with active only requirements.
* Add Network-on-Chip (NoC) objects to encapsulate logical nodes for QoS.
* Add QoS configuration specific to each NoC.
David Dai (2):
interconnect: qcom: Add sdm845 interconnect provider driver
arm64: dts: sdm845: Add interconnect provider DT nodes
Introduce Qualcomm SDM845 specific provider driver using the
interconnect framework.
Change-Id: I716b39068b4a211b8203b2a52d3037a5b84594ea
Signed-off-by: David Dai
---
.../bindings/interconnect/qcom-sdm845.txt | 22 +
drivers/interconnect/qcom/Kconfig | 8 +
drivers
Introduce Qualcomm SDM845 specific provider driver using the
interconnect framework.
Change-Id: I716b39068b4a211b8203b2a52d3037a5b84594ea
Signed-off-by: David Dai
---
.../bindings/interconnect/qcom-sdm845.txt | 22 +
drivers/interconnect/qcom/Kconfig | 8 +
drivers
Add RSC(Resource State Coordinator) provider
dictating network-on-chip interconnect bus performance
found on SDM845-based platforms.
Change-Id: I58f0bfc3ed484d7b45064dceb94dcfda507e9333
Signed-off-by: David Dai
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 5 +
1 file changed, 5 insertions
Add RSC(Resource State Coordinator) provider
dictating network-on-chip interconnect bus performance
found on SDM845-based platforms.
Change-Id: I58f0bfc3ed484d7b45064dceb94dcfda507e9333
Signed-off-by: David Dai
---
arch/arm64/boot/dts/qcom/sdm845.dtsi | 5 +
1 file changed, 5 insertions
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