On Mon, Mar 29, 2021 at 7:47 AM Will Deacon wrote:
>
> On Fri, Mar 26, 2021 at 04:13:02PM -0700, Eric Anholt wrote:
> > db820c wants to use the qcom smmu path to get HUPCF set (which keeps
> > the GPU from wedging and then sometimes wedging the kernel after a
> > page fau
This enables the adreno-specific SMMU path that sets HUPCF so
(user-managed) page faults don't wedge the GPU.
Signed-off-by: Eric Anholt
---
We've been seeing a flaky test per day or so in Mesa CI where the
kernel gets wedged after an iommu fault turns into CP errors. With
this patch, the CI
db820c wants to use the qcom smmu path to get HUPCF set (which keeps
the GPU from wedging and then sometimes wedging the kernel after a
page fault), but it doesn't have separate pagetables support yet in
drm/msm so we can't go all the way to the TTBR1 path.
Signed-off-by: Eric Anholt
---
We've
Clean up GMU OOB set/clear handling")
> > Signed-off-by: Jonathan Marek
>
> Thanks. I feel silly that I missed that.
>
> Reviewed-by: Jordan Crouse
Yeah, oops.
Reviewed-by: Eric Anholt
, the message seems to
have completely gone away.
Signed-off-by: Eric Anholt
Fixes: 4b565ca5a2cb ("drm/msm: Add A6XX device support")
Reviewed-by: Jordan Crouse
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/gpu/drm/msm/adreno/a6x
to it.
Signed-off-by: Eric Anholt
Fixes: 4b565ca5a2cb ("drm/msm: Add A6XX device support")
Reviewed-by: Jordan Crouse
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 25 ++---
drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 8
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 4 ++-
Now that the bug is fixed in the minimal way for stable, go make the
code table-driven.
Signed-off-by: Eric Anholt
Reviewed-by: Jordan Crouse
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 124 +-
drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 55
2 files changed
Updated commit messages over v2, no code changes.
Eric Anholt (3):
drm/msm: Fix race of GPU init vs timestamp power management.
drm/msm: Fix races managing the OOB state for timestamp vs timestamps.
drm/msm: Clean up GMU OOB set/clear handling.
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 105
Now that the bug is fixed in the minimal way for stable, go make the
code table-driven.
Signed-off-by: Eric Anholt
---
Previous version hadn't been rebased off of a bit of debug code I had,
so it wouldn't cleanly apply.
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 124
that we start many tests in parallel, and waiting for NFS
to page in code probably means that lots of tests hit the same point
of screen init at the same time).
Signed-off-by: Eric Anholt
Cc: sta...@vger.kernel.org # v5.9
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 4
1 file changed, 4 insertions
Now that the bug is fixed in the minimal way for stable, go make the
code table-driven.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 124 +-
drivers/gpu/drm/msm/adreno/a6xx_gmu.h | 55
2 files changed, 77 insertions(+), 102
We were using the same force-poweron bit in the two codepaths, so they
could race to have one of them lose GPU power early.
Signed-off-by: Eric Anholt
Cc: sta...@vger.kernel.org # v5.9
---
drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 25 ++---
drivers/gpu/drm/msm/adreno
R to set the ID lookup from base 1. This avoids all lookups that
> otherwise starts from 0 since 0 is always unused / available.
>
> References: commit 6ce711f27500 ("idr: Make 1-based IDRs more efficient")
>
> Signed-off-by: Deepak R Varma
> ---
> Changes since v1:
&
On Thu, Nov 5, 2020 at 10:25 AM Deepak R Varma wrote:
>
> idr_init() uses base 0 which is an invalid identifier for this driver.
> The idr_alloc for this driver uses VC4_PERFMONID_MIN as start value for
> ID range and it is #defined to 1. The new function idr_init_base allows
> IDR to set the ID
On Wed, Sep 23, 2020 at 6:13 AM Dave Stevenson
wrote:
>
> Hi
>
> On Wed, 23 Sep 2020 at 08:53, Li Heng wrote:
> >
> > This addresses the following gcc warning with "make W=1":
> >
> > drivers/gpu/drm/v3d/v3d_drv.c:73:32: warning:
> > ‘v3d_v3d_pm_ops’ defined but not used
roga
> Signed-off-by: Eric Anholt
> Link:
> https://patchwork.freedesktop.org/patch/msgid/20190916071125.5255-1-ito...@igalia.com
> Fixes: a783a09ee76d ("drm/v3d: Refactor job management.")
> Reviewed-by: Eric Anholt
> Signed-off-by: Sasha Levin
You're do
1);
> + irq1 = platform_get_irq_optional(v3d_to_pdev(v3d), 1);
> if (irq1 == -EPROBE_DEFER)
> return irq1;
> if (irq1 > 0) {
> --
Reviewed-by: Eric Anholt
On Tue, Jul 7, 2020 at 3:26 AM Maxime Ripard wrote:
>
> If the DSI driver is the last to probe, component_add will try to run all
> the bind callbacks straight away and return the error code.
>
> However, since we depend on a power domain, we're pretty much guaranteed to
> be in that case on the
On Tue, Jun 30, 2020 at 1:25 AM Maxime Ripard wrote:
>
> Hi Eric,
>
> On Thu, Jun 11, 2020 at 03:36:45PM +0200, Maxime Ripard wrote:
> > Hi,
> >
> > This is another part of the rpi4 HDMI series that got promoted to a
> > series of its own to try to reduce the main one.
> >
> > This rework is
We don't expect to find vbif_nrt or regdma on cheza, but were clogging
up dmesg with errors about it.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 4 ++--
drivers/gpu/drm/msm/msm_drv.c | 22 ++
drivers/gpu/drm/msm/msm_drv.h
Nothing was using the lengths of these ioremaps.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 21 -
drivers/gpu/drm/msm/disp/dpu1/dpu_kms.h | 1 -
drivers/gpu/drm/msm/disp/dpu1/dpu_mdss.c | 9 -
3 files changed, 31 deletions(-)
diff
We don't want it under CONFIG_DRM_MSM_GPU_STATE, we need it all the
time (like the other GPUs do).
Fixes: ccac7ce373c1 ("drm/msm: Refactor address space initialization")
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 2 +-
1 file changed, 1 insertion(+),
: ccac7ce373c1 ("drm/msm: Refactor address space initialization")
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/msm/adreno/adreno_gpu.c
b/drivers/gpu/drm/msm/adreno/adreno_g
On Wed, Jun 17, 2020 at 1:16 PM Eric Anholt wrote:
>
> On Thu, Apr 9, 2020 at 4:34 PM Jordan Crouse wrote:
> >
> > Refactor how address space initialization works. Instead of having the
> > address space function create the MMU object (and thus require separate but
> &
On Thu, Apr 9, 2020 at 4:34 PM Jordan Crouse wrote:
>
> Refactor how address space initialization works. Instead of having the
> address space function create the MMU object (and thus require separate but
> equal functions for gpummu and iommu) use a single function and pass the
> MMU struct in.
On Wed, May 27, 2020 at 8:49 AM Maxime Ripard wrote:
>
> The HDMI block has a block that controls clocks and reset signals to the
> HDMI0 and HDMI1 controllers.
>
> Let's expose that through a clock driver implementing a clock and reset
> provider.
>
> Cc: Michael Turquette
> Cc: Stephen Boyd
>
On Tue, Jun 2, 2020 at 8:02 AM Dave Stevenson
wrote:
>
> Hi Maxime and Eric
>
> On Tue, 2 Jun 2020 at 15:12, Maxime Ripard wrote:
> >
> > Hi Eric
> >
> > On Wed, May 27, 2020 at 09:54:44AM -0700, Eric Anholt wrote:
> > > On Wed,
On Tue, Jun 2, 2020 at 5:52 AM Maxime Ripard wrote:
>
> Hi Eric,
>
> On Wed, May 27, 2020 at 09:33:44AM -0700, Eric Anholt wrote:
> > On Wed, May 27, 2020 at 8:49 AM Maxime Ripard wrote:
> > >
> > > In order to prevent timeouts and stalls in the pipeline, th
On Wed, May 27, 2020 at 8:50 AM Maxime Ripard wrote:
>
> At boot time, if we detect that a pixelvalve has been enabled, we need to
> be able to retrieve the HVS channel it has been assigned to so that we can
> disable that channel too. Let's create that function that returns the FIFO
> or an
On Wed, May 27, 2020 at 8:50 AM Maxime Ripard wrote:
>
> The BCM2711 has 5 pixelvalves, so now that our driver is ready, let's add
> support for them.
>
> Signed-off-by: Maxime Ripard
> ---
> drivers/gpu/drm/vc4/vc4_crtc.c | 84 ++-
>
On Wed, May 27, 2020 at 8:51 AM Maxime Ripard wrote:
>
> the vc4_hdmi driver has some custom structures to hold the data it needs to
> associate with the drm_encoder and drm_connector structures.
>
> However, it allocates them separately from the vc4_hdmi structure which
> makes it more
On Wed, May 27, 2020 at 8:50 AM Maxime Ripard wrote:
>
> Signed-off-by: Maxime Ripard
> ---
> drivers/gpu/drm/vc4/vc4_crtc.c | 272 +---
> drivers/gpu/drm/vc4/vc4_drv.h | 5 +-
> drivers/gpu/drm/vc4/vc4_hvs.c | 298 ++-
> 3 files
On Wed, May 27, 2020 at 8:50 AM Maxime Ripard wrote:
>
> The driver resets the pixelvalve FIFO in a number of occurences without
> always using the same sequence.
>
> Since this will be critical for BCM2711, let's move that sequence to a
> function so that we are consistent.
>
> Signed-off-by:
On Wed, May 27, 2020 at 8:50 AM Maxime Ripard wrote:
>
> The HVS found in the BCM2711 has 6 outputs and 3 FIFOs, with each output
> being connected to a pixelvalve, and some muxing between the FIFOs and
> outputs.
>
> Any output cannot feed from any FIFO though, and they all have a bunch of
>
On Wed, May 27, 2020 at 8:50 AM Maxime Ripard wrote:
>
> The VIDEN bit in the pixelvalve currently being used to enable or disable
> the pixelvalve seems to not be enough in some situations, which whill end
> up with the pixelvalve stalling.
>
> In such a case, even re-enabling VIDEN doesn't
On Wed, May 27, 2020 at 8:49 AM Maxime Ripard wrote:
>
> Now that we have everything in place, we can now register all the overlay
> planes that can be assigned to all the CRTCs.
>
> This has two side effects:
>
> - The number of overlay planes is reduced from 24 to 8. This is temporary
>
On Wed, May 27, 2020 at 8:49 AM Maxime Ripard wrote:
>
> From: Dave Stevenson
>
> LBM allocations were always taking the worst case sizing of
> max(src_width, dst_width) * 16. This is significantly over
> the required sizing, and stops us rendering multiple 4k images
> to the screen.
>
> Add
On Wed, May 27, 2020 at 8:49 AM Maxime Ripard wrote:
>
> In order to prevent timeouts and stalls in the pipeline, the core clock
> needs to be maxed at 500MHz during a modeset on the BCM2711.
Like, the whole system's core clock? How is it reasonable for some
device driver to crank the system's
e
> *pdev)
> }
>
> static const struct of_device_id vc4_of_match[] = {
> + { .compatible = "brcm,bcm2711-vc5", },
> { .compatible = "brcm,bcm2835-vc4", },
> { .compatible = "brcm,cygnus-vc4", },
> {},
Patch
always, hides references to the
> nents and orig_nents entries, making the code robust, easier to follow
> and copy/paste safe.
>
> Signed-off-by: Marek Szyprowski
Reviewed-by: Eric Anholt
On Mon, May 11, 2020 at 4:02 AM Nicolas Saenz Julienne
wrote:
>
> Eric Anholt's repo isn't used anymore. List current one.
Acked-by: Eric Anholt
r the suspend state and blindly call into the devfreq
> callbacks that end up triggering hardware reads in the GPU driver.
>
> Call pm_runtime_get_if_in_use() in the gpu_busy() and gpu_set_freq()
> callbacks to skip the hardware access if it isn't active.
>
> v2: Use
On Fri, May 1, 2020 at 11:26 AM Jordan Crouse wrote:
>
> Writing to the devfreq sysfs nodes while the GPU is powered down can
> result in a system crash (on a5xx) or a nasty GMU error (on a6xx):
>
> $ /sys/class/devfreq/500.gpu# echo 5 > min_freq
> [ 104.841625] platform
Rob Clark writes:
> From: Rob Clark
>
> The goal here is to support inheriting a display setup by bootloader,
> although there may also be some non-display related use-cases.
>
> Rough idea is to add a flag for clks and power domains that might
> already be enabled when kernel starts, and which
Nicolas Saenz Julienne writes:
> Raspberry Pi's firmware offers and interface though which update it's
> performance requirements. It allows us to request for specific runtime
> frequencies, which the firmware might or might not respect, depending on
> the firmware configuration and thermals.
>
Nicolas Saenz Julienne writes:
> Raspberry Pi's firmware controls this pll, we should use the firmware
> interface to access it.
>
> Signed-off-by: Nicolas Saenz Julienne
Acked-by: Eric Anholt
If someone ever has a non-rpi 2835 to support, they can resurrect this.
signature.asc
Nicolas Saenz Julienne writes:
> Registers clk-raspberrypi as a platform device as part of the driver's
> probe sequence.
Similar to how we have VCHI register platform devices for the services
VCHI provides, shouldn't we have the firmware driver register the device
for clk_raspberrypi? Or put
Daniel Vetter writes:
> On Wed, Apr 24, 2019 at 03:06:38PM -0700, Eric Anholt wrote:
>> I was trying to figure out if it was permissible to merge the Mesa
>> side of V3D's CSD support yet while it's in drm-misc-next but not
>> drm-next, and developers on #dri-devel IRC h
inally, Al updates the logic to account for the
> additional registers that were added on 7211.
As far as platform maintainer goes, patch 1-2 are:
Reviewed-by: Eric Anholt
and patch 3 is:
Acked-by: Eric Anholt
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Florian Fainelli writes:
> Make the BCM2835 clock driver selectable by other
> architectures/platforms. ARCH_BRCMSTB will be selecting that driver in
> the next commit since new chips like 7211 use the same CPRMAN clock
> controller that this driver supports.
These two are:
Revie
Florian Fainelli writes:
> ARCH_BRCMSTB platforms have the BCM2835 SPI controllers (normal and
> auxiliary), allow selecting the two drivers on such platforms.
>
> Signed-off-by: Florian Fainelli
Reviewed-by: Eric Anholt
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Description: PGP signature
Stefan Wahren writes:
>> Eric Anholt hat am 8. März 2019 um 22:07 geschrieben:
>>
>>
>> When adding the MFD dependency for power domains and WDT in bcm2835, I
>> added it only on the arm32 side and missed it for arm64.
>>
>> Fixes: 5e6acc3e678e (&qu
)
This pull request brings in a build fix for arm64 with bcm2835
enabled, and fixes the driver in the presence of -EPROBE_DEFER.
Eric Anholt (3):
soc: bcm: bcm2835-pm: Fix PM_IMAGE_PERI power domain support.
soc: bcm: bcm2835
Rob Herring writes:
> On Fri, Mar 8, 2019 at 10:17 AM Eric Anholt wrote:
>>
>> Now that we have the reservation object in the GEM object, it's easy
>> to provide a helper for this common case. Noticed while reviewing
>> panfrost and lima drivers. This particu
Dave Emett writes:
> On Fri, 8 Mar 2019 at 17:43, Eric Anholt wrote:
>>
>> No compatible string for it yet, just the version-dependent changes.
>> They've now tied the hub and the core interrupt lines into a single
>> interrupt line coming out of the block
Florian Fainelli writes:
> On 3/4/19 4:02 PM, Eric Anholt wrote:
>> The following changes since commit e1dc2b2e1bef7237fd8fc055fe1ec2a6ff001f91:
>>
>> ARM: bcm283x: Switch V3D over to using the PM driver instead of firmware.
>> (2019-02-01 10:34:32 +0100)
>
When adding the MFD dependency for power domains and WDT in bcm2835, I
added it only on the arm32 side and missed it for arm64.
Fixes: 5e6acc3e678e ("bcm2835-pm: Move bcm2835-watchdog's DT probe to an MFD.")
Signed-off-by: Eric Anholt
Reported-by: Stefan Wahren
---
This fix is for t
Eric Anholt writes:
> [ Unknown signature status ]
> Dave Emett writes:
>
>> Sorry, a few things I thought of after sending the Reviewed-by email...
>>
>>> + v3d->reset = devm_reset_control_get_exclusive(dev, NULL);
>>> + if (IS_ERR(v3d-&g
Rob Herring writes:
> On Fri, Mar 8, 2019 at 10:17 AM Eric Anholt wrote:
>>
>> Now that we have the reservation object in the GEM object, it's easy
>> to provide a helper for this common case. Noticed while reviewing
>> panfrost and lima drivers. This particu
Noted in review by Dave Emett for V3D 4.2 support.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/v3d/v3d_drv.c | 8 ++--
drivers/gpu/drm/v3d/v3d_drv.h | 2 +-
drivers/gpu/drm/v3d/v3d_irq.c | 13 +++--
3 files changed, 18 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm
(noted
by Dave). Update the binding doc.
v4: Improve error handling for IRQ init.
Signed-off-by: Eric Anholt
---
.../devicetree/bindings/gpu/brcm,bcm-v3d.txt | 11 +++--
drivers/gpu/drm/v3d/v3d_drv.c | 21 +++--
drivers/gpu/drm/v3d/v3d_drv.h | 2 +
drivers
Dave Emett writes:
> Sorry, a few things I thought of after sending the Reviewed-by email...
>
>> + v3d->reset = devm_reset_control_get_exclusive(dev, NULL);
>> + if (IS_ERR(v3d->reset)) {
>> + ret = PTR_ERR(v3d->reset);
>> +
>> + if (ret == -EPROBE_DEFER)
struct.
Eric Anholt (4):
drm: Add helpers for locking an array of BO reservations.
drm/v3d: Use drm_gem_lock_reservations()/drm_gem_unlock_reservations()
drm/v3d: Remove some dead members of struct v3d_bo.
drm/v3d: Use the new shmem helpers to reduce driver boilerplate.
drivers/gpu/drm
Depends on
https://patchwork.freedesktop.org/patch/290754/?series=57669=1 --
Rob and I have been talking about adding some more help for the
dma_map_sg() code in v3d_mmu.c (which panfrost has a similar version
of), but this already seems like a good cleanup.
Signed-off-by: Eric Anholt
Now that we have the reservation object in the GEM object, it's easy
to provide a helper for this common case. Noticed while reviewing
panfrost and lima drivers. This particular version came out of v3d,
which in turn was a copy from vc4.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm
Now that we have core helpers, this gets rid of a lot of boilerplate.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/v3d/v3d_gem.c | 56 ---
1 file changed, 6 insertions(+), 50 deletions(-)
diff --git a/drivers/gpu/drm/v3d/v3d_gem.c b/drivers/gpu/drm/v3d
vmas was from the previous model of page table management (one per
fd), and vaddr was left over from vc4.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/v3d/v3d_bo.c | 1 -
drivers/gpu/drm/v3d/v3d_drv.h | 9 -
2 files changed, 10 deletions(-)
diff --git a/drivers/gpu/drm/v3d/v3d_bo.c
domains driver.
Eric Anholt (2):
soc: bcm: bcm2835-pm: Fix PM_IMAGE_PERI power domain support.
soc: bcm: bcm2835-pm: Fix error paths of initialization.
drivers/soc/bcm/bcm2835-power.c | 49
Hi Florian,
The following changes since commit ab1b4ef966af90ad79fa3c4c124e47915cddde10:
ARM: dts: bcm2835-rpi-zero-w: Drop unnecessary pinctrl (2019-02-01 11:56:32
+0100)
are available in the Git repository at:
git://github.com/anholt/linux tags/bcm2835-dt-next-2019-03-04
for you to
ct thermal_zone_device, and gets it
> wrong - leading to the crash. Instead, store its private data as the
> drvdata and retrieve the thermal_zone_device pointer from it.
>
> Fixes: bcb7dd9ef206 ("thermal: bcm2835: add thermal driver for bcm2835 SoC")
>
> Signed-off-by: Phi
rry pi board model B revison 2 have the hot plug detector gpio
>> active high (and not low as it was in the dts).
>>
>> Signed-off-by: Helen Koike
>> Reviewed-by: Eric Anholt
>
> I think we should add a Fixes tag here, so it could be backported.
>
> @Eric: Feel f
, if you do, try appliying the patch below.
We even have the GPIO labeled as "HDMI_HPD_P" above, and dt-blob.dts
agrees.
Reviewed-by: Eric Anholt
Thanks! If Stefan doesn't pick this up shortly, I can.
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You'll get garbage measurements if the registers always read back
0xdeadbeef
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/v3d/v3d_debugfs.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/v3d/v3d_debugfs.c
b/drivers/gpu/drm/v3d/v3d_debugfs.c
index eb2b2d2f8553
(noted
by Dave). Update the binding doc.
Signed-off-by: Eric Anholt
---
.../devicetree/bindings/gpu/brcm,bcm-v3d.txt | 11 ++--
drivers/gpu/drm/v3d/v3d_drv.c | 21 +++---
drivers/gpu/drm/v3d/v3d_drv.h | 2 ++
drivers/gpu/drm/v3d/v3d_gem.c
the old field.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/v3d/v3d_gem.c | 3 ++-
drivers/gpu/drm/v3d/v3d_regs.h | 2 ++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/v3d/v3d_gem.c b/drivers/gpu/drm/v3d/v3d_gem.c
index 109be31e47ea..449d01ea54a0 100644
of the business of knowing the whole list of
components.
Thanks to this change, dsi0 (if it existed) would register its node.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/vc4/vc4_bo.c | 6 +--
drivers/gpu/drm/vc4/vc4_crtc.c| 33 +++-
drivers/gpu/drm/vc4/vc4_debugfs.c | 84
This makes sure the vc4_reset doesn't hit an obscure race with the
GET_PARAM ioctl, fixes a decrement outside of the lock, and prevents
future code from making mistakes with the weird return value of
pm_runtime_get_sync().
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/vc4/vc4_drv.c | 21
Otherwise, you sometimes decode the ident fields based on 0xdeadbeef
register reads.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/vc4/vc4_v3d.c | 29 +
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_v3d.c b/drivers/gpu/drm
One might want to use the VC4 display stack without using Mesa.
Similar to the debugfs fixes for not having all of the possible
display bits enabled, make sure you can't oops in vc4 if v3d isn't
enabled.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/vc4/vc4_drv.c | 11 +++
drivers
This removes a bunch of duplicated boilerplate for the debugfs vs
runtime printk debug dumping.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/vc4/vc4_crtc.c | 68 ++---
drivers/gpu/drm/vc4/vc4_dpi.c | 23 ++---
drivers/gpu/drm/vc4/vc4_drv.h | 7 ++
drivers/gpu/drm/vc4/vc4_dsi.c
The debugfs_regset32 is nice to use for reducing boilerplate in
dumping a bunch of regs in debugfs, but we also want to be able to
print to dmesg them at runtime for driver debugging. drm_printer lets
us format debugfs and the printk the same way.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm
Now I can extend the stats without more copy and pasting between the
two.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/vc4/vc4_bo.c | 48 +++-
1 file changed, 14 insertions(+), 34 deletions(-)
diff --git a/drivers/gpu/drm/vc4/vc4_bo.c b/drivers/gpu/drm/vc4
We don't have ASB master/slave regs for this domain, so just skip that
step.
Signed-off-by: Eric Anholt
Fixes: 670c672608a1 ("soc: bcm: bcm2835-pm: Add support for power domains under
a new binding.")
---
drivers/soc/bcm/bcm2835-power.c | 14 --
1 file changed, 12 insert
Florian Fainelli writes:
> On 2/13/19 2:33 PM, Stefan Wahren wrote:
>>
>>> Eric Anholt hat am 13. Februar 2019 um 19:28 geschrieben:
>>>
>>>
>>> Stefan Wahren writes:
>>>
>>>> Hi Eric,
>>>>
>>>> Am 13
en no clk is present in the DT.
Signed-off-by: Eric Anholt
Fixes: 670c672608a1 ("soc: bcm: bcm2835-pm: Add support for power domains under
a new binding.")
---
drivers/soc/bcm/bcm2835-power.c | 35 -
1 file changed, 30 insertions(+), 5 deletions(-)
diff --gi
for avoiding underrun reports when reconfiguring the
> pipeline. It is now based on detection instead of delaying the underrun
> interrupt unmasking.
>
> It can be tested with a dedicated IGT GPU Tools series:
> VC4 load tracker testing
Series is:
Reviewed-by: Eric Anholt
Thanks for
YueHaibing writes:
> Fixes gcc '-Wunused-but-set-variable' warning:
>
> drivers/gpu/drm/vc4/vc4_txp.c: In function 'vc4_txp_connector_atomic_check':
> drivers/gpu/drm/vc4/vc4_txp.c:252:29: warning:
> variable 'gem' set but not used [-Wunused-but-set-variable]
> struct drm_gem_cma_object *gem;
Stefan Wahren writes:
> Hi Eric,
>
> Am 13.02.19 um 01:33 schrieb Eric Anholt:
>> The clock driver may probe after ours and so we need to pass the
>> -EPROBE_DEFER out. Fix the other error path while we're here.
>>
>> Signed-off-by: Eric Anholt
>> Fix
We don't have ASB master/slave regs for this domain, so just skip that
step.
Signed-off-by: Eric Anholt
Fixes: 670c672608a1 ("soc: bcm: bcm2835-pm: Add support for power domains under
a new binding.")
---
drivers/soc/bcm/bcm2835-power.c | 14 --
1 file changed, 12 insert
The clock driver may probe after ours and so we need to pass the
-EPROBE_DEFER out. Fix the other error path while we're here.
Signed-off-by: Eric Anholt
Fixes: 670c672608a1 ("soc: bcm: bcm2835-pm: Add support for power domains under
a new binding.")
---
drivers/soc/bcm/bcm2835-po
is going away in favor of an external reset
controller in a larger HW module.
v2: Use consistent checks for whether we're on 4.2, and fix a leak in
an error path.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/v3d/v3d_drv.c | 19 +++
drivers/gpu/drm/v3d/v3d_drv.h | 1 +
drivers
You'll get garbage measurements if the registers always read back
0xdeadbeef
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/v3d/v3d_debugfs.c | 8
1 file changed, 8 insertions(+)
diff --git a/drivers/gpu/drm/v3d/v3d_debugfs.c
b/drivers/gpu/drm/v3d/v3d_debugfs.c
index eb2b2d2f8553
the old field.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/v3d/v3d_gem.c | 3 ++-
drivers/gpu/drm/v3d/v3d_regs.h | 2 ++
2 files changed, 4 insertions(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/v3d/v3d_gem.c b/drivers/gpu/drm/v3d/v3d_gem.c
index 3ee3ae4d3cac..06538ffa3014 100644
Daniel Vetter writes:
> On Thu, Feb 07, 2019 at 03:26:13PM -0800, Eric Anholt wrote:
>> We always decrement at GEM free, so make sure we increment at GEM
>> creation for dma-bufs.
>
> Indeed. Reviewed-by: Daniel Vetter
Merged to drm-misc-next. Thanks!
signature
Thomas Spurden writes:
> On Thu, 7 Feb 2019 at 20:10, Eric Anholt wrote:
>>
>> Signed-off-by: Eric Anholt
>
> Reviewed-by: Thomas Spurden
Merged this one, will send out respins of the others.
signature.asc
Description: PGP signature
We always decrement at GEM free, so make sure we increment at GEM
creation for dma-bufs.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/v3d/v3d_bo.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/drivers/gpu/drm/v3d/v3d_bo.c b/drivers/gpu/drm/v3d/v3d_bo.c
index a08766d39eab
"Koenig, Christian" writes:
> Am 07.12.18 um 20:16 schrieb Eric Anholt:
>> The entity->dependency can go away completely once we've called
>> drm_sched_entity_add_dependency_cb() (if the cb is called before we
>> get around to tracing). The tracepoint i
"Gustavo A. R. Silva" writes:
> One of the more common cases of allocation size calculations is finding
> the size of a structure that has a zero-sized array at the end, along
> with memory for some number of elements for that array. For example:
>
> struct foo {
> int stuff;
> void
is going away in favor of an external reset
controller in a larger HW module.
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/v3d/v3d_drv.c | 18 ++
drivers/gpu/drm/v3d/v3d_drv.h | 1 +
drivers/gpu/drm/v3d/v3d_gem.c | 12 +++-
drivers/gpu/drm/v3d/v3d_irq.c | 27
Signed-off-by: Eric Anholt
---
drivers/gpu/drm/v3d/v3d_drv.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/gpu/drm/v3d/v3d_drv.c b/drivers/gpu/drm/v3d/v3d_drv.c
index 22fff0d3aecd..1f22ce542a04 100644
--- a/drivers/gpu/drm/v3d/v3d_drv.c
+++ b/drivers/gpu/drm
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