anges introduced
by LOGIC_IO.
Signed-off-by: zhichang.yuan <yuanzhich...@hisilicon.com>
Signed-off-by: Gabriele Paoloni <gabriele.paol...@huawei.com>
Signed-off-by: Arnd Bergmann <a...@arndb.de>#earlier draft
---
drivers/acpi/pci_root.c | 8 ++--
drivers/of/address.
From: gabriele paoloni <gabriele.paol...@huawei.com>
This patchset supports the IPMI-bt device attached to the Low-Pin-Count
interface implemented on Hisilicon Hip06/Hip07 SoC.
---
| LP
Signed-off-by: zhichang.yuan
Signed-off-by: Gabriele Paoloni
Signed-off-by: Arnd Bergmann #earlier draft
---
drivers/acpi/pci_root.c | 8 ++--
drivers/of/address.c | 5 ++-
drivers/pci/pci.c| 101 ++-
include/asm-generic/
From: gabriele paoloni
This patchset supports the IPMI-bt device attached to the Low-Pin-Count
interface implemented on Hisilicon Hip06/Hip07 SoC.
---
| LPC host
I/O translation will be done in a different way from that one of PCI MMIO.
In this way, the I/O 'reg' property of the special ISA/LPC devices will be
parsed correctly.
Signed-off-by: zhichang.yuan <yuanzhich...@hisilicon.com>
Signed-off-by: Gabriele Paoloni <gabriele.paol...@huawei
different way from that one of PCI MMIO.
In this way, the I/O 'reg' property of the special ISA/LPC devices will be
parsed correctly.
Signed-off-by: zhichang.yuan
Signed-off-by: Gabriele Paoloni
Signed-off-by: Arnd Bergmann #earlier draft
Acked-by: Rob Herring
---
drivers/of/addr
placed in the children resources.
Signed-off-by: zhichang.yuan <yuanzhich...@hisilicon.com>
Signed-off-by: Gabriele Paoloni <gabriele.paol...@huawei.com>
---
drivers/acpi/arm64/Makefile| 1 +
drivers/acpi/arm64/acpi_indirect_pio.c | 301 +
drive
-by: zhichang.yuan
Signed-off-by: Gabriele Paoloni
---
drivers/acpi/arm64/Makefile| 1 +
drivers/acpi/arm64/acpi_indirect_pio.c | 301 +
drivers/acpi/internal.h| 5 +
drivers/acpi/scan.c| 1 +
include/acpi
From: "zhichang.yuan" <yuanzhich...@hisilicon.com>
Based on the provious patches, this patch supports the ACPI LPC host on
Hip06/Hip07.
Signed-off-by: zhichang.yuan <yuanzhich...@hisilicon.com>
Signed-off-by: John Garry <john.ga...@huawei.com>
Signed-off-by: Gab
From: "zhichang.yuan"
Based on the provious patches, this patch supports the ACPI LPC host on
Hip06/Hip07.
Signed-off-by: zhichang.yuan
Signed-off-by: John Garry
Signed-off-by: Gabriele Paoloni
Tested-by: dann frazier
---
drivers/acpi/arm64/acpi_indirect_pio.c | 3 ++
d
...@hisilicon.com>
Signed-off-by: Gabriele Paoloni <gabriele.paol...@huawei.com>
---
include/asm-generic/io.h | 50 +
include/linux/logic_pio.h | 110 ++
lib/Kconfig | 26 +
lib/Makefile | 2 +
lib/logic_pio.c | 280 +++
by: Zou Rongrong <zourongr...@huawei.com>
Signed-off-by: zhichang.yuan <yuanzhich...@hisilicon.com>
Signed-off-by: Gabriele Paoloni <gabriele.paol...@huawei.com>
Acked-by: Rob Herring <r...@kernel.org> #dts part
---
.../arm/hisilicon/hisilicon-low-pin-coun
s to either PCI MMIO devices or host-local
I/O peripherals can be unified into the existing I/O accessors defined in
asm-generic/io.h and be redirected to the right device-specific hooks
based on the input logical PIO.
Signed-off-by: zhichang.yuan
Signed-off-by: Gabriele Paoloni
---
include/asm
chang.yuan
Signed-off-by: Gabriele Paoloni
Acked-by: Rob Herring #dts part
---
.../arm/hisilicon/hisilicon-low-pin-count.txt | 33 ++
drivers/bus/Kconfig| 9 +
drivers/bus/Makefile | 1 +
drivers/bus/
Hi Christoph
> -Original Message-
> From: linux-pci-ow...@vger.kernel.org [mailto:linux-pci-
> ow...@vger.kernel.org] On Behalf Of Christoph Hellwig
> Sent: 22 May 2017 18:44
> To: Gabriele Paoloni
> Cc: Christoph Hellwig; bhelg...@google.com; helg...@kernel.org;
Hi Christoph
> -Original Message-
> From: linux-pci-ow...@vger.kernel.org [mailto:linux-pci-
> ow...@vger.kernel.org] On Behalf Of Christoph Hellwig
> Sent: 22 May 2017 18:44
> To: Gabriele Paoloni
> Cc: Christoph Hellwig; bhelg...@google.com; helg...@kernel.org;
pcie_port_enable_msix() to use MSI in
case MSI-x allocation fails.
Signed-off-by: Gabriele Paoloni <gabriele.paol...@huawei.com>
Reviewed-by: Christoph Hellwig <h...@lst.de>
---
drivers/pci/pcie/portdrv.h | 8 +---
drivers/pci/pcie/portdrv_core.c | 38 ---
pcie_port_enable_msix() to use MSI in
case MSI-x allocation fails.
Signed-off-by: Gabriele Paoloni
Reviewed-by: Christoph Hellwig
---
drivers/pci/pcie/portdrv.h | 8 +---
drivers/pci/pcie/portdrv_core.c | 38 --
2 files changed, 25 insertions(+), 21 deletions
From: gabriele paoloni <gabriele.paol...@huawei.com>
This patchset:
1) adds support for MSI interrupt vectors to be used for Roor Port services
2) adds support for DPC Root Port service interrupt
The patchset has been tested on Hisilicon Hip08 Chipset
Changes from v4:
- removed meani
From: gabriele paoloni <gabriele.paol...@huawei.com>
Currently the MSI/MSIx vectors for the root port services are
allocated calling pcie_init_service_irqs(). At the moment these
vectors are only allocated for AER, PME, HP.
This patch allocate an MSI/MSIx vector also for DPC.
Sign
From: gabriele paoloni
This patchset:
1) adds support for MSI interrupt vectors to be used for Roor Port services
2) adds support for DPC Root Port service interrupt
The patchset has been tested on Hisilicon Hip08 Chipset
Changes from v4:
- removed meaningless comment
Changes from v3
From: gabriele paoloni
Currently the MSI/MSIx vectors for the root port services are
allocated calling pcie_init_service_irqs(). At the moment these
vectors are only allocated for AER, PME, HP.
This patch allocate an MSI/MSIx vector also for DPC.
Signed-off-by: Liudongdong
Signed-off
pcie_port_enable_msix() to use MSI in
case MSI-x allocation fails.
Signed-off-by: Gabriele Paoloni <gabriele.paol...@huawei.com>
Reviewed-by: Christoph Hellwig <h...@lst.de>
---
drivers/pci/pcie/portdrv.h | 8 +---
drivers/pci/pcie/portdrv_core.c | 41 +++-
pcie_port_enable_msix() to use MSI in
case MSI-x allocation fails.
Signed-off-by: Gabriele Paoloni
Reviewed-by: Christoph Hellwig
---
drivers/pci/pcie/portdrv.h | 8 +---
drivers/pci/pcie/portdrv_core.c | 41 +++--
2 files changed, 28 insertions(+), 21 deletions
From: gabriele paoloni <gabriele.paol...@huawei.com>
This patchset:
1) adds support for MSI interrupt vectors to be used for Roor Port services
2) adds support for DPC Root Port service interrupt
The patchset has been tested on Hisilicon Hip08 Chipset
Changes from v3:
- removed 2 extra
From: gabriele paoloni
This patchset:
1) adds support for MSI interrupt vectors to be used for Roor Port services
2) adds support for DPC Root Port service interrupt
The patchset has been tested on Hisilicon Hip08 Chipset
Changes from v3:
- removed 2 extra lines at the bottom of comments
From: gabriele paoloni <gabriele.paol...@huawei.com>
Currently the MSI/MSIx vectors for the root port services are
allocated calling pcie_init_service_irqs(). At the moment these
vectors are only allocated for AER, PME, HP.
This patch allocate an MSI/MSIx vector also for DPC.
Sign
From: gabriele paoloni
Currently the MSI/MSIx vectors for the root port services are
allocated calling pcie_init_service_irqs(). At the moment these
vectors are only allocated for AER, PME, HP.
This patch allocate an MSI/MSIx vector also for DPC.
Signed-off-by: Liudongdong
Signed-off
Hi Christoph
> -Original Message-
> From: linux-pci-ow...@vger.kernel.org [mailto:linux-pci-
> ow...@vger.kernel.org] On Behalf Of Christoph Hellwig
> Sent: 21 May 2017 09:33
> To: Gabriele Paoloni
> Cc: bhelg...@google.com; helg...@kernel.org; Linuxarm; linux-
> p..
Hi Christoph
> -Original Message-
> From: linux-pci-ow...@vger.kernel.org [mailto:linux-pci-
> ow...@vger.kernel.org] On Behalf Of Christoph Hellwig
> Sent: 21 May 2017 09:33
> To: Gabriele Paoloni
> Cc: bhelg...@google.com; helg...@kernel.org; Linuxarm; linux-
> p..
pcie_port_enable_msix() to use MSI in
case MSI-x allocation fails.
Signed-off-by: Gabriele Paoloni <gabriele.paol...@huawei.com>
Reviewed-by: Christoph Hellwig <h...@lst.de>
---
drivers/pci/pcie/portdrv.h | 8 +---
drivers/pci/pcie/portdrv_core.c | 43
pcie_port_enable_msix() to use MSI in
case MSI-x allocation fails.
Signed-off-by: Gabriele Paoloni
Reviewed-by: Christoph Hellwig
---
drivers/pci/pcie/portdrv.h | 8 +---
drivers/pci/pcie/portdrv_core.c | 43 -
2 files changed, 30 insertions(+), 21 deletions
From: gabriele paoloni <gabriele.paol...@huawei.com>
This patchset:
1) adds support for MSI interrupt vectors to be used for Roor Port services
2) adds support for DPC Root Port service interrupt
The patchset has been tested on Hisilicon Hip08 Chipset
Changes from v2:
- Fixed comment mi
From: gabriele paoloni
This patchset:
1) adds support for MSI interrupt vectors to be used for Roor Port services
2) adds support for DPC Root Port service interrupt
The patchset has been tested on Hisilicon Hip08 Chipset
Changes from v2:
- Fixed comment mismatch for function
From: gabriele paoloni <gabriele.paol...@huawei.com>
Currently the MSI/MSIx vectors for the root port services are
allocated calling pcie_init_service_irqs(). At the moment these
vectors are only allocated for AER, PME, HP.
This patch allocate an MSI/MSIx vector also for DPC.
Sign
From: gabriele paoloni
Currently the MSI/MSIx vectors for the root port services are
allocated calling pcie_init_service_irqs(). At the moment these
vectors are only allocated for AER, PME, HP.
This patch allocate an MSI/MSIx vector also for DPC.
Signed-off-by: Liudongdong
Signed-off
Hi Christoph
> -Original Message-
> From: linux-pci-ow...@vger.kernel.org [mailto:linux-pci-
> ow...@vger.kernel.org] On Behalf Of Christoph Hellwig
> Sent: 18 May 2017 10:27
> To: Gabriele Paoloni
> Cc: bhelg...@google.com; helg...@kernel.org; Linuxarm; linux-
> p..
Hi Christoph
> -Original Message-
> From: linux-pci-ow...@vger.kernel.org [mailto:linux-pci-
> ow...@vger.kernel.org] On Behalf Of Christoph Hellwig
> Sent: 18 May 2017 10:27
> To: Gabriele Paoloni
> Cc: bhelg...@google.com; helg...@kernel.org; Linuxarm; linux-
> p..
From: gabriele paoloni <gabriele.paol...@huawei.com>
This patchset:
1) adds support for MSI interrupt vectors to be used for Roor Port services
2) adds support for DPC Root Port service interrupt
The patchset has been tested on Hisilicon Hip08 Chipset
Changes from v1:
According to comment
From: gabriele paoloni
This patchset:
1) adds support for MSI interrupt vectors to be used for Roor Port services
2) adds support for DPC Root Port service interrupt
The patchset has been tested on Hisilicon Hip08 Chipset
Changes from v1:
According to comments from Christoph Hellwig in
https
pcie_port_enable_msix() to use MSI in
case MSI-x allocation fails.
Signed-off-by: Gabriele Paoloni <gabriele.paol...@huawei.com>
---
drivers/pci/pcie/portdrv.h | 8 ---
drivers/pci/pcie/portdrv_core.c | 46 +
2 files changed, 33 insertions(+), 21 del
pcie_port_enable_msix() to use MSI in
case MSI-x allocation fails.
Signed-off-by: Gabriele Paoloni
---
drivers/pci/pcie/portdrv.h | 8 ---
drivers/pci/pcie/portdrv_core.c | 46 +
2 files changed, 33 insertions(+), 21 deletions(-)
diff --git a/drivers/pci
From: gabriele paoloni <gabriele.paol...@huawei.com>
Currently the MSI/MSIx vectors for the root port services are
allocated calling pcie_init_service_irqs(). At the moment these
vectors are only allocated for AER, PME, HP.
This patch allocate an MSI/MSIx vector also for DPC.
Sign
From: gabriele paoloni
Currently the MSI/MSIx vectors for the root port services are
allocated calling pcie_init_service_irqs(). At the moment these
vectors are only allocated for AER, PME, HP.
This patch allocate an MSI/MSIx vector also for DPC.
Signed-off-by: Liudongdong
Signed-off
Hi Christoph
> -Original Message-
> From: Christoph Hellwig [mailto:h...@infradead.org]
> Sent: 16 May 2017 13:11
> To: Gabriele Paoloni
> Cc: bhelg...@google.com; helg...@kernel.org; Linuxarm; linux-
> p...@vger.kernel.org; lu...@wunner.de; linux-kernel@vger.kernel.o
Hi Christoph
> -Original Message-
> From: Christoph Hellwig [mailto:h...@infradead.org]
> Sent: 16 May 2017 13:11
> To: Gabriele Paoloni
> Cc: bhelg...@google.com; helg...@kernel.org; Linuxarm; linux-
> p...@vger.kernel.org; lu...@wunner.de; linux-kernel@vger.kernel.o
Hi Christoph
Many thanks for your comments
> -Original Message-
> From: Christoph Hellwig [mailto:h...@infradead.org]
> Sent: 16 May 2017 13:07
> To: Gabriele Paoloni
> Cc: bhelg...@google.com; helg...@kernel.org; Linuxarm; linux-
> p...@vger.kernel.org; lu...@wunne
Hi Christoph
Many thanks for your comments
> -Original Message-
> From: Christoph Hellwig [mailto:h...@infradead.org]
> Sent: 16 May 2017 13:07
> To: Gabriele Paoloni
> Cc: bhelg...@google.com; helg...@kernel.org; Linuxarm; linux-
> p...@vger.kernel.org; lu...@wunne
From: gabriele paoloni <gabriele.paol...@huawei.com>
This patchset:
1) adds support for MSI interrupt vectors to be used for Roor Port services
2) adds support for DPC Root Port service interrupt
The patchset has been tested on Hisilicon Hip08 Chipset
Gabriele Paoloni (1):
PCI/portdr
From: gabriele paoloni
This patchset:
1) adds support for MSI interrupt vectors to be used for Roor Port services
2) adds support for DPC Root Port service interrupt
The patchset has been tested on Hisilicon Hip08 Chipset
Gabriele Paoloni (1):
PCI/portdrv: add support for different MSI
From: gabriele paoloni <gabriele.paol...@huawei.com>
Currently the MSI/MSIx vectors for the root port services are
allocated calling pcie_init_service_irqs(). At the moment these
vectors are only allocated for AER, PME, HP.
This patch allocate an MSI/MSIx vector also for DPC.
Sign
From: gabriele paoloni
Currently the MSI/MSIx vectors for the root port services are
allocated calling pcie_init_service_irqs(). At the moment these
vectors are only allocated for AER, PME, HP.
This patch allocate an MSI/MSIx vector also for DPC.
Signed-off-by: Liudongdong
Signed-off
pcie_port_enable_msix() to use MSI in
case MSI-x allocation fails.
Signed-off-by: Gabriele Paoloni <gabriele.paol...@huawei.com>
---
drivers/pci/pcie/portdrv.h | 5 +
drivers/pci/pcie/portdrv_core.c | 33 +++--
2 files changed, 32 insertions(+), 6 deletions(-)
diff
pcie_port_enable_msix() to use MSI in
case MSI-x allocation fails.
Signed-off-by: Gabriele Paoloni
---
drivers/pci/pcie/portdrv.h | 5 +
drivers/pci/pcie/portdrv_core.c | 33 +++--
2 files changed, 32 insertions(+), 6 deletions(-)
diff --git a/drivers/pci/pcie/portdrv.h
Hi Robin and all
> -Original Message-
> From: linux-kernel-ow...@vger.kernel.org [mailto:linux-kernel-
> ow...@vger.kernel.org] On Behalf Of Robin Murphy
> Sent: 20 March 2017 14:00
> To: Dingtianhong; Catalin Marinas; Will Deacon; linux-arm-
> ker...@lists.infradead.org;
Hi Robin and all
> -Original Message-
> From: linux-kernel-ow...@vger.kernel.org [mailto:linux-kernel-
> ow...@vger.kernel.org] On Behalf Of Robin Murphy
> Sent: 20 March 2017 14:00
> To: Dingtianhong; Catalin Marinas; Will Deacon; linux-arm-
> ker...@lists.infradead.org;
vger.kernel.org; Linux PCI; Corey Minyard; Zou Rongrong;
> John Garry; Gabriele Paoloni; kant...@163.com; xuwei (O)
> Subject: Re: [PATCH V8 5/6] ACPI: Support the probing on the devices
> which apply indirect-IO
>
> On Sat, Apr 1, 2017 at 4:16 AM, zhichang.yuan
> <zhichang.yua..
vger.kernel.org; Linux PCI; Corey Minyard; Zou Rongrong;
> John Garry; Gabriele Paoloni; kant...@163.com; xuwei (O)
> Subject: Re: [PATCH V8 5/6] ACPI: Support the probing on the devices
> which apply indirect-IO
>
> On Sat, Apr 1, 2017 at 4:16 AM, zhichang.yuan
> wrote:
> >
Hi Marc Many thanks for your comments
> -Original Message-
> From: linuxarm-boun...@huawei.com [mailto:linuxarm-boun...@huawei.com]
> On Behalf Of Marc Zyngier
> Sent: 27 March 2017 09:47
> To: John Garry; Lorenzo Pieralisi; Guohanjun (Hanjun Guo)
> Cc: Rafael J. Wysocki; Yimin (Leo);
Hi Marc Many thanks for your comments
> -Original Message-
> From: linuxarm-boun...@huawei.com [mailto:linuxarm-boun...@huawei.com]
> On Behalf Of Marc Zyngier
> Sent: 27 March 2017 09:47
> To: John Garry; Lorenzo Pieralisi; Guohanjun (Hanjun Guo)
> Cc: Rafael J. Wysocki; Yimin (Leo);
Hi Arnd
> -Original Message-
> From: linuxarm-boun...@huawei.com [mailto:linuxarm-boun...@huawei.com]
> On Behalf Of Gabriele Paoloni
> Sent: 16 March 2017 16:14
> To: Arnd Bergmann; Yuanzhichang
> Cc: Mark Rutland; Benjamin Herrenschmidt; Rafael Wysocki; linux-
Hi Arnd
> -Original Message-
> From: linuxarm-boun...@huawei.com [mailto:linuxarm-boun...@huawei.com]
> On Behalf Of Gabriele Paoloni
> Sent: 16 March 2017 16:14
> To: Arnd Bergmann; Yuanzhichang
> Cc: Mark Rutland; Benjamin Herrenschmidt; Rafael Wysocki; linux-
Rafael Wysocki; Mark Rutland; Linux ARM; ACPI
> Devel Maling List; Lorenzo Pieralisi; Benjamin Herrenschmidt; Linux
> Kernel Mailing List; Linuxarm; devicet...@vger.kernel.org; linux-pci;
> linux-ser...@vger.kernel.org; Corey Minyard; liviu.du...@arm.com; Zou
> Rongrong; John Garr
Rafael Wysocki; Mark Rutland; Linux ARM; ACPI
> Devel Maling List; Lorenzo Pieralisi; Benjamin Herrenschmidt; Linux
> Kernel Mailing List; Linuxarm; devicet...@vger.kernel.org; linux-pci;
> linux-ser...@vger.kernel.org; Corey Minyard; liviu.du...@arm.com; Zou
> Rongrong; John Garr
; p...@vger.kernel.org; linux-ser...@vger.kernel.org; miny...@acm.org;
> liviu.du...@arm.com; zourongr...@gmail.com; John Garry; Gabriele
> Paoloni; zhichang.yua...@gmail.com; kant...@163.com; xuwei (O)
> Subject: Re: [PATCH V7 5/7] ACPI: Delay the enumeration on the devices
> whose dependency has not m
; p...@vger.kernel.org; linux-ser...@vger.kernel.org; miny...@acm.org;
> liviu.du...@arm.com; zourongr...@gmail.com; John Garry; Gabriele
> Paoloni; zhichang.yua...@gmail.com; kant...@163.com; xuwei (O)
> Subject: Re: [PATCH V7 5/7] ACPI: Delay the enumeration on the devices
> whose dependency has not m
Hi Mark
> -Original Message-
> From: Mark Rutland [mailto:mark.rutl...@arm.com]
> Sent: 13 March 2017 10:44
> To: Gabriele Paoloni
> Cc: liudongdong (C); Bjorn Helgaas; Wangzhou (B);
> devicet...@vger.kernel.org; linux-...@vger.kernel.org; linux-
> ker...@vger.ker
Hi Mark
> -Original Message-
> From: Mark Rutland [mailto:mark.rutl...@arm.com]
> Sent: 13 March 2017 10:44
> To: Gabriele Paoloni
> Cc: liudongdong (C); Bjorn Helgaas; Wangzhou (B);
> devicet...@vger.kernel.org; linux-...@vger.kernel.org; linux-
> ker...@vger.ker
Hi Geert
[...]
> > {
> > - .compatible = "hisilicon,pcie-almost-ecam",
> > + .compatible = "hisilicon,pcie-almost-ecam-hip06",
>
> Shouldn't that be "hisilicon,hip06-pcie-almost-ecam"?
>
> > + .data = (void *) _pcie_platform_ops,
> > + },
> > + {
>
Hi Geert
[...]
> > {
> > - .compatible = "hisilicon,pcie-almost-ecam",
> > + .compatible = "hisilicon,pcie-almost-ecam-hip06",
>
> Shouldn't that be "hisilicon,hip06-pcie-almost-ecam"?
>
> > + .data = (void *) _pcie_platform_ops,
> > + },
> > + {
>
Hi Mark
> -Original Message-
> From: Mark Rutland [mailto:mark.rutl...@arm.com]
> Sent: 10 March 2017 17:41
> To: liudongdong (C); Bjorn Helgaas
> Cc: Gabriele Paoloni; Wangzhou (B); devicet...@vger.kernel.org; linux-
> p...@vger.kernel.org; linux-kernel@vger.kernel.org
Hi Mark
> -Original Message-
> From: Mark Rutland [mailto:mark.rutl...@arm.com]
> Sent: 10 March 2017 17:41
> To: liudongdong (C); Bjorn Helgaas
> Cc: Gabriele Paoloni; Wangzhou (B); devicet...@vger.kernel.org; linux-
> p...@vger.kernel.org; linux-kernel@vger.kernel.org
[...]
>
> I will fold the changes into v2 (and I hope other host controllers
> maintainers will follow suit - I do not have enough knowledge of
> all host bridges drivers internals to understand what ioremap calls
> need patching).
Ok great, many thanks!
Gab
>
> Thanks !
> Lorenzo
[...]
>
> I will fold the changes into v2 (and I hope other host controllers
> maintainers will follow suit - I do not have enough knowledge of
> all host bridges drivers internals to understand what ioremap calls
> need patching).
Ok great, many thanks!
Gab
>
> Thanks !
> Lorenzo
rnel.org; linux-a...@vger.kernel.org; Lorenzo
> Pieralisi; Bjorn Helgaas; Gabriele Paoloni; Wangzhou (B)
> Subject: [PATCH 14/20] PCI: hisi: update PCI config space remap
> function
>
> PCI configuration space should be mapped with a memory region type that
> generates on the CPU host
rnel.org; linux-a...@vger.kernel.org; Lorenzo
> Pieralisi; Bjorn Helgaas; Gabriele Paoloni; Wangzhou (B)
> Subject: [PATCH 14/20] PCI: hisi: update PCI config space remap
> function
>
> PCI configuration space should be mapped with a memory region type that
> generates on the CPU host
Hi Alex
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
[...]
> >>
> >> I like the extio idea. That allows us to handle all PIO requests on
> >> platforms that don't have native PIO support via different routes
> >> depending on the region they're in. Unfortunately we
Hi Alex
> -Original Message-
> From: Alexander Graf [mailto:ag...@suse.de]
[...]
> >>
> >> I like the extio idea. That allows us to handle all PIO requests on
> >> platforms that don't have native PIO support via different routes
> >> depending on the region they're in. Unfortunately we
Hi Alex thanks for reviewing
[...]
> >
> >>> + * The port size of legacy I/O devices is normally less than
> 0x400.
> >>> + * Defining the I/O range size as 0x400 here should be sufficient
> for
> >>> + * all peripherals under one bus.
> >>> + */
> >>
> >> This comment doesn't make a lot of
Hi Alex thanks for reviewing
[...]
> >
> >>> + * The port size of legacy I/O devices is normally less than
> 0x400.
> >>> + * Defining the I/O range size as 0x400 here should be sufficient
> for
> >>> + * all peripherals under one bus.
> >>> + */
> >>
> >> This comment doesn't make a lot of
Hi Arnd
> -Original Message-
> From: Arnd Bergmann [mailto:a...@arndb.de]
> Sent: 25 November 2016 12:04
> To: Gabriele Paoloni
> Cc: linux-arm-ker...@lists.infradead.org; mark.rutl...@arm.com;
> catalin.mari...@arm.com; linux-...@vger.kernel.org;
> liviu.du
Hi Arnd
> -Original Message-
> From: Arnd Bergmann [mailto:a...@arndb.de]
> Sent: 25 November 2016 12:04
> To: Gabriele Paoloni
> Cc: linux-arm-ker...@lists.infradead.org; mark.rutl...@arm.com;
> catalin.mari...@arm.com; linux-...@vger.kernel.org;
> liviu.du
Hi Arnd
Many thanks for your contribution, much appreciated
I have some comments...see inline below
> -Original Message-
> From: Arnd Bergmann [mailto:a...@arndb.de]
> Sent: 23 November 2016 23:23
> To: linux-arm-ker...@lists.infradead.org
> Cc: Gabriele Paoloni; mark.
Hi Arnd
Many thanks for your contribution, much appreciated
I have some comments...see inline below
> -Original Message-
> From: Arnd Bergmann [mailto:a...@arndb.de]
> Sent: 23 November 2016 23:23
> To: linux-arm-ker...@lists.infradead.org
> Cc: Gabriele Paoloni; mark.
Hi Arnd
> -Original Message-
> From: Arnd Bergmann [mailto:a...@arndb.de]
> Sent: 23 November 2016 14:16
> To: Gabriele Paoloni
> Cc: linux-arm-ker...@lists.infradead.org; mark.rutl...@arm.com;
> b...@kernel.crashing.org; catalin.mari...@arm.com; liviu.du...@a
Hi Arnd
> -Original Message-
> From: Arnd Bergmann [mailto:a...@arndb.de]
> Sent: 23 November 2016 14:16
> To: Gabriele Paoloni
> Cc: linux-arm-ker...@lists.infradead.org; mark.rutl...@arm.com;
> b...@kernel.crashing.org; catalin.mari...@arm.com; liviu.du...@a
Hi Graeme
> -Original Message-
> From: Graeme Gregory [mailto:g...@slimlogic.co.uk]
> Sent: 23 November 2016 09:44
> To: Gabriele Paoloni
> Cc: Tomasz Nowicki; liudongdong (C); helg...@kernel.org; a...@arndb.de;
> raf...@kernel.org; lorenzo.pieral...@arm.com; Wangzhou
Hi Graeme
> -Original Message-
> From: Graeme Gregory [mailto:g...@slimlogic.co.uk]
> Sent: 23 November 2016 09:44
> To: Gabriele Paoloni
> Cc: Tomasz Nowicki; liudongdong (C); helg...@kernel.org; a...@arndb.de;
> raf...@kernel.org; lorenzo.pieral...@arm.com; Wangzhou
sh.an...@gmail.com; linux-
> p...@vger.kernel.org; linux-a...@vger.kernel.org; linux-
> ker...@vger.kernel.org; j...@redhat.com; Gabriele Paoloni; Chenxin
> (Charles); hanjun@linaro.org; Linuxarm
> Subject: Re: [PATCH V6 1/2] PCI/ACPI: Provide acpi_get_rc_resources()
> for ARM64 p
sh.an...@gmail.com; linux-
> p...@vger.kernel.org; linux-a...@vger.kernel.org; linux-
> ker...@vger.kernel.org; j...@redhat.com; Gabriele Paoloni; Chenxin
> (Charles); hanjun@linaro.org; Linuxarm
> Subject: Re: [PATCH V6 1/2] PCI/ACPI: Provide acpi_get_rc_resources()
> for ARM64 p
il.com
> Cc: linux-...@vger.kernel.org; linux-a...@vger.kernel.org; linux-
> ker...@vger.kernel.org; j...@redhat.com; Gabriele Paoloni; Chenxin
> (Charles); hanjun@linaro.org; Linuxarm
> Subject: Re: [PATCH V6 2/2] PCI/ACPI: hisi: Add ACPI support for
> HiSilicon SoCs Host Controllers
>
>
il.com
> Cc: linux-...@vger.kernel.org; linux-a...@vger.kernel.org; linux-
> ker...@vger.kernel.org; j...@redhat.com; Gabriele Paoloni; Chenxin
> (Charles); hanjun@linaro.org; Linuxarm
> Subject: Re: [PATCH V6 2/2] PCI/ACPI: hisi: Add ACPI support for
> HiSilicon SoCs Host Controllers
>
>
Hi Bjorn
> -Original Message-
> From: Bjorn Helgaas [mailto:helg...@kernel.org]
> Sent: 21 November 2016 20:10
> To: Gabriele Paoloni
> Cc: Bjorn Helgaas; linux-...@vger.kernel.org; linux-
> a...@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
> ker..
Hi Bjorn
> -Original Message-
> From: Bjorn Helgaas [mailto:helg...@kernel.org]
> Sent: 21 November 2016 20:10
> To: Gabriele Paoloni
> Cc: Bjorn Helgaas; linux-...@vger.kernel.org; linux-
> a...@vger.kernel.org; linux-kernel@vger.kernel.org; linux-arm-
> ker..
> -Original Message-
> From: Bjorn Helgaas [mailto:helg...@kernel.org]
> Sent: 21 November 2016 22:32
> To: Gabriele Paoloni
> Cc: liudongdong (C); a...@arndb.de; raf...@kernel.org;
> lorenzo.pieral...@arm.com; t...@semihalf.com; Wangzhou (B);
> pratyush.a
> -Original Message-
> From: Bjorn Helgaas [mailto:helg...@kernel.org]
> Sent: 21 November 2016 22:32
> To: Gabriele Paoloni
> Cc: liudongdong (C); a...@arndb.de; raf...@kernel.org;
> lorenzo.pieral...@arm.com; t...@semihalf.com; Wangzhou (B);
> pratyush.a
Hi Bjorn
> -Original Message-
> From: linux-pci-ow...@vger.kernel.org [mailto:linux-pci-
> ow...@vger.kernel.org] On Behalf Of Bjorn Helgaas
> Sent: 21 November 2016 16:47
> To: Gabriele Paoloni
> Cc: Bjorn Helgaas; linux-...@vger.kernel.org; linux-
> a...@vger.ker
Hi Bjorn
> -Original Message-
> From: linux-pci-ow...@vger.kernel.org [mailto:linux-pci-
> ow...@vger.kernel.org] On Behalf Of Bjorn Helgaas
> Sent: 21 November 2016 16:47
> To: Gabriele Paoloni
> Cc: Bjorn Helgaas; linux-...@vger.kernel.org; linux-
> a...@vger.ker
.pieral...@arm.com;
> t...@semihalf.com; Wangzhou (B); pratyush.an...@gmail.com; linux-
> p...@vger.kernel.org; linux-a...@vger.kernel.org; linux-
> ker...@vger.kernel.org; j...@redhat.com; Gabriele Paoloni; Chenxin
> (Charles); hanjun@linaro.org; Linuxarm
> Subject: Re: [PATCH
.pieral...@arm.com;
> t...@semihalf.com; Wangzhou (B); pratyush.an...@gmail.com; linux-
> p...@vger.kernel.org; linux-a...@vger.kernel.org; linux-
> ker...@vger.kernel.org; j...@redhat.com; Gabriele Paoloni; Chenxin
> (Charles); hanjun@linaro.org; Linuxarm
> Subject: Re: [PATCH
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