Re: [PATCH v6 2/2] drivers/perf: Add CCPI2 PMU support in ThunderX2 UNCORE driver.

On Fri, Oct 18, 2019 at 2:08 PM John Garry wrote: > > On 18/10/2019 05:21, Ganapatrao Kulkarni wrote: > > Hi Will, > > > > On Thu, Oct 17, 2019 at 9:17 PM Will Deacon wrote: > >> > >> On Thu, Oct 17, 2019 at 12:38:51PM +0530, Ganapatrao Kulkarni wrote:

Re: [PATCH] perf cgroups: Don't rotate events for cgroups unnecessarily

Hi Peter, On Wed, Sep 18, 2019 at 12:51 PM Ganapatrao Kulkarni wrote: > > On Fri, Aug 23, 2019 at 6:33 PM Peter Zijlstra wrote: > > > > On Fri, Aug 23, 2019 at 06:26:34PM +0530, Ganapatrao Kulkarni wrote: > > > On Fri, Aug 23, 2019 at 5:29 PM Peter Zijlstra > >

Re: [PATCH] perf cgroups: Don't rotate events for cgroups unnecessarily

On Fri, Aug 23, 2019 at 6:33 PM Peter Zijlstra wrote: > > On Fri, Aug 23, 2019 at 06:26:34PM +0530, Ganapatrao Kulkarni wrote: > > On Fri, Aug 23, 2019 at 5:29 PM Peter Zijlstra wrote: > > > On Fri, Aug 23, 2019 at 04:13:46PM +0530, Ganapatrao Kulkarni wrote: > &

Re: [PATCH] perf cgroups: Don't rotate events for cgroups unnecessarily

> > On Fri, Aug 23, 2019 at 04:13:46PM +0530, Ganapatrao Kulkarni wrote: > > > We are seeing regression with our uncore perf driver(Marvell's > > ThunderX2, ARM64 server platform) on 5.3-Rc1. > > After bisecting, it turned out to be this patch causing the issue. > &

Re: [PATCH] perf cgroups: Don't rotate events for cgroups unnecessarily

Hi, We are seeing regression with our uncore perf driver(Marvell's ThunderX2, ARM64 server platform) on 5.3-Rc1. After bisecting, it turned out to be this patch causing the issue. Test case: Load module and run perf for more than 4 events( we have 4 counters, event multiplexing takes place for

[PATCH v3 0/2] Add CCPI2 PMU support

Add Cavium Coherent Processor Interconnect (CCPI2) PMU support in ThunderX2 Uncore driver. v3: Rebased to 5.3-rc1 v2: Updated with review comments [1] [1] https://lkml.org/lkml/2019/6/14/965 v1: initial patch Ganapatrao Kulkarni (2): Documentation: perf: Update documentation for ThunderX2

Re: [PATCH 2/2] drivers/perf: Add CCPI2 PMU support in ThunderX2 UNCORE driver.

Hi will, On Thu, Jun 27, 2019 at 3:27 PM Will Deacon wrote: > > Hi Ganapat, > > On Fri, Jun 14, 2019 at 05:42:46PM +, Ganapatrao Kulkarni wrote: > > CCPI2 is a low-latency high-bandwidth serial interface for connecting > > ThunderX2 processors. This patch adds suppo

Re: [PATCH v3] irqchip: gicv3-its: Use NUMA aware memory allocation for ITS tables

Hi Shameer, Patch looks OK to me, please feel free to add, Reviewed-by: Ganapatrao Kulkarni On Thu, Dec 13, 2018 at 5:25 PM Marc Zyngier wrote: > > On 13/12/2018 10:59, Shameer Kolothum wrote: > > From: Shanker Donthineni > > > > The NUMA node information

Re: [PATCH v11 0/2] Add ThunderX2 SoC Performance Monitoring Unit driver

On Thu, Dec 6, 2018 at 6:04 PM Will Deacon wrote: > > Hi Ganapat, > > On Thu, Dec 06, 2018 at 11:51:24AM +, Kulkarni, Ganapatrao wrote: > > This patchset adds PMU driver for Cavium's ThunderX2 SoC UNCORE devices. > > The SoC has PMU support in L3 cache controller (L3C) and in the > > DDR4

Re: [PATCH v6 2/2] ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver

Hi Suzuki, On Wed, Oct 10, 2018 at 3:22 PM Suzuki K Poulose wrote: > > Hi Ganapatrao, > > On 21/06/18 07:33, Ganapatrao Kulkarni wrote: > > This patch adds a perf driver for the PMU UNCORE devices DDR4 Memory > > Controller(DMC) and Level 3 Cache(L3C). > > >

Re: [PATCH v6 2/2] ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver

Hi Suzuki, On Wed, Oct 10, 2018 at 3:22 PM Suzuki K Poulose wrote: > > Hi Ganapatrao, > > On 21/06/18 07:33, Ganapatrao Kulkarni wrote: > > This patch adds a perf driver for the PMU UNCORE devices DDR4 Memory > > Controller(DMC) and Level 3 Cache(L3C). > > >

Re: [PATCH v6 2/2] ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver

Hi Pranith, On Sat, Jul 7, 2018 at 11:22 AM Pranith Kumar wrote: > > Hi Ganapatrao, > > > On Wed, Jun 20, 2018 at 11:33 PM, Ganapatrao Kulkarni > wrote: > > > + > > +enum thunderx2_uncore_l3_events { > > + L3_EVENT_NONE, > > + L3_EVE

Re: [PATCH v6 2/2] ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver

Hi Pranith, On Sat, Jul 7, 2018 at 11:22 AM Pranith Kumar wrote: > > Hi Ganapatrao, > > > On Wed, Jun 20, 2018 at 11:33 PM, Ganapatrao Kulkarni > wrote: > > > + > > +enum thunderx2_uncore_l3_events { > > + L3_EVENT_NONE, > > + L3_EVE

Re: [PATCH] arm_pmu: Delete incorrect cache event mapping for some armv8_pmuv3 events.

Hi Will, On Thu, Oct 4, 2018 at 5:51 PM Will Deacon wrote: > > Hi Ganapat, > > On Thu, Oct 04, 2018 at 11:12:09AM +0530, Ganapatrao Kulkarni wrote: > > can you please pull this patch? > > I still don't like the idea of just removing events like this, especially &g

Re: [PATCH] arm_pmu: Delete incorrect cache event mapping for some armv8_pmuv3 events.

Hi Will, On Thu, Oct 4, 2018 at 5:51 PM Will Deacon wrote: > > Hi Ganapat, > > On Thu, Oct 04, 2018 at 11:12:09AM +0530, Ganapatrao Kulkarni wrote: > > can you please pull this patch? > > I still don't like the idea of just removing events like this, especially &g

Re: [PATCH] arm_pmu: Delete incorrect cache event mapping for some armv8_pmuv3 events.

Hi Will, can you please pull this patch? On Mon, Oct 1, 2018 at 10:09 PM Ganapatrao Kulkarni wrote: > > Hi Will, > > On Mon, Oct 1, 2018 at 7:58 PM Will Deacon wrote: > > > > Hi Ganapat, > > > > On Mon, Oct 01, 2018 at 10:07:43AM +, Kulkarni, Ganapatra

Re: [PATCH] arm_pmu: Delete incorrect cache event mapping for some armv8_pmuv3 events.

Hi Will, can you please pull this patch? On Mon, Oct 1, 2018 at 10:09 PM Ganapatrao Kulkarni wrote: > > Hi Will, > > On Mon, Oct 1, 2018 at 7:58 PM Will Deacon wrote: > > > > Hi Ganapat, > > > > On Mon, Oct 01, 2018 at 10:07:43AM +, Kulkarni, Ganapatra

Re: [PATCH] arm_pmu: Delete incorrect cache event mapping for some armv8_pmuv3 events.

) event L1D_CACHE_REFILL. This is incorrect, > > since L1D_CACHE_REFILL counts both load and store misses. > > Similarly the events L1-dcache-loads, L1-dcache-stores, dTLB-load-misses > > and dTLB-loads are wrongly mapped. Hence Deleting all these cache events > > from armv8_pmuv3

Re: [PATCH] arm_pmu: Delete incorrect cache event mapping for some armv8_pmuv3 events.

) event L1D_CACHE_REFILL. This is incorrect, > > since L1D_CACHE_REFILL counts both load and store misses. > > Similarly the events L1-dcache-loads, L1-dcache-stores, dTLB-load-misses > > and dTLB-loads are wrongly mapped. Hence Deleting all these cache events > > from armv8_pmuv3

[tip:perf/core] perf vendor events arm64: Update ThunderX2 implementation defined pmu core events

Commit-ID: b9b77222d4ff6b5bb8f5d87fca20de0910618bb9 Gitweb: https://git.kernel.org/tip/b9b77222d4ff6b5bb8f5d87fca20de0910618bb9 Author: Ganapatrao Kulkarni AuthorDate: Tue, 31 Jul 2018 15:32:51 +0530 Committer: Arnaldo Carvalho de Melo CommitDate: Tue, 31 Jul 2018 11:28:44 -0300 perf

[tip:perf/core] perf vendor events arm64: Update ThunderX2 implementation defined pmu core events

Commit-ID: b9b77222d4ff6b5bb8f5d87fca20de0910618bb9 Gitweb: https://git.kernel.org/tip/b9b77222d4ff6b5bb8f5d87fca20de0910618bb9 Author: Ganapatrao Kulkarni AuthorDate: Tue, 31 Jul 2018 15:32:51 +0530 Committer: Arnaldo Carvalho de Melo CommitDate: Tue, 31 Jul 2018 11:28:44 -0300 perf

Re: [PATCH] perf vendor events arm64: Update ThunderX2 implementation defined pmu core events

Hi Arnaldo, On Tue, Jul 31, 2018 at 10:59 PM, Arnaldo Carvalho de Melo wrote: > Em Tue, Jul 31, 2018 at 08:40:51PM +0530, Ganapatrao Kulkarni escreveu: >> Hi Arnaldo, >> >> On Tue, Jul 31, 2018 at 7:58 PM, Arnaldo Carvalho de Melo >> wrote: >> > Em T

Re: [PATCH] perf vendor events arm64: Update ThunderX2 implementation defined pmu core events

Hi Arnaldo, On Tue, Jul 31, 2018 at 10:59 PM, Arnaldo Carvalho de Melo wrote: > Em Tue, Jul 31, 2018 at 08:40:51PM +0530, Ganapatrao Kulkarni escreveu: >> Hi Arnaldo, >> >> On Tue, Jul 31, 2018 at 7:58 PM, Arnaldo Carvalho de Melo >> wrote: >> > Em T

Re: [PATCH] perf vendor events arm64: Update ThunderX2 implementation defined pmu core events

Hi Arnaldo, On Tue, Jul 31, 2018 at 7:58 PM, Arnaldo Carvalho de Melo wrote: > Em Tue, Jul 31, 2018 at 03:32:51PM +0530, Ganapatrao Kulkarni escreveu: >> Signed-off-by: Ganapatrao Kulkarni > > Can you please consider to provide an example of such counters being > used, i.

Re: [PATCH] perf vendor events arm64: Update ThunderX2 implementation defined pmu core events

Hi Arnaldo, On Tue, Jul 31, 2018 at 7:58 PM, Arnaldo Carvalho de Melo wrote: > Em Tue, Jul 31, 2018 at 03:32:51PM +0530, Ganapatrao Kulkarni escreveu: >> Signed-off-by: Ganapatrao Kulkarni > > Can you please consider to provide an example of such counters being > used, i.

[PATCH] perf vendor events arm64: Update ThunderX2 implementation defined pmu core events

Signed-off-by: Ganapatrao Kulkarni --- .../arch/arm64/cavium/thunderx2/core-imp-def.json | 87 +- 1 file changed, 84 insertions(+), 3 deletions(-) diff --git a/tools/perf/pmu-events/arch/arm64/cavium/thunderx2/core-imp-def.json b/tools/perf/pmu-events/arch/arm64/cavium

[PATCH] perf vendor events arm64: Update ThunderX2 implementation defined pmu core events

Signed-off-by: Ganapatrao Kulkarni --- .../arch/arm64/cavium/thunderx2/core-imp-def.json | 87 +- 1 file changed, 84 insertions(+), 3 deletions(-) diff --git a/tools/perf/pmu-events/arch/arm64/cavium/thunderx2/core-imp-def.json b/tools/perf/pmu-events/arch/arm64/cavium

Re: [PATCH v4 2/2] ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver

On Mon, May 21, 2018 at 4:10 PM, Mark Rutland <mark.rutl...@arm.com> wrote: > On Mon, May 21, 2018 at 11:37:12AM +0100, Mark Rutland wrote: >> Hi Ganapat, >> >> >> Sorry for the delay in replying; I was away most of last week. >> >> On Tue, May 15,

Re: [PATCH v4 2/2] ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver

On Mon, May 21, 2018 at 4:10 PM, Mark Rutland wrote: > On Mon, May 21, 2018 at 11:37:12AM +0100, Mark Rutland wrote: >> Hi Ganapat, >> >> >> Sorry for the delay in replying; I was away most of last week. >> >> On Tue, May 15, 2018 at 04:03:19PM +0530, Ganapa

Re: [PATCH v4 2/2] ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver

Hi Mark, On Mon, May 21, 2018 at 4:25 PM, Mark Rutland <mark.rutl...@arm.com> wrote: > On Sat, May 05, 2018 at 12:16:13AM +0530, Ganapatrao Kulkarni wrote: >> On Thu, Apr 26, 2018 at 4:29 PM, Mark Rutland <mark.rutl...@arm.com> wrote: >> > On Wed, Apr 25, 2018 a

Re: [PATCH v4 2/2] ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver

Hi Mark, On Mon, May 21, 2018 at 4:25 PM, Mark Rutland wrote: > On Sat, May 05, 2018 at 12:16:13AM +0530, Ganapatrao Kulkarni wrote: >> On Thu, Apr 26, 2018 at 4:29 PM, Mark Rutland wrote: >> > On Wed, Apr 25, 2018 at 02:30:47PM +0530, Ganapatrao Kulkarni wrote: > >>

Re: [PATCH] iommu/iova: Update cached node pointer when current node fails to get any free IOVA

On Thu, Apr 26, 2018 at 3:15 PM, Ganapatrao Kulkarni <gklkm...@gmail.com> wrote: > Hi Robin, > > On Mon, Apr 23, 2018 at 11:11 PM, Ganapatrao Kulkarni > <gklkm...@gmail.com> wrote: >> On Mon, Apr 23, 2018 at 10:07 PM, Robin Murphy <robin.mur...@arm.com> wrot

Re: [PATCH] iommu/iova: Update cached node pointer when current node fails to get any free IOVA

On Thu, Apr 26, 2018 at 3:15 PM, Ganapatrao Kulkarni wrote: > Hi Robin, > > On Mon, Apr 23, 2018 at 11:11 PM, Ganapatrao Kulkarni > wrote: >> On Mon, Apr 23, 2018 at 10:07 PM, Robin Murphy wrote: >>> On 19/04/18 18:12, Ganapatrao Kulkarni wrote: >>>>

Re: [PATCH v5 2/2] ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver

On Thu, May 17, 2018 at 4:42 PM, John Garry <john.ga...@huawei.com> wrote: > On 16/05/2018 05:55, Ganapatrao Kulkarni wrote: >> >> This patch adds a perf driver for the PMU UNCORE devices DDR4 Memory >> Controller(DMC) and Level 3 Cache(L3C). >> > >

Re: [PATCH v5 2/2] ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver

On Thu, May 17, 2018 at 4:42 PM, John Garry wrote: > On 16/05/2018 05:55, Ganapatrao Kulkarni wrote: >> >> This patch adds a perf driver for the PMU UNCORE devices DDR4 Memory >> Controller(DMC) and Level 3 Cache(L3C). >> > > Hi, > > Just some codi

[PATCH v5 2/2] ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver

tiles of L3 cache. Each PMU supports up to 4 counters. All counters lack overflow interrupt and are sampled periodically. Signed-off-by: Ganapatrao Kulkarni <ganapatrao.kulka...@cavium.com> --- drivers/perf/Kconfig | 8 + drivers/perf/Makefile| 1 + drivers/perf/thunderx2

[PATCH v5 1/2] perf: uncore: Adding documentation for ThunderX2 pmu uncore driver

Documentation for the UNCORE PMUs on Cavium's ThunderX2 SoC. The SoC has PMU support in its L3 cache controller (L3C) and in the DDR4 Memory Controller (DMC). Signed-off-by: Ganapatrao Kulkarni <ganapatrao.kulka...@cavium.com> --- Documentation/perf/thunderx2-pmu.tx

[PATCH v5 1/2] perf: uncore: Adding documentation for ThunderX2 pmu uncore driver

Documentation for the UNCORE PMUs on Cavium's ThunderX2 SoC. The SoC has PMU support in its L3 cache controller (L3C) and in the DDR4 Memory Controller (DMC). Signed-off-by: Ganapatrao Kulkarni --- Documentation/perf/thunderx2-pmu.txt | 66 1 file changed

[PATCH v5 2/2] ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver

tiles of L3 cache. Each PMU supports up to 4 counters. All counters lack overflow interrupt and are sampled periodically. Signed-off-by: Ganapatrao Kulkarni --- drivers/perf/Kconfig | 8 + drivers/perf/Makefile| 1 + drivers/perf/thunderx2_pmu.c | 965

[PATCH v5 0/2] Add ThunderX2 SoC Performance Monitoring Unit driver

Ganapatrao Kulkarni (2): perf: uncore: Adding documentation for ThunderX2 pmu uncore driver ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver Documentation/perf/thunderx2-pmu.txt | 66 +++ drivers/perf/Kconfig | 8 + drivers/perf/Makefile| 1 + drivers

[PATCH v5 0/2] Add ThunderX2 SoC Performance Monitoring Unit driver

Ganapatrao Kulkarni (2): perf: uncore: Adding documentation for ThunderX2 pmu uncore driver ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver Documentation/perf/thunderx2-pmu.txt | 66 +++ drivers/perf/Kconfig | 8 + drivers/perf/Makefile| 1 + drivers

Re: [PATCH v4 2/2] ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver

Hi Mark, On Sat, May 5, 2018 at 12:16 AM, Ganapatrao Kulkarni <gklkm...@gmail.com> wrote: > Hi Mark, > > On Thu, Apr 26, 2018 at 4:29 PM, Mark Rutland <mark.rutl...@arm.com> wrote: >> Hi, >> >> On Wed, Apr 25, 2018 at 02:30:47PM +0530, Ganapatrao Kulkarni

Re: [PATCH v4 2/2] ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver

Hi Mark, On Sat, May 5, 2018 at 12:16 AM, Ganapatrao Kulkarni wrote: > Hi Mark, > > On Thu, Apr 26, 2018 at 4:29 PM, Mark Rutland wrote: >> Hi, >> >> On Wed, Apr 25, 2018 at 02:30:47PM +0530, Ganapatrao Kulkarni wrote: >>> + >>> +/* L3c and DMC

Re: fd3e45436660 ("ACPI / NUMA: ia64: Parse all entries of SRAT memory affinity table")

On Thu, May 10, 2018 at 1:00 PM, Michal Hocko <mho...@kernel.org> wrote: > On Thu 10-05-18 08:27:35, Ganapatrao Kulkarni wrote: >> On Wed, May 9, 2018 at 6:26 PM, Michal Hocko <mho...@kernel.org> wrote: >> > On Wed 09-05-18 18:07:16, Ganapatrao K

Re: fd3e45436660 ("ACPI / NUMA: ia64: Parse all entries of SRAT memory affinity table")

On Thu, May 10, 2018 at 1:00 PM, Michal Hocko wrote: > On Thu 10-05-18 08:27:35, Ganapatrao Kulkarni wrote: >> On Wed, May 9, 2018 at 6:26 PM, Michal Hocko wrote: >> > On Wed 09-05-18 18:07:16, Ganapatrao Kulkarni wrote: >> >> Hi Michal >> >> >>

Re: fd3e45436660 ("ACPI / NUMA: ia64: Parse all entries of SRAT memory affinity table")

On Wed, May 9, 2018 at 6:26 PM, Michal Hocko <mho...@kernel.org> wrote: > On Wed 09-05-18 18:07:16, Ganapatrao Kulkarni wrote: >> Hi Michal >> >> >> On Wed, May 9, 2018 at 5:54 PM, Michal Hocko <mho...@kernel.org> wrote: >> > On Wed 11-04-18

Re: fd3e45436660 ("ACPI / NUMA: ia64: Parse all entries of SRAT memory affinity table")

On Wed, May 9, 2018 at 6:26 PM, Michal Hocko wrote: > On Wed 09-05-18 18:07:16, Ganapatrao Kulkarni wrote: >> Hi Michal >> >> >> On Wed, May 9, 2018 at 5:54 PM, Michal Hocko wrote: >> > On Wed 11-04-18 12:48:32, Michal Hocko wrote: >> >> Hi, &g

Re: fd3e45436660 ("ACPI / NUMA: ia64: Parse all entries of SRAT memory affinity table")

Hi Michal On Wed, May 9, 2018 at 5:54 PM, Michal Hocko wrote: > On Wed 11-04-18 12:48:32, Michal Hocko wrote: >> Hi, >> my attention was brought to the %subj commit and either I am missing >> something or the patch is quite dubious. What is it actually trying to >> fix? If a

Re: fd3e45436660 ("ACPI / NUMA: ia64: Parse all entries of SRAT memory affinity table")

Hi Michal On Wed, May 9, 2018 at 5:54 PM, Michal Hocko wrote: > On Wed 11-04-18 12:48:32, Michal Hocko wrote: >> Hi, >> my attention was brought to the %subj commit and either I am missing >> something or the patch is quite dubious. What is it actually trying to >> fix? If a BIOS/FW provides

Re: [PATCH v4 2/2] ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver

Hi Mark, On Thu, Apr 26, 2018 at 4:29 PM, Mark Rutland <mark.rutl...@arm.com> wrote: > Hi, > > On Wed, Apr 25, 2018 at 02:30:47PM +0530, Ganapatrao Kulkarni wrote: >> + >> +/* L3c and DMC has 16 and 8 channels per socket respectively. >> + * Each Channel suppor

Re: [PATCH v4 2/2] ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver

Hi Mark, On Thu, Apr 26, 2018 at 4:29 PM, Mark Rutland wrote: > Hi, > > On Wed, Apr 25, 2018 at 02:30:47PM +0530, Ganapatrao Kulkarni wrote: >> + >> +/* L3c and DMC has 16 and 8 channels per socket respectively. >> + * Each Channel supports UNCORE PMU device and consi

Re: [PATCH v4 1/2] perf: uncore: Adding documentation for ThunderX2 pmu uncore driver

On Fri, Apr 27, 2018 at 2:25 AM, Randy Dunlap <rdun...@infradead.org> wrote: > Hi, > > Just a few typo corrections... > > On 04/25/2018 02:00 AM, Ganapatrao Kulkarni wrote: >> Documentation for the UNCORE PMUs on Cavium's ThunderX2 SoC. >> The SoC has PMU suppor

Re: [PATCH v4 1/2] perf: uncore: Adding documentation for ThunderX2 pmu uncore driver

On Fri, Apr 27, 2018 at 2:25 AM, Randy Dunlap wrote: > Hi, > > Just a few typo corrections... > > On 04/25/2018 02:00 AM, Ganapatrao Kulkarni wrote: >> Documentation for the UNCORE PMUs on Cavium's ThunderX2 SoC. >> The SoC has PMU support in its L3 cache controll

Re: [PATCH] iommu/iova: Update cached node pointer when current node fails to get any free IOVA

Hi Robin, On Mon, Apr 23, 2018 at 11:11 PM, Ganapatrao Kulkarni <gklkm...@gmail.com> wrote: > On Mon, Apr 23, 2018 at 10:07 PM, Robin Murphy <robin.mur...@arm.com> wrote: >> On 19/04/18 18:12, Ganapatrao Kulkarni wrote: >>> >>> The performance drop is obser

Re: [PATCH] iommu/iova: Update cached node pointer when current node fails to get any free IOVA

Hi Robin, On Mon, Apr 23, 2018 at 11:11 PM, Ganapatrao Kulkarni wrote: > On Mon, Apr 23, 2018 at 10:07 PM, Robin Murphy wrote: >> On 19/04/18 18:12, Ganapatrao Kulkarni wrote: >>> >>> The performance drop is observed with long hours iperf testing using 40G >>&g

[PATCH v4 1/2] perf: uncore: Adding documentation for ThunderX2 pmu uncore driver

Documentation for the UNCORE PMUs on Cavium's ThunderX2 SoC. The SoC has PMU support in its L3 cache controller (L3C) and in the DDR4 Memory Controller (DMC). Signed-off-by: Ganapatrao Kulkarni <ganapatrao.kulka...@cavium.com> --- Documentation/perf/thunderx2-pmu.tx

[PATCH v4 1/2] perf: uncore: Adding documentation for ThunderX2 pmu uncore driver

Documentation for the UNCORE PMUs on Cavium's ThunderX2 SoC. The SoC has PMU support in its L3 cache controller (L3C) and in the DDR4 Memory Controller (DMC). Signed-off-by: Ganapatrao Kulkarni --- Documentation/perf/thunderx2-pmu.txt | 66 1 file changed

[PATCH v4 2/2] ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver

tiles of L3 cache. Each PMU supports up to 4 counters. All counters lack overflow interrupt and are sampled periodically. Signed-off-by: Ganapatrao Kulkarni <ganapatrao.kulka...@cavium.com> --- drivers/perf/Kconfig | 8 + drivers/perf/Makefile| 1 + drivers/perf/thunderx2

[PATCH v4 2/2] ThunderX2: Add Cavium ThunderX2 SoC UNCORE PMU driver

tiles of L3 cache. Each PMU supports up to 4 counters. All counters lack overflow interrupt and are sampled periodically. Signed-off-by: Ganapatrao Kulkarni --- drivers/perf/Kconfig | 8 + drivers/perf/Makefile| 1 + drivers/perf/thunderx2_pmu.c | 958

[PATCH v4 0/2] Add ThunderX2 SoC Performance Monitoring Unit driver

: - fixed warning reported by kbuild robot v2: - rebased to 4.12-rc1 - Removed Arch VULCAN dependency. - update SMC call parameters as per latest firmware. v1: -Initial patch Ganapatrao Kulkarni (2): perf: uncore: Adding documentation for ThunderX2 pmu uncore driver

[PATCH v4 0/2] Add ThunderX2 SoC Performance Monitoring Unit driver

: - fixed warning reported by kbuild robot v2: - rebased to 4.12-rc1 - Removed Arch VULCAN dependency. - update SMC call parameters as per latest firmware. v1: -Initial patch Ganapatrao Kulkarni (2): perf: uncore: Adding documentation for ThunderX2 pmu uncore driver

Re: [PATCH] iommu/iova: Update cached node pointer when current node fails to get any free IOVA

On Mon, Apr 23, 2018 at 10:07 PM, Robin Murphy <robin.mur...@arm.com> wrote: > On 19/04/18 18:12, Ganapatrao Kulkarni wrote: >> >> The performance drop is observed with long hours iperf testing using 40G >> cards. This is mainly due to long iterations in finding the

Re: [PATCH] iommu/iova: Update cached node pointer when current node fails to get any free IOVA

On Mon, Apr 23, 2018 at 10:07 PM, Robin Murphy wrote: > On 19/04/18 18:12, Ganapatrao Kulkarni wrote: >> >> The performance drop is observed with long hours iperf testing using 40G >> cards. This is mainly due to long iterations in finding the free iova >> r

[PATCH] iommu/iova: Update cached node pointer when current node fails to get any free IOVA

update cached32_node to itself. From now on, walking over 32-bit range is more expensive. This patch adds fix to update cached node to leaf node when there are no iova free range left, which avoids unnecessary long iterations. Signed-off-by: Ganapatrao Kulkarni <ganapatrao.kulka...@cavium.

[PATCH] iommu/iova: Update cached node pointer when current node fails to get any free IOVA

update cached32_node to itself. From now on, walking over 32-bit range is more expensive. This patch adds fix to update cached node to leaf node when there are no iova free range left, which avoids unnecessary long iterations. Signed-off-by: Ganapatrao Kulkarni --- drivers/iommu/iova.c | 6 ++ 1

[tip:perf/core] perf vendor events arm64: Enable JSON events for ThunderX2 B0

Commit-ID: a8685f088819d21cd5aea5de4c184de427c3625d Gitweb: https://git.kernel.org/tip/a8685f088819d21cd5aea5de4c184de427c3625d Author: Ganapatrao Kulkarni <ganapatrao.kulka...@cavium.com> AuthorDate: Wed, 7 Mar 2018 16:38:03 +0530 Committer: Arnaldo Carvalho de Melo <a...@r

[tip:perf/core] perf vendor events arm64: Enable JSON events for ThunderX2 B0

Commit-ID: a8685f088819d21cd5aea5de4c184de427c3625d Gitweb: https://git.kernel.org/tip/a8685f088819d21cd5aea5de4c184de427c3625d Author: Ganapatrao Kulkarni AuthorDate: Wed, 7 Mar 2018 16:38:03 +0530 Committer: Arnaldo Carvalho de Melo CommitDate: Fri, 16 Mar 2018 13:55:41 -0300 perf

Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

On Fri, Mar 9, 2018 at 11:32 PM, Arnaldo Carvalho de Melo <arnaldo.m...@gmail.com> wrote: > Em Fri, Mar 09, 2018 at 03:00:40PM -0300, Arnaldo Carvalho de Melo escreveu: >> Em Fri, Mar 09, 2018 at 11:15:16PM +0530, Ganapatrao Kulkarni escreveu: >> > On Fri, Mar 9, 2018 at 11

Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

On Fri, Mar 9, 2018 at 11:32 PM, Arnaldo Carvalho de Melo wrote: > Em Fri, Mar 09, 2018 at 03:00:40PM -0300, Arnaldo Carvalho de Melo escreveu: >> Em Fri, Mar 09, 2018 at 11:15:16PM +0530, Ganapatrao Kulkarni escreveu: >> > On Fri, Mar 9, 2018 at 11:03 PM, Arnaldo Carvalho de

Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

2018 at 07:57:04PM +0530, Ganapatrao Kulkarni escreveu: >> > > Hi Arnaldo, >> > > >> > > can you please pull-in this patch? >> > >> > So everybody is Ok with this? Can I have some Acked-by: from subject >> > matter experts? >> >>

Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

Hi Arnaldo, On Fri, Mar 9, 2018 at 11:03 PM, Arnaldo Carvalho de Melo wrote: > Em Fri, Mar 09, 2018 at 03:58:09PM +, Will Deacon escreveu: >> On Fri, Mar 09, 2018 at 11:34:15AM -0300, Arnaldo Carvalho de Melo wrote: >> > Em Fri, Mar 09, 2018 at 07:57:04PM +0530, Ganapatrao

Re: [PATCH v3 09/11] perf vendor events arm64: fixup ThunderX2 to use recommended events

Hi John, On Thu, Mar 8, 2018 at 4:28 PM, John Garry <john.ga...@huawei.com> wrote: > This patch fixes the Cavium ThunderX2 JSON to use event definitions > from the ARMv8 recommended events. > > Cc: Ganapatrao Kulkarni <ganapatrao.kulka...@cavium.com> > Signed-

Re: [PATCH v3 09/11] perf vendor events arm64: fixup ThunderX2 to use recommended events

Hi John, On Thu, Mar 8, 2018 at 4:28 PM, John Garry wrote: > This patch fixes the Cavium ThunderX2 JSON to use event definitions > from the ARMv8 recommended events. > > Cc: Ganapatrao Kulkarni > Signed-off-by: John Garry > --- > .../arch/arm64/cavium/thunderx2/co

Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

Hi Arnaldo, can you please pull-in this patch? On Thu, Mar 8, 2018 at 9:44 AM, Ganapatrao Kulkarni <gklkm...@gmail.com> wrote: > On Thu, Mar 8, 2018 at 12:01 AM, William Cohen <wco...@redhat.com> wrote: >> On 03/07/2018 12:35 PM, Ganapatrao Kulkarni wrote: >>> Hi W

Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

Hi Arnaldo, can you please pull-in this patch? On Thu, Mar 8, 2018 at 9:44 AM, Ganapatrao Kulkarni wrote: > On Thu, Mar 8, 2018 at 12:01 AM, William Cohen wrote: >> On 03/07/2018 12:35 PM, Ganapatrao Kulkarni wrote: >>> Hi Will Cohen, >>> >>> On Wed, Mar 7,

Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

On Thu, Mar 8, 2018 at 12:01 AM, William Cohen <wco...@redhat.com> wrote: > On 03/07/2018 12:35 PM, Ganapatrao Kulkarni wrote: >> Hi Will Cohen, >> >> On Wed, Mar 7, 2018 at 8:08 PM, Arnaldo Carvalho de Melo >> <a...@kernel.org> wrote: >>> Em Wed,

Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

On Thu, Mar 8, 2018 at 12:01 AM, William Cohen wrote: > On 03/07/2018 12:35 PM, Ganapatrao Kulkarni wrote: >> Hi Will Cohen, >> >> On Wed, Mar 7, 2018 at 8:08 PM, Arnaldo Carvalho de Melo >> wrote: >>> Em Wed, Mar 07, 2018 at 09:32:05AM -0500, William Cohen e

Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

Hi Will Cohen, On Wed, Mar 7, 2018 at 8:08 PM, Arnaldo Carvalho de Melo <a...@kernel.org> wrote: > Em Wed, Mar 07, 2018 at 09:32:05AM -0500, William Cohen escreveu: >> On 03/07/2018 06:08 AM, Ganapatrao Kulkarni wrote: >> > There is MIDR change on ThunderX2 B0, ad

Re: [PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

Hi Will Cohen, On Wed, Mar 7, 2018 at 8:08 PM, Arnaldo Carvalho de Melo wrote: > Em Wed, Mar 07, 2018 at 09:32:05AM -0500, William Cohen escreveu: >> On 03/07/2018 06:08 AM, Ganapatrao Kulkarni wrote: >> > There is MIDR change on ThunderX2 B0, adding an entry to mapfile &

[PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

There is MIDR change on ThunderX2 B0, adding an entry to mapfile to enable JSON events for B0. Signed-off-by: Ganapatrao Kulkarni <ganapatrao.kulka...@cavium.com> --- tools/perf/pmu-events/arch/arm64/mapfile.csv | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/perf/pmu-events/arch

[PATCH] perf vendor events arm64: Enable JSON events for ThunderX2 B0

There is MIDR change on ThunderX2 B0, adding an entry to mapfile to enable JSON events for B0. Signed-off-by: Ganapatrao Kulkarni --- tools/perf/pmu-events/arch/arm64/mapfile.csv | 1 + 1 file changed, 1 insertion(+) diff --git a/tools/perf/pmu-events/arch/arm64/mapfile.csv b/tools/perf/pmu

Re: [PATCH v2 00/11] perf events patches for improved ARM64 support

Hi John, On Fri, Mar 2, 2018 at 9:35 PM, William Cohen wrote: > On 03/02/2018 03:24 AM, John Garry wrote: >> On 27/02/2018 09:50, Jiri Olsa wrote: >>> On Sat, Feb 24, 2018 at 12:05:21AM +0800, John Garry wrote: This patchset adds support for some perf events features,

Re: [PATCH v2 00/11] perf events patches for improved ARM64 support

Hi John, On Fri, Mar 2, 2018 at 9:35 PM, William Cohen wrote: > On 03/02/2018 03:24 AM, John Garry wrote: >> On 27/02/2018 09:50, Jiri Olsa wrote: >>> On Sat, Feb 24, 2018 at 12:05:21AM +0800, John Garry wrote: This patchset adds support for some perf events features, targeted at

Re: [PATCH v2 00/11] perf events patches for improved ARM64 support

Hi John, On Fri, Mar 2, 2018 at 1:54 PM, John Garry wrote: > On 27/02/2018 09:50, Jiri Olsa wrote: >> >> On Sat, Feb 24, 2018 at 12:05:21AM +0800, John Garry wrote: >>> >>> This patchset adds support for some perf events features, >>> targeted at ARM64, implemented in a

Re: [PATCH v2 00/11] perf events patches for improved ARM64 support

Hi John, On Fri, Mar 2, 2018 at 1:54 PM, John Garry wrote: > On 27/02/2018 09:50, Jiri Olsa wrote: >> >> On Sat, Feb 24, 2018 at 12:05:21AM +0800, John Garry wrote: >>> >>> This patchset adds support for some perf events features, >>> targeted at ARM64, implemented in a generic fashion. >>> >>>

Re: [PATCH v2] irqchip/gic-v3-its: Add workaround for ThunderX2 erratum #174

On Fri, Jan 19, 2018 at 5:53 PM, Marc Zyngier <marc.zyng...@arm.com> wrote: > On 18/01/18 05:28, Ganapatrao Kulkarni wrote: >> This erratum is observed on the ThunderX2 GICv3 ITS. When a >> MOVI command is used to change affinity of a LPI to a collection/cpu >&g

Re: [PATCH v2] irqchip/gic-v3-its: Add workaround for ThunderX2 erratum #174

On Fri, Jan 19, 2018 at 5:53 PM, Marc Zyngier wrote: > On 18/01/18 05:28, Ganapatrao Kulkarni wrote: >> This erratum is observed on the ThunderX2 GICv3 ITS. When a >> MOVI command is used to change affinity of a LPI to a collection/cpu >> on another node, the LPI is not

[PATCH v2] irqchip/gic-v3-its: Add workaround for ThunderX2 erratum #174

after MOVI, there is a chance that we lose LPIs which are raised when the affinity is changed. So for now, adding workaround fix to disable inter node affinity change. Signed-off-by: Ganapatrao Kulkarni <ganapatrao.kulka...@cavium.com> --- v2: Added workaround to avoid inter node affinity chang

[PATCH v2] irqchip/gic-v3-its: Add workaround for ThunderX2 erratum #174

after MOVI, there is a chance that we lose LPIs which are raised when the affinity is changed. So for now, adding workaround fix to disable inter node affinity change. Signed-off-by: Ganapatrao Kulkarni --- v2: Added workaround to avoid inter node affinity change. v1: Initial patch Documentation

Re: [PATCH] irqchip/gic-v3-its: Add workaround for ThunderX2 erratum #174

On Wed, Jan 3, 2018 at 5:06 PM, Marc Zyngier <marc.zyng...@arm.com> wrote: > On 03/01/18 11:20, Ganapatrao Kulkarni wrote: >> On Wed, Jan 3, 2018 at 3:43 PM, Marc Zyngier <marc.zyng...@arm.com> wrote: >>> On 03/01/18 09:35, Ganapatrao Kulkarni wrote: >>>&

Re: [PATCH] irqchip/gic-v3-its: Add workaround for ThunderX2 erratum #174

On Wed, Jan 3, 2018 at 5:06 PM, Marc Zyngier wrote: > On 03/01/18 11:20, Ganapatrao Kulkarni wrote: >> On Wed, Jan 3, 2018 at 3:43 PM, Marc Zyngier wrote: >>> On 03/01/18 09:35, Ganapatrao Kulkarni wrote: >>>> Hi Marc, >>>> >>>> On Wed, Jan 3

Re: [PATCH] irqchip/gic-v3-its: Add workaround for ThunderX2 erratum #174

On Wed, Jan 3, 2018 at 3:43 PM, Marc Zyngier <marc.zyng...@arm.com> wrote: > On 03/01/18 09:35, Ganapatrao Kulkarni wrote: >> Hi Marc, >> >> On Wed, Jan 3, 2018 at 2:17 PM, Marc Zyngier <marc.zyng...@arm.com> wrote: >>> On 03/01/18 06:32, Ganapatrao Kulka

Re: [PATCH] irqchip/gic-v3-its: Add workaround for ThunderX2 erratum #174

On Wed, Jan 3, 2018 at 3:43 PM, Marc Zyngier wrote: > On 03/01/18 09:35, Ganapatrao Kulkarni wrote: >> Hi Marc, >> >> On Wed, Jan 3, 2018 at 2:17 PM, Marc Zyngier wrote: >>> On 03/01/18 06:32, Ganapatrao Kulkarni wrote: >>>> When an interrupt is

Re: [PATCH] irqchip/gic-v3-its: Add workaround for ThunderX2 erratum #174

Hi Marc, On Wed, Jan 3, 2018 at 2:17 PM, Marc Zyngier <marc.zyng...@arm.com> wrote: > On 03/01/18 06:32, Ganapatrao Kulkarni wrote: >> When an interrupt is moved across node collections on ThunderX2 > > node collections? ok, i will rephrase it. i was intended to say cross

Re: [PATCH] irqchip/gic-v3-its: Add workaround for ThunderX2 erratum #174

Hi Marc, On Wed, Jan 3, 2018 at 2:17 PM, Marc Zyngier wrote: > On 03/01/18 06:32, Ganapatrao Kulkarni wrote: >> When an interrupt is moved across node collections on ThunderX2 > > node collections? ok, i will rephrase it. i was intended to say cross NUMA node collection/cpu

[PATCH] irqchip/gic-v3-its: Add workaround for ThunderX2 erratum #174

When an interrupt is moved across node collections on ThunderX2 multi Socket platform, an interrupt stops routed to new collection and results in loss of interrupts. Adding workaround to issue INV after MOVI for cross-node collection move to flush out the cached entry. Signed-off-by: Ganapatrao

[PATCH] irqchip/gic-v3-its: Add workaround for ThunderX2 erratum #174

When an interrupt is moved across node collections on ThunderX2 multi Socket platform, an interrupt stops routed to new collection and results in loss of interrupts. Adding workaround to issue INV after MOVI for cross-node collection move to flush out the cached entry. Signed-off-by: Ganapatrao

Re: [PATCH] irqchip/gic-v3-its: Flush GICR caching for a cross node collection move of an irq

On Wed, Dec 20, 2017 at 6:42 PM, Marc Zyngier <marc.zyng...@arm.com> wrote: > On 20/12/17 09:34, Ganapatrao Kulkarni wrote: >> Hi Marc, >> >> On Wed, Dec 20, 2017 at 2:56 PM, Marc Zyngier <marc.zyng...@arm.com> wrote: >>> On 20/12/17 09:15, Ganapat

Re: [PATCH] irqchip/gic-v3-its: Flush GICR caching for a cross node collection move of an irq

On Wed, Dec 20, 2017 at 6:42 PM, Marc Zyngier wrote: > On 20/12/17 09:34, Ganapatrao Kulkarni wrote: >> Hi Marc, >> >> On Wed, Dec 20, 2017 at 2:56 PM, Marc Zyngier wrote: >>> On 20/12/17 09:15, Ganapatrao Kulkarni wrote: >>>> When an interrupt is mo

Re: [PATCH] irqchip/gic-v3-its: Flush GICR caching for a cross node collection move of an irq

Hi Marc, On Wed, Dec 20, 2017 at 2:56 PM, Marc Zyngier <marc.zyng...@arm.com> wrote: > On 20/12/17 09:15, Ganapatrao Kulkarni wrote: >> When an interrupt is moved, it is possible that an implementation that >> supports caching might still have cached data for a previou

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