Add support for SMBus alert mechanism to i2c-xlp9xx driver.
The second interrupt is parsed to use for SMBus alert.
The first interrupt is the i2c controller main interrupt.
Signed-off-by: Kamlakant Patel <kamlakant.pa...@cavium.com>
Signed-off-by: George Cherian <george.cher...@c
Add support for SMBus alert mechanism to i2c-xlp9xx driver.
The second interrupt is parsed to use for SMBus alert.
The first interrupt is the i2c controller main interrupt.
Signed-off-by: Kamlakant Patel
Signed-off-by: George Cherian
---
drivers/i2c/busses/i2c-xlp9xx.c | 24
On 03/06/2018 02:48 PM, Phil Reid wrote:
On 6/03/2018 16:36, Jan Glauber wrote:
On Tue, Feb 27, 2018 at 01:26:20PM +, George Cherian wrote:
Add support for SMBus alert mechanism to i2c-xlp9xx driver.
The second interrupt is parsed to use for SMBus alert.
The first interrupt is the i2c
On 03/06/2018 02:48 PM, Phil Reid wrote:
On 6/03/2018 16:36, Jan Glauber wrote:
On Tue, Feb 27, 2018 at 01:26:20PM +, George Cherian wrote:
Add support for SMBus alert mechanism to i2c-xlp9xx driver.
The second interrupt is parsed to use for SMBus alert.
The first interrupt is the i2c
sure the bus is not busy before every transaction.
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
drivers/i2c/busses/i2c-xlp9xx.c | 32
1 file changed, 32 insertions(+)
diff --git a/drivers/i2c/busses/i2c-xlp9xx.c b/drivers/i2c/busses/i2c-xl
sure the bus is not busy before every transaction.
Signed-off-by: George Cherian
---
drivers/i2c/busses/i2c-xlp9xx.c | 32
1 file changed, 32 insertions(+)
diff --git a/drivers/i2c/busses/i2c-xlp9xx.c b/drivers/i2c/busses/i2c-xlp9xx.c
index 1f6d780..42dd1fa
Add support for SMBus alert mechanism to i2c-xlp9xx driver.
The second interrupt is parsed to use for SMBus alert.
The first interrupt is the i2c controller main interrupt.
Signed-off-by: Kamlakant Patel <kamlakant.pa...@cavium.com>
Signed-off-by: George Cherian <george.cher...@c
Add support for SMBus alert mechanism to i2c-xlp9xx driver.
The second interrupt is parsed to use for SMBus alert.
The first interrupt is the i2c controller main interrupt.
Signed-off-by: Kamlakant Patel
Signed-off-by: George Cherian
---
drivers/i2c/busses/i2c-xlp9xx.c | 26
for such
transactions.
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
drivers/i2c/busses/i2c-xlp9xx.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/i2c/busses/i2c-xlp9xx.c b/drivers/i2c/busses/i2c-xlp9xx.c
index 42dd1fa..eb8913e 100644
--- a/d
for such
transactions.
Signed-off-by: George Cherian
---
drivers/i2c/busses/i2c-xlp9xx.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/drivers/i2c/busses/i2c-xlp9xx.c b/drivers/i2c/busses/i2c-xlp9xx.c
index 42dd1fa..eb8913e 100644
--- a/drivers/i2c/busses/i2c-xlp9xx.c
Hi Wolfram,
On 02/27/2018 02:35 PM, Wolfram Sang wrote:
Since you raised concern on the patch I thought of reworking this patch.
But I can see that this patch is already applied for i2c/for-next.
Kindly let me know whether I should be sending follow-up patches on top
of i2c/for-next ?
Oops,
Hi Wolfram,
On 02/27/2018 02:35 PM, Wolfram Sang wrote:
Since you raised concern on the patch I thought of reworking this patch.
But I can see that this patch is already applied for i2c/for-next.
Kindly let me know whether I should be sending follow-up patches on top
of i2c/for-next ?
Oops,
Hi Wolfram,
On 02/27/2018 02:34 PM, Wolfram Sang wrote:
On Tue, Feb 27, 2018 at 10:30:31AM +0530, George Cherian wrote:
Hi Wolfram,
Thanks for the review.
On 02/27/2018 01:52 AM, Wolfram Sang wrote:
On Thu, Jan 18, 2018 at 05:39:24AM +, George Cherian wrote:
I2C bus enters the STOP
Hi Wolfram,
On 02/27/2018 02:34 PM, Wolfram Sang wrote:
On Tue, Feb 27, 2018 at 10:30:31AM +0530, George Cherian wrote:
Hi Wolfram,
Thanks for the review.
On 02/27/2018 01:52 AM, Wolfram Sang wrote:
On Thu, Jan 18, 2018 at 05:39:24AM +, George Cherian wrote:
I2C bus enters the STOP
Hi Wolfram,
On 02/27/2018 10:30 AM, George Cherian wrote:
Hi Wolfram,
Thanks for the review.
On 02/27/2018 01:52 AM, Wolfram Sang wrote:
On Thu, Jan 18, 2018 at 05:39:24AM +, George Cherian wrote:
I2C bus enters the STOP condition after the DATA_DONE interrupt is
raised.
Essentially
Hi Wolfram,
On 02/27/2018 10:30 AM, George Cherian wrote:
Hi Wolfram,
Thanks for the review.
On 02/27/2018 01:52 AM, Wolfram Sang wrote:
On Thu, Jan 18, 2018 at 05:39:24AM +, George Cherian wrote:
I2C bus enters the STOP condition after the DATA_DONE interrupt is
raised.
Essentially
Hi Wolfram,
Thanks for the review.
On 02/27/2018 01:52 AM, Wolfram Sang wrote:
On Thu, Jan 18, 2018 at 05:39:24AM +, George Cherian wrote:
I2C bus enters the STOP condition after the DATA_DONE interrupt is raised.
Essentially the driver should be checking the bus state before sending
Hi Wolfram,
Thanks for the review.
On 02/27/2018 01:52 AM, Wolfram Sang wrote:
On Thu, Jan 18, 2018 at 05:39:24AM +, George Cherian wrote:
I2C bus enters the STOP condition after the DATA_DONE interrupt is raised.
Essentially the driver should be checking the bus state before sending
Hi Bjorn,
On 02/22/2018 04:50 AM, Bjorn Helgaas wrote:
On Wed, Feb 21, 2018 at 04:25:08PM +0530, George Cherian wrote:
On 02/21/2018 03:24 PM, Lukas Wunner wrote:
On Wed, Feb 21, 2018 at 02:58:13PM +0530, George Cherian wrote:
I will explain the setup used
To the Cavium ThunderX RC
Hi Bjorn,
On 02/22/2018 04:50 AM, Bjorn Helgaas wrote:
On Wed, Feb 21, 2018 at 04:25:08PM +0530, George Cherian wrote:
On 02/21/2018 03:24 PM, Lukas Wunner wrote:
On Wed, Feb 21, 2018 at 02:58:13PM +0530, George Cherian wrote:
I will explain the setup used
To the Cavium ThunderX RC
Hi Lukas,
On 02/21/2018 03:24 PM, Lukas Wunner wrote:
On Wed, Feb 21, 2018 at 02:58:13PM +0530, George Cherian wrote:
I will explain the setup used
To the Cavium ThunderX RC the following PLX device is connected.
PLX Technology, Inc. PEX 8747 48-Lane, 5-Port PCI Express Gen 3 (8.0 GT/s)
Switch
Hi Lukas,
On 02/21/2018 03:24 PM, Lukas Wunner wrote:
On Wed, Feb 21, 2018 at 02:58:13PM +0530, George Cherian wrote:
I will explain the setup used
To the Cavium ThunderX RC the following PLX device is connected.
PLX Technology, Inc. PEX 8747 48-Lane, 5-Port PCI Express Gen 3 (8.0 GT/s)
Switch
Hi Bjorn,
On 02/21/2018 12:30 AM, Bjorn Helgaas wrote:
[+cc Huang]
On Tue, Feb 20, 2018 at 02:54:33AM +0100, Lukas Wunner wrote:
On Mon, Feb 19, 2018 at 12:21:56PM +0100, Rafael J. Wysocki wrote:
On Friday, February 16, 2018 9:34:34 PM CET Bjorn Helgaas wrote:
On Fri, Feb 16, 2018 at
Hi Bjorn,
On 02/21/2018 12:30 AM, Bjorn Helgaas wrote:
[+cc Huang]
On Tue, Feb 20, 2018 at 02:54:33AM +0100, Lukas Wunner wrote:
On Mon, Feb 19, 2018 at 12:21:56PM +0100, Rafael J. Wysocki wrote:
On Friday, February 16, 2018 9:34:34 PM CET Bjorn Helgaas wrote:
On Fri, Feb 16, 2018 at
CPPC dirver is aware of multiple PCC subspace IDs. Enhance the debug
and error messages in the driver to print the subspace id. In case of
error it will be helpful to find which particular subspace is failing.
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
drivers/acpi/cppc_
CPPC dirver is aware of multiple PCC subspace IDs. Enhance the debug
and error messages in the driver to print the subspace id. In case of
error it will be helpful to find which particular subspace is failing.
Signed-off-by: George Cherian
---
drivers/acpi/cppc_acpi.c | 27
Hi Bjorn,
Thanks for the review.
On 02/13/2018 08:39 PM, Bjorn Helgaas wrote:
[+cc Lorenzo]
On Fri, Feb 02, 2018 at 07:00:46AM +, George Cherian wrote:
The PCIe Controller on Cavium ThunderX2 processors does not
respond to downstream CFG/ECFG cycles when root port is
in power management
Hi Bjorn,
Thanks for the review.
On 02/13/2018 08:39 PM, Bjorn Helgaas wrote:
[+cc Lorenzo]
On Fri, Feb 02, 2018 at 07:00:46AM +, George Cherian wrote:
The PCIe Controller on Cavium ThunderX2 processors does not
respond to downstream CFG/ECFG cycles when root port is
in power management
a quirk that prevents the root port from
entering D3 state. This is seen on both Ax/Bx variants of the processor.
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
drivers/pci/quirks.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/pci/quirks.c b/drive
a quirk that prevents the root port from
entering D3 state. This is seen on both Ax/Bx variants of the processor.
Signed-off-by: George Cherian
---
drivers/pci/quirks.c | 12
1 file changed, 12 insertions(+)
diff --git a/drivers/pci/quirks.c b/drivers/pci/quirks.c
index 10684b1
Gentle Ping on this series.
On 01/18/2018 11:09 AM, George Cherian wrote:
From: Dmitry Bazhenov <dmitry.bazhe...@auriga.com>
Fix the driver violation of the common practice to return
ENXIO error on a slave address NACK.
Signed-off-by: Dmitry Bazhenov <dmitry.bazhe...@auriga.com>
Gentle Ping on this series.
On 01/18/2018 11:09 AM, George Cherian wrote:
From: Dmitry Bazhenov
Fix the driver violation of the common practice to return
ENXIO error on a slave address NACK.
Signed-off-by: Dmitry Bazhenov
Signed-off-by: George Cherian
---
drivers/i2c/busses/i2c-xlp9xx.c
on the received length.
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
drivers/i2c/busses/i2c-xlp9xx.c | 31 ---
1 file changed, 24 insertions(+), 7 deletions(-)
diff --git a/drivers/i2c/busses/i2c-xlp9xx.c b/drivers/i2c/busses/i2c-xlp9xx.c
index 6d78cdc..b
on the received length.
Signed-off-by: George Cherian
---
drivers/i2c/busses/i2c-xlp9xx.c | 31 ---
1 file changed, 24 insertions(+), 7 deletions(-)
diff --git a/drivers/i2c/busses/i2c-xlp9xx.c b/drivers/i2c/busses/i2c-xlp9xx.c
index 6d78cdc..b5b224e 100644
--- a/drivers/i2c
From: Dmitry Bazhenov
Report SMBus block read functionality which is actually supported.
Signed-off-by: Dmitry Bazhenov
---
drivers/i2c/busses/i2c-xlp9xx.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git
From: Dmitry Bazhenov
Report SMBus block read functionality which is actually supported.
Signed-off-by: Dmitry Bazhenov
---
drivers/i2c/busses/i2c-xlp9xx.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/i2c/busses/i2c-xlp9xx.c b/drivers/i2c/busses/i2c-xlp9xx.c
From: Dmitry Bazhenov <dmitry.bazhe...@auriga.com>
Fix the driver violation of the common practice to return
ENXIO error on a slave address NACK.
Signed-off-by: Dmitry Bazhenov <dmitry.bazhe...@auriga.com>
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
driv
the check to make sure the bus is not busy before next transaction.
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
drivers/i2c/busses/i2c-xlp9xx.c | 20 +++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/i2c-xlp9xx.c b/drivers/i2c/
From: Dmitry Bazhenov
Fix the driver violation of the common practice to return
ENXIO error on a slave address NACK.
Signed-off-by: Dmitry Bazhenov
Signed-off-by: George Cherian
---
drivers/i2c/busses/i2c-xlp9xx.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/drivers
the check to make sure the bus is not busy before next transaction.
Signed-off-by: George Cherian
---
drivers/i2c/busses/i2c-xlp9xx.c | 20 +++-
1 file changed, 19 insertions(+), 1 deletion(-)
diff --git a/drivers/i2c/busses/i2c-xlp9xx.c b/drivers/i2c/busses/i2c-xlp9xx.c
index 1f6d780
after the check
on pcc_ss_id at line 1182: pcc_ss_data = pcc_data[pcc_ss_id];
Addresses-Coverity-ID: 1426090 ("Negative array index read")
Fixes: 1ecbd7170d65 ("ACPI / CPPC: Fix KASAN global out of bounds warning")
Reviewed-by: George Cherian <george.cher...@cavium.com>
after the check
on pcc_ss_id at line 1182: pcc_ss_data = pcc_data[pcc_ss_id];
Addresses-Coverity-ID: 1426090 ("Negative array index read")
Fixes: 1ecbd7170d65 ("ACPI / CPPC: Fix KASAN global out of bounds warning")
Reviewed-by: George Cherian
Signed-off-by: Gustavo A. R.
assumption being that producers do not need to read the value so we do
not need to order these reads.
Reported-by: George Cherian <george.cher...@cavium.com>
Suggested-by: Jason Wang <jasow...@redhat.com>
Signed-off-by: Michael S. Tsirkin <m...@redhat.com>
I'm asked for asking fo
oducers do not need to read the value so we do
not need to order these reads.
Reported-by: George Cherian
Suggested-by: Jason Wang
Signed-off-by: Michael S. Tsirkin
I'm asked for asking for testing feedback and did not get it in a
reasonable amount of time.
The tests have completed more tha
+0x24/0x28
[35322.773042] Code: d503201f f9400e93 b940e280 91051274 (f9403261)
Reported-by: Joseph DeVincentis <joseph.devincen...@cavium.com>
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
include/linux/ptr_ring.h | 13 +
1 file changed, 13 insertions(+)
+0x24/0x28
[35322.773042] Code: d503201f f9400e93 b940e280 91051274 (f9403261)
Reported-by: Joseph DeVincentis
Signed-off-by: George Cherian
---
include/linux/ptr_ring.h | 13 +
1 file changed, 13 insertions(+)
diff --git a/include/linux/ptr_ring.h b/include/linux/ptr_ring.h
index
eed to order these reads.
It is not the case that producer is reading the value, but the consumer
reading stale value. So we need to have a strict rmb in place .
Reported-by: George Cherian <george.cher...@cavium.com>
Suggested-by: Jason Wang <jasow...@redhat.com>
Signed-off-b
eed to order these reads.
It is not the case that producer is reading the value, but the consumer
reading stale value. So we need to have a strict rmb in place .
Reported-by: George Cherian
Suggested-by: Jason Wang
Signed-off-by: Michael S. Tsirkin
---
George, could you pls report whether this
+0x24/0x28
[35322.773042] Code: d503201f f9400e93 b940e280 91051274 (f9403261)
Reported-by: Joseph DeVincentis <joseph.devincen...@cavium.com>
Signed-off-by: George Cherian <george.cher...@cavium.com>
Cc: sta...@vger.kernel.org
---
include/linux/skb_array.h | 9 +
1 fil
+0x24/0x28
[35322.773042] Code: d503201f f9400e93 b940e280 91051274 (f9403261)
Reported-by: Joseph DeVincentis
Signed-off-by: George Cherian
Cc: sta...@vger.kernel.org
---
include/linux/skb_array.h | 9 +
1 file changed, 9 insertions(+)
diff --git a/include/linux/skb_array.h b/include
00
[ 15.116983]
==
Reported-by: Changbin Du <changbin...@intel.com>
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
drivers/acpi/cppc_acpi.c | 23 +++
1 file changed, 15 insertions(
00
[ 15.116983]
==
Reported-by: Changbin Du
Signed-off-by: George Cherian
---
drivers/acpi/cppc_acpi.c | 23 +++
1 file changed, 15 insertions(+), 8 deletions(-)
diff --git a/drivers/acpi/cppc_acpi.c b/drivers/a
Thanks Prakash for the clarifications.
I have updated the patch set incorporating your comments and posted v5.
Regards
-George
On 10/07/2017 02:40 AM, Prakash, Prashanth wrote:
On 10/3/2017 5:01 AM, George Cherian wrote:
Hi Prakash,
On 09/29/2017 04:49 AM, Prakash, Prashanth wrote:
Hi
Thanks Prakash for the clarifications.
I have updated the patch set incorporating your comments and posted v5.
Regards
-George
On 10/07/2017 02:40 AM, Prakash, Prashanth wrote:
On 10/3/2017 5:01 AM, George Cherian wrote:
Hi Prakash,
On 09/29/2017 04:49 AM, Prakash, Prashanth wrote:
Hi
Move the MAX_PCC_SUBSPACES definition to acpi/pcc.h file. In preparation to
add subspace id support for cppc_acpi driver.
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
drivers/mailbox/pcc.c | 1 -
include/acpi/pcc.h| 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
Move the MAX_PCC_SUBSPACES definition to acpi/pcc.h file. In preparation to
add subspace id support for cppc_acpi driver.
Signed-off-by: George Cherian
---
drivers/mailbox/pcc.c | 1 -
include/acpi/pcc.h| 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mailbox
subspace ids. Add support of multiple PCC subspace id
instead of using a single global pcc_data structure.
While at that fix the time_delta check in send_pcc_cmd() so that last_mpar_reset
and mpar_count is initialized properly.
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
d
the cppc_pcc_data per unique subspace idx.
- Added cleanup in acpi_cppc_processor_exit. Free the mbox channel and free
the cppc_pcc_data in case refcount is zero.
George Cherian (2):
mailbox: PCC: Move the MAX_PCC_SUBSPACES definition to header file
ACPI / CPPC: Make cppc acpi driver aware of pcc
subspace ids. Add support of multiple PCC subspace id
instead of using a single global pcc_data structure.
While at that fix the time_delta check in send_pcc_cmd() so that last_mpar_reset
and mpar_count is initialized properly.
Signed-off-by: George Cherian
---
drivers/acpi/cppc_acpi.c | 240
the cppc_pcc_data per unique subspace idx.
- Added cleanup in acpi_cppc_processor_exit. Free the mbox channel and free
the cppc_pcc_data in case refcount is zero.
George Cherian (2):
mailbox: PCC: Move the MAX_PCC_SUBSPACES definition to header file
ACPI / CPPC: Make cppc acpi driver aware of pcc
Hi Prakash,
On 09/29/2017 04:49 AM, Prakash, Prashanth wrote:
Hi George,
On 9/19/2017 11:24 PM, George Cherian wrote:
Based on ACPI 6.2 Section 8.4.7.1.9 If the PCC register space is used,
all PCC registers, for all processors in the same performance
domain (as defined by _PSD), must
Hi Prakash,
On 09/29/2017 04:49 AM, Prakash, Prashanth wrote:
Hi George,
On 9/19/2017 11:24 PM, George Cherian wrote:
Based on ACPI 6.2 Section 8.4.7.1.9 If the PCC register space is used,
all PCC registers, for all processors in the same performance
domain (as defined by _PSD), must
subspace ids. Add support of multiple PCC subspace id
instead of using a single global pcc_data structure.
While at that fix the time_delta check in send_pcc_cmd() so that last_mpar_reset
and mpar_count is initialized properly.
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
d
subspace ids. Add support of multiple PCC subspace id
instead of using a single global pcc_data structure.
While at that fix the time_delta check in send_pcc_cmd() so that last_mpar_reset
and mpar_count is initialized properly.
Signed-off-by: George Cherian
---
drivers/acpi/cppc_acpi.c | 243
Move the MAX_PCC_SUBSPACES definition to acpi/pcc.h file. In preparation to add
subspace id support for cppc_acpi driver.
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
drivers/mailbox/pcc.c | 1 -
include/acpi/pcc.h| 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
Move the MAX_PCC_SUBSPACES definition to acpi/pcc.h file. In preparation to add
subspace id support for cppc_acpi driver.
Signed-off-by: George Cherian
---
drivers/mailbox/pcc.c | 1 -
include/acpi/pcc.h| 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mailbox
.
- Added cleanup in acpi_cppc_processor_exit. Free the mbox channel and free
the cppc_pcc_data in case refcount is zero.
George Cherian (2):
mailbox: PCC: Move the MAX_PCC_SUBSPACES definition to header file
ACPI / CPPC: Make cppc acpi driver aware of pcc subspace ids
drivers/acpi
.
- Added cleanup in acpi_cppc_processor_exit. Free the mbox channel and free
the cppc_pcc_data in case refcount is zero.
George Cherian (2):
mailbox: PCC: Move the MAX_PCC_SUBSPACES definition to header file
ACPI / CPPC: Make cppc acpi driver aware of pcc subspace ids
drivers/acpi
subspace ids. Add support of multiple PCC subspace id
instead of using a single global pcc_data structure.
While at that fix the time_delta check in send_pcc_cmd() so that last_mpar_reset
and mpar_count is initialized properly.
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
d
subspace ids. Add support of multiple PCC subspace id
instead of using a single global pcc_data structure.
While at that fix the time_delta check in send_pcc_cmd() so that last_mpar_reset
and mpar_count is initialized properly.
Signed-off-by: George Cherian
---
drivers/acpi/cppc_acpi.c | 241
channel and free
the cppc_pcc_data in case refcount is zero.
George Cherian (2):
mailbox: PCC: Move the MAX_PCC_SUBSPACES definition to header file
ACPI / CPPC: Make cppc acpi driver aware of pcc subspace ids
drivers/acpi/cppc_acpi.c | 241
Move the MAX_PCC_SUBSPACES definition to acpi/pcc.h file. In preparation to add
subspace id support for cppc_acpi driver.
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
drivers/mailbox/pcc.c | 1 -
include/acpi/pcc.h| 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
channel and free
the cppc_pcc_data in case refcount is zero.
George Cherian (2):
mailbox: PCC: Move the MAX_PCC_SUBSPACES definition to header file
ACPI / CPPC: Make cppc acpi driver aware of pcc subspace ids
drivers/acpi/cppc_acpi.c | 241
Move the MAX_PCC_SUBSPACES definition to acpi/pcc.h file. In preparation to add
subspace id support for cppc_acpi driver.
Signed-off-by: George Cherian
---
drivers/mailbox/pcc.c | 1 -
include/acpi/pcc.h| 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mailbox
subspace ids. Add support of multiple PCC subspace id
instead of using a single global pcc_data structure.
While at that fix the time_delta check in send_pcc_cmd() so that last_mpar_reset
and mpar_count is initialized properly.
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
d
subspace ids. Add support of multiple PCC subspace id
instead of using a single global pcc_data structure.
While at that fix the time_delta check in send_pcc_cmd() so that last_mpar_reset
and mpar_count is initialized properly.
Signed-off-by: George Cherian
---
drivers/acpi/cppc_acpi.c | 228
is zero.
George Cherian (2):
mailbox: PCC: Move the MAX_PCC_SUBSPACES definition to header file
ACPI / CPPC: Make cppc acpi driver aware of pcc subspace ids
drivers/acpi/cppc_acpi.c | 228 ++-
drivers/mailbox/pcc.c| 1 -
include/acpi/pcc.h
is zero.
George Cherian (2):
mailbox: PCC: Move the MAX_PCC_SUBSPACES definition to header file
ACPI / CPPC: Make cppc acpi driver aware of pcc subspace ids
drivers/acpi/cppc_acpi.c | 228 ++-
drivers/mailbox/pcc.c| 1 -
include/acpi/pcc.h
Move the MAX_PCC_SUBSPACES definition to acpi/pcc.h file. In preparation to add
subspace id support for cppc_acpi driver.
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
drivers/mailbox/pcc.c | 1 -
include/acpi/pcc.h| 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
Move the MAX_PCC_SUBSPACES definition to acpi/pcc.h file. In preparation to add
subspace id support for cppc_acpi driver.
Signed-off-by: George Cherian
---
drivers/mailbox/pcc.c | 1 -
include/acpi/pcc.h| 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mailbox
Hi Prashanth,
Thanks for the review.
On 07/14/2017 03:14 AM, Prakash, Prashanth wrote:
Hi George,
On 6/13/2017 8:17 AM, George Cherian wrote:
Based on ACPI 6.2 Section 8.4.7.1.9 If the PCC register space is used,
all PCC registers, for all processors in the same performance
domain
Hi Prashanth,
Thanks for the review.
On 07/14/2017 03:14 AM, Prakash, Prashanth wrote:
Hi George,
On 6/13/2017 8:17 AM, George Cherian wrote:
Based on ACPI 6.2 Section 8.4.7.1.9 If the PCC register space is used,
all PCC registers, for all processors in the same performance
domain
subspace ids. Add support of multiple PCC subspace id
instead of using a single global pcc_data structure.
While at that fix the time_delta check in send_pcc_cmd() so that last_mpar_reset
and mpar_count is initialized properly.
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
d
subspace ids. Add support of multiple PCC subspace id
instead of using a single global pcc_data structure.
While at that fix the time_delta check in send_pcc_cmd() so that last_mpar_reset
and mpar_count is initialized properly.
Signed-off-by: George Cherian
---
drivers/acpi/cppc_acpi.c | 179
Please ignore this patch the subject had -internal tag Sorry!!
Resent the proper one.
On 06/13/2017 07:45 PM, George Cherian wrote:
Move the MAX_PCC_SUBSPACES definition to acpi/pcc.h file. In preparation to add
subspace id support for cppc_acpi driver.
Signed-off-by: George Cherian
Please ignore this patch the subject had -internal tag Sorry!!
Resent the proper one.
On 06/13/2017 07:45 PM, George Cherian wrote:
Move the MAX_PCC_SUBSPACES definition to acpi/pcc.h file. In preparation to add
subspace id support for cppc_acpi driver.
Signed-off-by: George Cherian
subspace ids.
George Cherian (2):
mailbox: PCC: Move the MAX_PCC_SUBSPACES definition to header file
ACPI / CPPC: Make cppc acpi driver aware of pcc subspace ids
drivers/acpi/cppc_acpi.c | 179 +--
drivers/mailbox/pcc.c| 1 -
include/acpi
subspace ids.
George Cherian (2):
mailbox: PCC: Move the MAX_PCC_SUBSPACES definition to header file
ACPI / CPPC: Make cppc acpi driver aware of pcc subspace ids
drivers/acpi/cppc_acpi.c | 179 +--
drivers/mailbox/pcc.c| 1 -
include/acpi
Move the MAX_PCC_SUBSPACES definition to acpi/pcc.h file. In preparation to add
subspace id support for cppc_acpi driver.
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
drivers/mailbox/pcc.c | 1 -
include/acpi/pcc.h| 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
Move the MAX_PCC_SUBSPACES definition to acpi/pcc.h file. In preparation to add
subspace id support for cppc_acpi driver.
Signed-off-by: George Cherian
---
drivers/mailbox/pcc.c | 1 -
include/acpi/pcc.h| 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mailbox
Sorry Ignore this series!!!
On 06/13/2017 07:45 PM, George Cherian wrote:
The current cppc acpi driver works with only one pcc subspace id.
It maintains and registers only one pcc channel even if the acpi table has
different pcc subspace ids.
As per ACPI 6.2 spec all PCC registers, for all
Sorry Ignore this series!!!
On 06/13/2017 07:45 PM, George Cherian wrote:
The current cppc acpi driver works with only one pcc subspace id.
It maintains and registers only one pcc channel even if the acpi table has
different pcc subspace ids.
As per ACPI 6.2 spec all PCC registers, for all
Move the MAX_PCC_SUBSPACES definition to acpi/pcc.h file. In preparation to add
subspace id support for cppc_acpi driver.
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
drivers/mailbox/pcc.c | 1 -
include/acpi/pcc.h| 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
Move the MAX_PCC_SUBSPACES definition to acpi/pcc.h file. In preparation to add
subspace id support for cppc_acpi driver.
Signed-off-by: George Cherian
---
drivers/mailbox/pcc.c | 1 -
include/acpi/pcc.h| 1 +
2 files changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/mailbox
subspace ids.
George Cherian (2):
mailbox: PCC: Move the MAX_PCC_SUBSPACES definition to header file
ACPI / CPPC: Make cppc acpi driver aware of pcc subspace ids
drivers/acpi/cppc_acpi.c | 179 +--
drivers/mailbox/pcc.c| 1 -
include/acpi
subspace ids.
George Cherian (2):
mailbox: PCC: Move the MAX_PCC_SUBSPACES definition to header file
ACPI / CPPC: Make cppc acpi driver aware of pcc subspace ids
drivers/acpi/cppc_acpi.c | 179 +--
drivers/mailbox/pcc.c| 1 -
include/acpi
Hi Herbert,
Ping on this series
Regards,
-George Cherian
On Thu, May 4, 2017 at 5:04 PM, George Cherian
<george.cher...@cavium.com> wrote:
> This series adds more algorithm support for CPT.
> Add support for
> -ecb(aes)
> -cfb(aes)
> -ecb(des3_e
Hi Herbert,
Ping on this series
Regards,
-George Cherian
On Thu, May 4, 2017 at 5:04 PM, George Cherian
wrote:
> This series adds more algorithm support for CPT.
> Add support for
> -ecb(aes)
> -cfb(aes)
> -ecb(des3_ede)
>
> Some cleanups too.
Set I2C_CLASS_HWMON for xlp9xx to enable automatic probing of BMC
devices by the ipmi-ssif driver.
Signed-off-by: George Cherian <george.cher...@cavium.com>
---
drivers/i2c/busses/i2c-xlp9xx.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/i2c/busses/i2c-xlp9xx.c b/drive
Set I2C_CLASS_HWMON for xlp9xx to enable automatic probing of BMC
devices by the ipmi-ssif driver.
Signed-off-by: George Cherian
---
drivers/i2c/busses/i2c-xlp9xx.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/i2c/busses/i2c-xlp9xx.c b/drivers/i2c/busses/i2c-xlp9xx.c
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