The following commit has been merged into the irq/irqchip-next branch of
irqchip:
Commit-ID: b16a1caf4686895427c810219d4b2f796e676160
Gitweb:
https://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms/b16a1caf4686895427c810219d4b2f796e676160
Author:Hou Zhiqiang
Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver")
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V7:
- This patch is #25 of V6 patches, rewrote the changelog.
drivers/pci/controller/pcie-mobiveil.c | 10 ++
), so the multi MSI feature is clearly not
supported by the host controller driver.
Remove the flag MSI_FLAG_MULTI_PCI_MSI and with it multi MSI support,
fixing the misconfiguration.
Fixes: 1e913e58335f ("PCI: mobiveil: Add MSI support")
Signed-off-by: Hou Zhiqiang
[lorenzo.pieral...@arm.c
Change the "gpio_slave" and "apb_csr" to optional, the "gpio_slave"
is not used in current code, and "apb_csr" is not used by some platforms.
Signed-off-by: Hou Zhiqiang
Acked-by: Subrahmanya Lingappa
Acked-by: Rob Herring
Reviewed-by: Minghuan Lian
R
To make the register updating more readable, outstand the fields
to update by changing the register updating sequence to:
a. Read out the original value from the target register.
b. Update the value in one sentence.
c. Program the updated value back to the register.
Signed-off-by: Hou Zhiqiang
are completely
separate there is no real need to use different window indexes in the
inbound/outbound windows initialization routines to prevent clashing.
To fix this inconsistency, change the MEM inbound window index to 0,
mirroring the outbound window set-up.
Signed-off-by: Hou Zhiqiang
[lorenzo.pieral
Fix up the Class Code field in PCI configuration space and set it to
PCI_CLASS_BRIDGE_PCI.
Move the Class Code fixup to function mobiveil_host_init() where
it belongs.
Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver")
Signed-off-by: Hou Zhiqiang
Reformat the code to make it more readable. No functional
change intended.
Signed-off-by: Hou Zhiqiang
Signed-off-by: Lorenzo Pieralisi
Reviewed-by: Minghuan Lian
---
V6:
- Splited from #2 of v5 patches, no functional change.
drivers/pci/controller/pcie-mobiveil.c | 208
The current code only setup the lower 32-bit CPU base address in
outbound window, it will result in outbound transactions drop on
64-bit platforms.
Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver")
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
The current code only setup the lower 32-bit PCI base address in
inbound window, it can result in inbound transactions drop on
64-bit platforms.
Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver")
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
The lower 10-bit of window size field is hardcode to zero,
and then the lower 10-bit of PAB_AXI_AMAP_CTRL register are
used to control fields, so mask out the lower 10-bit of
window size in case override the control bits.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed
nction program_ib_windows(), remove the definitions of
'pio_ctrl_val' and 'amap_ctrl_dw' and reduce to only one var 'value'
to keep the temporary value read from registers.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V6:
- Splited from #9 of v5 p
Move the resource type check into a if..else block, and only
set up outbound window for MEM and IO resource. No functional
change.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
---
V6:
- Splited from #2 of v5 patches, no functional change.
drivers/pci/controller/pcie-mobiveil.c
The current code has only statistic for outbound windows initialized,
but lack of inbound windows statistic. This patch is to add the
statistic for inbound windows initialized.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V6:
- Splited from #9
' for the CPU base address
setup and adds upper 32-bit CPU base address initialization.
Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver")
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V6:
- Splited from #9 of
the issue.
Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver")
Signed-off-by: Hou Zhiqiang
Signed-off-by: Lorenzo Pieralisi
Reviewed-by: Minghuan Lian
---
V6:
- Rebased the patch, no functional change.
drivers/pci/controller/pcie-mobiveil.c |2 +-
1 files
The reset value of Primary, Secondary and Subordinate bus numbers is
zero which is a broken setup.
Program a sensible default value for Primary/Secondary/Subordinate
bus numbers.
Signed-off-by: Hou Zhiqiang
Signed-off-by: Lorenzo Pieralisi
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya
Check window index from the parameter instead of the total
number of initialized windows to determine if the specified
window is valid.
Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver")
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: S
In the loop block, there is not code to update the loop key,
this patch updates the loop key by re-read the INTx status
register.
Note: Need MV to test this fix.
Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver")
Signed-off-by: Hou Zhiqiang
Reviewed-by: Min
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
Acked-by: Karthikeyan Mitran
Tested-by: Karthikeyan Mitran
---
V6:
- Splited from #10 of v5 patches, no functional change.
drivers/pci/controller/pcie-mobiveil.c |5 ++---
1 files changed, 2 insert
Clear the target fields in the register before programming with
an new value.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V6:
- Splited from #9 of v5 patches, no functional change.
drivers/pci/controller/pcie-mobiveil.c | 17
Move the PCIe PIO master enablement to function mobiveil_host_init().
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V6:
- Splited from #9 of v5 patches, no functional change.
drivers/pci/controller/pcie-mobiveil.c |9 +
1 files
This patch set is to add fixes for Mobiveil PCIe Host driver.
Splited #2, #3, #9 and #10 of v5 patches.
Hou Zhiqiang (28):
PCI: mobiveil: Unify register accessors
PCI: mobiveil: Remove the flag MSI_FLAG_MULTI_PCI_MSI
PCI: mobiveil: Fix PCI base address in MEM/IO outbound windows
PCI
As the .map_bus() use the WIN_NUM_0 for CFG transactions,
it is appropriate to pass WIN_NUM_0 explicitly when initializing
the CFG outbound window rather than implicitly relying on the
ob_wins_configure counter.
Signed-off-by: Hou Zhiqiang
Signed-off-by: Lorenzo Pieralisi
Reviewed-by: Minghuan
The memory of private structure has been allocated together with the
pci_host_bridge structure in function devm_pci_alloc_host_bridge().
So it is unnecessary to check the return value when get the private
structure pointer.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed
The irq_set_chained_handler_and_data() call is not dependent on device
tree firmware so it should be moved out of the DT parsing function for
clarity.
Signed-off-by: Hou Zhiqiang
[lorenzo.pieral...@arm.com: rewritten commit log]
Signed-off-by: Lorenzo Pieralisi
Reviewed-by: Minghuan Lian
The host initializing sequence does not depend on PCIe link up,
so move it to the plac just before the enumeration.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V6:
- Rebased the patch, no functional change.
drivers/pci/controller/pcie
address decoders
Fixes: 9af6bcb11e12 ("PCI: mobiveil: Add Mobiveil PCIe Host Bridge IP driver")
Signed-off-by: Hou Zhiqiang
Signed-off-by: Lorenzo Pieralisi
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V6:
- Rebased the patch, no functional change.
drivers/pci/
Code that executes the resource list traversal does not need to
delete any node therefore using the *_safe() API version is
useless.
Replace function resource_list_for_each_entry_safe() with the
resource_list_for_each_entry() counterpart.
Signed-off-by: Hou Zhiqiang
Signed-off-by: Lorenzo
paging mechanism.
Unify the register accessors in csr_readl() and csr_writel() by
comparing the register offset with page access boundary 3KB in the
accessor internal so that the paging mechanism is hidden behind
the csr_read()/write() common function calls.
Signed-off-by: Hou Zhiqiang
Signed-off
This patch modified the returned error number by convention.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Minghuan Lian
Reviewed-by: Subrahmanya Lingappa
---
V6:
- Splited from #3 of v5 patches, no functional change.
drivers/pci/controller/pcie-mobiveil.c |6 +++---
1 files changed, 3
Hi Michal,
Does this have any updates?
Thanks,
Zhiqiang
> -Original Message-
> From: Michal Suchanek [mailto:hramr...@gmail.com]
> Sent: 2015年8月14日 18:08
> To: Andrew Murray
> Cc: Hou Zhiqiang-B48286; Huang Shijie; David Woodhouse; Brian Norris; Xu
> Han-B45815; Ra
Hi Michal,
Does this have any updates?
Thanks,
Zhiqiang
> -Original Message-
> From: Michal Suchanek [mailto:hramr...@gmail.com]
> Sent: 2015年8月14日 18:08
> To: Andrew Murray
> Cc: Hou Zhiqiang-B48286; Huang Shijie; David Woodhouse; Brian Norris; Xu
> Han-B45815; Ra
Hi Jagan,
> -Original Message-
> From: Jagan Teki [mailto:jt...@openedev.com]
> Sent: 2015年8月21日 15:12
> To: Hou Zhiqiang-B48286
> Cc: linux-...@lists.infradead.org; Hu Mingkai-B21284; Brian Norris; David
> Woodhouse; linux-kernel@vger.kernel.org
> Subject: Re: [PA
Hi Jagan,
-Original Message-
From: Jagan Teki [mailto:jt...@openedev.com]
Sent: 2015年8月21日 15:12
To: Hou Zhiqiang-B48286
Cc: linux-...@lists.infradead.org; Hu Mingkai-B21284; Brian Norris; David
Woodhouse; linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/3] mtd: spi-nor: sf: Add
Hello Jagan,
> -Original Message-
> From: Jagan Teki [mailto:jt...@openedev.com]
> Sent: 2015年8月20日 1:49
> To: Hou Zhiqiang-B48286
> Cc: linux-...@lists.infradead.org; Hu Mingkai-B21284; Brian Norris; David
> Woodhouse; linux-kernel@vger.kernel.org
> Subject: Re: [PA
Hi Jagan,
> -Original Message-
> From: Jagan Teki [mailto:jt...@openedev.com]
> Sent: 2015年8月19日 17:57
> To: linux-...@lists.infradead.org
> Cc: linux-kernel@vger.kernel.org; Jagan Teki; Hou Zhiqiang-B48286; Hu
> Mingkai-B21284; David Woodhouse; Brian Norris
> Sub
Hi Jagan,
-Original Message-
From: Jagan Teki [mailto:jt...@openedev.com]
Sent: 2015年8月19日 17:57
To: linux-...@lists.infradead.org
Cc: linux-kernel@vger.kernel.org; Jagan Teki; Hou Zhiqiang-B48286; Hu
Mingkai-B21284; David Woodhouse; Brian Norris
Subject: [PATCH 3/3] mtd: spi-nor
Hello Jagan,
-Original Message-
From: Jagan Teki [mailto:jt...@openedev.com]
Sent: 2015年8月20日 1:49
To: Hou Zhiqiang-B48286
Cc: linux-...@lists.infradead.org; Hu Mingkai-B21284; Brian Norris; David
Woodhouse; linux-kernel@vger.kernel.org
Subject: Re: [PATCH 3/3] mtd: spi-nor: sf
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