Re: dw_mmc: IDMAC Invalidate cache after read

2018-12-01 Thread JABLONSKY Jan
SoCs) ? I would really appreciate it. Thanks On Di, 2018-11-27 at 08:43 +0800, Shawn Lin wrote: > On 2018/11/23 23:29, Robin Murphy wrote: > > Hi Jan, > > > > [repeating some of the discussion from your other thread for the benefit > > of the MMC audience] >

dw_mmc: IDMAC Invalidate cache after read

2018-11-20 Thread JABLONSKY Jan
CPU may not see most up-to-date and correct copy of DMA buffer, when internal DMA controller is in use. Problem appears on The Altera SoC FPGA (uses integrated DMA controller), during higher CPU and system memory load Signed-off-by: Jan Jablonsky --- drivers/mmc/host/dw_mmc.c | 3 +-- 1 file cha