Re: [PATCH] usb: gadget: Stall OS descriptor request for unsupported functions

Hi Wesley, On Mon, Mar 22, 2021 at 06:50:17PM -0700, Wesley Cheng wrote: > From: Chandana Kishori Chiluveru > > Hosts which request "OS descriptors" from gadgets do so during > the enumeration phase and before the configuration is set with > SET_CONFIGURATION. Composite driver supports OS

Re: [PATCH] usb: dwc3: gadget: Prevent EP queuing while stopping transfers

Hi Wesley, On Wed, Mar 10, 2021 at 03:02:10AM -0800, Wesley Cheng wrote: > In the situations where the DWC3 gadget stops active transfers, once > calling the dwc3_gadget_giveback(), there is a chance where a function > driver can queue a new USB request in between the time where the dwc3 > lock

Re: [PATCH 2/6] arm64: dts: qcom: sm8350: add USB and PHY device nodes

Hi Vinod, On Thu, Feb 04, 2021 at 10:39:03PM +0530, Vinod Koul wrote: > From: Jack Pham > > Add device nodes for the two instances each of USB3 controllers, > QMP SS PHYs and SNPS HS PHYs. > > Signed-off-by: Jack Pham > Message-Id: <20210116013802.1609-2-ja...@code

Re: [PATCH 3/4] phy: qcom-qmp: Add UFS v4 registers found in SM8350

Hi Vinod, On Mon, Jan 25, 2021 at 03:39:05PM +0530, Vinod Koul wrote: > Add the registers for few new registers found in SM8350. Also the UFS > phy used in SM8350 seems to have different offsets than V4 phy, although > it claims it is v4 phy, so add the new offsets with SM8350 tag instead > of V4

Re: [PATCH v6 1/4] usb: gadget: udc: core: Introduce check_config to verify USB configuration

Hi Wesley, On Thu, Jan 21, 2021 at 08:01:37PM -0800, Wesley Cheng wrote: > Some UDCs may have constraints on how many high bandwidth endpoints it can > support in a certain configuration. This API allows for the composite > driver to pass down the total number of endpoints to the UDC so it can

[PATCH v3] dt-bindings: usb: qcom,dwc3: Add bindings for SM8150, SM8250, SM8350

Add compatible strings for the USB DWC3 controller on QCOM SM8150, SM8250 and SM8350 SoCs. Note the SM8150 & SM8250 compatibles are already being used in the dts but was missing from the documentation. Acked-by: Felipe Balbi Signed-off-by: Jack Pham --- v3: Resend of #4/4 of h

[PATCH v2 3/4] dt-bindings: phy: qcom,usb-snps-femto-v2: Add SM8250 and SM8350 bindings

Add the compatible strings for the USB2 PHYs found on QCOM SM8250 & SM8350 SoCs. Note that the SM8250 compatible is already in use in the dts and driver implementation but was missing from the documentation. Signed-off-by: Jack Pham --- .../devicetree/bindings/phy/qcom,usb-snps-femto-v2.

[PATCH v2 2/4] phy: qcom-qmp: Add SM8350 USB QMP PHYs

rom V4 so some of the existing macros can be reused. Signed-off-by: Jack Pham --- v2: Added missing to sm8350_usb3_uniphy entry to qcom_qmp_phy_of_match_table drivers/phy/qualcomm/phy-qcom-qmp.c | 212 drivers/phy/qualcomm/phy-qcom-qmp.h | 100 + 2 file

[PATCH v2 4/4] dt-bindings: usb: qcom,dwc3: Add bindings for SM8150, SM8250, SM8350

Add compatible strings for the USB DWC3 controller on QCOM SM8150, SM8250 and SM8350 SoCs. Note the SM8150 & SM8250 compatibles are already being used in the dts but was missing from the documentation. Signed-off-by: Jack Pham --- Documentation/devicetree/bindings/usb/qcom,dwc3.yaml | 3 ++

[PATCH v2 1/4] dt-bindings: phy: qcom,qmp: Add SM8150, SM8250 and SM8350 USB PHY bindings

from the documentation. Signed-off-by: Jack Pham --- .../devicetree/bindings/phy/qcom,qmp-phy.yaml | 67 +++ 1 file changed, 67 insertions(+) diff --git a/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,qmp-phy.yaml index

[PATCH v2 0/4] SM8350 USB and dt-bindings updates

: Reordered Patches 1 & 2; added missing entry to match_table Jack Pham (4): dt-bindings: phy: qcom,qmp: Add SM8150, SM8250 and SM8350 USB PHY bindings phy: qcom-qmp: Add SM8350 USB QMP PHYs dt-bindings: phy: qcom,usb-snps-femto-v2: Add SM8250 and SM8350 bindings dt-bindings: usb:

Re: [PATCH 1/4] phy: qcom-qmp: Add SM8350 USB QMP PHYs

Hi Vinod, On Fri, Jan 15, 2021 at 06:17:36PM +0530, Vinod Koul wrote: > On 15-01-21, 12:54, Konrad Dybcio wrote: > > I might be wrong but it looks as if you forgot to add a compatible > > for the "sm8350_usb3_uniphy_cfg" configuration. I believe Konrad was referring to the driver in which I had

Re: [PATCH 1/4] phy: qcom-qmp: Add SM8350 USB QMP PHYs

On Fri, Jan 15, 2021 at 12:54:26PM +0100, Konrad Dybcio wrote: > I might be wrong but it looks as if you forgot to add a compatible for > the "sm8350_usb3_uniphy_cfg" configuration. Not wrong at all! My mistake, will add it in v2. Thanks, Jack -- The Qualcomm Innovation Center, Inc. is a member

[PATCH 2/4] dt-bindings: phy: qcom,qmp: Add SM8150, SM8250 and SM8350 USB PHY bindings

Add the compatible strings for the USB3 PHYs found on SM8150, SM8250 and SM8350 SoCs. Note the SM8150 and SM8250 compatibles have already been in place in the dts as well as the driver implementation but were missing from the documentation. Signed-off-by: Jack Pham --- .../devicetree/bindings

[PATCH 3/4] dt-bindings: phy: qcom,usb-snps-femto-v2: Add SM8250 and SM8350 bindings

Add the compatible strings for the USB2 PHYs found on QCOM SM8250 & SM8350 SoCs. Note that the SM8250 compatible is already in use in the dts and driver implementation but was missing from the documentation. Signed-off-by: Jack Pham --- .../devicetree/bindings/phy/qcom,usb-snps-femto-v2.

[PATCH 0/4] SM8350 USB and dt-bindings updates

This series adds support for the SM8350 USB PHY to the QMP PHY driver as well as adds the documentation for the QMP, SNPS PHY and DWC3 controller bindings. This also adds the bindings for SM8150 and SM8250 to the same docs which had not been added previously even though they are in use now. Jack

[PATCH 4/4] dt-bindings: usb: qcom,dwc3: Add bindings for SM8150, SM8250, SM8350

Add compatible strings for the USB DWC3 controller on QCOM SM8150, SM8250 and SM8350 SoCs. Note the SM8150 & SM8250 compatibles are already being used in the dts and driver implementation but was missing from the documentation. Signed-off-by: Jack Pham --- Documentation/devicetree/bindings

[PATCH 1/4] phy: qcom-qmp: Add SM8350 USB QMP PHYs

rom V4 so some of the existing macros can be reused. Signed-off-by: Jack Pham --- drivers/phy/qualcomm/phy-qcom-qmp.c | 209 drivers/phy/qualcomm/phy-qcom-qmp.h | 100 + 2 files changed, 309 insertions(+) diff --git a/drivers/phy/qualcomm/phy-qcom-qmp.c

Re: [PATCH 2/3] usb: gadget: composite: Split composite reset and disconnect

Hi Thinh, On Fri, Jan 08, 2021 at 02:19:30AM +, Thinh Nguyen wrote: > Hi Wesley, > > Felipe Balbi wrote: > > Hi, > > > > Wesley Cheng writes: > >> +void composite_reset(struct usb_gadget *gadget) > >> +{ > >> + /* > >> + * Section 1.4.13 Standard Downstream Port of the USB battery

Re: [PATCH 3/4] usb: gadget: u_audio: remove struct uac_req

Mon, Dec 21, 2020 at 06:35:27PM +0100, Jerome Brunet wrote: > The series depends on this fix [0] by Jack Pham to apply cleanly > > [0]: > https://lore.kernel.org/linux-usb/20201029175949.6052-1-ja...@codeaurora.org/ My patch hadn't been picked up by Felipe, so it's not in your tree

Re: [PATCH v2 4/5] USB: gadget: f_fs: add SuperSpeed Plus support

On Fri, Nov 27, 2020 at 03:05:58PM +0100, Greg Kroah-Hartman wrote: > From: "taehyun.cho" > > Setup the descriptors for SuperSpeed Plus for f_fs. This allows the > gadget to work properly without crashing at SuperSpeed rates. > > Cc: Felipe Balbi > Cc: stable > Signed-off-by: taehyun.cho >

Re: [PATCH v3 6/6] arm64: boot: dts: qcom: pm8150b: Add DTS node for PMIC VBUS booster

Hey Wesley, On Wed, Jun 17, 2020 at 11:02:09AM -0700, Wesley Cheng wrote: > Add the required DTS node for the USB VBUS output regulator, which is > available on PM8150B. This will provide the VBUS source to connected > peripherals. > > Signed-off-by: Wesley Cheng > --- >

Re: [PATCH 1/3] usb: typec: Add QCOM PMIC typec detection driver

Hi Wesley, On Tue, Jun 09, 2020 at 01:58:49PM -0700, Wesley Cheng wrote: > The QCOM SPMI typec driver handles the role and orientation detection, and > notifies client drivers using the USB role switch framework. It registers > as a typec port, so orientation can be communicated using the typec

Re: [RFC v3 1/3] usb: dwc3: Resize TX FIFOs to meet EP bursting requirements

Hi Wesley, On Wed, May 27, 2020 at 06:46:01PM -0700, Wesley Cheng wrote: > Some devices have USB compositions which may require multiple endpoints > that support EP bursting. HW defined TX FIFO sizes may not always be > sufficient for these compositions. By utilizing flexible TX FIFO >

Re: [PATCH] usb: dwc3: gadget: Correct the logic for finding last SG entry

Hi Anurag, On Fri, Jun 07, 2019 at 09:49:59AM +0300, Felipe Balbi wrote: > Anurag Kumar Vulisha writes: > >>> The dma_map_sg() merges sg1 & sg2 memory regions into sg1- > >>>dma_address. > >>> Similarly sg3 & sg4 into sg2->dma_address, sg5 & sg6 into the > >>> sg3->dma_address and sg6 & sg8 into

Re: [PATCH v2 3/3] phy: qcom-qmp: Add SM8150 QMP UFS PHY support

Hi Vinod, On Fri, Sep 06, 2019 at 10:40:17AM +0530, Vinod Koul wrote: > SM8150 UFS PHY is v4 of QMP phy. Add support for V4 QMP phy register > defines and support for SM8150 QMP UFS PHY. > > Signed-off-by: Vinod Koul > Reviewed-by: Bjorn Andersson > --- > drivers/phy/qualcomm/phy-qcom-qmp.c |

Re: [RFC][PATCH v2 2/5] usb: dwc3: Execute GCTL Core Soft Reset while switch mdoe for Hisilicon Kirin Soc

Hi John, Yu, Felipe, On Mon, Oct 07, 2019 at 05:55:50PM +, John Stultz wrote: > From: Yu Chen > > A GCTL soft reset should be executed when switch mode for dwc3 core > of Hisilicon Kirin Soc. > > Cc: Greg Kroah-Hartman > Cc: Felipe Balbi > Cc: Andy Shevchenko > Cc: Rob Herring > Cc:

Re: [PATCH v4 3/4] dt-bindings: Add Qualcomm USB SuperSpeed PHY bindings

Hi Jorge, Bjorn, On Thu, Sep 05, 2019 at 09:18:57AM +0200, Jorge Ramirez wrote: > On 9/4/19 01:34, Bjorn Andersson wrote: > > On Tue 03 Sep 14:45 PDT 2019, Stephen Boyd wrote: > > > >> Quoting Jack Pham (2019-09-03 10:39:24) > >>> On Mon, Sep 02, 2019 at 0

Re: [PATCH v4 3/4] dt-bindings: Add Qualcomm USB SuperSpeed PHY bindings

On Mon, Sep 02, 2019 at 08:23:04AM +0200, Jorge Ramirez wrote: > On 8/30/19 20:28, Stephen Boyd wrote: > > Quoting Bjorn Andersson (2019-08-30 09:45:20) > >> On Fri 30 Aug 09:01 PDT 2019, Stephen Boyd wrote: > >> > >>> Quoting Jorge Ramirez (2019-08-29 00:03:48) > On 2/23/19 17:52, Bjorn

[PATCH v2] usb: dwc3: gadget: Clear req->needs_extra_trb flag on cleanup

that the flag is cleared before it is given back to the function driver. A good place to do that is in dwc3_gadget_del_and_unmap_request(). Fixes: c6267a51639b ("usb: dwc3: gadget: align transfers to wMaxPacketSize") Cc: sta...@vger.kernel.org Signed-off-by: Jack Pham --- v2: Added Fixes

Re: [PATCH 1/2] dt-bindings: Add Qualcomm USB Super-Speed PHY bindings

Hi Jorge, Sorry for the late reply as I was out during the holiday break. On Fri, Dec 28, 2018 at 01:38:59PM +0100, Jorge Ramirez wrote: > On 12/20/18 18:37, Jack Pham wrote: > >Hi Rob, Jorge, > > > >On Thu, Dec 20, 2018 at 11:05:31AM -0600, Rob Herring wrote: > >>

Re: [PATCH v1 3/6] phy: qcom-qusb2: Add QUSB2 PHY support for msm8998

Hi Jeff, Spotted a typo below: On Fri, Jan 04, 2019 at 09:50:29AM -0700, Jeffrey Hugo wrote: > MSM8998 contains one QUSB2 PHY which is very similar to the existing > sdm845 support. > > Signed-off-by: Jeffrey Hugo > --- > .../devicetree/bindings/phy/qcom-qusb2-phy.txt | 1 + >

[PATCH] usb: dwc3: gadget: Clear req->needs_extra_trb flag on cleanup

that the flag is cleared before it is given back to the function driver. A good place to do that is in dwc3_gadget_del_and_unmap_request(). Signed-off-by: Jack Pham --- Hi Felipe, There's probably zero chance this is making it to 4.20, so if you take this after 4.21-rc1 so be it. But should

Re: [PATCH 1/2] dt-bindings: Add Qualcomm USB Super-Speed PHY bindings

Hi Rob, Jorge, On Thu, Dec 20, 2018 at 11:05:31AM -0600, Rob Herring wrote: > On Fri, Dec 07, 2018 at 10:55:57AM +0100, Jorge Ramirez-Ortiz wrote: > > Binding description for Qualcomm's Synopsys 1.0.0 super-speed PHY > > controller embedded in QCS404. > > > > Based on Sriharsha Allenki's

Re: [PATCH v5 2/2] phy: qualcomm: Add Synopsys High-Speed USB PHY driver

Hi Shawn, On Tue, Nov 27, 2018 at 06:07:22PM +0800, Shawn Guo wrote: > It adds Synopsys 28nm Femto High-Speed USB PHY driver support, which > is usually paired with Synopsys DWC3 USB controllers on Qualcomm SoCs. > > Signed-off-by: Shawn Guo > --- > drivers/phy/qualcomm/Kconfig

Re: [PATCH v5 2/2] phy: qualcomm: Add Synopsys High-Speed USB PHY driver

Hi Shawn, Kishon, On Wed, Dec 19, 2018 at 09:07:36AM +0800, Shawn Guo wrote: > On Tue, Dec 18, 2018 at 07:46:13PM +0530, Kishon Vijay Abraham I wrote: > > > > > > On 17/12/18 6:04 AM, Shawn Guo wrote: > > > On Tue, Dec 04, 2018 at 02:01:07PM +0800, Shawn Guo wrote: > > >> Hi Kishon, > > >> > >

Re: [PATCH v2 2/3] usb: dwc3: Add Qualcomm DWC3 glue driver

On Fri, Apr 13, 2018 at 11:32:04PM +0530, Manu Gautam wrote: > On 4/13/2018 11:03 PM, Jack Pham wrote: > > Are the extcon phandles bound to the glue node? I don't see the > > description in the bindings doc in PATCH 1/3. And if so, would it be > > a duplicate of the child

Re: [PATCH v2 2/3] usb: dwc3: Add Qualcomm DWC3 glue driver

On Fri, Apr 13, 2018 at 11:32:04PM +0530, Manu Gautam wrote: > On 4/13/2018 11:03 PM, Jack Pham wrote: > > Are the extcon phandles bound to the glue node? I don't see the > > description in the bindings doc in PATCH 1/3. And if so, would it be > > a duplicate of the child

Re: [PATCH v2 2/3] usb: dwc3: Add Qualcomm DWC3 glue driver

Hi Manu, On Fri, Apr 13, 2018 at 10:21:23PM +0530, Manu Gautam wrote: > DWC3 controller on Qualcomm SOCs has a Qscratch wrapper. > Some of its uses are described below resulting in need to > have a separate glue driver instead of using dwc3-of-simple: > - It exposes register interface to

Re: [PATCH v2 2/3] usb: dwc3: Add Qualcomm DWC3 glue driver

Hi Manu, On Fri, Apr 13, 2018 at 10:21:23PM +0530, Manu Gautam wrote: > DWC3 controller on Qualcomm SOCs has a Qscratch wrapper. > Some of its uses are described below resulting in need to > have a separate glue driver instead of using dwc3-of-simple: > - It exposes register interface to

Re: [PATCH] usb: gadget: f_fs: get the correct address of comp_desc

Hi William, On Mon, Feb 05, 2018 at 07:33:38PM +0800, William Wu wrote: > Refer to the USB 3.0 spec '9.6.7 SuperSpeed Endpoint Companion', > the companion descriptor follows the standard endpoint descriptor. > This descriptor is only defined for SuperSpeed endpoints. The > f_fs driver gets the

Re: [PATCH] usb: gadget: f_fs: get the correct address of comp_desc

Hi William, On Mon, Feb 05, 2018 at 07:33:38PM +0800, William Wu wrote: > Refer to the USB 3.0 spec '9.6.7 SuperSpeed Endpoint Companion', > the companion descriptor follows the standard endpoint descriptor. > This descriptor is only defined for SuperSpeed endpoints. The > f_fs driver gets the

Re: [PATCH v3 2/3] usb: phy: remove phy-msm-usb.c

Hi Alex, On Tue, Oct 31, 2017 at 08:11:30AM -0500, Alex Elder wrote: > No Qualcomm SoC requires the "phy-msm-usb.c" USB phy driver support > any more, so remove the code. > > Suggested-by: Stephen Boyd > Signed-off-by: Alex Elder > Acked-by: Bjorn

Re: [PATCH v3 2/3] usb: phy: remove phy-msm-usb.c

Hi Alex, On Tue, Oct 31, 2017 at 08:11:30AM -0500, Alex Elder wrote: > No Qualcomm SoC requires the "phy-msm-usb.c" USB phy driver support > any more, so remove the code. > > Suggested-by: Stephen Boyd > Signed-off-by: Alex Elder > Acked-by: Bjorn Andersson > Acked-by: Andy Gross > --- >

Re: [RFC PATCH 1/7] typec: tcpm: Add PD Rev 3.0 definitions to PD header

Hi Adam, On Wed, Nov 01, 2017 at 05:03:09PM +, Adam Thomson wrote: > This commit adds definitions for PD Rev 3.0 messages, including > APDO PPS and extended message support for TCPM. > > Signed-off-by: Adam Thomson > --- > include/linux/usb/pd.h | 162

Re: [RFC PATCH 1/7] typec: tcpm: Add PD Rev 3.0 definitions to PD header

Hi Adam, On Wed, Nov 01, 2017 at 05:03:09PM +, Adam Thomson wrote: > This commit adds definitions for PD Rev 3.0 messages, including > APDO PPS and extended message support for TCPM. > > Signed-off-by: Adam Thomson > --- > include/linux/usb/pd.h | 162 >

Re: [PATCH v2 14/17] phy: qcom-qusb2: Set vbus sw-override signal in device mode

Hi Manu, On Thu, Sep 28, 2017 at 09:30:38AM +0530, Manu Gautam wrote: > On 9/28/2017 12:46 AM, Jack Pham wrote: > > On Wed, Sep 27, 2017 at 10:57:41AM -0700, Jack Pham wrote: > >> On Wed, Sep 27, 2017 at 02:29:10PM +0530, Manu Gautam wrote: > >>> VBUS signal co

Re: [PATCH v2 14/17] phy: qcom-qusb2: Set vbus sw-override signal in device mode

Hi Manu, On Thu, Sep 28, 2017 at 09:30:38AM +0530, Manu Gautam wrote: > On 9/28/2017 12:46 AM, Jack Pham wrote: > > On Wed, Sep 27, 2017 at 10:57:41AM -0700, Jack Pham wrote: > >> On Wed, Sep 27, 2017 at 02:29:10PM +0530, Manu Gautam wrote: > >>> VBUS signal co

Re: [PATCH v2 14/17] phy: qcom-qusb2: Set vbus sw-override signal in device mode

On Wed, Sep 27, 2017 at 10:57:41AM -0700, Jack Pham wrote: > Hi Manu, > > On Wed, Sep 27, 2017 at 02:29:10PM +0530, Manu Gautam wrote: > > VBUS signal coming from PHY must be asserted in device for > > controller to start operation or assert pull-up. For some > >

Re: [PATCH v2 14/17] phy: qcom-qusb2: Set vbus sw-override signal in device mode

On Wed, Sep 27, 2017 at 10:57:41AM -0700, Jack Pham wrote: > Hi Manu, > > On Wed, Sep 27, 2017 at 02:29:10PM +0530, Manu Gautam wrote: > > VBUS signal coming from PHY must be asserted in device for > > controller to start operation or assert pull-up. For some > >

Re: [PATCH v2 13/17] phy: qcom-qmp: Add support for QMP V3 USB3 PHY

On Wed, Sep 27, 2017 at 02:29:09PM +0530, Manu Gautam wrote: > QMP V3 USB3 PHY is a DP USB combo PHY with > dual RX/TX lanes to support type-c. There is a > separate block DP_COM for configuration related > to type-c or DP. Add support for dp_com region > and secondary rx/tx lanes initialization.

Re: [PATCH v2 13/17] phy: qcom-qmp: Add support for QMP V3 USB3 PHY

On Wed, Sep 27, 2017 at 02:29:09PM +0530, Manu Gautam wrote: > QMP V3 USB3 PHY is a DP USB combo PHY with > dual RX/TX lanes to support type-c. There is a > separate block DP_COM for configuration related > to type-c or DP. Add support for dp_com region > and secondary rx/tx lanes initialization.

Re: [PATCH v2 14/17] phy: qcom-qusb2: Set vbus sw-override signal in device mode

Hi Manu, On Wed, Sep 27, 2017 at 02:29:10PM +0530, Manu Gautam wrote: > VBUS signal coming from PHY must be asserted in device for > controller to start operation or assert pull-up. For some > platforms where VBUS line is not connected to PHY there is > HS_PHY_CTRL register in QSCRATCH wrapper

Re: [PATCH v2 14/17] phy: qcom-qusb2: Set vbus sw-override signal in device mode

Hi Manu, On Wed, Sep 27, 2017 at 02:29:10PM +0530, Manu Gautam wrote: > VBUS signal coming from PHY must be asserted in device for > controller to start operation or assert pull-up. For some > platforms where VBUS line is not connected to PHY there is > HS_PHY_CTRL register in QSCRATCH wrapper

Re: [PATCH] usb: gadget: pch_udc: add checks for dma mapping errors

On Thu, Aug 24, 2017 at 01:47:08AM +0300, Alexey Khoroshilov wrote: > There are no checks for dma mapping errors in pch_udc. > Tha patch adds the checks and error handling code. > Compile tested only. > > Found by Linux Driver Verification project (linuxtesting.org). > > Signed-off-by: Alexey

Re: [PATCH] usb: gadget: pch_udc: add checks for dma mapping errors

On Thu, Aug 24, 2017 at 01:47:08AM +0300, Alexey Khoroshilov wrote: > There are no checks for dma mapping errors in pch_udc. > Tha patch adds the checks and error handling code. > Compile tested only. > > Found by Linux Driver Verification project (linuxtesting.org). > > Signed-off-by: Alexey

Re: [PATCH v12 6/9] usb: xhci: use bus->sysdev for DMA configuration

Hi Peter, Sriram, Arnd, On Mon, Feb 06, 2017 at 05:13:38PM +0800, Peter Chen wrote: > From: Arnd Bergmann > > For xhci-hcd platform device, all the DMA parameters are not > configured properly, notably dma ops for dwc3 devices. So, set > the dma for xhci from sysdev. sysdev is

Re: [PATCH v12 6/9] usb: xhci: use bus->sysdev for DMA configuration

Hi Peter, Sriram, Arnd, On Mon, Feb 06, 2017 at 05:13:38PM +0800, Peter Chen wrote: > From: Arnd Bergmann > > For xhci-hcd platform device, all the DMA parameters are not > configured properly, notably dma ops for dwc3 devices. So, set > the dma for xhci from sysdev. sysdev is pointing to

[PATCH] regmap: spmi: Fix regmap_spmi_ext_read in multi-byte case

be 'len'. Fixes: c9afbb05a9ff ("regmap: spmi: support base and extended register spaces") Signed-off-by: Jack Pham <ja...@codeaurora.org> --- drivers/base/regmap/regmap-spmi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/base/regmap/regmap-spmi.c

[PATCH] regmap: spmi: Fix regmap_spmi_ext_read in multi-byte case

be 'len'. Fixes: c9afbb05a9ff ("regmap: spmi: support base and extended register spaces") Signed-off-by: Jack Pham --- drivers/base/regmap/regmap-spmi.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/base/regmap/regmap-spmi.c b/drivers/base/regmap/reg

Re: [Patch v9 3/3] phy: Add Qualcomm DWC3 HS/SS PHY driver

Hi Andy, On Fri, Sep 12, 2014 at 02:28:08PM -0500, Andy Gross wrote: > This patch adds a new driver for the Qualcomm USB 3.0 PHY that exists on some > Qualcomm platforms. This driver uses the generic PHY framework and will > interact with the DWC3 controller. > > Signed-off-by: Andy Gross >

Re: [Patch v9 3/3] phy: Add Qualcomm DWC3 HS/SS PHY driver

Hi Andy, On Fri, Sep 12, 2014 at 02:28:08PM -0500, Andy Gross wrote: This patch adds a new driver for the Qualcomm USB 3.0 PHY that exists on some Qualcomm platforms. This driver uses the generic PHY framework and will interact with the DWC3 controller. Signed-off-by: Andy Gross

Re: [Patch v9 3/3] phy: Add Qualcomm DWC3 HS/SS PHY driver

Hi Andy, On Fri, Sep 12, 2014 at 02:28:08PM -0500, Andy Gross wrote: > +static int qcom_dwc3_hs_phy_init(struct qcom_dwc3_usb_phy *phy_dwc3) > +{ > + u32 val; > + > + /* > + * HSPHY Initialization: Enable UTMI clock, select 19.2MHz fsel > + * enable clamping, and disable

Re: [Patch v9 1/3] usb: dwc3: qcom: Add device tree binding

Hi Andy, On Fri, Sep 12, 2014 at 02:28:06PM -0500, Andy Gross wrote: > +Example device nodes: > + > + hs_phy: phy@100f8800 { > + compatible = "qcom,dwc3-hs-usb-phy"; > + reg = <0x100f8800 0x30>; Just wanted to point out that in our downstream

Re: [Patch v9 1/3] usb: dwc3: qcom: Add device tree binding

Hi Andy, On Fri, Sep 12, 2014 at 02:28:06PM -0500, Andy Gross wrote: +Example device nodes: + + hs_phy: phy@100f8800 { + compatible = qcom,dwc3-hs-usb-phy; + reg = 0x100f8800 0x30; Just wanted to point out that in our downstream code, the

Re: [Patch v9 3/3] phy: Add Qualcomm DWC3 HS/SS PHY driver

Hi Andy, On Fri, Sep 12, 2014 at 02:28:08PM -0500, Andy Gross wrote: +static int qcom_dwc3_hs_phy_init(struct qcom_dwc3_usb_phy *phy_dwc3) +{ + u32 val; + + /* + * HSPHY Initialization: Enable UTMI clock, select 19.2MHz fsel + * enable clamping, and disable RETENTION

[PATCH] usb: dwc3: debugfs: fix regdump offset

ART. Signed-off-by: Jack Pham --- drivers/usb/dwc3/debugfs.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/usb/dwc3/debugfs.c b/drivers/usb/dwc3/debugfs.c index d4a30f1..be4eff7 100644 --- a/drivers/usb/dwc3/debugfs.c +++ b/drivers/usb/dwc3/debugfs.c @@ -56,7 +5

[PATCH] usb: dwc3: debugfs: fix regdump offset

. Signed-off-by: Jack Pham ja...@codeaurora.org --- drivers/usb/dwc3/debugfs.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/drivers/usb/dwc3/debugfs.c b/drivers/usb/dwc3/debugfs.c index d4a30f1..be4eff7 100644 --- a/drivers/usb/dwc3/debugfs.c +++ b/drivers/usb/dwc3