[PATCH 13/15] PCI: brcmstb: Accommodate MSI for older chips

From: Jim Quinlan Older BrcmSTB chips do not have a separate register for MSI interrupts; the MSIs are in a register that also contains unrelated interrupts. In addition, the interrupts lie in bits [31..24] for these legacy chips. This commit provides commont code for both legacy and non

[PATCH 08/15] of: Include a dev param in of_dma_get_range()

Currently there is only one caller of of_dma_get_range(). A struct device *dev param is needed For implementing multiple dma offsets. This function will still work if dev == NULL. Signed-off-by: Jim Quinlan --- drivers/of/address.c| 4 +++- drivers/of/device.c | 2 +- drivers

[PATCH 01/15] PCI: brcmstb: PCIE_BRCMSTB depends on ARCH_BRCMSTB

From: Jim Quinlan Have PCIE_BRCMSTB depend on ARCH_BRCMSTB. Also set the default value to ARCH_BRCMSTB. Signed-off-by: Jim Quinlan --- drivers/pci/controller/Kconfig | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/pci/controller/Kconfig b/drivers/pci/controller

Re: [PATCH] PCI: brcmstb: Assert fundamental reset on initialization

On Thu, May 7, 2020 at 1:20 PM Nicolas Saenz Julienne wrote: > > While preparing the driver for upstream this detail was missed. > > If not asserted during the initialization process, devices connected on > the bus will not be made aware of the internal reset happening. This, > potentially

[PATCH v3 4/4] PCI: brcmstb: Disable L0s component of ASPM if requested

From: Jim Quinlan Some informal internal experiments has shown that the BrcmSTB ASPM L0s savings may introduce an undesirable noise signal on some customers' boards. In addition, L0s was found lacking in realized power savings, especially relative to the L1 ASPM component. This is BrcmSTB's

[PATCH v3 3/4] dt-bindings: PCI: brcmstb: New prop 'aspm-no-l0s'

From: Jim Quinlan For various reasons, one may want to disable the ASPM L0s capability. Signed-off-by: Jim Quinlan --- Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b

[PATCH v3 1/4] PCI: brcmstb: Don't clk_put() a managed clock

From: Jim Quinlan clk_put() was being invoked on a clock obtained by devm_clk_get_optional(). Signed-off-by: Jim Quinlan Acked-by: Florian Fainelli Acked-by: Nicolas Saenz Julienne --- drivers/pci/controller/pcie-brcmstb.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/pci

[PATCH v3 2/4] PCI: brcmstb: Fix window register offset from 4 to 8

From: Jim Quinlan The outbound memory window registers were being referenced with an incorrect stride offset. This probably wasn't noticed previously as there was likely only one such window employed. Signed-off-by: Jim Quinlan Acked-by: Florian Fainelli Acked-by: Nicolas Saenz Julienne

[PATCH v3 0/4] PCI: brcmstb: Some minor fixes/features

letter in commit subject line; spelling. v1 -- original [1] https://github.com/devicetree-org/dt-schema/blob/master/schemas/pci/pci-bus.yaml Jim Quinlan (4): PCI: brcmstb: Don't clk_put() a managed clock PCI: brcmstb: Fix window register offset from 4 to 8 dt-bindings: PCI: brcmstb: New prop

[PATCH v2 3/4] dt-bindings: PCI: brcmstb: New prop 'aspm-no-l0s'

From: Jim Quinlan For various reasons, one may want to disable the ASPM L0s capability. Signed-off-by: Jim Quinlan --- Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml | 4 1 file changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml b

[PATCH v2 1/4] PCI: brcmstb: Don't clk_put() a managed clock

From: Jim Quinlan clk_put() was being invoked on a clock obtained by devm_clk_get_optional(). Signed-off-by: Jim Quinlan Acked-by: Florian Fainelli --- drivers/pci/controller/pcie-brcmstb.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers

[PATCH v2 4/4] PCI: brcmstb: Disable L0s component of ASPM if requested

From: Jim Quinlan Some informal internal experiments has shown that the BrcmSTB ASPM L0s savings may introduce an undesirable noise signal on some customers' boards. In addition, L0s was found lacking in realized power savings, especially relative to the L1 ASPM component. This is BrcmSTB's

[PATCH v2 2/4] PCI: brcmstb: Fix window register offset from 4 to 8

From: Jim Quinlan The outbound memory window registers were being referenced with an incorrect stride offset. This probably wasn't noticed previously as there was likely only one such window employed. Signed-off-by: Jim Quinlan Acked-by: Florian Fainelli Fixes: c0452137034b ("PCI: br

[PATCH v2 0/4] PCI: brcmstb: Some minor fixes/features

v2 -- Dropped commit concerning CRS. -- Chanded new prop 'brcm,aspm-en-l0s' to 'aspm-no-l0s'. -- Capitalize first letter in commit subject line; spelling. v1 -- original Jim Quinlan (4): PCI: brcmstb: Don't clk_put() a managed clock PCI: brcmstb: Fix window register offset from 4 to 8

Re: [PATCH 5/5] PCI: brcmstb: disable L0s component of ASPM by default

On Thu, Apr 30, 2020 at 4:40 PM Bjorn Helgaas wrote: > > On Thu, Apr 30, 2020 at 02:55:22PM -0400, Jim Quinlan wrote: > > From: Jim Quinlan > > > > Some informal internal experiments has shown that the BrcmSTB ASPM L0s > > savings may introduce an undesirable

Re: [PATCH 3/5] PCI: brcmstb: enable CRS

On Thu, Apr 30, 2020 at 4:32 PM Bjorn Helgaas wrote: > > On Thu, Apr 30, 2020 at 02:55:20PM -0400, Jim Quinlan wrote: > > From: Jim Quinlan > > > > Configuration Retry Request Status is off by default on this > > PCIe controller. Turn it on. > > A

[PATCH 2/5] PCI: brcmstb: fix window register offset from 4 to 8

From: Jim Quinlan The oubound memory window registers were being referenced with an incorrect offset. This probably wasn't noticed previously as there was likely only one such outbound window. Signed-off-by: Jim Quinlan --- drivers/pci/controller/pcie-brcmstb.c | 4 ++-- 1 file changed, 2

[PATCH 3/5] PCI: brcmstb: enable CRS

From: Jim Quinlan Configuration Retry Request Status is off by default on this PCIe controller. Turn it on. Signed-off-by: Jim Quinlan --- drivers/pci/controller/pcie-brcmstb.c | 9 + 1 file changed, 9 insertions(+) diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci

[PATCH 1/5] PCI: brcmstb: don't clk_put() a managed clock

From: Jim Quinlan clk_put() was being invoked on a clock obtained by devm_clk_get_optional(). Signed-off-by: Jim Quinlan --- drivers/pci/controller/pcie-brcmstb.c | 1 - 1 file changed, 1 deletion(-) diff --git a/drivers/pci/controller/pcie-brcmstb.c b/drivers/pci/controller/pcie-brcmstb.c

[PATCH 5/5] PCI: brcmstb: disable L0s component of ASPM by default

From: Jim Quinlan Some informal internal experiments has shown that the BrcmSTB ASPM L0s savings may introduce an undesirable noise signal on some customers' boards. In addition, L0s was found lacking in realized power savings, especially relative to the L1 ASPM component. This is BrcmSTB's

[PATCH 4/5] dt-bindings: PCI: brcmstb: New prop 'brcm,aspm-en-l0s'

From: Jim Quinlan For various reasons, the L0s component of ASPM is intentionally disabled. Specifying the 'brcm,aspm-en-l0s' property enables it. Signed-off-by: Jim Quinlan --- Documentation/devicetree/bindings/pci/brcm,stb-pcie.yaml | 4 1 file changed, 4 insertions(+) diff --git

Re: [PATCH 07/11] firmware: arm_scmi: Add support for asynchronous commands and delayed response

On Fri, Jul 19, 2019 at 7:03 AM Sudeep Holla wrote: > > On Thu, Jul 18, 2019 at 05:38:06PM -0400, Jim Quinlan wrote: > > Hi Sudeep, > > > > Just a comment in general. The asynchronous commands you are > > implementing are not really asynchronous to the caller. >

Re: [PATCH 07/11] firmware: arm_scmi: Add support for asynchronous commands and delayed response

Hi Sudeep, Just a comment in general. The asynchronous commands you are implementing are not really asynchronous to the caller. Yes it is is "async" at the low level, but there is no way to use scmi_do_xfer() or scmi_do_xfer_with_response() and have the calling thread be able to continue on in

Re: [PATCH 05/11] firmware: arm_scmi: Add receive buffer support for notifications

Hi Sudeep, Would it make sense to save commits that support notifications for when you actually support them (correct me if I wrong, but this commit-set does not implement notifications. Jim On Mon, Jul 8, 2019 at 11:47 AM Sudeep Holla wrote: > > With all the plumbing in place, let's just add

Re: [PATCH 02/11] firmware: arm_scmi: Segregate tx channel handling and prepare to add rx

On Mon, Jul 8, 2019 at 11:47 AM Sudeep Holla wrote: > > The transmit(Tx) channels are specified as the first entry and the > receive(Rx) channels are the second entry as per the device tree > bindings. Since we currently just support Tx, index 0 is hardcoded at > all required callsites. > > In

Re: [PATCH v5 06/12] MIPS: BMIPS: add dma remap for BrcmSTB PCIe

On Wed, Sep 26, 2018 at 6:07 PM Paul Burton wrote: > > Hi Jim, > > On Wed, Sep 19, 2018 at 10:32:01AM -0400, Jim Quinlan wrote: > > The design of the Broadcom PCIe RC controller requires us to remap its > > DMA addresses for inbound traffic. We do this by modif

Re: [PATCH v5 06/12] MIPS: BMIPS: add dma remap for BrcmSTB PCIe

On Wed, Sep 26, 2018 at 6:07 PM Paul Burton wrote: > > Hi Jim, > > On Wed, Sep 19, 2018 at 10:32:01AM -0400, Jim Quinlan wrote: > > The design of the Broadcom PCIe RC controller requires us to remap its > > DMA addresses for inbound traffic. We do this by modif

Re: [PATCH v5 04/12] PCI: brcmstb: add dma-range mapping for inbound traffic

On Mon, Sep 24, 2018 at 4:25 AM Ard Biesheuvel wrote: > > On Fri, 21 Sep 2018 at 19:41, Jim Quinlan wrote: > > > > On Thu, Sep 20, 2018 at 5:39 PM Florian Fainelli > > wrote: > > > > > > On 09/20/2018 02:33 PM, Ard Biesheuvel wrote: > > >

Re: [PATCH v5 04/12] PCI: brcmstb: add dma-range mapping for inbound traffic

On Mon, Sep 24, 2018 at 4:25 AM Ard Biesheuvel wrote: > > On Fri, 21 Sep 2018 at 19:41, Jim Quinlan wrote: > > > > On Thu, Sep 20, 2018 at 5:39 PM Florian Fainelli > > wrote: > > > > > > On 09/20/2018 02:33 PM, Ard Biesheuvel wrote: > > >

Re: [PATCH v5 11/12] ARM64: add dma remap for BrcmSTB PCIe

On Wed, Sep 19, 2018 at 10:41 AM Christoph Hellwig wrote: > > On Wed, Sep 19, 2018 at 10:32:06AM -0400, Jim Quinlan wrote: > > +#if defined(CONFIG_ARM64) > > Please use plain #ifdef where possible. > > > +dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t pad

Re: [PATCH v5 11/12] ARM64: add dma remap for BrcmSTB PCIe

On Wed, Sep 19, 2018 at 10:41 AM Christoph Hellwig wrote: > > On Wed, Sep 19, 2018 at 10:32:06AM -0400, Jim Quinlan wrote: > > +#if defined(CONFIG_ARM64) > > Please use plain #ifdef where possible. > > > +dma_addr_t __phys_to_dma(struct device *dev, phys_addr_t pad

Re: [PATCH v5 02/12] dt-bindings: pci: add DT docs for Brcmstb PCIe device

On Thu, Sep 20, 2018 at 5:06 AM Jonas Gorski wrote: > > On 19 September 2018 at 16:31, Jim Quinlan wrote: > > The DT bindings description of the Brcmstb PCIe device is described. > > This node can be used by almost all Broadcom settop box chips, using > > ARM, ARM64, o

Re: [PATCH v5 02/12] dt-bindings: pci: add DT docs for Brcmstb PCIe device

On Thu, Sep 20, 2018 at 5:06 AM Jonas Gorski wrote: > > On 19 September 2018 at 16:31, Jim Quinlan wrote: > > The DT bindings description of the Brcmstb PCIe device is described. > > This node can be used by almost all Broadcom settop box chips, using > > ARM, ARM64, o

Re: [PATCH v5 04/12] PCI: brcmstb: add dma-range mapping for inbound traffic

t 13:55, Florian Fainelli > >>> wrote: > >>>> On 09/19/2018 07:19 PM, Ard Biesheuvel wrote: > >>>>> On 19 September 2018 at 07:31, Jim Quinlan wrote: > >>>>>> The Broadcom STB PCIe host controller is intimately related to the > &

Re: [PATCH v5 04/12] PCI: brcmstb: add dma-range mapping for inbound traffic

t 13:55, Florian Fainelli > >>> wrote: > >>>> On 09/19/2018 07:19 PM, Ard Biesheuvel wrote: > >>>>> On 19 September 2018 at 07:31, Jim Quinlan wrote: > >>>>>> The Broadcom STB PCIe host controller is intimately related to the > &

[PATCH v5 05/12] PCI: brcmstb: add MSI capability

the internal Brcmstb MSI controller is intertwined with the PCIe controller, it is not its own platform device but rather part of the PCIe platform device. Signed-off-by: Jim Quinlan --- drivers/pci/controller/Kconfig| 2 +- drivers/pci/controller/pcie-brcmstb.c | 361

[PATCH v5 12/12] ARM: add dma remap for BrcmSTB PCIe

in arch/arm/mach-bcm/include/mach/memory.h, and in doing so we must move out of ARCH_MULTIPLATFORM and create brcmstb_defconfig, as we were previously using multi_v7_defconfig. Signed-off-by: Jim Quinlan --- arch/arm/Kconfig| 33 + arch/arm/configs

[PATCH v5 05/12] PCI: brcmstb: add MSI capability

the internal Brcmstb MSI controller is intertwined with the PCIe controller, it is not its own platform device but rather part of the PCIe platform device. Signed-off-by: Jim Quinlan --- drivers/pci/controller/Kconfig| 2 +- drivers/pci/controller/pcie-brcmstb.c | 361

[PATCH v5 12/12] ARM: add dma remap for BrcmSTB PCIe

in arch/arm/mach-bcm/include/mach/memory.h, and in doing so we must move out of ARCH_MULTIPLATFORM and create brcmstb_defconfig, as we were previously using multi_v7_defconfig. Signed-off-by: Jim Quinlan --- arch/arm/Kconfig| 33 + arch/arm/configs

[PATCH v5 02/12] dt-bindings: pci: add DT docs for Brcmstb PCIe device

The DT bindings description of the Brcmstb PCIe device is described. This node can be used by almost all Broadcom settop box chips, using ARM, ARM64, or MIPS CPU architectures. Signed-off-by: Jim Quinlan Acked-by: Rob Herring --- .../devicetree/bindings/pci/brcmstb-pcie.txt | 59

[PATCH v5 03/12] PCI: brcmstb: add Broadcom STB PCIe host controller driver

by the PCIe controller. It cannot be used or shared by any other HW. As such, the small amount of code for this controller is included in this driver as there is little upside to put it elsewhere. Signed-off-by: Jim Quinlan --- drivers/pci/controller/Kconfig| 12 + drivers/pci

[PATCH v5 11/12] ARM64: add dma remap for BrcmSTB PCIe

The BrcmSTB PCIe controller needs to remap DMA accesses to it because of the requirements of its interface with the SOC memory controllers. Signed-off-by: Jim Quinlan --- drivers/pci/controller/Kconfig| 1 + drivers/pci/controller/pcie-brcmstb.c | 12 2 files changed, 13

[PATCH v5 08/12] MIPS: BMIPS: add PCI bindings for 7425, 7435

Adds the PCIe nodes for the Broadcom STB PCIe root complex. Signed-off-by: Jim Quinlan --- arch/mips/boot/dts/brcm/bcm7425.dtsi | 28 arch/mips/boot/dts/brcm/bcm7435.dtsi | 28 arch/mips/boot/dts/brcm/bcm97425svmb.dts | 4

[PATCH v5 10/12] ARM64: declare __phys_to_dma on ARCH_HAS_PHYS_TO_DMA

This change allows one to define custom routines for __phys_to_dma() and __dma_to_phys() for the ARM64 architecture by selecting ARCH_HAS_PHYS_TO_DMA. This is done for similar reasons that caused arch/x86/include/asm/dma-direct.h to exist (see CONFIG_STA2X11). Signed-off-by: Jim Quinlan

[PATCH v5 09/12] MIPS: BMIPS: enable PCI

Adds the Kconfig hooks to enable the Broadcom STB PCIe root complex driver for Broadcom MIPS systems. Signed-off-by: Jim Quinlan --- arch/mips/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 3551199..a15c0da 100644 --- a/arch/mips

[PATCH v5 02/12] dt-bindings: pci: add DT docs for Brcmstb PCIe device

The DT bindings description of the Brcmstb PCIe device is described. This node can be used by almost all Broadcom settop box chips, using ARM, ARM64, or MIPS CPU architectures. Signed-off-by: Jim Quinlan Acked-by: Rob Herring --- .../devicetree/bindings/pci/brcmstb-pcie.txt | 59

[PATCH v5 03/12] PCI: brcmstb: add Broadcom STB PCIe host controller driver

by the PCIe controller. It cannot be used or shared by any other HW. As such, the small amount of code for this controller is included in this driver as there is little upside to put it elsewhere. Signed-off-by: Jim Quinlan --- drivers/pci/controller/Kconfig| 12 + drivers/pci

[PATCH v5 11/12] ARM64: add dma remap for BrcmSTB PCIe

The BrcmSTB PCIe controller needs to remap DMA accesses to it because of the requirements of its interface with the SOC memory controllers. Signed-off-by: Jim Quinlan --- drivers/pci/controller/Kconfig| 1 + drivers/pci/controller/pcie-brcmstb.c | 12 2 files changed, 13

[PATCH v5 08/12] MIPS: BMIPS: add PCI bindings for 7425, 7435

Adds the PCIe nodes for the Broadcom STB PCIe root complex. Signed-off-by: Jim Quinlan --- arch/mips/boot/dts/brcm/bcm7425.dtsi | 28 arch/mips/boot/dts/brcm/bcm7435.dtsi | 28 arch/mips/boot/dts/brcm/bcm97425svmb.dts | 4

[PATCH v5 10/12] ARM64: declare __phys_to_dma on ARCH_HAS_PHYS_TO_DMA

This change allows one to define custom routines for __phys_to_dma() and __dma_to_phys() for the ARM64 architecture by selecting ARCH_HAS_PHYS_TO_DMA. This is done for similar reasons that caused arch/x86/include/asm/dma-direct.h to exist (see CONFIG_STA2X11). Signed-off-by: Jim Quinlan

[PATCH v5 09/12] MIPS: BMIPS: enable PCI

Adds the Kconfig hooks to enable the Broadcom STB PCIe root complex driver for Broadcom MIPS systems. Signed-off-by: Jim Quinlan --- arch/mips/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 3551199..a15c0da 100644 --- a/arch/mips

[PATCH v5 04/12] PCI: brcmstb: add dma-range mapping for inbound traffic

The method to do this is to redefine the __dma_to_phys() and __phys_to_dma() functions of the ARM, ARM64, and MIPS architectures. This commit sets up the infrastructure in the Brcm PCIe controller to prepare for this, while there is three other subsequent commits to implement/redefine these two functions

[PATCH v5 01/12] soc: bcm: brcmstb: add memory API

From: Florian Fainelli This commit adds a memory API suitable for ascertaining the sizes of each of the N memory controllers in a Broadcom STB chip. Its first user will be the Broadcom STB PCIe root complex driver, which needs to know these sizes to properly set up DMA mappings for inbound

[PATCH v5 07/12] PCI/MSI: enable PCI_MSI_IRQ_DOMAIN support for MIPS

Add MIPS as an arch that supports PCI_MSI_IRQ_DOMAIN and add generation of msi.h in the MIPS arch. Signed-off-by: Jim Quinlan --- drivers/pci/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index 56ff8f6..61a9539 100644

[PATCH v5 06/12] MIPS: BMIPS: add dma remap for BrcmSTB PCIe

chips, while the other governs the PCIe controller *and* other peripherals for only MIPs 338x chips. Signed-off-by: Jim Quinlan --- arch/mips/bmips/dma.c | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/mips/bmips/dma.c b/arch/mips/bmips/dma.c index 3d13c77..292994f 100644

[PATCH v5 04/12] PCI: brcmstb: add dma-range mapping for inbound traffic

The method to do this is to redefine the __dma_to_phys() and __phys_to_dma() functions of the ARM, ARM64, and MIPS architectures. This commit sets up the infrastructure in the Brcm PCIe controller to prepare for this, while there is three other subsequent commits to implement/redefine these two functions

[PATCH v5 01/12] soc: bcm: brcmstb: add memory API

From: Florian Fainelli This commit adds a memory API suitable for ascertaining the sizes of each of the N memory controllers in a Broadcom STB chip. Its first user will be the Broadcom STB PCIe root complex driver, which needs to know these sizes to properly set up DMA mappings for inbound

[PATCH v5 07/12] PCI/MSI: enable PCI_MSI_IRQ_DOMAIN support for MIPS

Add MIPS as an arch that supports PCI_MSI_IRQ_DOMAIN and add generation of msi.h in the MIPS arch. Signed-off-by: Jim Quinlan --- drivers/pci/Kconfig | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/pci/Kconfig b/drivers/pci/Kconfig index 56ff8f6..61a9539 100644

[PATCH v5 06/12] MIPS: BMIPS: add dma remap for BrcmSTB PCIe

chips, while the other governs the PCIe controller *and* other peripherals for only MIPs 338x chips. Signed-off-by: Jim Quinlan --- arch/mips/bmips/dma.c | 9 + 1 file changed, 9 insertions(+) diff --git a/arch/mips/bmips/dma.c b/arch/mips/bmips/dma.c index 3d13c77..292994f 100644

[PATCH v5 00/12] PCI: brcmstb: Add Broadcom Settopbox PCIe support (resend)

alls like syng_sg_*() - omit brcm_mapping_error(), but added code in brcm_dma_supported() - put all of the notifier code in one compilation unit. Florian Fainelli (1): soc: bcm: brcmstb: add memory API Jim Quinlan (11): dt-bindings: pci: add DT docs for Brcmstb PCIe device PCI: brcmstb:

[PATCH v5 00/12] PCI: brcmstb: Add Broadcom Settopbox PCIe support (resend)

alls like syng_sg_*() - omit brcm_mapping_error(), but added code in brcm_dma_supported() - put all of the notifier code in one compilation unit. Florian Fainelli (1): soc: bcm: brcmstb: add memory API Jim Quinlan (11): dt-bindings: pci: add DT docs for Brcmstb PCIe device PCI: brcmstb:

Re: [PATCH v5 07/12] PCI/MSI: enable PCI_MSI_IRQ_DOMAIN support for MIPS

On Thu, Sep 6, 2018 at 5:46 PM Paul Burton wrote: > > Hi Jim, > > On Thu, Sep 06, 2018 at 04:42:56PM -0400, Jim Quinlan wrote: > > Add MIPS as an arch that supports PCI_MSI_IRQ_DOMAIN and add > > generation of msi.h in the MIPS arch. > > I guess the second part

Re: [PATCH v5 07/12] PCI/MSI: enable PCI_MSI_IRQ_DOMAIN support for MIPS

On Thu, Sep 6, 2018 at 5:46 PM Paul Burton wrote: > > Hi Jim, > > On Thu, Sep 06, 2018 at 04:42:56PM -0400, Jim Quinlan wrote: > > Add MIPS as an arch that supports PCI_MSI_IRQ_DOMAIN and add > > generation of msi.h in the MIPS arch. > > I guess the second part

Re: [PATCH v5 08/12] MIPS: BMIPS: add PCI bindings for 7425, 7435

On Thu, Sep 6, 2018 at 5:50 PM Paul Burton wrote: > > Hi Jim, > > On Thu, Sep 06, 2018 at 04:42:57PM -0400, Jim Quinlan wrote: > > Adds the PCIe nodes for the Broadcom STB PCIe root complex. > > > > Signed-off-by: Jim Quinlan > > --- > > arc

Re: [PATCH v5 08/12] MIPS: BMIPS: add PCI bindings for 7425, 7435

On Thu, Sep 6, 2018 at 5:50 PM Paul Burton wrote: > > Hi Jim, > > On Thu, Sep 06, 2018 at 04:42:57PM -0400, Jim Quinlan wrote: > > Adds the PCIe nodes for the Broadcom STB PCIe root complex. > > > > Signed-off-by: Jim Quinlan > > --- > > arc

Re: [PATCH v4 4/8] PCI: brcmstb: Add dma-range mapping for inbound traffic

On Fri, Jan 26, 2018 at 12:46 PM, Jim Quinlan <jim2101...@gmail.com> wrote: > On Fri, Jan 26, 2018 at 2:53 AM, Christoph Hellwig <h...@lst.de> wrote: >> On Wed, Jan 24, 2018 at 12:04:58PM -0800, Florian Fainelli wrote: >>> This looks nicer than the current

Re: [PATCH v4 4/8] PCI: brcmstb: Add dma-range mapping for inbound traffic

On Fri, Jan 26, 2018 at 12:46 PM, Jim Quinlan wrote: > On Fri, Jan 26, 2018 at 2:53 AM, Christoph Hellwig wrote: >> On Wed, Jan 24, 2018 at 12:04:58PM -0800, Florian Fainelli wrote: >>> This looks nicer than the current shape, but this still requires to >>> regis

Re: [PATCH v4 4/8] PCI: brcmstb: Add dma-range mapping for inbound traffic

On Fri, Jan 26, 2018 at 2:53 AM, Christoph Hellwig wrote: > On Wed, Jan 24, 2018 at 12:04:58PM -0800, Florian Fainelli wrote: >> This looks nicer than the current shape, but this still requires to >> register a PCI fixup to override phys_to_dma() and dma_to_phys(), and it >> would

Re: [PATCH v4 4/8] PCI: brcmstb: Add dma-range mapping for inbound traffic

On Fri, Jan 26, 2018 at 2:53 AM, Christoph Hellwig wrote: > On Wed, Jan 24, 2018 at 12:04:58PM -0800, Florian Fainelli wrote: >> This looks nicer than the current shape, but this still requires to >> register a PCI fixup to override phys_to_dma() and dma_to_phys(), and it >> would appear that you

[PATCH v4 2/8] dt-bindings: pci: Add DT docs for Brcmstb PCIe device

The DT bindings description of the Brcmstb PCIe device is described. This node can be used by almost all Broadcom settop box chips, using ARM, ARM64, or MIPS CPU architectures. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- .../devicetree/bindings/pci/brcmstb-pcie.txt

[PATCH v4 2/8] dt-bindings: pci: Add DT docs for Brcmstb PCIe device

The DT bindings description of the Brcmstb PCIe device is described. This node can be used by almost all Broadcom settop box chips, using ARM, ARM64, or MIPS CPU architectures. Signed-off-by: Jim Quinlan --- .../devicetree/bindings/pci/brcmstb-pcie.txt | 59 ++ 1 file

[PATCH v4 4/8] PCI: brcmstb: Add dma-range mapping for inbound traffic

s. The wrappers translate the dma addresses before/after invoking the arch_dma_ops, as appropriate. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- drivers/pci/host/pcie-brcmstb.c | 420 +++- 1 file changed, 411 insertions(+), 9 deletions(-) diff -

[PATCH v4 4/8] PCI: brcmstb: Add dma-range mapping for inbound traffic

s. The wrappers translate the dma addresses before/after invoking the arch_dma_ops, as appropriate. Signed-off-by: Jim Quinlan --- drivers/pci/host/pcie-brcmstb.c | 420 +++- 1 file changed, 411 insertions(+), 9 deletions(-) diff --git a/drivers/pci/host/pcie-

[PATCH v4 3/8] PCI: brcmstb: Add Broadcom STB PCIe host controller driver

by the PCIe controller. It cannot be used or shared by any other HW. As such, the small amount of code for this controller is included in this driver as there is little upside to put it elsewhere. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- drivers/pci/host/Kconfig

[PATCH v4 3/8] PCI: brcmstb: Add Broadcom STB PCIe host controller driver

by the PCIe controller. It cannot be used or shared by any other HW. As such, the small amount of code for this controller is included in this driver as there is little upside to put it elsewhere. Signed-off-by: Jim Quinlan --- drivers/pci/host/Kconfig|9 + drivers/pci/host

[PATCH v4 6/8] PCI: brcmstb: Add MSI capability

the internal Brcmstb MSI controller is intertwined with the PCIe controller, it is not its own platform device but rather part of the PCIe platform device. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- drivers/pci/host/pcie-brcmstb.c | 374 +---

[PATCH v4 6/8] PCI: brcmstb: Add MSI capability

the internal Brcmstb MSI controller is intertwined with the PCIe controller, it is not its own platform device but rather part of the PCIe platform device. Signed-off-by: Jim Quinlan --- drivers/pci/host/pcie-brcmstb.c | 374 +--- 1 file changed, 353 insertions

[PATCH v4 7/8] MIPS: BMIPS: Add PCI bindings for 7425, 7435

Adds the PCIe nodes for the Broadcom STB PCIe root complex. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- arch/mips/boot/dts/brcm/bcm7425.dtsi | 26 ++ arch/mips/boot/dts/brcm/bcm7435.dtsi | 27 +++ arch/mips/boot/dt

[PATCH v4 7/8] MIPS: BMIPS: Add PCI bindings for 7425, 7435

Adds the PCIe nodes for the Broadcom STB PCIe root complex. Signed-off-by: Jim Quinlan --- arch/mips/boot/dts/brcm/bcm7425.dtsi | 26 ++ arch/mips/boot/dts/brcm/bcm7435.dtsi | 27 +++ arch/mips/boot/dts/brcm/bcm97425svmb.dts | 4

[PATCH v4 8/8] MIPS: BMIPS: Enable PCI

Adds the Kconfig hooks to enable the Broadcom STB PCIe root complex driver for Broadcom MIPS systems. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- arch/mips/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 350a990..fe17361

[PATCH v4 8/8] MIPS: BMIPS: Enable PCI

Adds the Kconfig hooks to enable the Broadcom STB PCIe root complex driver for Broadcom MIPS systems. Signed-off-by: Jim Quinlan --- arch/mips/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index 350a990..fe17361 100644 --- a/arch/mips

[PATCH v4 1/8] SOC: brcmstb: add memory API

up DMA mappings for inbound regions. We cannot use memblock here or anything like what Linux provides because it collapses adjacent regions within a larger block, and here we actually need per-memory controller addresses and sizes, which is why we resort to manual DT parsing. Signed-off-by: Jim Q

[PATCH v4 5/8] PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for MIPS

Add MIPS as an arch that supports PCI_MSI_IRQ_DOMAIN and add generation of msi.h in the MIPS arch. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- arch/mips/include/asm/Kbuild | 1 + drivers/pci/Kconfig | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git

[PATCH v4 1/8] SOC: brcmstb: add memory API

regions. We cannot use memblock here or anything like what Linux provides because it collapses adjacent regions within a larger block, and here we actually need per-memory controller addresses and sizes, which is why we resort to manual DT parsing. Signed-off-by: Jim Quinlan Conflicts

[PATCH v4 5/8] PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for MIPS

Add MIPS as an arch that supports PCI_MSI_IRQ_DOMAIN and add generation of msi.h in the MIPS arch. Signed-off-by: Jim Quinlan --- arch/mips/include/asm/Kbuild | 1 + drivers/pci/Kconfig | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/mips/include/asm/Kbuild b

[PATCH v4 0/8] PCI: brcmstb: Add Broadcom Settopbox PCIe support

d: export-symbol-arch_setup_dma_ops [4/9] * Patch brcmstb-add-dma-ranges: - use get_dma_ops(); also use a const dma_map_ops structure. - rewrite map_sg(), unmap_sg(), other calls like syng_sg_*() - omit brcm_mapping_error(), but added code in brcm_dma_supported() - put all of the notifier code i

[PATCH v4 0/8] PCI: brcmstb: Add Broadcom Settopbox PCIe support

d: export-symbol-arch_setup_dma_ops [4/9] * Patch brcmstb-add-dma-ranges: - use get_dma_ops(); also use a const dma_map_ops structure. - rewrite map_sg(), unmap_sg(), other calls like syng_sg_*() - omit brcm_mapping_error(), but added code in brcm_dma_supported() - put all of the notifier code i

Re: [PATCH v3 3/8] PCI: brcmstb: Add Broadcom STB PCIe host controller driver

On Thu, Dec 14, 2017 at 5:51 PM, Bjorn Helgaas <helg...@kernel.org> wrote: > On Wed, Dec 13, 2017 at 06:53:53PM -0500, Jim Quinlan wrote: >> On Tue, Dec 12, 2017 at 5:16 PM, Bjorn Helgaas <helg...@kernel.org> wrote: >> > On Tue, Nov 14, 2017 at 05:12

Re: [PATCH v3 3/8] PCI: brcmstb: Add Broadcom STB PCIe host controller driver

On Thu, Dec 14, 2017 at 5:51 PM, Bjorn Helgaas wrote: > On Wed, Dec 13, 2017 at 06:53:53PM -0500, Jim Quinlan wrote: >> On Tue, Dec 12, 2017 at 5:16 PM, Bjorn Helgaas wrote: >> > On Tue, Nov 14, 2017 at 05:12:07PM -0500, Jim Quinlan wrote: >> >> This commit ad

Re: [PATCH v3 1/8] SOC: brcmstb: add memory API

On Fri, Dec 15, 2017 at 12:14 PM, Lorenzo Pieralisi <lorenzo.pieral...@arm.com> wrote: > On Tue, Dec 12, 2017 at 03:14:04PM -0600, Bjorn Helgaas wrote: >> [+cc Lorenzo] >> >> On Tue, Dec 12, 2017 at 03:53:28PM -0500, Jim Quinlan wrote: >> > On Tue, Dec 5,

Re: [PATCH v3 1/8] SOC: brcmstb: add memory API

On Fri, Dec 15, 2017 at 12:14 PM, Lorenzo Pieralisi wrote: > On Tue, Dec 12, 2017 at 03:14:04PM -0600, Bjorn Helgaas wrote: >> [+cc Lorenzo] >> >> On Tue, Dec 12, 2017 at 03:53:28PM -0500, Jim Quinlan wrote: >> > On Tue, Dec 5, 2017 at 3:59 PM, Bjorn Helgaas wrot

Re: [PATCH v3 3/8] PCI: brcmstb: Add Broadcom STB PCIe host controller driver

On Tue, Dec 12, 2017 at 5:16 PM, Bjorn Helgaas <helg...@kernel.org> wrote: > On Tue, Nov 14, 2017 at 05:12:07PM -0500, Jim Quinlan wrote: >> This commit adds the basic Broadcom STB PCIe controller. Missing is >> the ability to process MSI and also handle dma-ranges for inbou

Re: [PATCH v3 3/8] PCI: brcmstb: Add Broadcom STB PCIe host controller driver

On Tue, Dec 12, 2017 at 5:16 PM, Bjorn Helgaas wrote: > On Tue, Nov 14, 2017 at 05:12:07PM -0500, Jim Quinlan wrote: >> This commit adds the basic Broadcom STB PCIe controller. Missing is >> the ability to process MSI and also handle dma-ranges for inbound >> memory

Re: [PATCH v3 1/8] SOC: brcmstb: add memory API

On Tue, Dec 5, 2017 at 3:59 PM, Bjorn Helgaas <helg...@kernel.org> wrote: > On Tue, Nov 14, 2017 at 05:12:05PM -0500, Jim Quinlan wrote: >> From: Florian Fainelli <f.faine...@gmail.com> >> >> This commit adds a memory API suitable for ascertaining the sizes of &g

Re: [PATCH v3 1/8] SOC: brcmstb: add memory API

On Tue, Dec 5, 2017 at 3:59 PM, Bjorn Helgaas wrote: > On Tue, Nov 14, 2017 at 05:12:05PM -0500, Jim Quinlan wrote: >> From: Florian Fainelli >> >> This commit adds a memory API suitable for ascertaining the sizes of >> each of the N memory controllers in a Broadcom S

[PATCH v3 3/8] PCI: brcmstb: Add Broadcom STB PCIe host controller driver

by the PCIe controller. It cannot be used or shared by any other HW. As such, the small amount of code for this controller is included in this driver as there is little upside to put it elsewhere. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- drivers/pci/host/Kconfig

[PATCH v3 3/8] PCI: brcmstb: Add Broadcom STB PCIe host controller driver

by the PCIe controller. It cannot be used or shared by any other HW. As such, the small amount of code for this controller is included in this driver as there is little upside to put it elsewhere. Signed-off-by: Jim Quinlan --- drivers/pci/host/Kconfig|9 + drivers/pci/host

[PATCH v3 5/8] PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for MIPS

Add MIPS as an arch that supports PCI_MSI_IRQ_DOMAIN and add generation of msi.h in the MIPS arch. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- arch/mips/include/asm/Kbuild | 1 + drivers/pci/Kconfig | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git

[PATCH v3 5/8] PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for MIPS

Add MIPS as an arch that supports PCI_MSI_IRQ_DOMAIN and add generation of msi.h in the MIPS arch. Signed-off-by: Jim Quinlan --- arch/mips/include/asm/Kbuild | 1 + drivers/pci/Kconfig | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/mips/include/asm/Kbuild b

[PATCH v3 4/8] PCI: brcmstb: Add dma-range mapping for inbound traffic

s. The wrappers translate the dma addresses before/after invoking the arch_dma_ops, as appropriate. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- drivers/pci/host/Makefile | 4 +- drivers/pci/host/pcie-brcmstb-dma.c | 319 drivers/p

<    1   2   3   4   5   >