[PATCH v3 4/8] PCI: brcmstb: Add dma-range mapping for inbound traffic

s. The wrappers translate the dma addresses before/after invoking the arch_dma_ops, as appropriate. Signed-off-by: Jim Quinlan --- drivers/pci/host/Makefile | 4 +- drivers/pci/host/pcie-brcmstb-dma.c | 319 drivers/pci/host/pcie-brcmstb.c | 139

[PATCH v3 7/8] MIPS: BMIPS: Add PCI bindings for 7425, 7435

Adds the PCIe nodes for the Broadcom STB PCIe root complex. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- arch/mips/boot/dts/brcm/bcm7425.dtsi | 26 ++ arch/mips/boot/dts/brcm/bcm7435.dtsi | 27 +++ arch/mips/boot/dt

[PATCH v3 6/8] PCI: brcmstb: Add MSI capability

the internal Brcmstb MSI controller is intertwined with the PCIe controller, it is not its own platform device but rather part of the PCIe platform device. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- drivers/pci/host/pcie-brcmstb.c | 372 ++--

[PATCH v3 7/8] MIPS: BMIPS: Add PCI bindings for 7425, 7435

Adds the PCIe nodes for the Broadcom STB PCIe root complex. Signed-off-by: Jim Quinlan --- arch/mips/boot/dts/brcm/bcm7425.dtsi | 26 ++ arch/mips/boot/dts/brcm/bcm7435.dtsi | 27 +++ arch/mips/boot/dts/brcm/bcm97425svmb.dts | 4

[PATCH v3 6/8] PCI: brcmstb: Add MSI capability

the internal Brcmstb MSI controller is intertwined with the PCIe controller, it is not its own platform device but rather part of the PCIe platform device. Signed-off-by: Jim Quinlan --- drivers/pci/host/pcie-brcmstb.c | 372 ++-- 1 file changed, 359 insertions

[PATCH v3 8/8] MIPS: BMIPS: Enable PCI

Adds the Kconfig hooks to enable the Broadcom STB PCIe root complex driver for Broadcom MIPS systems. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- arch/mips/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index cb7fcc4..83ba54d

[PATCH v3 8/8] MIPS: BMIPS: Enable PCI

Adds the Kconfig hooks to enable the Broadcom STB PCIe root complex driver for Broadcom MIPS systems. Signed-off-by: Jim Quinlan --- arch/mips/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index cb7fcc4..83ba54d 100644 --- a/arch/mips

[PATCH v3 2/8] dt-bindings: pci: Add DT docs for Brcmstb PCIe device

The DT bindings description of the Brcmstb PCIe device is described. This node can be used by almost all Broadcom settop box chips, using ARM, ARM64, or MIPS CPU architectures. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- .../devicetree/bindings/pci/brcmstb-pcie.txt

[PATCH v3 2/8] dt-bindings: pci: Add DT docs for Brcmstb PCIe device

The DT bindings description of the Brcmstb PCIe device is described. This node can be used by almost all Broadcom settop box chips, using ARM, ARM64, or MIPS CPU architectures. Signed-off-by: Jim Quinlan --- .../devicetree/bindings/pci/brcmstb-pcie.txt | 59 ++ 1 file

[PATCH v3 1/8] SOC: brcmstb: add memory API

up DMA mappings for inbound regions. We cannot use memblock here or anything like what Linux provides because it collapses adjacent regions within a larger block, and here we actually need per-memory controller addresses and sizes, which is why we resort to manual DT parsing. Signed-off-by: Jim Q

[PATCH v3 1/8] SOC: brcmstb: add memory API

regions. We cannot use memblock here or anything like what Linux provides because it collapses adjacent regions within a larger block, and here we actually need per-memory controller addresses and sizes, which is why we resort to manual DT parsing. Signed-off-by: Jim Quinlan --- drivers/soc/bcm

[PATCH v3 0/8] PCI: brcmstb: Add Broadcom Settopbox PCIe support (V3)

he notifier code in one compilation unit. Florian Fainelli (1): SOC: brcmstb: add memory API Jim Quinlan (7): dt-bindings: pci: Add DT docs for Brcmstb PCIe device PCI: brcmstb: Add Broadcom STB PCIe host controller driver PCI: brcmstb: Add dma-range mapping for inbound traffic PC

[PATCH v3 0/8] PCI: brcmstb: Add Broadcom Settopbox PCIe support (V3)

he notifier code in one compilation unit. Florian Fainelli (1): SOC: brcmstb: add memory API Jim Quinlan (7): dt-bindings: pci: Add DT docs for Brcmstb PCIe device PCI: brcmstb: Add Broadcom STB PCIe host controller driver PCI: brcmstb: Add dma-range mapping for inbound traffic PC

Re: [PATCH 6/8] PCI: host: brcmstb: add MSI capability

On Wed, Oct 25, 2017 at 4:16 PM, Bjorn Helgaas <helg...@kernel.org> wrote: > On Wed, Oct 25, 2017 at 11:40:47AM -0700, Scott Branden wrote: >> Hi Bjorn, >> >> >> On 17-10-25 10:23 AM, Bjorn Helgaas wrote: >> >[+cc Ray, Scott, Jon] >> > >&g

Re: [PATCH 6/8] PCI: host: brcmstb: add MSI capability

On Wed, Oct 25, 2017 at 4:16 PM, Bjorn Helgaas wrote: > On Wed, Oct 25, 2017 at 11:40:47AM -0700, Scott Branden wrote: >> Hi Bjorn, >> >> >> On 17-10-25 10:23 AM, Bjorn Helgaas wrote: >> >[+cc Ray, Scott, Jon] >> > >> >On Wed, Oct 25, 2017 at

Re: [PATCH 3/8] PCI: host: brcmstb: Broadcom PCIe Host Controller

t; > On Tue, Oct 24, 2017 at 02:15:44PM -0400, Jim Quinlan wrote: >> This commit adds the basic Broadcom STB PCIe controller. Missing is >> the ability to process MSI and also handle dma-ranges for inbound >> memory accesses. These two functionalities are added in subsequ

Re: [PATCH 3/8] PCI: host: brcmstb: Broadcom PCIe Host Controller

rface. This is a local interface >> only accessible by the PCIe controller. It cannot be used or shared >> by any other HW. As such, the small amount of code for this >> controller is included in this driver as there is little upside to put >> it elsewhere. >> >>

Re: [PATCH 4/8] PCI: host: brcmstb: add dma-ranges for inbound traffic

On Wed, Oct 25, 2017 at 5:46 AM, David Laight wrote: > From: Jim QuinlanPCIE_IPROC_MSI >> Sent: 24 October 2017 19:16 >> The Broadcom STB PCIe host controller is intimately related to the >> memory subsystem. This close relationship adds complexity to how cpu >> system

Re: [PATCH 4/8] PCI: host: brcmstb: add dma-ranges for inbound traffic

On Wed, Oct 25, 2017 at 5:46 AM, David Laight wrote: > From: Jim QuinlanPCIE_IPROC_MSI >> Sent: 24 October 2017 19:16 >> The Broadcom STB PCIe host controller is intimately related to the >> memory subsystem. This close relationship adds complexity to how cpu >> system memory is mapped to PCIe

Re: [PATCH 6/8] PCI: host: brcmstb: add MSI capability

On Wed, Oct 25, 2017 at 9:22 AM, Bjorn Helgaas <helg...@kernel.org> wrote: > On Tue, Oct 24, 2017 at 02:15:47PM -0400, Jim Quinlan wrote: >> This commit adds MSI to the Broadcom STB PCIe host controller. It does >> not add MSIX since that functiostbsrvnality is no

Re: [PATCH 6/8] PCI: host: brcmstb: add MSI capability

On Wed, Oct 25, 2017 at 9:22 AM, Bjorn Helgaas wrote: > On Tue, Oct 24, 2017 at 02:15:47PM -0400, Jim Quinlan wrote: >> This commit adds MSI to the Broadcom STB PCIe host controller. It does >> not add MSIX since that functiostbsrvnality is not in the HW. The MSI >> con

Re: [PATCH 6/8] PCI: host: brcmstb: add MSI capability

On Tue, Oct 24, 2017 at 2:57 PM, Florian Fainelli <f.faine...@gmail.com> wrote: > Hi Jim, > > On 10/24/2017 11:15 AM, Jim Quinlan wrote: >> This commit adds MSI to the Broadcom STB PCIe host controller. It does >> not add MSIX since that functionality is not in the

Re: [PATCH 6/8] PCI: host: brcmstb: add MSI capability

On Tue, Oct 24, 2017 at 2:57 PM, Florian Fainelli wrote: > Hi Jim, > > On 10/24/2017 11:15 AM, Jim Quinlan wrote: >> This commit adds MSI to the Broadcom STB PCIe host controller. It does >> not add MSIX since that functionality is not in the HW. The MSI >> contr

Re: [PATCH 1/8] SOC: brcmstb: add memory API

On Tue, Oct 24, 2017 at 8:23 PM, Florian Fainelli <f.faine...@gmail.com> wrote: > Hi Jim, > > On 10/24/2017 11:15 AM, Jim Quinlan wrote: >> +#elif defined(CONFIG_MIPS) >> +int brcmstb_memory_phys_addr_to_memc(phys_addr_t pa) >> +{ >> + /* The logic her

Re: [PATCH 1/8] SOC: brcmstb: add memory API

On Tue, Oct 24, 2017 at 8:23 PM, Florian Fainelli wrote: > Hi Jim, > > On 10/24/2017 11:15 AM, Jim Quinlan wrote: >> +#elif defined(CONFIG_MIPS) >> +int brcmstb_memory_phys_addr_to_memc(phys_addr_t pa) >> +{ >> + /* The logic here is fairly simple an

[PATCH 1/8] SOC: brcmstb: add memory API

up DMA mappings for inbound regions. We cannot use memblock here or anything like what Linux provides because it collapses adjacent regions within a larger block, and here we actually need per-memory controller addresses and sizes, which is why we resort to manual DT parsing. Signed-off-by: Jim Q

[PATCH 3/8] PCI: host: brcmstb: Broadcom PCIe Host Controller

by the PCIe controller. It cannot be used or shared by any other HW. As such, the small amount of code for this controller is included in this driver as there is little upside to put it elsewhere. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- drivers/pci/host/Kconfig

[PATCH 1/8] SOC: brcmstb: add memory API

regions. We cannot use memblock here or anything like what Linux provides because it collapses adjacent regions within a larger block, and here we actually need per-memory controller addresses and sizes, which is why we resort to manual DT parsing. Signed-off-by: Jim Quinlan --- drivers/soc/bcm

[PATCH 3/8] PCI: host: brcmstb: Broadcom PCIe Host Controller

by the PCIe controller. It cannot be used or shared by any other HW. As such, the small amount of code for this controller is included in this driver as there is little upside to put it elsewhere. Signed-off-by: Jim Quinlan --- drivers/pci/host/Kconfig |8 + drivers/pci/host/Makefile

[PATCH 5/8] PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for MIPS

Add MIPS as an arch that supports PCI_MSI_IRQ_DOMAIN and add generation of msi.h in the MIPS arch. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- arch/mips/include/asm/Kbuild | 1 + drivers/pci/Kconfig | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git

[PATCH 5/8] PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for MIPS

Add MIPS as an arch that supports PCI_MSI_IRQ_DOMAIN and add generation of msi.h in the MIPS arch. Signed-off-by: Jim Quinlan --- arch/mips/include/asm/Kbuild | 1 + drivers/pci/Kconfig | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/mips/include/asm/Kbuild b

[PATCH 6/8] PCI: host: brcmstb: add MSI capability

the internal Brcmstb MSI controller is intertwined with the PCIe controller, it is not its own platform device but rather part of the PCIe platform device. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- drivers/pci/host/Kconfig | 12 ++ drivers/pci/host/Makefile

[PATCH 6/8] PCI: host: brcmstb: add MSI capability

the internal Brcmstb MSI controller is intertwined with the PCIe controller, it is not its own platform device but rather part of the PCIe platform device. Signed-off-by: Jim Quinlan --- drivers/pci/host/Kconfig | 12 ++ drivers/pci/host/Makefile | 1 + drivers/pci/host/pci

[PATCH 7/8] MIPS: BMIPS: add PCI bindings for 7425, 7435

Adds the PCIe nodes for the Broadcom STB PCIe root complex. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- arch/mips/boot/dts/brcm/bcm7425.dtsi | 25 + arch/mips/boot/dts/brcm/bcm7435.dtsi | 26 ++ arch/mips/boot/dt

[PATCH 7/8] MIPS: BMIPS: add PCI bindings for 7425, 7435

Adds the PCIe nodes for the Broadcom STB PCIe root complex. Signed-off-by: Jim Quinlan --- arch/mips/boot/dts/brcm/bcm7425.dtsi | 25 + arch/mips/boot/dts/brcm/bcm7435.dtsi | 26 ++ arch/mips/boot/dts/brcm/bcm97425svmb.dts | 4 arch

[PATCH 8/8] MIPS: BMIPS: enable PCI

Adds the Kconfig hooks to enable the Broadcom STB PCIe root complex driver for Broadcom MIPS systems. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- arch/mips/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index cb7fcc4..83ba54d

[PATCH 4/8] PCI: host: brcmstb: add dma-ranges for inbound traffic

s. The wrappers translate the dma addresses before/after invoking the arch_dma_ops, as appropriate. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- drivers/pci/host/Makefile | 3 +- drivers/pci/host/pci-brcmstb-dma.c | 317 + drivers

[PATCH 8/8] MIPS: BMIPS: enable PCI

Adds the Kconfig hooks to enable the Broadcom STB PCIe root complex driver for Broadcom MIPS systems. Signed-off-by: Jim Quinlan --- arch/mips/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index cb7fcc4..83ba54d 100644 --- a/arch/mips

[PATCH 4/8] PCI: host: brcmstb: add dma-ranges for inbound traffic

s. The wrappers translate the dma addresses before/after invoking the arch_dma_ops, as appropriate. Signed-off-by: Jim Quinlan --- drivers/pci/host/Makefile | 3 +- drivers/pci/host/pci-brcmstb-dma.c | 317 + drivers/pci/host/pci-brcmstb.c | 1

[PATCH 2/8] PCI: host: brcmstb: add DT docs for Brcmstb PCIe device

The DT bindings description of the Brcmstb PCIe device is described. This node can be used by almost all Broadcom settop box chips, using ARM, ARM64, or MIPS CPU architectures. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- .../devicetree/bindings/pci/brcmstb-pci.txt

Subject: PCI: brcmstb: Add Broadcom Settopbox PCIe support (V2)

This patch series adds support for the Broadcom Settopbox PCIe host controller. It is targeted to Broadcom Settopbox chips running on ARM, ARM64, and MIPS platforms. Changes from V1: * Patch brcmstb-add-memory-API: - fix DT_PROP_DATA_TO_U32 macro. - dropped one EXPORT_SYMBOL, changed the

[PATCH 2/8] PCI: host: brcmstb: add DT docs for Brcmstb PCIe device

The DT bindings description of the Brcmstb PCIe device is described. This node can be used by almost all Broadcom settop box chips, using ARM, ARM64, or MIPS CPU architectures. Signed-off-by: Jim Quinlan --- .../devicetree/bindings/pci/brcmstb-pci.txt| 63 ++ 1 file

Subject: PCI: brcmstb: Add Broadcom Settopbox PCIe support (V2)

This patch series adds support for the Broadcom Settopbox PCIe host controller. It is targeted to Broadcom Settopbox chips running on ARM, ARM64, and MIPS platforms. Changes from V1: * Patch brcmstb-add-memory-API: - fix DT_PROP_DATA_TO_U32 macro. - dropped one EXPORT_SYMBOL, changed the

Re: [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic

On Mon, Oct 23, 2017 at 5:06 AM, David Laight <david.lai...@aculab.com> wrote: > From: Jim Quinlan >> Sent: 20 October 2017 16:28 >> On Fri, Oct 20, 2017 at 10:57 AM, Christoph Hellwig <h...@lst.de> wrote: >> > On Fri, Oct 20, 2017 at 10:41:56AM -0400, Jim

Re: [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic

On Mon, Oct 23, 2017 at 5:06 AM, David Laight wrote: > From: Jim Quinlan >> Sent: 20 October 2017 16:28 >> On Fri, Oct 20, 2017 at 10:57 AM, Christoph Hellwig wrote: >> > On Fri, Oct 20, 2017 at 10:41:56AM -0400, Jim Quinlan wrote: >> >> I am not sure I

Re: [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic

On Fri, Oct 20, 2017 at 10:57 AM, Christoph Hellwig <h...@lst.de> wrote: > On Fri, Oct 20, 2017 at 10:41:56AM -0400, Jim Quinlan wrote: >> I am not sure I understand your comment -- the size of the request >> shouldn't be a factor. Let's look at your example of the DMA r

Re: [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic

On Fri, Oct 20, 2017 at 10:57 AM, Christoph Hellwig wrote: > On Fri, Oct 20, 2017 at 10:41:56AM -0400, Jim Quinlan wrote: >> I am not sure I understand your comment -- the size of the request >> shouldn't be a factor. Let's look at your example of the DMA request >> of

Re: [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic

On Fri, Oct 20, 2017 at 3:37 AM, Christoph Hellwig <h...@lst.de> wrote: > On Thu, Oct 19, 2017 at 06:47:45PM -0400, Jim Quinlan wrote: >> The only way to prevent this is to reserve a single page at the end of >> the first memory region of any pair that are adjacent in physic

Re: [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic

On Fri, Oct 20, 2017 at 3:37 AM, Christoph Hellwig wrote: > On Thu, Oct 19, 2017 at 06:47:45PM -0400, Jim Quinlan wrote: >> The only way to prevent this is to reserve a single page at the end of >> the first memory region of any pair that are adjacent in physical >> memory

Re: [PATCH 2/9] PCI: host: brcmstb: add DT docs for Brcmstb PCIe device

On Thu, Oct 19, 2017 at 5:49 PM, Rob Herring <r...@kernel.org> wrote: > On Tue, Oct 17, 2017 at 5:42 PM, Jim Quinlan <jim2101...@gmail.com> wrote: >> On Tue, Oct 17, 2017 at 4:24 PM, Rob Herring <r...@kernel.org> wrote: >>> On Wed, Oct 11, 2017 at 06:34:22PM -

Re: [PATCH 2/9] PCI: host: brcmstb: add DT docs for Brcmstb PCIe device

On Thu, Oct 19, 2017 at 5:49 PM, Rob Herring wrote: > On Tue, Oct 17, 2017 at 5:42 PM, Jim Quinlan wrote: >> On Tue, Oct 17, 2017 at 4:24 PM, Rob Herring wrote: >>> On Wed, Oct 11, 2017 at 06:34:22PM -0400, Jim Quinlan wrote: >>>> The DT bindings descript

Re: [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic

On Thu, Oct 19, 2017 at 5:16 AM, Christoph Hellwig <h...@lst.de> wrote: > On Wed, Oct 18, 2017 at 10:41:17AM -0400, Jim Quinlan wrote: >> That's what brcm_to_{pci,cpu} are for -- they keep a list of the >> dma-ranges given in the PCIe DT node, and translate from system memor

Re: [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic

On Thu, Oct 19, 2017 at 5:16 AM, Christoph Hellwig wrote: > On Wed, Oct 18, 2017 at 10:41:17AM -0400, Jim Quinlan wrote: >> That's what brcm_to_{pci,cpu} are for -- they keep a list of the >> dma-ranges given in the PCIe DT node, and translate from system memory >> a

Re: [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic

On Wed, Oct 18, 2017 at 2:53 AM, Christoph Hellwig <h...@lst.de> wrote: > On Tue, Oct 17, 2017 at 12:11:55PM -0400, Jim Quinlan wrote: >> My understanding is that dma_pfn_offset is that it is a single >> constant offset from RAM, in our case, to map to PCIe space. > > Ye

Re: [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic

On Wed, Oct 18, 2017 at 2:53 AM, Christoph Hellwig wrote: > On Tue, Oct 17, 2017 at 12:11:55PM -0400, Jim Quinlan wrote: >> My understanding is that dma_pfn_offset is that it is a single >> constant offset from RAM, in our case, to map to PCIe space. > > Yes. > >>

Re: [PATCH 2/9] PCI: host: brcmstb: add DT docs for Brcmstb PCIe device

On Tue, Oct 17, 2017 at 4:24 PM, Rob Herring <r...@kernel.org> wrote: > On Wed, Oct 11, 2017 at 06:34:22PM -0400, Jim Quinlan wrote: >> The DT bindings description of the Brcmstb PCIe device is described. This >> node can be used by almost all Broadcom settop box chips

Re: [PATCH 2/9] PCI: host: brcmstb: add DT docs for Brcmstb PCIe device

On Tue, Oct 17, 2017 at 4:24 PM, Rob Herring wrote: > On Wed, Oct 11, 2017 at 06:34:22PM -0400, Jim Quinlan wrote: >> The DT bindings description of the Brcmstb PCIe device is described. This >> node can be used by almost all Broadcom settop box chips, using >> AR

Re: [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic

On Tue, Oct 17, 2017 at 4:14 AM, Christoph Hellwig wrote: > Just took a quick look over this and I basically agree with the comments > from Robin. > > What I don't understand is why you're even trying to do all these > hacky things. > > It seems like the controller should simply set

Re: [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic

On Tue, Oct 17, 2017 at 4:14 AM, Christoph Hellwig wrote: > Just took a quick look over this and I basically agree with the comments > from Robin. > > What I don't understand is why you're even trying to do all these > hacky things. > > It seems like the controller should simply set

Re: [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic

On Thu, Oct 12, 2017 at 2:04 PM, Robin Murphy <robin.mur...@arm.com> wrote: > [+DMA API maintainers] > > On 11/10/17 23:34, Jim Quinlan wrote: >> The Broadcom STB PCIe host controller is intimately related to the >> memory subsystem. This close relationship adds comp

Re: [PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic

On Thu, Oct 12, 2017 at 2:04 PM, Robin Murphy wrote: > [+DMA API maintainers] > > On 11/10/17 23:34, Jim Quinlan wrote: >> The Broadcom STB PCIe host controller is intimately related to the >> memory subsystem. This close relationship adds complexity to how cpu >> syst

Re: [PATCH 4/9] arm64: dma-mapping: export symbol arch_setup_dma_ops

On Thu, Oct 12, 2017 at 1:06 PM, Robin Murphy <robin.mur...@arm.com> wrote: > On 11/10/17 23:34, Jim Quinlan wrote: >> The BrcmSTB driver needs to get ahold of a pointer to swiotlb_dma_ops. >> However, that variable is defined as static. Instead, we use >> arch_setup_d

Re: [PATCH 4/9] arm64: dma-mapping: export symbol arch_setup_dma_ops

On Thu, Oct 12, 2017 at 1:06 PM, Robin Murphy wrote: > On 11/10/17 23:34, Jim Quinlan wrote: >> The BrcmSTB driver needs to get ahold of a pointer to swiotlb_dma_ops. >> However, that variable is defined as static. Instead, we use >> arch_setup_dma_ops() to get the point

Re: [PATCH 2/9] PCI: host: brcmstb: add DT docs for Brcmstb PCIe device

On Wed, Oct 11, 2017 at 8:55 PM, Brian Norris <computersforpe...@gmail.com> wrote: > Hi Jim, > > On Wed, Oct 11, 2017 at 06:34:22PM -0400, Jim Quinlan wrote: pcie->gen = 0; >> The DT bindings description of the Brcmstb PCIe device is described. This >> node can

Re: [PATCH 2/9] PCI: host: brcmstb: add DT docs for Brcmstb PCIe device

On Wed, Oct 11, 2017 at 8:55 PM, Brian Norris wrote: > Hi Jim, > > On Wed, Oct 11, 2017 at 06:34:22PM -0400, Jim Quinlan wrote: pcie->gen = 0; >> The DT bindings description of the Brcmstb PCIe device is described. This >> node can be used by almost all Broadcom settop

[PATCH 2/9] PCI: host: brcmstb: add DT docs for Brcmstb PCIe device

The DT bindings description of the Brcmstb PCIe device is described. This node can be used by almost all Broadcom settop box chips, using ARM, ARM64, or MIPS CPU architectures. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- .../devicetree/bindings/pci/brcmstb-pci.txt

[PATCH 3/9] PCI: host: brcmstb: Broadcom PCIe Host Controller

by the PCIe controller. It cannot be used or shared by any other HW. As such, the small amount of code for this controller is included in this driver as there is little upside to put it elsewhere. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- drivers/pci/host/Kconfig

[PATCH 2/9] PCI: host: brcmstb: add DT docs for Brcmstb PCIe device

The DT bindings description of the Brcmstb PCIe device is described. This node can be used by almost all Broadcom settop box chips, using ARM, ARM64, or MIPS CPU architectures. Signed-off-by: Jim Quinlan --- .../devicetree/bindings/pci/brcmstb-pci.txt| 106 + 1 file

[PATCH 3/9] PCI: host: brcmstb: Broadcom PCIe Host Controller

by the PCIe controller. It cannot be used or shared by any other HW. As such, the small amount of code for this controller is included in this driver as there is little upside to put it elsewhere. Signed-off-by: Jim Quinlan --- drivers/pci/host/Kconfig |8 + drivers/pci/host/Makefile

[PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic

ome with custom functions that translate the address and then call the base function. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- drivers/pci/host/Makefile | 3 +- drivers/pci/host/pci-brcmstb-dma.c | 219 + drivers/pci/host/pci-brcms

[PATCH 5/9] PCI: host: brcmstb: add dma-ranges for inbound traffic

ome with custom functions that translate the address and then call the base function. Signed-off-by: Jim Quinlan --- drivers/pci/host/Makefile | 3 +- drivers/pci/host/pci-brcmstb-dma.c | 219 + drivers/pci/host/pci-brcmstb.c | 150 +

[PATCH 7/9] PCI: host: brcmstb: add MSI capability

the internal Brcmstb MSI controller is intertwined with the PCIe controller, it is not its own platform device but rather part of the PCIe platform device. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- drivers/pci/host/Kconfig | 12 ++ drivers/pci/host/Makefile

[PATCH 7/9] PCI: host: brcmstb: add MSI capability

the internal Brcmstb MSI controller is intertwined with the PCIe controller, it is not its own platform device but rather part of the PCIe platform device. Signed-off-by: Jim Quinlan --- drivers/pci/host/Kconfig | 12 ++ drivers/pci/host/Makefile | 1 + drivers/pci/host/pci

[PATCH 6/9] PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for MIPS

Add MIPS as an arch that supports PCI_MSI_IRQ_DOMAIN and add generation of msi.h in the MIPS arch. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- arch/mips/include/asm/Kbuild | 1 + drivers/pci/Kconfig | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git

[PATCH 6/9] PCI/MSI: Enable PCI_MSI_IRQ_DOMAIN support for MIPS

Add MIPS as an arch that supports PCI_MSI_IRQ_DOMAIN and add generation of msi.h in the MIPS arch. Signed-off-by: Jim Quinlan --- arch/mips/include/asm/Kbuild | 1 + drivers/pci/Kconfig | 2 +- 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/arch/mips/include/asm/Kbuild b

[PATCH 4/9] arm64: dma-mapping: export symbol arch_setup_dma_ops

-by: Jim Quinlan <jim2101...@gmail.com> --- arch/arm64/mm/dma-mapping.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c index 614af88..dae572f 100644 --- a/arch/arm64/mm/dma-mapping.c +++ b/arch/arm64/mm/dma-mapping.c @@ -936,3 +936,4 @

[PATCH 4/9] arm64: dma-mapping: export symbol arch_setup_dma_ops

-by: Jim Quinlan --- arch/arm64/mm/dma-mapping.c | 1 + 1 file changed, 1 insertion(+) diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c index 614af88..dae572f 100644 --- a/arch/arm64/mm/dma-mapping.c +++ b/arch/arm64/mm/dma-mapping.c @@ -936,3 +936,4 @@ void arch_setup_dma_ops

[PATCH 9/9] MIPS: BMIPS: enable PCI

Adds the Kconfig hooks to enable the Broadcom STB PCIe root complex driver for Broadcom MIPS systems. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- arch/mips/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index cb7fcc4..83ba54d

[PATCH 8/9] MIPS: BMIPS: add PCI bindings for 7425, 7435

Adds the PCIe nodes for the Broadcom STB PCIe root complex. Signed-off-by: Jim Quinlan <jim2101...@gmail.com> --- arch/mips/boot/dts/brcm/bcm7425.dtsi | 25 + arch/mips/boot/dts/brcm/bcm7435.dtsi | 26 ++ arch/mips/boot/dt

[PATCH 9/9] MIPS: BMIPS: enable PCI

Adds the Kconfig hooks to enable the Broadcom STB PCIe root complex driver for Broadcom MIPS systems. Signed-off-by: Jim Quinlan --- arch/mips/Kconfig | 3 +++ 1 file changed, 3 insertions(+) diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig index cb7fcc4..83ba54d 100644 --- a/arch/mips

[PATCH 8/9] MIPS: BMIPS: add PCI bindings for 7425, 7435

Adds the PCIe nodes for the Broadcom STB PCIe root complex. Signed-off-by: Jim Quinlan --- arch/mips/boot/dts/brcm/bcm7425.dtsi | 25 + arch/mips/boot/dts/brcm/bcm7435.dtsi | 26 ++ arch/mips/boot/dts/brcm/bcm97425svmb.dts | 4 arch

PCI: brcmstb: Add Broadcom Settopbox PCIe support

This patch series adds support for the Broadcom Settopbox PCIe host controller. It is targeted to Broadcom Settopbox chips running on ARM, ARM64, and MIPS platforms. As the HW of the controller is intimately tied to the memory subsystem, there are some patches required that are not typical of a

PCI: brcmstb: Add Broadcom Settopbox PCIe support

This patch series adds support for the Broadcom Settopbox PCIe host controller. It is targeted to Broadcom Settopbox chips running on ARM, ARM64, and MIPS platforms. As the HW of the controller is intimately tied to the memory subsystem, there are some patches required that are not typical of a

[PATCH 1/9] SOC: brcmstb: add memory API

up DMA mappings for inbound regions. We cannot use memblock here or anything like what Linux provides because it collapses adjacent regions within a larger block, and here we actually need per-memory controller addresses and sizes, which is why we resort to manual DT parsing. Signed-off-by: Jim Q

[PATCH 1/9] SOC: brcmstb: add memory API

regions. We cannot use memblock here or anything like what Linux provides because it collapses adjacent regions within a larger block, and here we actually need per-memory controller addresses and sizes, which is why we resort to manual DT parsing. Signed-off-by: Jim Quinlan --- drivers/soc/bcm

Re: [PATCH 2/2] pci: host: Add Broadcom STB PCIE RC controller

I believe this code is still around for folks passing us a device tree with lacking information. It should be removed. > >> >>> +resource_list_for_each_entry(win, ) { >>> +struct brcm_window *w = >out_wins[i]; >>> + >>> +r = win->res; >>> + >>> +if (!r->flags) >>> +continue; >>> + >>> +switch (resource_type(r)) { >>> +case IORESOURCE_MEM: >>> +w->cpu_addr = r->start; >>> +w->size = resource_size(r); >>> +w->pcie_iomem_res.name = "External PCIe MEM"; >>> +w->pcie_iomem_res.flags = r->flags; >>> +w->pcie_iomem_res.start = r->start; >>> +w->pcie_iomem_res.end = r->end; >>> +pcie->num_out_wins++; >>> +i++; >>> +/* Request memory region resources. */ >>> +ret = devm_request_resource(>dev, >>> +_resource, >>> +>pcie_iomem_res); >>> +if (ret) { >>> +dev_err(>dev, >>> +"request PCIe memory resource >>> failed\n"); >>> +goto out_err_clk; >>> +} >>> +break; >>> + >>> +default: >>> +continue; >>> +} >>> +} >> >> What about IORESOURCE_IO? > > We do not support I/O space on this controller AFAIR. Our downstream > driver does insert a fake bogus I/O range, but I cannot really remember > why that was needed now, Jim do you remember? > -- > Florian We added a bogus IO region because there was no other way to proceed w/o getting an error. Or should I say, I knew of no other way to proceed... Thanks, Jim Quinlan

Re: [PATCH 2/2] pci: host: Add Broadcom STB PCIE RC controller

folks passing us a device tree with lacking information. It should be removed. > >> >>> +resource_list_for_each_entry(win, ) { >>> +struct brcm_window *w = >out_wins[i]; >>> + >>> +r = win->res; >>> + >>> +if (!r->flags) >>> +continue; >>> + >>> +switch (resource_type(r)) { >>> +case IORESOURCE_MEM: >>> +w->cpu_addr = r->start; >>> +w->size = resource_size(r); >>> +w->pcie_iomem_res.name = "External PCIe MEM"; >>> +w->pcie_iomem_res.flags = r->flags; >>> +w->pcie_iomem_res.start = r->start; >>> +w->pcie_iomem_res.end = r->end; >>> +pcie->num_out_wins++; >>> +i++; >>> +/* Request memory region resources. */ >>> +ret = devm_request_resource(>dev, >>> +_resource, >>> +>pcie_iomem_res); >>> +if (ret) { >>> +dev_err(>dev, >>> +"request PCIe memory resource >>> failed\n"); >>> +goto out_err_clk; >>> +} >>> +break; >>> + >>> +default: >>> +continue; >>> +} >>> +} >> >> What about IORESOURCE_IO? > > We do not support I/O space on this controller AFAIR. Our downstream > driver does insert a fake bogus I/O range, but I cannot really remember > why that was needed now, Jim do you remember? > -- > Florian We added a bogus IO region because there was no other way to proceed w/o getting an error. Or should I say, I knew of no other way to proceed... Thanks, Jim Quinlan

<    1   2   3   4   5