':
phy-tegra-usb.c:(.text+0x1dd4): undefined reference to `clk_get_parent'
Reported-by: kernel test robot
Signed-off-by: Krzysztof Kozlowski
Acked-by John Crispin
---
arch/mips/ralink/clk.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/mips/ralink/clk.c b/arch/mips
-by: John Crispin
Thanks !
---
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-realtek-rtl.c | 180 ++
2 files changed, 181 insertions(+)
create mode 100644 drivers/irqchip/irq-realtek-rtl.c
diff --git a/drivers/irqchip/Makefile b/drivers/irqchip
ller to only ignore the system reset, so all
reset lines with index greater than 0 are considered valid.
Signed-off-by: Sander Vanheule
Acked-by: John Crispin
---
This patch was tested on a TP-Link EAP235-Wall, with an MT7621DA SoC.
The bootloader on this device would leave reset line 2
On 04.01.21 14:17, Bert Vermeulen wrote:
This is a standard IRQ driver with only status and mask registers.
The mapping from SoC interrupts (18-31) to MIPS core interrupts is
done via an interrupt-map in device tree.
Signed-off-by: Bert Vermeulen
Signed-off-by: John Crispin
---
drivers
multiple bssid beacons aswell as EMA ones.
Signed-off-by: Aloka Dixit
Signed-off-by: John Crispin
---
include/net/cfg80211.h | 33 +
include/uapi/linux/nl80211.h | 21 +
net/wireless/nl80211.c | 34
.
The patch also makes sure that when a parent is closed, its children are
also closed.
Signed-off-by: Aloka Dixit
Signed-off-by: John Crispin
---
include/net/mac80211.h | 28 +-
net/mac80211/cfg.c | 53 ++
net/mac80211/debugfs.c | 1
As a non-transmitting interface does not broadcast a beacon, we do not want
to allow channel switch announcements. They need to be triggered on the
transmitting interface.
Signed-off-by: Aloka Dixit
Signed-off-by: John Crispin
---
net/mac80211/cfg.c | 3 +++
1 file changed, 3 insertions
Changes in V4
* move multiple bssid config from add_interface to start_ap
* add ema support
John Crispin (4):
nl80211: add basic multiple bssid support
mac80211: add multiple bssid support to interface handling
mac80211: add multiple bssid/EMA support to beacon handling
mac80211: don't
-by: Aloka Dixit
Signed-off-by: John Crispin
---
include/net/mac80211.h | 90 +
net/mac80211/cfg.c | 57 +-
net/mac80211/ieee80211_i.h | 2 +
net/mac80211/tx.c | 157 +
4 files changed, 286 insertions(+), 20
oops, CC'ed the wrong ML, sorry ...
On 09.10.20 12:13, John Crispin wrote:
Changes in V4
* move multiple bssid config from add_interface to start_ap
* add ema support
John Crispin (4):
nl80211: add basic multiple bssid support
mac80211: add multiple bssid support to interface handling
On 17.07.20 22:39, Florian Fainelli wrote:
On 7/17/2020 1:29 PM, Matthew Hagan wrote:
On 16/07/2020 23:09, Jakub Kicinski wrote:
On Mon, 13 Jul 2020 21:50:26 +0100 Matthew Hagan wrote:
Add names and decriptions of additional PORT0_PAD_CTRL properties.
Signed-off-by: Matthew Hagan
---
On 17.07.20 22:29, Matthew Hagan wrote:
On 16/07/2020 23:09, Jakub Kicinski wrote:
On Mon, 13 Jul 2020 21:50:26 +0100 Matthew Hagan wrote:
Add names and decriptions of additional PORT0_PAD_CTRL properties.
Signed-off-by: Matthew Hagan
---
On 03.05.20 22:18, Robert Marko wrote:
Add a driver to setup the USB PHY-s on Qualcom m IPQ40xx series SoCs.
The driver sets up HS and SS phys.
Signed-off-by: John Crispin
Signed-off-by: Robert Marko
Cc: Luka Perkov
Thanks for pushing these patches upstream !
On 27/07/2019 19:53, Martin Blumenstingl wrote:
+ * Copyright (C) 2011-2012 John Crispin
could you change that to j...@phrozen.org please
John
-by: John Crispin
ase that a device enables conntrack helper via
command "echo 1 > /proc/sys/net/netfilter/nf_conntrack_helper",
the status of IPS_HELPER_BIT will not present any change, and
consequently it loses the checking ability in the context.
Signed-off-by: Henry Yen
Reviewed-by: Ryder Lee
Tested-
refore, we also have to swap the order of registering the pinctrl
driver and registering the gpio chip.
You also have to add the "gpio-ranges" property to the pinctrl device
node to get it finally working.
Signed-off-by: Martin Schiller
Patch applied unless John Crispin has objections,
On 14/11/2018 13:47, Thierry Reding wrote:
On Tue, Nov 13, 2018 at 10:08:22AM +0800, Ryder Lee wrote:
The flag 'has_clks' and related checks are superfluous as the CCF
subsystem does this for you.
Both of these mechanisms aren't equivalent. While CCF can deal with
optional clocks, what the
On 14/11/2018 13:47, Thierry Reding wrote:
On Tue, Nov 13, 2018 at 10:08:22AM +0800, Ryder Lee wrote:
The flag 'has_clks' and related checks are superfluous as the CCF
subsystem does this for you.
Both of these mechanisms aren't equivalent. While CCF can deal with
optional clocks, what the
On 05/09/18 08:51, Mathias Kresin wrote:
From: Tobias Wolf
Set the PCI controller of_node such that PCI devices can be
instantiated via device tree.
Signed-off-by: Tobias Wolf
Signed-off-by: Mathias Kresin
Acked-by: John Crispin
---
arch/mips/pci/pci-rt2880.c | 2 ++
1 file
On 05/09/18 08:51, Mathias Kresin wrote:
From: Tobias Wolf
Set the PCI controller of_node such that PCI devices can be
instantiated via device tree.
Signed-off-by: Tobias Wolf
Signed-off-by: Mathias Kresin
Acked-by: John Crispin
---
arch/mips/pci/pci-rt2880.c | 2 ++
1 file
asked me to verify his
proposed patch which i just did. I can confirm the the patch fixes the issue
on 4.14.67 and Greg should add it to the stable queue please.
Tested-by: John Crispin
Thanks,
John
asked me to verify his
proposed patch which i just did. I can confirm the the patch fixes the issue
on 4.14.67 and Greg should add it to the stable queue please.
Tested-by: John Crispin
Thanks,
John
Add a driver to setup the USB phy on Qualcom Dakota SoCs.
The driver sets up HS and SS phys. In case of HS some magic values need to
be written to magic offsets. These were taken from the SDK driver.
Signed-off-by: John Crispin
---
drivers/phy/qualcomm/Kconfig| 7 +
drivers
This series adds a PHY driver for the Qualcomm Dakota SoC
Changes V1->V2
* fix the compat string inside the binding doc
* fix up the reset names inside the binding doc
* reflect the above changes in the driver and dts/i files
John Crispin (3):
dt-bindings: phy-qcom-ipq4019-usb: add bind
This patch adds the binding documentation for the HS/SS USB PHY found
inside Qualcomm Dakota SoCs.
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Signed-off-by: John Crispin
---
.../bindings/phy/phy-qcom-ipq4019-usb.txt | 21 +
1 file changed, 21 insertions
This series adds a PHY driver for the Qualcomm Dakota SoC
Changes V1->V2
* fix the compat string inside the binding doc
* fix up the reset names inside the binding doc
* reflect the above changes in the driver and dts/i files
John Crispin (3):
dt-bindings: phy-qcom-ipq4019-usb: add bind
This patch adds the binding documentation for the HS/SS USB PHY found
inside Qualcomm Dakota SoCs.
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Signed-off-by: John Crispin
---
.../bindings/phy/phy-qcom-ipq4019-usb.txt | 21 +
1 file changed, 21 insertions
Add a driver to setup the USB phy on Qualcom Dakota SoCs.
The driver sets up HS and SS phys. In case of HS some magic values need to
be written to magic offsets. These were taken from the SDK driver.
Signed-off-by: John Crispin
---
drivers/phy/qualcomm/Kconfig| 7 +
drivers
This patch makes USB work on the Dakota EVB.
Signed-off-by: John Crispin
---
arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 20 +++
arch/arm/boot/dts/qcom-ipq4019.dtsi | 76 +++
2 files changed, 96 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq4019
This patch makes USB work on the Dakota EVB.
Signed-off-by: John Crispin
---
arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 20 +++
arch/arm/boot/dts/qcom-ipq4019.dtsi | 76 +++
2 files changed, 96 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq4019
This patch adds the binding documentation for the HS/SS USB PHY found
inside Qualcom Dakota SoCs.
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Signed-off-by: John Crispin
---
.../bindings/phy/phy-qcom-ipq4019-usb.txt | 21 +
1 file changed, 21 insertions
This patch adds the binding documentation for the HS/SS USB PHY found
inside Qualcom Dakota SoCs.
Cc: Rob Herring
Cc: devicet...@vger.kernel.org
Signed-off-by: John Crispin
---
.../bindings/phy/phy-qcom-ipq4019-usb.txt | 21 +
1 file changed, 21 insertions
This patch makes USB work on the Dakota EVB.
Signed-off-by: John Crispin
---
arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 20 +++
arch/arm/boot/dts/qcom-ipq4019.dtsi | 76 +++
2 files changed, 96 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq4019
This patch makes USB work on the Dakota EVB.
Signed-off-by: John Crispin
---
arch/arm/boot/dts/qcom-ipq4019-ap.dk01.1.dtsi | 20 +++
arch/arm/boot/dts/qcom-ipq4019.dtsi | 76 +++
2 files changed, 96 insertions(+)
diff --git a/arch/arm/boot/dts/qcom-ipq4019
Add a driver to setup the USB phy on Qualcom Dakota SoCs.
The driver sets up HS and SS phys. In case of HS some magic values need to
be written to magic offsets. These were taken from the SDK driver.
Signed-off-by: John Crispin
---
drivers/phy/qualcomm/Kconfig| 7 +
drivers
Add a driver to setup the USB phy on Qualcom Dakota SoCs.
The driver sets up HS and SS phys. In case of HS some magic values need to
be written to magic offsets. These were taken from the SDK driver.
Signed-off-by: John Crispin
---
drivers/phy/qualcomm/Kconfig| 7 +
drivers
On 10/07/18 07:09, Ryder Lee wrote:
Cleanup binding document to get rid of unsupported reference boards
for MT7623N.
Cc: John Crispin
Cc: Sean Wang
Signed-off-by: Ryder Lee
Acked-by: John Crispin
---
Documentation/devicetree/bindings/arm/mediatek.txt | 3 ---
1 file changed, 3
On 10/07/18 07:09, Ryder Lee wrote:
Normally, we didn't release this kind of baord to user. This specific
board exists only in the early stage of development inside MediaTek -
and that may confuse peoples.
Hence this patch removes related files accordingly.
Cc: John Crispin
Cc: Sean Wang
On 10/07/18 07:09, Ryder Lee wrote:
Cleanup binding document to get rid of unsupported reference boards
for MT7623N.
Cc: John Crispin
Cc: Sean Wang
Signed-off-by: Ryder Lee
Acked-by: John Crispin
---
Documentation/devicetree/bindings/arm/mediatek.txt | 3 ---
1 file changed, 3
On 10/07/18 07:09, Ryder Lee wrote:
Normally, we didn't release this kind of baord to user. This specific
board exists only in the early stage of development inside MediaTek -
and that may confuse peoples.
Hence this patch removes related files accordingly.
Cc: John Crispin
Cc: Sean Wang
arch/mips/ath79/irq.c.
Signed-off-by: John Crispin <j...@phrozen.org>
---
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-ath79-intc.c | 108 +++
2 files changed, 109 insertions(+)
create mode 100644 drivers/irqchip/irq-ath79-intc.c
diff
arch/mips/ath79/irq.c.
Signed-off-by: John Crispin
---
drivers/irqchip/Makefile | 1 +
drivers/irqchip/irq-ath79-intc.c | 108 +++
2 files changed, 109 insertions(+)
create mode 100644 drivers/irqchip/irq-ath79-intc.c
diff --git a/drivers/irqchip
On 15/03/18 21:12, NeilBrown wrote:
On Thu, Mar 15 2018, John Crispin wrote:
On 15/03/18 11:48, Dan Carpenter wrote:
This all seems fine. Generally the requirements for staging are that it
has a TODO, someone to work on it, and it doesn't break the build. But
some of the patches don't
On 15/03/18 21:12, NeilBrown wrote:
On Thu, Mar 15 2018, John Crispin wrote:
On 15/03/18 11:48, Dan Carpenter wrote:
This all seems fine. Generally the requirements for staging are that it
has a TODO, someone to work on it, and it doesn't break the build. But
some of the patches don't
On 15/03/18 11:48, Dan Carpenter wrote:
This all seems fine. Generally the requirements for staging are that it
has a TODO, someone to work on it, and it doesn't break the build. But
some of the patches don't have commit message and those are required and
some of the commit messages are just
On 15/03/18 11:48, Dan Carpenter wrote:
This all seems fine. Generally the requirements for staging are that it
has a TODO, someone to work on it, and it doesn't break the build. But
some of the patches don't have commit message and those are required and
some of the commit messages are just
Hi,
comments inline
On 01/09/17 16:53, Harvey Hunt wrote:
Previously, mt7620.c defined the clocks for uarts with the names
uartlite, uart1 and uart2. Rename them to serial{0,1,2} and update
the devicetree node names.
Signed-off-by: Harvey Hunt
Cc:
Hi,
comments inline
On 01/09/17 16:53, Harvey Hunt wrote:
Previously, mt7620.c defined the clocks for uarts with the names
uartlite, uart1 and uart2. Rename them to serial{0,1,2} and update
the devicetree node names.
Signed-off-by: Harvey Hunt
Cc: devicet...@vger.kernel.org
Cc:
d Bergmann <a...@arndb.de>
Acked-by: John Crispin <j...@phrozen.org>
gregkh: can you fold this into the commit sitting inside usb-next ?
---
drivers/phy/ralink/phy-ralink-usb.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/phy/rali
d Bergmann
Acked-by: John Crispin
gregkh: can you fold this into the commit sitting inside usb-next ?
---
drivers/phy/ralink/phy-ralink-usb.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/drivers/phy/ralink/phy-ralink-usb.c
b/drivers/phy/ralink/phy-ra
On 10/08/17 08:42, Eric Dumazet wrote:
On Wed, 2017-08-09 at 22:52 -0700, David Miller wrote:
From: John Crispin <j...@phrozen.org>
Date: Wed, 9 Aug 2017 14:41:15 +0200
RPS and probably other kernel features are currently broken on some if not
all DSA devices. The root
On 10/08/17 08:42, Eric Dumazet wrote:
On Wed, 2017-08-09 at 22:52 -0700, David Miller wrote:
From: John Crispin
Date: Wed, 9 Aug 2017 14:41:15 +0200
RPS and probably other kernel features are currently broken on some if not
all DSA devices. The root cause of this is that skb_hash
= skb->dev->dsa_ptr->tag_ops;
^
make[3]: *** [net/core/flow_dissector.o] Error 1
Signed-off-by: John Crispin <j...@phrozen.org>
---
net/core/flow_dissector.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/net/core/flow_dissector.c b/net/core/flow_dissector.c
index 5
= skb->dev->dsa_ptr->tag_ops;
^
make[3]: *** [net/core/flow_dissector.o] Error 1
Signed-off-by: John Crispin
---
net/core/flow_dissector.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/net/core/flow_dissector.c b/net/core/flow_dissector.c
index 5b5be9577257..79b9c06c83
On 10/08/17 08:42, Eric Dumazet wrote:
On Wed, 2017-08-09 at 22:52 -0700, David Miller wrote:
From: John Crispin <j...@phrozen.org>
Date: Wed, 9 Aug 2017 14:41:15 +0200
RPS and probably other kernel features are currently broken on some if not
all DSA devices. The root
On 10/08/17 08:42, Eric Dumazet wrote:
On Wed, 2017-08-09 at 22:52 -0700, David Miller wrote:
From: John Crispin
Date: Wed, 9 Aug 2017 14:41:15 +0200
RPS and probably other kernel features are currently broken on some if not
all DSA devices. The root cause of this is that skb_hash
We need to access this struct from within the flow_dissector to fix
dissection for packets coming in on DSA devices.
Signed-off-by: Muciri Gatimu <muc...@openmesh.com>
Signed-off-by: Shashidhar Lakkavalli <shashidhar.lakkava...@openmesh.com>
Signed-off-by: John Crispin <j
We need to access this struct from within the flow_dissector to fix
dissection for packets coming in on DSA devices.
Signed-off-by: Muciri Gatimu
Signed-off-by: Shashidhar Lakkavalli
Signed-off-by: John Crispin
---
include/net/dsa.h | 7 +++
net/dsa/dsa_priv.h | 7 ---
2 files
hashidhar Lakkavalli <shashidhar.lakkava...@openmesh.com>
Signed-off-by: John Crispin <j...@phrozen.org>
---
net/core/flow_dissector.c | 12
1 file changed, 12 insertions(+)
diff --git a/net/core/flow_dissector.c b/net/core/flow_dissector.c
index 0cc672aba1f0..5b5be9577257
off-by: John Crispin
---
net/core/flow_dissector.c | 12
1 file changed, 12 insertions(+)
diff --git a/net/core/flow_dissector.c b/net/core/flow_dissector.c
index 0cc672aba1f0..5b5be9577257 100644
--- a/net/core/flow_dissector.c
+++ b/net/core/flow_dissector.c
@@ -4,6 +4,7 @@
#incl
ter
John Crispin (4):
net-next: dsa: move struct dsa_device_ops to the global header file
net-next: dsa: add flow_dissect callback to struct dsa_device_ops
net-next: tag_mtk: add flow_dissect callback to the ops struct
net-next: dsa: fix flow dissection
include/net/dsa.h |
ter
John Crispin (4):
net-next: dsa: move struct dsa_device_ops to the global header file
net-next: dsa: add flow_dissect callback to struct dsa_device_ops
net-next: tag_mtk: add flow_dissect callback to the ops struct
net-next: dsa: fix flow dissection
include/net/dsa.h |
hashing function properly.
Signed-off-by: Muciri Gatimu <muc...@openmesh.com>
Signed-off-by: Shashidhar Lakkavalli <shashidhar.lakkava...@openmesh.com>
Signed-off-by: John Crispin <j...@phrozen.org>
---
net/dsa/tag_mtk.c | 14 --
1 file changed, 12 insertions(+), 2
hashing function properly.
Signed-off-by: Muciri Gatimu
Signed-off-by: Shashidhar Lakkavalli
Signed-off-by: John Crispin
---
net/dsa/tag_mtk.c | 14 --
1 file changed, 12 insertions(+), 2 deletions(-)
diff --git a/net/dsa/tag_mtk.c b/net/dsa/tag_mtk.c
index 2f32b7ea3365
and offset of the network header.
Signed-off-by: Muciri Gatimu <muc...@openmesh.com>
Signed-off-by: Shashidhar Lakkavalli <shashidhar.lakkava...@openmesh.com>
Signed-off-by: John Crispin <j...@phrozen.org>
---
include/net/dsa.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/i
and offset of the network header.
Signed-off-by: Muciri Gatimu
Signed-off-by: Shashidhar Lakkavalli
Signed-off-by: John Crispin
---
include/net/dsa.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/net/dsa.h b/include/net/dsa.h
index 65d7804c6f69..7f46b521313e 100644
--- a/include
The MT7623 has several DMA rings. Inside the SW path, the core will use
the PDMA when receiving traffic. While bringing up the HW path we noticed
that the PPE requires the QDMA RX to also be brought up as it uses this
ring internally for its flow scheduling.
John Crispin (2):
net-next: mediatek
The MT7623 has several DMA rings. Inside the SW path, the core will use
the PDMA when receiving traffic. While bringing up the HW path we noticed
that the PPE requires the QDMA RX to also be brought up as it uses this
ring internally for its flow scheduling.
John Crispin (2):
net-next: mediatek
Trivial patch fixing 2 typos.
Signed-off-by: John Crispin <j...@phrozen.org>
---
drivers/net/ethernet/mediatek/mtk_eth_soc.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
This patch is in preparation for adding HW flow and QoS offloading. For
those features to work, the driver needs to bring up the first QDMA RX
ring. This ring is used by the PPE offloading HW.
Signed-off-by: John Crisp in
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 36
Trivial patch fixing 2 typos.
Signed-off-by: John Crispin
---
drivers/net/ethernet/mediatek/mtk_eth_soc.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ethernet/mediatek/mtk_eth_soc.h
b/drivers/net/ethernet/mediatek/mtk_eth_soc.h
index 4594862e5a9b
This patch is in preparation for adding HW flow and QoS offloading. For
those features to work, the driver needs to bring up the first QDMA RX
ring. This ring is used by the PPE offloading HW.
Signed-off-by: John Crisp in
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 36
-by: Shashidhar Lakkavalli <shashidhar.lakkava...@openmesh.com>
Signed-off-by: Muciri Gatimu <muc...@openmesh.com>
Signed-off-by: John Crispin <j...@phrozen.org>
---
drivers/net/dsa/mt7530.c | 38 ++
drivers/net/dsa/mt7530.h | 1 +
2 files chan
-by: Shashidhar Lakkavalli
Signed-off-by: Muciri Gatimu
Signed-off-by: John Crispin
---
drivers/net/dsa/mt7530.c | 38 ++
drivers/net/dsa/mt7530.h | 1 +
2 files changed, 39 insertions(+)
diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c
index
Hi Harvey,
Thanks for picking up my stale patch. small comment inline ...
On 03/08/17 12:32, Harvey Hunt wrote:
From: John Crispin <j...@phrozen.org>
Add a driver to setup the USB phy on Mediatek/Ralink SoCs.
The driver is trivial and only sets up power and host mode.
Signed-off-by
Hi Harvey,
Thanks for picking up my stale patch. small comment inline ...
On 03/08/17 12:32, Harvey Hunt wrote:
From: John Crispin
Add a driver to setup the USB phy on Mediatek/Ralink SoCs.
The driver is trivial and only sets up power and host mode.
Signed-off-by: John Crispin
Signed-off
On 02/08/17 09:19, Zhi Mao wrote:
Hi John, Matthais & Thierry,
Just a gentle ping on this issue again.
Do you have any update?
Regards,
Zhi
Hi Zhi,
looks good to me
Acked-by: John Crispin <j...@phrozen.org>
John
On 02/08/17 09:19, Zhi Mao wrote:
Hi John, Matthais & Thierry,
Just a gentle ping on this issue again.
Do you have any update?
Regards,
Zhi
Hi Zhi,
looks good to me
Acked-by: John Crispin
John
g most of the qualifications
, stress test and submitting a lot of patches for the driver while
Nelson was looking into the aspects more on hardware additions and details
such as introducing PDMA with Hardware LRO to the driver. Also update
John's up-to-date mail address in the patch.
Cc: John Cris
and submitting a lot of patches for the driver while
Nelson was looking into the aspects more on hardware additions and details
such as introducing PDMA with Hardware LRO to the driver. Also update
John's up-to-date mail address in the patch.
Cc: John Crispin
Signed-off-by: Sean Wang
Signed-off
On 26/07/17 17:10, Andrew Lunn wrote:
On Fri, Jul 21, 2017 at 10:58:12AM +0200, John Crispin wrote:
RPS and probably other kernel features are currently broken on some if not
all DSA devices. The root cause of this is that skb_hash will call the
flow_dissector. At this point the skb still
On 26/07/17 17:10, Andrew Lunn wrote:
On Fri, Jul 21, 2017 at 10:58:12AM +0200, John Crispin wrote:
RPS and probably other kernel features are currently broken on some if not
all DSA devices. The root cause of this is that skb_hash will call the
flow_dissector. At this point the skb still
On 21/07/17 17:56, Paolo Abeni wrote:
Hi,
On Fri, 2017-07-21 at 17:20 +0200, John Crispin wrote:
In order to make HW flow offloading work in latest MediaTek silicon we need
to propagate part of the RX DMS descriptor to the upper layers populating
the flow offload engines HW tables
On 21/07/17 17:56, Paolo Abeni wrote:
Hi,
On Fri, 2017-07-21 at 17:20 +0200, John Crispin wrote:
In order to make HW flow offloading work in latest MediaTek silicon we need
to propagate part of the RX DMS descriptor to the upper layers populating
the flow offload engines HW tables
the required information and make it persistent for the lifecycle of the
skb and its clones.
Signed-off-by: John Crispin <j...@phrozen.org>
---
include/linux/skbuff.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index 4093552be1de..db9576
the required information and make it persistent for the lifecycle of the
skb and its clones.
Signed-off-by: John Crispin
---
include/linux/skbuff.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index 4093552be1de..db9576cd946b 100644
is still using NF hooks and
I plan to rebase it and send it upstream once the flow table offloading
patches that folks are working on are upstream.
I am right now trying to get rid of the remaning hacks in the code and
wanted to know if this series would be a feasible solution.
John
John Crispin
is still using NF hooks and
I plan to rebase it and send it upstream once the flow table offloading
patches that folks are working on are upstream.
I am right now trying to get rid of the remaning hacks in the code and
wanted to know if this series would be a feasible solution.
John
John Crispin
that is later required by the upper layers to populate the flow offloading
engines HW tables properly. This patch sets the skb_shared_info's dma_desc
field so that we can use the value later on.
Signed-off-by: John Crispin <j...@phrozen.org>
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 4 +
that is later required by the upper layers to populate the flow offloading
engines HW tables properly. This patch sets the skb_shared_info's dma_desc
field so that we can use the value later on.
Signed-off-by: John Crispin
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 4
1 file changed, 4
The MT7530 inserts the 4 magic header in between the 802.3 address and
protocol field. The patch defines these header such that the flow_disector
can properly parse the packet and thus allows hashing to function properly.
Signed-off-by: John Crispin <j...@phrozen.org>
---
net/dsa/tag_mtk
The MT7530 inserts the 4 magic header in between the 802.3 address and
protocol field. The patch defines these header such that the flow_disector
can properly parse the packet and thus allows hashing to function properly.
Signed-off-by: John Crispin
---
net/dsa/tag_mtk.c | 6 --
1 file
We need to access this struct from within the flow_dissector to fix
dissection for packets coming in on DSA devices.
Signed-off-by: John Crispin <j...@phrozen.org>
---
include/net/dsa.h | 7 +++
net/dsa/dsa_priv.h | 7 ---
2 files changed, 7 insertions(+), 7 deletions(-)
diff
We need to access this struct from within the flow_dissector to fix
dissection for packets coming in on DSA devices.
Signed-off-by: John Crispin
---
include/net/dsa.h | 7 +++
net/dsa/dsa_priv.h | 7 ---
2 files changed, 7 insertions(+), 7 deletions(-)
diff --git a/include/net/dsa.h b
ned by the dsa tag driver thus fixing dissection, hashing and RPS.
Signed-off-by: John Crispin <j...@phrozen.org>
---
net/core/flow_dissector.c | 12
1 file changed, 12 insertions(+)
diff --git a/net/core/flow_dissector.c b/net/core/flow_dissector.c
index fc5fc4594c90..1268ae75c3
ned by the dsa tag driver thus fixing dissection, hashing and RPS.
Signed-off-by: John Crispin
---
net/core/flow_dissector.c | 12
1 file changed, 12 insertions(+)
diff --git a/net/core/flow_dissector.c b/net/core/flow_dissector.c
index fc5fc4594c90..1268ae75c3b3 100644
--- a/net/c
Adding these 2 new fields allows a DSA device to indicate the offsets of
the 802.3 header caused by the insertion of the switches tag.
Signed-off-by: John Crispin <j...@phrozen.org>
---
include/net/dsa.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/net/dsa.h b/inclu
Adding these 2 new fields allows a DSA device to indicate the offsets of
the 802.3 header caused by the insertion of the switches tag.
Signed-off-by: John Crispin
---
include/net/dsa.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/include/net/dsa.h b/include/net/dsa.h
index
hecker to avoid the kind of
situation happening.
Signed-off-by: Sean Wang <sean.w...@mediatek.com>
Thanks, i ran into the same problem last week and was going to send a
fix shortly.
Acked-by: John Crispin <j...@phrozen.org>
---
drivers/net/ethernet/mediatek/mtk_eth_soc.c | 6 +
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